Autonomous Tracking Unit

CPSC 483 Section 501 Biweekly #3 Spring 99 John Berglund Randy Cuaycong Wes Day Andrew Fikes Kamran Shah ro!essor" Dr# Ra$i %aha&atra

Table of Contents
CAME A !"#E $ACE%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%3 MEM& ' A"( CAME A C&"# &)%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%3 A)*& !#+M %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%3 JA'A CA%(RA#############################################################################################################################################) '(R*+,- #######################################################################################################################################################. Sam&le o! Command /andshaking##########################################################################################################. Sam&le o! a Data Trans!er########################################################################################################################0 P &#&#'PE B&A (%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%5 S'S#EM !"#E* A#!&"%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%5

Camera Interface
A!ter the midterm &resentation1 our grou& returned to la$ and $egan working on the di!!iculties with the second camera inter!ace# *n 2ust a manner o! hours1 we diagnosed and !i3ed the &ro$lem that had &lagued us !or o4er three weeks# *t turns out1 that in our attem&t to trans!er the data $ack to the BS51 we were trans!erring data too slowly !rom the camera# The result was that the CCD in the camera was decaying at a rate !aster than we could download it# When we raised the trans!er rate !rom the 6uickCam1 the image magically a&&eared1 and we reali7ed that we had wasted three weeks on a 4ery sim&le &ro$lem# Des&ite this1 we were still o4er2oyed1 and danced around in circles !or a while# ,nce we got the camera inter!ace u& and working consistently1 we im&lemented a !ew additional !eatures and cleaned u& the module considera$ly# We trimmed the C+B count !or the module !rom 8. C+Bs to 2ust under 90# As it stands now1 the module su&&orts all &ossi$le commands to the camera# We ha4e also thoroughly tested it using the BS**1 and our initial tests show that a !rame rate o! ): to .: !rames &er second is &ossi$le# This !rame rate was way $eyond our initial e3&ectations1 and it should im&ro4e the &er!ormance o! our camera system# We $elie4e that these !rame rates are the direct result o! us taking the time to modi!y the original camera inter!ace# The ne3t ma2or hurdle that we !ace is to document and archi4e the &ro2ect so that later grou&s can take ad4antage o! our e!!orts# This documentation is currently $eing de4elo&ed1 and should $e !inished $y the time the &ro2ect is due#

Memory and Camera Control

We $egan inter!acing the camera module with the memory control module ;see the System Integration section<# We used the $asic stam& in &lace o! the Algorithm module !or testing# The stam& sent commands to ha4e the camera initiali7ed1 to get a 4ideo !rame1 and to return the &i3el data which was then dis&layed on a terminal# We ha4e had some success1 $ut our results are not yet &er!ect# At this time we are still working to im&ro4e the timing o! our inter!ace# Soon we ho&e to integrate the Algorithm module as well# ,ne o! the di!!iculties we ha4e e3&erienced is that some o! us did not reali7e that the clocks $etween the modules on the same F -A are not necessarily synchroni7ed# This is causing timing &ro$lems !or us# We ha4e had to modi!y the memory module to add =wait states> to account !or causality &ro$lems which occurred when inter!acing with other modules#

Algorithm
JAVA Camera
Se4eral algorithms were &ro&osed during our in4estigation o! motion tracking# Since im&lementation in hardware was &ro4en to $e a di!!icult &lat!orm to test algorithms1 we decided to im&lement our &ro&osed algorithms in JA'A# We chose JA'A $ecause o! its e3tensi4e gra&hical user inter!ace li$raries# This would allow us to create a $asic &lat!orm to test 4arious algorithms without de4oting 4alua$le time and e!!ort#

Still screen shots are used to simulate in&ut !rom the camera# Algorithms may use either one screen shot or two to &er!orm calculations# When the ?Find? $utton is selected1 it &er!orms its calculations and &laces a red crosshair on the resulting ?center?# Un!ortunately1 the ma2ority o! our &ro&osed algorithms are di!!icult to im&lement in hardware# This is due to the limited num$er o! C+Bs and the com&le3ity in4ol4ed# We chose the sim&lest algorithm1 which detects a solid uni!orm o$2ect on a solid white $ackground#

Verilog
The 'erilog im&lementation o! the algorithm has . routines1 with states within those routines# These routines are camera initiali7ation1 take &icture1 row o&eration1 and column o&eration# The camera initiali7ation and take &icture routines inter!ace with the camera control# ,nce the command is issued1 the algorithm waits until that &rocess is com&lete# The row and column o&erations interact with the memory module# These routines o&erate se@uentially and sum each row>s &i3el intensities# Su$tracting a row>s sum !rom the &re4ious row>s sum creates a delta 4alue !or the row# These delta 4alues are com&ared to ma3imum and minimum 4alues# *! the current delta is a ma3imum or minimum it re&laces that 4alue and the row num$er is stored# When all rows ha4e $een summed1 the ma3imum and minimum deltas re&resent the to& and $ottom edges o! a dark o$2ect# The center o! the o$2ect is o$tained $y adding the to& and $ottom row num$ers and shi!ting right $y one# The same $asic &rocedures are used !or the column o&eration# The main di!!erence $etween the row and column o&erations in4ol4es the handling o! the data returned !rom the memory# (ach $yte returned re&resents two &i3els in a row1 so summing a row is sim&le# When summing columns1 each $yte re&resents two se&arate columns1 so two columns should $e &rocessed simultaneously to minimi7e memory accesses# Testing o! the 'erilog code is still in &rogress# A simulation o! the algorithm with reduced rows and columns a&&ears to work# /owe4er1 e3tensi4e simulation with actual si7ed rows and columns would $e too &ainstaking gi4en the com&le3ity o! the inter!aces and the num$er o! states re@uired !or each row and column#

Sample of Command Handshaking

*nstruction Send 'alid This handshake is used to issue one o! two commands" *nitiali7e Camera and -et Frame# *nitiali7e camera is issued once to $egin taking &ictures# -et !rame causes the camera to take a new &icture#

Sample of a Data Transfer

*nstruction arameter Ready Send 'alid Data
Data 'alid Data 'alid Trans!er Com&lete

Prototype Board
The &roto$oard was constructed o4er a &eriod o! two weeks# First1 the &ower and ground &ins to the Ailin3 .:::Bchi& socket was wired1 along with &ins !or the Achecker ca$le# A!ter success!ul testing o! the chi&s wiring1 we added the switches ;with resistor $ank<1 $uttons1 9Bdigit +(D dis&lay1 and ser4o inter!ace &ins# The last com&onents added were the memory sockets1 &arallel &ort inter!ace1 and key$oard inter!ace# ,ur $oard is com&lete with the e3ce&tion o! the (( R,% chi& socket1 which we will add when necessary# We tested the wiring o! the SRA% on our $oard and our a$ility to write to and read !rom memory $y making an e3tensi4e test using 'erilog# The test !irst writes a di!!erent 4alue to e4ery single memory address and goes $ack and reads the data# *t tests each 4alue to see i! what was written was the same as what was read $ack# When the test is downloaded to the $oard1 an =idle> light comes on# When we &ress a $utton1 an =acti4e> light comes on and the =idle> light goes o!! while the test is running# *! an error is encountered1 $oth lights come on# *! the test !inishes without error1 the =acti4e> light goes o!! and the =idle> light comes on again# We also added a$ility to change the address read !rom the SRA% while in the idle state $y &ressing a di!!erent $utton# A!ter de$ugging this test module1 and using the 4oltage &ro$e to manually test the 4alues at se4eral addresses1 * con!irmed that the test was running &ro&erly at u& to C%/7 which is !ast enough !or our &ro2ect#

System Integration
The wire wra&&ing o! our $oard $egan 2ust $e!ore our midBterm re&ort and was com&leted shortly a!ter# This $oard has ena$led us to lea4e the constraints o! the demo$oard1 and $egin the integration o! the di!!erent system modules# Be!ore we $egan com$ining modules1 howe4er1 we took the time to 4eri!y the currentD&ower consum&tion o! each o! the com&onents on the newly $uilt $oard# Using an ammeter1 we !ound that the Camera *nter!ace module draws C:mA1 and each SRA% chi& draws a$out 5:mA# This is 4ery close to what we had e3&ected1 and is well within a&&ro&riate limits A!ter com&leting and success!ully testing the Camera *nter!ace module and success!ully simulating the %emory and Camera Control module1 $oth o! the modules were com$ined into a single Ailin3 &ro2ect# This com$ination was !irst simulated on the C to ensure that the

handshaking was o&erating &ro&erly# We then used a BS** to &hysically test the com$ined inter!aces# The BS** simulated the Algorithm module and sent instructions to initiali7e and store images !rom the camera# The BS** then retrie4ed the stored images in $oth row and column oriented !ashions1 and the results were com&ared to test the consistency o! the 4alues $eing returned# The consistency is not great1 and although changes were made that im&ro4ed it greatly1 consistency still remains an o&en issue# *t is our o&inion1 howe4er1 that these are minor &ro$lems and should not a!!ect the o4erall &er!ormance o! the system# We are currently on the !inal stage o! module integration1 which in4ol4es integrating the Algorithm module and Ser4o Control module with the Camera *nter!ace module and the Camera and %emory Control module# The new &ro2ect is codeBnamed ESha$angF and re&resents the entire Autonomous Tracking Unit# As o! Tuesday1 we success!ully im&lemented the unit1 which used total o! )88 C+Bs ;a!ter some 4icious register trimming<# Although it im&lemented correctly1 the system does not work# The $ugs a&&ear to $e timing related and are currently $eing worked on# We still e3&ect to com&lete integration $y A&ril 5)1 G888#