SEMINAR REPORT

POLYMER MEMORY

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CHAPTER 1 INTRODUCTION
Memory devices play an important role in the development of electronics and inspire advances in the relevant technologies. At least 20 percentage of todays device market is covered by semiconductor memory devices. There is a growing need to generate inexpensive and fast memory devices that are characterized by high densities and longer data retention times. It is suggested that demand for new types of memory devices clearly exists and newcomer memory devices must exceed the existing speed and cost constraints of todays entrenched technologies. Organic memory devices (OMDs) may have some solution to this need. The usage of organic materials in the manufacture of electronic devices is on the rise. This is due to the ease of fabrication of organic electronic devices as well as the applicability of inexpensive substrates in such structures. The primary aim of such endeavors is to produce devices that exhibit two distinct electrical conductance states, when voltage is applied. The establishment of these two states can be viewed as the realization of nonvolatile memory. Organic memories based on polymer materials have recently attracted more attention as one of the future data storage devices. They are proposed to revolutionize electrical applications by providing extremely inexpensive, lightweight, and transparent modules that can be fabricated onto plastic, glass, or the top layer of CMOS hybrid integration Circuits. However, the application of organic/polymer memories faces serious challenges. Most organic materials feature frailty during the standard CMOS lithography processes. That is the main reason why most organic memory devices have a large size of millimeters using shadow-mask-patterning technology. Moreover, research on polymer memories has so far been focused on conductive polymers with embedded metal nano crystals or donor/acceptor polymer complexes which may induce performance variation of non uniform distribution of different components.

CHAPTER 2 FABRICATION OF DEVICES

Principle of Polymer Memory: Application of an electric eld to a cell lowers the polymer resistance, thus increasing its ability to conduct current; the polymer maintains its state until a eld of opposite polarity is applied to raise its resistance back to its original level. The different conductivity States represent bits of information. A polymer retains space charges near a metal interface when there is a bias, or electrical current, running across the surface. These charges come either from electrons, which are negatively charged, or the positively-charged holes vacated by electrons. We can store space charges in a polymer layer, and conveniently check the presence of the space charges to know the state of the polymer layer. Space charges are essentially differences in electrical charge in a given region. They can be read using an electrical pulse because they change the way the device conducts electricity. The basic principle of Polymer based memory is the dipole moment possessed by polymer chains. It is the reason by which polymers show difference in electrical conductivity. Implementing a digital memory means setting up away to represent logic one and logic zero. Here polarizations of polymers are changed up or down to represent logic one and zero. 2.1 FLEXIBLE SINGLE COMPONENT POLYMER RESISTIVE

MEMORY(AL/PARYLENE-C/W): The photo image of fabricated exible memory devices, as well as the schematic view of sandwiched structure and the 4 4 crossbar array, are shown in Fig.2.1. The main fabrication processes of the memory device are as follows. A 180-nm thick tungsten lm is deposited and patterned as the bottom electrode on a exible substrate (e.g., 5-m-thick parylene-C lm prepared by specialty coating systems PDS2010 or SiO2/Si substrate). Then, 40-nm-thick active parylene-C layer is deposited at room temperature by polymer CVD using PDS2010. Next, the via and polymer layer is patterned by reactive ion etching. To enhance the diffusivity and activity of the top electrode in the polymer, argon ion treatment of the polymer is performed. Then, Al, Cu, or Pt lm is then deposited by sputtering method and patterned as the top electrode. The cell size of the cross-point varies from 2 * 2 um2 to 20 *20 um2 . By combination of the bipolar resistive switching characteristics of devices with 2

active electrodes (i.e., Cu or Al), the mechanism can be interpreted as redox reaction and the metallic lament. When an appropriate positive voltage is applied, an oxidation of the electrochemically active top electrode Al or Cu may take place. Al3+ or Cu+ ions generated at the electrode diffuse into the polymer along the electrical eld. Subsequent accumulation and reduction of the Al3+ or Cu+ ions will occur at the negative electrode; therefore, the lament forms from the top electrode toward the negative W electrode, connecting the two electrodes and turning the device on. Switching off is achieved by changing the polarity of the bias voltage. When a certain negative voltage is applied to the active electrode, the metal atoms of the lament will be oxidized, and then, the cations will migrate back under the electrical eld, annihilating the lament.

FIG. 2.1: (a) Picture of fabricated exible memory devices. (b) Schematic crosssectional diagram of the sandwiched structure of the device cell. (c) Threedimensional schematic view of the 4 * 4 crossbar array of the device

2.2

A NEW NON VOLATILE BISTABLE POLYMER-NANOPARTICLE MEMORY DEVICE(AL/PCM+AU-PCM/AL): The memory active layer consists of host polymer material and polymer-stabilized Au

nanoparticles. Fig. 2.2 shows the schematic structure of a polymer-stabilized Au nanoparticle.The polymer chains are attached with a sulfur atom at one end, which stabilizes the Au clusters with an SAu bond to form the Au nanoparticles. The polymer-stabilized Au nanoparticles are postulated immobile during fabrication in the same host polymer material in order to achieve highly stable memory properties during electrical operation. The polymer used in this letter is [4-Cyano-2,4,4-trimethyl-2-methyl sulfanyl thiocarbonyl 3

sulfanyl-poly (butyric acid 1-adamantan-1-yl-1-methyl-ethyl ester)] or the so-called PCm. The PCm is then used to prepare the polymer-stabilized Au nanoparticles (AuPCm). The chemical structure of the PCm is also shown in Fig.2.2.

FIG. 2.2: Chemical structure of polymer-stabilized Au nanoparticles.

FIG. 2.3: IV characteristics of the Al/PCm+AuPCm/Al memory device and the inset of the device structure. The memory devices are fabricated using the following procedures. Prior to bottom electrode deposition, the glass substrates were cleaned and treated in an ultraviolet (UV)ozone environment for 30 min. After that, a 75-nm-thick aluminum (Al) bottom electrode was deposited by using a thermal evaporator with a shadow metal mask at a base pressure of 2 106 torr. The UVozone treatment was repeated again to activate the Al surface. The polymer solution that contains the PCm and AuPCm was spin-coated afterward. The Au nanoparticles were prepared with a size distribution of 35 nm . The 4

solution, which contains the AuPCm and PCm host polymer, was prepared with 0.1 and 2.4 percentage by weight in 1,2-dichlorobenzene, respectively. The thickness of the dried organic lm, which was determined using transmission electron microscopy (TEM), was about 50 nm. An Al layer was then deposited by using a thermal evaporator with a second shadow mask as the top electrode. The area for the memory cell is 2 *2 mm2 . The memory cell with a device structure of Al/PCm + AuPCm/Al stacking layers is shown in Fig.2.3 2.3 NONVOLATILE MEMORY DEVICE USING SMALL ORGANIC

MOLECULES AND POLYMER(AL/PS+8HQ+C60/AL) A polymer blend of polystyrene (PS), 8-hydroxyquinline (8HQ), and fullerene C60 were prepared in 1,2-Dichlorobenzene and was spin coated onto a glass substrate marked with thin Al tracks. A top contact was evaporated on to the blend after dryingthis resulted in a metalpolymermetal (MPM) structure. The chemical structures of the PS, 8HQ, and C60 molecules are shown in Fig.2.4. 1,2-dichlorobenzene was chosen because the PS, 8HQ, and C are readily soluble in it. The spin coated organic lms are well adhered, stable and smooth. Scanning electronic microscopy (SEM) and atomic force microscopy (AFM) were carried out to investigate the surface morphology and interface between PS and aluminum. After the spin coating of PS on the aluminum coated silicon (100) substrate, the substrate was cleaved with the help of diamond a tip. This results in the sharp interface at the edge.

FIG. 2.4: The structure of: hydroxquinoline(8HQ).

(i) polystyrene; (ii) fullerene (C60 ); and (iii) 8-

CHAPTER 3 RESULTS AND DISCUSSION

3.1 AL/PARYLENE-C/W The measured typical currentvoltage characteristics of Al/parylene-C/W device on exible substrate are shown in Fig. 3.1. The IV curves are recorded by positive scanning from 0 to 4 V and then going back to 0 V with 1-mA compliance current. When the positive bias is swept from 0 to 4 V, the current abruptly increases, and the device is switched to the low-resistance state at about 3 V (Vset). When sweeping negative bias from 0 to -3 V, a sudden decrease of the current is observed at -0.6 V (Vreset), and the device is switched back to its OFF state. After the device returned to the OFF state, it can be once again turned to ON state and exhibits the same IV characteristics. The on/off current ratio is higher than seven orders of magnitude at 0.1-V read voltage. Therefore, the results demonstrate good nonvolatile memory characteristics of the device with low switching voltages and ultrahigh on/off current ratio. For comparison, the switching IV characteristics of the Cu/parylene-C/W device are also measured and shown in the Fig.3.1. In addition, Al/parylene-C/W device on SiO2/Si substrate are also investigated and exhibit similar characteristics (not shown here) to device on exible substrate, suggesting the device can be easily transplanted on other substrates.

FIG. 3.1: Measured typical I-V curves of Al/parylene-C/W device. Arrows and numbers show the direction of voltage sweep. The on/off current ratio is more than 107 at 0.1-V read voltage. The inset shows typical I-V curves of Cu/parylene-C/W device with 6 * 102 on/off current ratio.

Endurance, Retention time and Erasing Speed:The cycling endurance and retention performance of the device are investigated with a 10 * 10m2 Al/parylene- C/W device cell. The cycling endurance is tested by writereaderaseread sequence test in the air. The positive sweeping drives the device to ON state, and the state is read by a constant 0.1-V voltage. After the writing and reading process, a negative sweep is performed to erase the memory device. As shown in Fig. 3.2, after 130 sweep cycles, the current ratio is still about 100, which meets the requirement of sensing margin between ON and OFF states. The retention capability is also a very important parameter for memory application. Slight degradation in both ON- and OFF-state currents is observed after 2.5 105 s, and yet, the device still remains sensing margin of 103 on/off current ratio, indicating good retention capability.

FIG. 3.2: Measured cycling endurance of Al/parylene-C/W device by the dc sweep operation; the state is monitored by 0.1-V read voltage. Another crucial performance indicator for the application of polymer memory is the switching speed. The transition responses to the programming and erasing pulses are measured by an oscillator. The switching dynamics from OFF to ON state are monitored by two reading pulses before and after the programming pulse, as shown in Fig.3.3. The results show that the programming transition takes less than 15 ns with a set pulse. The erasing transition from ON to OFF state is also measured in the same way (not shown here). The on/off current ratio monitored by the two read pulses is about 105. Considering parasitic delay of the measurement system, the actual programming and erasing speeds are likely to be faster than 15 ns.

FIG. 3.3: Switching dynamics of Al/parylene-C/W device monitored with programming and reading pulses.

3.2

AL/PCM+AU-PCM/AL The currentvoltage (I-V) characteristics of the Al/PCm +AuPCm/Al-sandwiched

memory device are shown in Fig. 3.4. Two distinct conducting states are observed. A low conductivity state with a current of approximately 107 A is recorded from 0 to 2 V for the rst voltage sweep, which corresponds to the 0 state of a bistable memory. When the applied voltage is approaching 2.5 V, a remarkably abrupt current increase from 107 to 102 A is observed. After the large applied voltage is removed, the current remains around 102 A when a small (1 V) detection voltage is applied, which manifests a nonvolatile memory characteristic. This current condition indicates a high-conductivity state, which corresponds to the 1 state of a memory. In addition, a high conductivity state can be resumed to a low-conductivity one by applying a negative voltage sweep from 0 to 6 V or by a high negative voltage pulse. After the device is restored to its low-conductivity state, once again, it can be turned ON and will exhibit a similar IV characteristic as in the rst voltage sweep, as shown in Fig. 3.4. Therefore, this device is demonstrated as a rewritable nonvolatile memory device. For comparison, the memory device that uses a pure PCm without Au nano particles is also provided. In this case, even when the applied voltage goes as high as 10 V, the I-V behavior still shows a low-conductivity state. This implies that the memory effect is strongly correlated with the presence of Au nanoparticles. Endurance, Retention time and Erasing Speed:Since the device is a rewritable nonvolatile memory, a writereaderaseread sequence test is carried out in air. According to the

FIG. 3.4: Read-Write-Erase cycles

FIG. 3.5: Endurance

IV characteristics in Fig.2.3, the write, read, and erase voltage were set as 3, 1, and -7 V, respectively.The result is shown in Fig.3.4. A 3-V voltage pulse drives the device to a high-conductivity 1 state, with a current level between 103 and 104 A. As for the reading function, a 1-V read voltage yields around 3 * 105 A current level.After the write and read positive pulses, a -7-V voltage pulse is applied to erase the memory device to a lowconductivity 0 state. This 0 state again is also detected using a 1-V detect pulse, yielding a current level around 107 A. By examining the current levels in Figs.2.3 and 3.4, we can nd a clear difference among them due to the pulse mode versus the dc mode operation. As shown in Fig.3.4, the electrical bistability of the device can precisely be controlled by 9

applying a suitable voltage pulse numerous times without signicant degradation. A sequence of pulses below 0.1 s was conducted to conrm memory consistency. In addition to the rewriting capability, cycling endurance over 150 times of ON/OFF switching is also demonstrated in Fig.3.5. Since no appreciable degradation was recorded, the endurance of our devices is clearly not limited to 150 times. Besides the endurance, the retention time is also an important parameter for a memory device. The retention ability is tested and shown in Fig.3.6. In the beginning, a positive voltage pulse of 3 V was applied to the memory device to achieve a high conductivity state. Then, a 1-V voltage pulse was given to the device to read the memory state. After this read voltage, the bias was removed, and the device was stored in air for 10 h. Afterward, a 1-V voltage was again applied to read the state of this memory. It is found that the device still remains in the1 state, with only a slight degradation, for as long as 10 h in air.

FIG. 3.6: Retention time test for the Al/PCm + AuPCm/Al memory. Over 10-h retention time is observed in air.

3.3

AL/PS+8HQ+C60/AL Fig.3.7 shows the MOM structures prepared by spin coating of PS and polymer blend

for electrical behavior. Typical I-V characteristics of the Al/PS/Al and Al PS 8HQ C Al MOM structures are shown in Fig.3.7. The devices with the different contact areas exhibit symmetrical-characteristics for negative and positive applied voltages. The symmetrical I-V characteristics are typical of a bulk-limited mechanism. The Al/PS (or Al/polymer blend) interface does not play any signicant role in determining the electrical behavior of these devices. This was further investigated by using the capacitance-voltage (C-V) 10

technique. Typical C-V characteristics of MOM devices at xed frequencies are shown in Fig.3.8(a). The C-V data is nearly symmetrical for both negative and positive applied bias voltages at a given frequency. This indicates that there is no barrier formation at the Al/Organic interface. Thus the observed electrical behavior is bulk limited. This is in line with the previous observation of symmetrical I-V characteristics.

FIG. 3.7: (a) Schematic of MOM single layer devices of pure polystyrene (top) and polystyrene containing C devices (bottom). (b) I-V characteristics of the MOM devices.

FIG. 3.8: (a)C-V behavior ofMOMdevices at 1MHz. (b) Current versus voltageresponse of memory devices during writereaderaseread voltage cycles. We can strongly state that these devices do not exhibit rectication. This lack of rectication in the I-V behavior owes to the fact that the Al/organic interface is ohmic in nature. Capacitancevoltage measurements provide a robust check on charge accumulation. If there is indeed any barrier formation, we should have been able to see the change in 11

the capacitance with the applied voltage. However, we note capacitance to be constant, irrespective of the polarity of the applied dc bias. The CV analysis of MOM devices further suggests that the interface does not play a role in the observed I-V behavior of our devices. The hystersis is quite large and the maximum difference between the current levels, at around 7.5 V is 400 nA, approximately. This is a discernable difference and can be used to make commercially viable rewritable memory devices. In order to convert the I-V hysteresis into memory operations, the read-write-erase cycles were generated using pccontrol HP4140B pico ammeter and the response of the PMDs is as shown in Fig.3.8(b). The device can be tuned from low (1 state) to high (0 state) conductivity state by applying 15 V to negatively charge the C molecules; this could be termed as the write step. Then by applying 7.5 V, the current can be recorded (read step). The current difference between the 1 and 0 states is around 600nA. It is clear from Fig.3.8(b) that rewritable behavior follows the applied pulses. Once written, the device is stable in this state for hundreds of such pulses. Comparison b/w Al/PCm+Au-PCm/Al and Al/Parylene-C/W: For Al/Parylene-C/W on/off current ratio is nearly 107 , speed is nearly15ns, retention time is nearly 2.5*105 s endurance is nearly 130 program-read-erase-read cycles.For Al/PCm+Au-PCm/Al on/off current ratio is nearly 102 , endurance is nearly150 cycles retention time is nearly 10h.Depending on the requirement(if retention time needed is high Al/Parylene-C/W, if endurance needed is high Al/PCm+Au-PCm/Al) device is selected.

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CHAPTER 4 CONCLUSION
The fabrication of three Organic/Polymer devices is explained.The electrical behaviour of those devices for applied voltage is presented.A comparison of endurance,retention time and erasing speed b/w the devices is done.These characteristics(endurance, retention time, erasing speed) vary device to device depending on the polymer used.

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BIBLIOGRAPHY
[1] Yongbian Kuang, Ru Huang,Yu Tang, Wei Ding, Lijie Zhang and Yangyuan Wang, Flexible Single-Component-Polymer Resistive Memory for Ultrafast and Highly Compatible Nonvolatile Memory Applications, IEEE Electron Device Letters, Vol. 31, No. 7, July 2010. [2] Heng-Tien Lin, Zingway Pei, Jun-Rong Chen, Gue-Wuu Hwang, Jui-Fen Fan, and YiJen Chan, A New Nonvolatile Bistable Polymer-Nanoparticle Memory Device, IEEE Electron Device Letters, Vol. 28, No. 11, November 2007. [3] Shashi Paul, Realization of Nonvolatile Memory Devices Using Small Organic Molecules and Polymer, IEEE Transactions On Nanotechnology, Vol. 6, No. 2, March 2007.

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