Professional Documents
Culture Documents
by
Renishkumar V. Ladani
Master of Technology
in
Information and Communication Technology
to
Dhirubhai Ambani Institute of Information and Communication Technology
May, 2005
DA-IICT
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Declaration
Renishkumar V. Ladani
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Certificate
This is to certify that the thesis work entitled “A Recursive Approach to Floorplanning”
has been carried out by Renishkumar V. Ladani (200311014) for the degree of Master of
Technology in Information and Communication Technology at this Institute under my
supervision.
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Acknowledgements
I am thankful to my guide Prof. Ashok T. Amin for guiding me throughout my thesis work.
His suggestions and constant support during this research are motivating factor for me. I
consider myself very lucky to get an opportunity to work with him. I am thankful to my
co-guide Prof. Amit Bhatt for providing initial insight into field of floorplanning. I am
thankful to my evaluation-committee members, Prof. D. Nag Chaudhary and Prof.
Hemangi Kapoor for providing useful suggestions for my research work. I am thankful to
my colleagues and friends for motivating me for research and providing constant support
in difficult times. I am thankful to J. M. Lin and Y. W. Chang (@cc.ee.ntu.edu.tw) for
making available their floorplanning algorithm implementation and test cases on their home
page. I am thankful to Dr. Hirendu P. Vaishnav of Synapps Corp., USA for his suggestion
of floorplanning as a research topic. I am thankful to DA-IICT for providing me the
resources needed and a favourable environment to carry out my work. I am thankful to my
family for supporting me in all the ways.
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Contents
Page No.
DECLARATION...................................................................................................... .........................I
CERTIFICATE................................................................................................................................ .II
ACKNOWLEDGEMENTS......................................................................................................... .....III
CONTENTS......................................................................................................................... ..........IV
ABSTRACT.................................................................................................................. ................VII
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B.............................................................................................................................................. ......21
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REFERENCES...................................................................................................................... ........54
APPENDIX..................................................................................................................... ...............56
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Abstract
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Other minor symbols are defined at first occurrence; where necessary some symbols are
redefined in the text.
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List of Tables
Page No.
TABLE 3.4.1 UNIQUE PLACEMENT STRUCTURE AND ITS TWO COMPOSITIONS FOR TWO
BLOCKS PLACEMENT.............................................................................................................................22
TABLE 3.6.3 AREA UTILIZATION AND RUNTIME COMPARISON FOR ALGORITHM-I AND
ALGORITHM-II..........................................................................................................................................43
TABLE 3.6.3B AREA UTILIZATION AND RUNTIME FOR B*-TREE AND ENHANCED O-TREE
.........................................................................................................................................................................44
TABLE 3.6.3C AREA UTILIZATION AND RUNTIME FOR CBL AND TCG...................................44
TABLE 3.6.3D AREA UTILIZATION AND RUNTIME FOR TCG-S AND FAST-SP.........................45
TABLE 3.6.4 PATTERN OF HARD AND SOFT BLOCKS IN TEST CASE -I..................................46
TABLE 3.6.5 PATTERN OF HARD AND SOFT BLOCKS IN TEST CASE -II...................................46
TABLE 3.6.6 AREA UTILIZATION AND RUNTIME FOR ALGORITHM-I APPLIED ON CASE-I
.........................................................................................................................................................................46
TABLE 3.6.7 AREA UTILIZATION AND RUNTIME FOR ALGORITHM-I APPLIED ON CASE-
II......................................................................................................................................................................47
TABLE 3.6.8 AREA UTILIZATION AND RUNTIME FOR ALGORITHM-I APPLIED ON CASE-
III....................................................................................................................................................................47
TABLE 3.6.9 AREA UTILIZATION AND RUNTIME FOR ALGORITHM-II APPLIED ON CASE-
I.......................................................................................................................................................................47
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List of Figures
Page No.
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Chapter 1
Introduction
Only a well-conceived design methodology can result in a final design of high quality; one
such methodology is FLOORPLAN-BASED DESIGN METHODOLOGY. It is top-down
design methodology. It advocates that layout aspects should be taken into account in all
design stages. Three design domains in which design stages are classified are behavioral
design domain, structural design domain and physical design domain.
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It is important to note that functionally equivalent sub blocks have different shapes and
terminal positions. This is one of the main characteristics of floorplan-based design, one
chooses the shape and terminal positions such that they fit best with the original structure
and assumes that there is a way to design the module satisfying the chosen shape and
terminal position. Above type of blocks are known as flexible or soft blocks. When the
block is flexible one could say that the realization needs an area A. Whichever shape the
block will have its height h and its width w have to obey the constraint hw ≥ A. Other type
of blocks are hard blocks, it means that their shape and terminal positions (pins) are fixed.
It is also important to note that area required for interconnection wiring (Routing) can
either provided by incorporating them in the area estimations for the blocks or in the case
of N-layer metal with over the block routing (wiring), channel less block layouts are the
norm of design.
Example of a structural description of some circuit and possible floorplan and Floorplan
view of PowerPC 604 and Pentium 4 is provided in fig. 1.2.
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Fig. 1.2 Structural description of some circuit and its floorplan, and Floorplan view of
PowerPC 604 and Pentium 4 [2]
In addition to above problem description, other then rectangular block study of L-shaped
and U-shaped blocks has been carried out [14]. Also, Flexible blocks have been not
addressed in above problem description. There also exist some representations and
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algorithms, which addressed floorplan problem with flexible blocks, e.g., Normalized
Polish Expression (NPE) [5], SP [10], Fast-SP [13], O-tree [1] and B*-tree [4]. For such
type of representations and algorithms following problem formulation would provide more
insight.
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The availability of flexible blocks implies the possibility of having different shapes for the
same hardware units. It’s therefore possible to choose a suitable shape for each flexible
block such that the resulting floorplan is optimal in some sense (e.g. minimal area).
1.4 Motivation
Due to the growth in design complexity, circuit sizes are getting larger. To cope with the
increasing design complexity, hierarchical design and IP modules are widely used. The
trend makes module floorplanning much more critical to the quality of a VLSI design. And
with current EDA tools with practice we can create good initial placement by
floorplanning hints and a pictorial display. This is one area where the human ability to
recognized patterns and spatial relations is currently superior to a computer program’s
ability. Thus practically floorplanning is not fully automated till now date.
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available algorithms. The second chapter end with previous work that has been done in this
particular direction and its comparison. The third chapter provides description of our
work. It includes introduction and description of our suggested recursive bottom-up
algorithms. It also includes how these algorithms use exhaustive search procedure for
placing two; three or four rectangular blocks in a floorplan. The chapter 3 ends with
experiments results and resultant floorplan view of MCNC benchmark suite. The forth
chapter contains conclusion to our thesis work and scope of future work.
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Chapter 2
Floorplanning Concepts and Approaches to Problem
2.1 Background
The floorplan problem is known to be NP-complete [11]. Various heuristic approaches
have been taken to solve this problem. These approaches can be categorized in Simulated
Annealing (SA), Genetic Algorithm (GA) and Hybrid approach (SAGA: simulated
annealing and genetic algorithm). This type of algorithm searches through the feasible
solution space for floorplan. Evaluate each solution at each stage to know its cost or
fitness compare it with earlier available results. Keep it or discard it according to
strategies. Carry out different moves to obtain different feasible solutions from a available
feasible solution.
In Genetic algorithms [15] moves are crossover, mutation and inversion. Similar types of
moves exist for simulated annealing. Hence these algorithms depend on representation of
feasible solution space. Representation for floorplan can be categorized in slicing floorplan
representation and non-slicing floorplan representation.
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A Polish expression α1α2 … α2n-1 is said to be normalized iff there is no consecutive *‘s
or +‘s in the sequence. (e.g. 1 2 + 4 3 * + is a normalized Polish expression.)
In general, there might be two or more Polish expressions (slicing trees) that correspond
to a given slicing structure (see Fig.3.2e). The number of Polish expressions corresponding
to a slicing structure can vary from slicing structure to slicing structure. This makes Polish
expressions an undesirable choice for representation of solutions in a simulated annealing
setting for the following reasons: 1. There is an unnecessary increase in the number of
states. 2. The set of slicing structures is unevenly distributed over the set of Polish
expressions, which might lead to unintentional and undesirable biases toward some slicing
structures. It is observation that given any slicing structure, it can be described by a unique
skewed slicing tree by performing the cuts always from right to left and from top to
bottom. Hence, the set of normalized Polish expressions as the solution space in our
simulated annealing algorithm. The Polish expression in fact is the Polish postfix notation
for this “arithmetic expression”.
Fig. 2.1.3 Two different slicing trees for the same slicing structure.
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The temperature in initialised to a relatively high value and its slowly decrease until a
freezing point is reached. At each temperature, components are selected for possible
movement until equilibrium is reached. If movement of the selected components results in
an improved placement, the movement is performed. Otherwise the movement is
performed with a probability that decrease exponentially with temperature. Components
are typically selected randomly for pair wise exchange.
GAs has also applied to optimisation problems, and the applications like floorplanning in
EDA tools falls into this category. The objective of the GA is then to find an optimal
solution to a problem. Since Gas are heuristic procedure, they are not guaranteed to find
the optimum but experience has shown that they are able to find very good solutions for
wide range of problems.
GAs work by evolving a population of individual in the population where the fitness
computation depend s on the application. For each generation individuals are selected from
the population for reproduction, the individuals are crossed to generate new individuals
and the new individuals are muted with some low mutation probability. The new individual
may completely replace the old individuals in the population with distinct generation
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evolved; alternatively the new individuals may be combined with old individuals in the
population.
Since selection is biased towards more highly fit individuals, the average fitness of the
population tends to improve from one generation to the next. The fitness of the best
individuals is also expected to improve overtime, and the best individual may be chosen as
a solution after several generations.
Simple GA: Also referred to as total replacement algorithm. Flowchart of this simple
genetic algorithm is available in fig. 2.2.2. [15]
Since selection is biased towards more highly fit individuals the fitness of the overall
population is expected to increase in successive generations. However, the best individual
may appear in any generation.
No
Stoppi
ng
criteria
Yes
Fig. 2.2.2 Flowchart of the simple genetic algorithm
2.2.3 SAGA
Rather than simply using a GA for floorplanning, its better to use a new stochastic
optimization algorithm called SAGA, Which is combination of genetic algorithm and
simulated annealing algorithm applied to floorplanning. The aim of this idea is to improve
the typical convergence rate of the pure GA by combining it with simulated annealing.
The typical GA convergence curve is shown in fig Fig. 2.2.3.
Cost
Runtime
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Initially the solution cost improves very rapidly, however obtaining further improvement
soon becomes difficult and the majority of runtime is spent in the later phase of the process
in which small improvements are obtained very slowly, while in case of simulated annealing
algorithm. The typical convergence curve of SA is very different from that of the GA.
Initially SA converges much slower but in the late phase of the process, SA may be able to
obtain improvement faster than the GA. The unified algorithm called SAGA (an acronym
for simulated annealing and genetic algorithm) is designed in such a way that the initial fast
convergence of the GA is combined with the faster convergence of SA in the late phase.
The SAGA algorithm is application independent and highly adaptive. When applied to the
floorplanning SAGA perform better than a pure GA.
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takes only O(n) time to derive a floorplan from a representation. Recently, proposed
several representations such as sequence pair [6], bounded slicing grid (BSG) [7], O-tree
[1], Transitive Closure Graph (TCG) [2], Corner Block List (CBL) [3] and B* Trees [4]
can handle non-slicing floorplans. Table 2.2.6 shows packing complexity for non-slicing
floorplan.
GPE Recently, a new representation for VLSI floorplan problem has been published [11].
They proposed a new and easy representation for VLSI floorplan and building block
problem. The representation effectively inherits the useful property of normalized polish
expression [5] and is able to present non-slicing floorplan. The test using MCNC
benchmarks and the experiments give promising results. The time complexity to transform
a GPE to a corresponding placement is also O(n). Results of GPE suggest that it achieves
better area utilization compared to previous non-slicing representation Fast-SP and
Enhance O-tree.
Flooplan sizing (shaping) as defined previously can be done optimally and efficiently for
slicing floorplans. It can also be done optimally for some non-slicing floorplans, but its
very time consuming. “Shape Curve Computation” is used for Shaping in slicing floorplans
[14] and the sizing algorithm runs in polynomial time for slicing floorpalns. Langrangian
Relaxation method used for shaping in non-slicing floorplan. But it is not efficient and
applicable to only non-slicing floorplans, which are using Constraints graphs for packing
such as SP [10], Fast-SP [13], O-tree [1] and B*-tree [4].
SP O(n2)
Fast-SP O(n lg n lg n)
BSG O(n2)
O-tree O(n)
B*-tree O(n)
CBL O(n)
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TCG O(n2)
GPE O(n)
Table 2.5 Packing complexity for non-slicing floorplan, here n is the number of blocks in
the placement
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Chapter 3
A Recursive Approach
3.1 Introduction
Algorithms for floorplanning are classified in two classes of approaches, iterative ap-
proaches and constructive approaches. Iterative approaches produce floorplan with better
areas utilization but they are slower then constructive algorithms. An iterative approach
starts with one initial solution, evaluate it and then generate more such solutions from
available solution. At each stage, an iterative approach evaluates new solution and com-
pares it with earlier available results and keeps only promising solutions. In these ap-
proaches, an algorithm run up to either reaching timeout or based on some criteria such as
no more improvement in results. While in case of a constructive approach a feasible solu-
tion is generated gradually from available inputs using some techniques and principles. We
propose and investigate two constructive algorithms based on the notion that grouping
blocks having nearly same area in a floorplan produce better results than placing blocks
having wide difference in area.
In both algorithms, exhaustive search procedure is carried out at each step to place four or
less blocks at a time to get a floorplan having best area utilization. This exhaustive search
procedure is repeated in bottom up to construct a floorplan. .
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With n blocks b1, b2, …, bn, we are given a list of n quadruplets of numbers (A1, r1, s1, d1),
(A2, r2, s2, d2), …, (An, rn, sn, dn). This quadruplet of number (Ai, ri, si, di), with ri ≤ si,
specifies the area and the shape constrains for module i. In fact, if we let wi be the width of
module i and hi be the height of module i, we must have wi * hi = Ai and ri ≤ hi/wi ≤ si.
Thus ri and si are our lower and upper limit of aspect ratio. Block i is a rigid (hard) block if
ri = si, otherwise its is a soft (flexible) block. If a block is hard then di has no meaning to it
and it’s just don’t care value. But if a block is soft, di specifies all possible shapes for a
flexible block, having aspect ratios as ri, ri + di, ri + 2*di, …, si.
Floorplan Area: Floorplan Area (FA) is area of minimum possible of rectangle which
accommodates n blocks b1, b2, …, bn in non-overlapping manner. Clearly, FA ≥ MA.
Dead Area: A minimum possible rectangle which can accommodate n blocks in non-
overlapping manner has some area not occupied by any blocks. It is known as Dead Area
(DA) and measured in percentage of FA, namely DA = (FA-MA)/FA*100. Area utilization
factor is defined to be 100- DA.
L-compact: A floorplan L-compact if and only if there is no block that can shift left from
its original position with other components fixed.
B-compact: A floorplan is B-compact if and only if there is no block that can shift bottom
from its original position with other components fixed.
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C B C
A A
B
C B C
A A
B
Fig. 3.3.1 (c) L-Compact Floorplan Fig. 3.3.1 (d) LB-Compact Floorplan
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In the following section we identify unique structure that can hold 2, 3 or 4 blocks in LB
compact floorplan. We have removed other redundant structures that always produce a
floorplan with same floorplan area, FA when placed with possible pattern of placement
(PPP) for two, three or four blocks. When blocks according to possible pattern of
placement are placed in unique structures we received set of all possible placement say PP
= {F1, F2, …, FK}. Here we have one unique structure for two blocks, two unique
structures for three blocks and six unique structures for four blocks. Next three sections
describe how we have identified the unique structures. Now for set PP we have, | PP | =
k = 2! * 22 * 1 = 8, for two blocks, | PP | = k = 3! * 23 * 2 = 96, for three blocks and |
PP | = k = 4! * 24 * 6 = 2304.
From set PP we search for floorplan Fi which has smallest area, where, 0 ≤ i ≤ k. if two
or more floorplans have equal and minimum area then a floorplan with aspect ratio near to
1.0 is selected. Thus | PP | represent number placement to be considered before selecting
one.
In case of soft blocks, blocks A, B, C, D can take any one of the shape form its given set
of aspect ratios, which increases number of possible placement. Let say AAR is set of aspect
ratios for block A, BAR is set of aspect ratios for block B, CAR is set of aspect ratios for
block C, DAR is set of aspect ratios for block D then size of possible placement set PP, get
scaled proportional to value of | AAR |, | BAR |, | CAR |, | DAR |. Thus size of possible
placement set PP, | PP | = k = 2! * 22 * 1 * | AAR | * | BAR |, for two blocks, | PP | = k
= 3! * 23 * 2 * | AAR | * | BAR | * | CAR |, for three blocks and | PP | = k = 4! * 24 * 6 *
| AAR | * | BAR | * | CAR | * | DAR |. Once a soft block get placed in floorplan of 2, 3 or 4
blocks, its aspect ratio get fixed and it’s no longer a soft blocks now. And floorplan F that
we received after placing 2,3 or 4 blocks together has also fixed aspect ratio because we
are selecting floorplan F from set PP according to it smallest area value and if two or more
floorplans have equal and minimum area then a floorplan with aspect ratio nearer to 1.0 is
selected.
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producing all possible slicing structures for blocks, we have used a binary tree with a root
node and two children. A root node is operator and its children are two blocks. This
suggests placement of two children in a way that placement of right child is with respect to
left child and according to operator in LB-compact manner. In slicing structure we have
two-operator horizontal placement operator say H and vertical placement operator say V.
Let O is set of operator for slicing structure then set O is define as O = {H, V}. Here
horizontal placement means two blokes are placed in side-by-side or adjacent in LB-
compact manner. And vertical placements mean two blocks are placed one above other in
LB-compact manner.
In fig. 3.4.1 (a) shows a binary tree of two blocks, while in fig 3.4.1 (b) and fig. 3.4.1 (c)
show horizontal and vertical placement respectively derived from binary by placing value
of operator as O1 = {H, V}.
O1
A B
A A
B
Under condition of exhaustive search with all possible ordering of blocks A and B with for
each block + 90os rotation allowed both of structures from fig 3.4.1 (b) and fig. 3.4.1 (c)
produce same minimum floorplan area FA = Fh * Fw. But difference is that one is horizontal
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B
A A B
Fh = Ah + Bh
Fh = max (Ah, Bh)
Fw = max (Aw, Bw)
Fw = Aw + Bw
Table 3.4.1 unique placement structure and its two compositions for two blocks placement
Fig 3.4.2 (c), (d), (e) and (f) show placement derived from a binary tree (in Fig. 3.4.2 (a))
by placing value of operator as O1 O2 = {HH, HV, VH, VV} and similarly Fig 3.4.2 (g), (h),
(i) and (j) show placement derived from a binary tree available in Fig. 3.4.2 (b).
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O2 O1
C A O2
O1
B C
A B
A B C A B
C
B
C B
A
A
Fh = max (Ah + Bh, Ch)
Fw = max (Aw + Bw) + Cw Fh = Ah + Bh + Ch
Fw = max (Aw, Bw, Cw
Fig. 3.4.2 (e)
Fig. 3.4.2 (f)
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C
A B C A
B
C
B C
B
A A
Under condition of exhaustive search with all possible ordering of blocks A, B and C with
each block + 90os rotation allowed there are few redundant structures from fig 3.4.2 (c) to
fig. 3.4.2 (i) always produce same floorplan area FA = Fh * Fw. Thus we identified two
unique placement structures and its two compositions for three blocks placement. Table
3.4.2 presents two compositions of two unique placement structures for three blocks
placement.
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C
B A B C
A
Fh = Ah + Bh + Ch Fh = max (Ah, Bh, Ch)
Fw = max (Aw, Bw, Cw) Fw = Aw + Bw + Cw
B C C
A
B
A
Fh = max (Ah, Bh + Ch)
Fh = Ah + max (Bh, Ch) Fw = Aw + max (Bw, Cw)
Fw = max (Aw, Bw + Cw)
Table 3.4.1 two compositions of two unique placement structures for three blocks
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There exist no such procedure for producing all possible for non-slicing structures. But we
have one LB-compact unique non-slicing structure possible for placing four blocks.
Fig 3.4.3 (a1) to Fig 3.4.3 (a8) show placement derived from a binary tree in Fig. 3.4.3 (a)
and similarly Fig 3.4.3 (b1) to Fig 3.4.3 (b8) show placement derived from a binary tree in
Fig. 3.4.3 (b) and then so on up to a binary tree in Fig. 3.4.3 (e). These placements are
derived after placing value of operator as O1 O2 O3= {HHH, HHV, HVH, HHVV, VHH,
VHV, VVH, VVV}.
O2
O1 O3
A D
B C
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D
A B C D A B
C
Fh = max (Ah, Bh, Ch, Dh) Fh = max (Ah, Bh, Ch + Dh)
Fw = Aw + Bw + Cw + Dw Fw = Aw + Bw + max (Cw, Dw)
Fig. 3.4.3 (a1) Fig. 3.4.3 (a2)
D
C D
C
A B A B
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D
C D
C
B B
A A
B B D
C D
A A C
Fh = max (Ah + Bh, Ch, Dh) Fh = max (Ah + Bh, Ch + Dh)
Fw = max (Aw + Bw) + Cw + Dw Fw = max (Aw + Bw) + max (Cw, Dw)
Fig. 3.4.3 (a5) Fig. 3.4.3 (a6)
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O3
O2 D
O1 C
A B
D
A B C D
A B C
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D
C
C
A B D A B
D
B B
C D C
A A
D
C C
D
B B
A A
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O1
A O2
B O3
D
C
D
A B C D A B
C
C D D
C
A A
B B
Fh = max (Ah, Bh + max (Ch, Dh)) Fh = max (Ah, Bh + Ch + Dh)
Fw = Aw + max (Bw, Cw + Dw) Fw = Aw + max (Bw, Cw, Dw)
Fig. 3.4.3 (c3) Fig. 3.4.3 (c4)
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D
B C D B
C
A A
Fh = Ah + max (Bh, Ch, Dh) Fh = Ah + max (Bh, Ch + Dh)
Fw = max
Fig. (Aw(c5)
3.4.3 , Bw + Cw + Dw) Fw = max (Aw, Bw + max (Cw, Dw))
Fig. 3.4.3 (c5) Fig. 3.4.3 (c6)
D
C D
C
B B
A A
Fh = Ah + Bh + max (Ch, Dh) Fh = Ah + Bh + Ch + Dh
Fw =Fig.
max3.4.3
(Aw,(c7)
Bw, Cw + Dw) Fw Fig.
= max (Aw(c8)
3.4.3 , Bw, Cw, Dw)
Fig. 3.4.3 (c7) Fig. 3.4.3 (c8)
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O3
O1
A
O2
B C
A B C D A B C
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D
C C
A D A
B B
Fh = max (Ah, Bh + Ch, Dh) Fh = max (Ah, Bh + Ch) + Dh
Fw =Aw + max (Bw, Cw) + Dw Fw = max (Aw + max (Bw, Cw), Dw)
Fig. 3.4.3 (d3) Fig. 3.4.3 (d4)
B C B C
D
A A
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D
C C
B B
A D
A
Fh = max (Ah + Bh + Ch, Dh) Fh = Ah + Bh + Ch + Dh
Fw = max (Aw, Bw, Cw) + Dw Fw = max (Aw, Bw, Cw, Dw)
O1
A O3
D
O2
B
C
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D
A
A B C D B C
Fh = max (Ah, Bh, Ch, Dh) Fh = max (Ah, max (Bh, Ch) + Dh)
Fw = Aw + Bw + Cw + Dw Fw = Aw + max (Bw + Cw, Dw)
Fig. 3.4.3 (e1) Fig. 3.4.3 (e2)
D
C C
A D A
B B
Fh = max (Ah, Bh + Ch, Dh) Fh = max (Ah, Bh + Ch + Dh)
Fw =Aw + max (Bw, Cw) + Dw Fw = Aw + max (Bw, Cw, Dw)
Fig. 3.4.3 (e3) Fig. 3.4.3 (e4)
D
B C D B C
A A
Fh = Ah + max (Bh, Ch, Dh) Fh = Ah + max (Bh, Ch) + Dh
Fw = max (Aw, Bw + Cw + Dw) Fw = max (Aw, Bw + Cw, Dw)
Fig. 3.4.3 (e5) Fig. 3.4.3 (e6)
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D
C C
D
B B
A A
Under condition of exhaustive search with all possible ordering of blocks A, B, C and D
with for each block + 90os rotation allowed there are few redundant structures from fig
3.4.3 (a, a1-a8) to fig. 3.4.3 (e, e1-a8) always produce same floorplan area FA = Fh * Fw.
Thus we identified five unique LB-compact placement structures and its two
compositions. In addition to this we have one more unique non-slicing LB-compact
placement structure its two compositions. Table 3.4.3 presents two compositions of six
unique placement structures four blocks placement.
Vertical Composition Horizontal composition
D
C
B
A B C D
A
C D
D
A B
B C
A
Fh = max (Ah, Bh, Ch + Dh)
Fh = Ah + Bh + max (Ch, Dh) Fw = Aw + Bw + max (Cw, Dw)
Fw = max (Aw, Bw, Cw + Dw)
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D
B C D
C
A
A B
Fh = Ah + max (Bh, Ch, Dh) Fh = max (Ah, Bh + Ch + Dh)
Fw = max (Aw, Bw + Cw + Dw) Fw = Aw + max (Bw, Cw, Dw)
C D
B D
A B
A C
Fh = max (Ah, Bh) + max (Ch, Dh)
Fh = max (Ah + Bh, Ch + Dh)
Fw = max (Aw + Bw, Cw + Dw )
Fw = max (Aw + Bw) + max (Cw, Dw)
B D C D
A
C
B
A B
Fh = max (Ah, Bh + max (Ch, Dh))
Fh = Ah + max (Bh, Ch + Dh)
Fw = Aw + max (Bw, Cw + Dw)
Fw = max (Aw, Bw + max (Cw, Dw))
Non-slicing
C
B
D
D
C
A B A
Fh =max (Bh + Dh, max (Ah, Bh) + Ch ) Fh =max (Ah + Bh, max (Ah, Ch) + Dh )
Fw = max (max (Aw, Cw) + Bw, Cw + Dw ) Fw = max (max (Aw, Bw) + Cw, Bw + Dw )
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Table 3.4.1 two compositions of six unique placement structures for four blocks
3.5 Algorithm
We propose two algorithms for floorplanning. Both having complexity O(n) but first
algorithm requires recursive call in order of log4 n while second algorithm required
recursive call in order of n. We have taken bottom-up, recursive approach in these
algorithms. These algorithms use efficient exhaustive search procedure as explain in last
section for placing two, three or four rectangular blocks in a floorplan. Both algorithms
fall in class of constructive algorithm rather than class of iterative algorithm and work in
bottom-up constructive manner and they are recursive by nature. These algorithms
designed with concept that In case of placing few blocks together in non overlapping
manner, we can achieve better area utilization if blocks are having their area value in
neighbourhood if area values are arrange in order.
3.5.1 Algorithm-I
This algorithm starts with given blocks b1, b2, …, bn, before initiating recursive call, first
blocks are arranged in ascending order according to their area. Let say ordered list of
blocks as ab1, ab2, …, abn. Then list of composite blocks is generated from ordered list of
blocks as ab1, ab2, …, abn.. Here a composite block is a block that which generate after
placing 2, 3 or 4 blocks together using exhaustive search procedure. A composite block
also generated from placing 2, 3 or 4 composite blocks together. Let say list of composite
blocks as cb1, cb2, …, cbk. Here k = n / 4 if n mod 4 = 0 otherwise k = n / 4+1. In list of
composite blocks cb1 generated from first four blocks of order list ab1, ab2, …, abn, cb1
generated from next four blocks and so on up to cbk, generated from last four blocks from
our order list ab1, ab2, …, abn, if n mod 4 = 0 otherwise cbk generated from {abn-2, abn-1,
abn} if n mod 4 = 3, { abn-1, abn} if n mod 4 = 2 or {abn} if n mod 4 = 1. Here for
generating composite blocks list, blocks are selected in-group of four from order list of
blocks starting from smallest area and then up to end of list. So last the composite block
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may have 4,3, 2 or 1 blocks or block according to number of blocks in list. Then the
selected group of four blocks are place using exhaustive search procedure, which
generates a composite block. A composite block has same property as a hard block define
previously. Thus this approach once again applies to new list of composite blocks. Before
initiating same recursive procedure, composite blocks are ordered according to area in
aviable list. This recursive procedure is stooped when only one composite block remains in
the list. And this composite block is our floorplan rectangle, which envelops n blocks in
non-overlapping manner.
This bottom up constructive approach provides us floorplan rectangle but exact co-
ordinates of each blocks has been not assigned. So with each returning from recursive call
in top-down way each composite block assign co-ordinated to it’s constitute blocks or
composite blocks according to rotation, ordering of blocks and LB-compact unique
structure used to generate that composite block.
At the end of algorithm we have rectangle R which contains blocks b1, b2, …, bn in non
overlapping manner and floorplan F = {(x1i, y1i, x2i, y2i) | 1 ≤ I ≤ n}, means each block
has bottom-left corners being assigned to (x1i, y1i) and top-right corners being assigned to
(x2i, y2i).
01 ArrangeBlocksInAscOrderOfArea (listOfBlocks);
02 If NumberOfBlocks (listOfBlocks) = 1 then
03 SetCordinateOfSubBlocks (listOfBlocks);
04 FloorplanH = firstBlock (listOfBlocks).Height;
05 FloorplanW = firstBlock (listOfBlocks).Width;
06 Return;
07 End If
08 newListOfCompositeBlocks = CreateCompositeBlocks (listOfBlocks);
09 Call algorithm-I (newListOfCompositeBlocks);
10 SetCordinateOfSubBlocks (newListOfCompositeBlocks);
3.5.2 Algorithm-II
This algorithm starts with given blocks b1, b2, …, bn, before initiating recursive call, first
blocks are arranged in ascending order according to their area. Let say ordered list of
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blocks as ab1, ab2, …, abn. Then from list of blocks first four blocks are selected and a new
composite block is generated from it. Let say cb1234 as it is generated from b1, b2, b3, and b4
after exhaustive search procedure. The composite block added to list of order blocks after
replacing it’s constituted in order list. The composite block is inserted in order list
according to its area so that order is maintained in the list. Since a composite block has
property same as a hard block. Thus this approach once again applies to new list available
after adding new composite block. Thus with each recursive call 4 blocks are replaced with
1 composite block, hence size of list reduce by 3 at each recursive call. This recursive
procedure is stooped when only one composite block remains in the list. And this
composite block is our floorplan rectangle, which envelops n blocks in non-overlapping
manner.
This bottom up constructive approach provides us floorplan rectangle but exact co-
ordinates of each blocks has been not assigned. So with each returning from recursive call
in top-down way each composite block assign co-ordinated to it’s constitute blocks or
composite blocks according to rotation, ordering of blocks and LB-compact unique
structure used to generate that composite block.
At the end of algorithm we have rectangle R which contains blocks b1, b2, …, bn in non
overlapping manner and floorplan F = {(x1i, y1i, x2i, y2i) | 1 ≤ I ≤ n}, means each block
has bottom-left corners being assigned to (x1i, y1i) and top-right corners being assigned to
(x2i, y2i).
01 ArrangeBlocksInAscOrderOfArea (listOfBlocks);
02 If NumberOfBlocks (listOfBlocks) = 1 then
03 SetCordinateOfSubBlocks (listOfBlocks);
04 FloorplanH = firstBlock (listOfBlocks).Height;
05 FloorplanW = firstBlock (listOfBlocks).Width;
06 Return;
07 End If
08 newCompositeBlock = CreateOneCompositeBlock
(getFirstFourOrLessBlocks (listOfBlocks));
09 InsertNewBlockInList (newCompositeBlock, listOfBlocks);
10 Call algorithm-II (listOfBlocks);
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11 SetCordinateOfSubBlocks (listOfBlocks);
In case of algorithm-II, composite block is inserted in order list of blocks according to its
area, while in Algorithm-II sorting is used to arrange the list of composite blocks.
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Area utilization and runtimes for algorithm-I and algorithm-II are shown in Table 3.6.1 and
Table 3.6.2 respectively. Their comparisons are available in Table 3.6.3. Appendix A.1 and
Appendix A.2 contain circuit layout generated by algorithm-I and algorithm-II
respectively.
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We have also generated three test cases for checking our algorithm for placement of soft
blocks. In case-I, half numbers of blocks are soft and they are selected randomly. Range of
their aspect ratio is from 1.0 to 2.0 (with + 90os rotation allowed) with 0.1 as increment.
Table 3.6.4 shows pattern of hard and soft Blocks in test CASE –I. In Case-II, half
numbers of blocks are soft and they are complement of blocks in Case-I. It means those
blocks, which are soft in case-I, are hard in case-II and visa versa. Range of their aspect
ratio is from 1.0 to 2.0 (with + 90os rotation allowed) with 0.1 as increment. Table 3.6.5
shows pattern of hard and soft Blocks in test CASE –II. In Case-III, all blocks are soft.
Range of their aspect ratio is from 1.0 to 2.0 (with + 90os rotation allowed) with 0.1 as
increment.
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Area utilization and runtime of algorithm-I for case-I, case-II and case-III are shown in
Table 3.6.6, Table 3.6.7 and Table 3.6.8 respectively. And for algorithm-II its available in
Table 3.6.9, Table 3.6.10 and Table 3.6.11. The comparisons between algorithm-I and
algorithm II with respect to case-I, case-II and case-III are available in Table 3.6.12 and
Table 3.6.13. Appendix B.1 and Appendix B.2 contain circuit layout generated by
algorithm-I and algorithm-II respectively for case-I, case-II and case-III.
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Chapter 4
4.1 Conclusion
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There are two variety of flows available from this propose algorithm. First flow output is
list of composite blocks while second flow ends with only one composite block and that
one is our final floorplan. Varity of flow is due to some input criteria, which is defined
further in this chapter.
1. Input preparation:
We are given a set of n blocks or rectangular objects b1, b2, …, bn. and their respective
height and width are (h1, w1), (h2, w2), …, (hn , wn). Let A1, A2, …, An is respective areas of
blocks. We prepare a list { {E1, { h1, A1, C1}},{E1, { w1, A1, C1}, {E2, { h2, A2, C2}}, {E2, { w2, A2,
C2}}, …, {En, { hn, An, Cn}}, {En, { wn, An, Cn}}}. Where {E1, { h1, A1, C1}} is one node of list and
these is two such similar nodes in a list for each block.
Here in this list E1, E2, …, En are expression which illustrate floorplan composition of that
node in form of slicing tree. Since blocks are not composite blocks initially its respective
values are b1, b2, …, bn..
In case of Composite blocks, E1 may have values like b1’ b2’+ , b1, b2*, etc. Here b1’
b2’+ means blocks b1 and b2 are rotated and placed horizontally side by side and b1, b2*
mean b1 and b2 are placed vertically one above other but without rotation.
Here in this list C1, C2, …, Cn are composition index which specifies at which iteration this
composite block is created. These values are initialized to zero. At each pass we add only
one composite block in the list so every block has either composition index set to zero
value or distinct value on later stage.
We define three function size() , area() and composition index(). The function size() is
applicable to node and its value is equal to size of edge of block available in that node.
E.g. size({E1, { h1, A1, C1}}) = h1 and size({E1, { w1, A1, C1}) = w1. The function area() is
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applicable to node and its value is equal to area of block available in that node. E.g.
area({E1, { h1, A1, C1}}) = A1 and area({E1, { w1, A1, C1}) = A1.
The function composition_ index() is applicable to node and its value is equal to
composition index of that node. E.g. composition_index ({E1, { h1, A1, C1}}) = C1 and
composition_ index ({E1, { w1, A1, C1}) = A1.
We prepare an order list having an invariance properties and it is then feed to our
algorithm. The invariance properties defined below is maintain by list through out
algorithm during any operations on list such as insertion of composite block . . The
invariance properties followed by list is that it always maintain order size (node1) ≤ size
(node2) ≤ … ≤ size (noden), If size (node1) = size (node2) then it should follow area
(node1) ≤ area (node2) and If area (node1) = area (node2) then it should follow
composition_ index (node1) ≤ composition_ index (node2).
Output:
OL: may be with one composite block or more then one composite
block depends on Acceptable_Size_Rang
.
01 minAdjDiff = searchMinimumAdjacentNodeSizeDiffIgnoreSelfNode (OL);
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3. Output Preparation:
Since two nodes are there in OL for each block or a composite block. In case of only one
composite block Floorplan Height and Floorplan Width is calculated from node.
And E1 and E2 which are equal because node1 and node2 are from same composite block.
Since E1 represent slicing structure and we also have height and width of each block as
(h1, w1), (h2, w2), …, (hn , wn) respectively. The co-ordinates of each block are calculated on
the base of above thing. If there is more then one composite block at the end of algorithm
then their height and width are extracted from OL and a new list of composite blocks is
created from it.
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References
[1] P.-N. Guo, C.-K. Cheng, and T. Yoshimura, “Floorplanning Using a Tree
Representation,” IEEE TCAD February 2001, pp.281-289.
[2] Jai-Ming Lin and Yao-Wen Chang “TCG: A Transitive Closure Graph-Based
Representation for Non-Slicing Floorplans,” Proc. DAC, pp. 764–769, June2001.
[3] X. Hong, G. Huang, Y. Cai, S. Dong, C.-K. Cheng, and J. Gu, “Corner Block List: An
effective and efficient topological representation of non-slicing floorplan,” Proc. ICCAD,
pp. 8–12, Nov. 2000.
[4] Y.-C. Chang, Y.-W. Chang, G.-M. Wu, and S.-W. Wu, “B*-trees: A new representation
for nonslicing floorplans,” Proc. DAC, pp. 458–463, June 2000.
[5] D. F. Wong, and C.-L. Liu, “A new algorithm for floorplan design,” Proc. DAC, pp.
101–107, June 1986.
[6]H. Murata, K. Fujiyoshi, S. Nakatake, and Y. Kajitani, “Rectangle -packing based
module placement,” Proc. ICCAD, pp. 472–479, Nov. 1995.
[7] S. Nakatake, K. Fujiyoshi, H. Murata, and Y. Kajitani, “Module placement on BSG-
structure and IC layout applications,” Proc. ICCAD, pp. 484–491, Nov. 1996.
[8] H. Onodera, Y. Taniquchi, and K. Tamaru, “Branch-and-bound placement for building
block layout,” Proc. DAC, pp. 433–439, 1991.
[9] Y.-Pang, C.-K. Cheng, and T. Yoshimura, “An enhanced perturbing algorithm for
floorplan design using the O-tree representation,” Proc. ISPD, pp. 168-173, April 2000.
[10] J. Xu, P.N. Guo, C.K. Cheng, “Sequence Pair Approach for Rectilinear Module
Placement,” IEEE TCAD April 1999, pp.484-493
[11] Chang-Tzu Lin, De-Sheng Chen and Yi-Wen Wang, “GPE: A New Representation for
VLSI Floorplan Problem,” Proc. ICCD, pp. 42-44, 2002.
[12] S Kirkpatrick, C. D. Gelatt, and M. P. Vecchi, “Optimization by simulated annealing,”
Science, pp.671–680, 1983.
[13] X. Tang and D. F. Wong, ”FAST-SP: A Fast Algorithm for Block Placement based on
Sequence Pair,” Proc. ASP-DAC, pp. 521-526, 2001.
[14] S. H. Gerez, “Algorithms for VLSI Design Automation”, John Wiley & Sons, 2000.
[15] Pinaki Mazumdar and Elizabeth M. Rudnick, “Genetic Algorithms for VLSI Design,
Layout & Test Automation”, Addison Wesley Longman, 2000.
[16] J.-M. Lin and Y.-W. Chang, .TCG-S: Orthogonal Coupling of P*-admissible
Representations for General Floorplans,. DAC 2002, pp. 842.847.
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Appendix
Fig. A.1a to A.1e show layout of MCNC benchmark circuits ami49, ami33, hp, xerox and
apte respectively. These layouts are output of algorithm-I.
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Fig. B.1a to B1e show layout of MCNC benchmark circuits ami49, ami33, hp, xerox and
apte respectively for case-I. Similarly fig. B.1f to B1j show layout for case-II and fig. B.1k
to B1o show layout for case-III. These layouts are output of algorithm-I.
Fig. B.1a ami49 layout (soft blocks, hard blocks, case-I, algorithm-I)
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Fig. B.1b ami33 layout (soft blocks, hard blocks, case-I, algorithm-I)
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Fig. B.1d xerox layout (soft blocks, hard blocks, case-I, algorithm-I)
Fig. B.1e apte layout (soft blocks, hard blocks, case-I, algorithm-I)
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Fig. B.1f ami49 layout (soft blocks, hard blocks, case-II, algorithm-I)
Fig. B.1g ami33 layout (soft blocks, hard blocks, case-II, algorithm-I)
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Fig. B.1i xerox layout (soft blocks, hard blocks, case-II, algorithm-I)
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Fig. B.1j apte layout (soft blocks, hard blocks, case-II, algorithm-I)
Fig. B.1k ami49 layout (soft blocks, hard blocks, case-III, algorithm-I)
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Fig. B.1l ami33 layout (soft blocks, hard blocks, case-III, algorithm-I)
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Fig. B.1n xerox layout (soft blocks, hard blocks, case-III, algorithm-I)
Fig. B.1o apte layout (soft blocks, hard blocks, case-III, algorithm-I)
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Fig. B.2a ami49 layout (soft blocks, hard blocks, case-I, algorithm-II)
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Fig. B.2b ami33 layout (soft blocks, hard blocks, case-I, algorithm-II)
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Fig. B.2d xerox layout (soft blocks, hard blocks, case-I, algorithm-II)
Fig. B.2e apte layout (soft blocks, hard blocks, case-I, algorithm-II)
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Fig. B.2f ami49 layout (soft blocks, hard blocks, case-II, algorithm-II)
Fig. B.2g ami33 layout (soft blocks, hard blocks, case-II, algorithm-II)
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Fig. B.2i xerox layout (soft blocks, hard blocks, case-II, algorithm-II)
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Fig. B.2j apte layout (soft blocks, hard blocks, case-II, algorithm-II)
Fig. B.2k ami49 layout (soft blocks, hard blocks, case-III, algorithm-II)
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Fig. B.2l ami33 layout (soft blocks, hard blocks, case-III, algorithm-II)
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Fig. B.2n xerox layout (soft blocks, hard blocks, case-III, algorithm-II)
Fig. B.2o apte layout (soft blocks, hard blocks, case-III, algorithm-II)
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