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Dr Pete Sedcole
Department of Electrical & Electronic Engineering • Introduction to Moore and Mealy state diagrams
Imperial College London
• State tables
http://cas.ee.ic.ac.uk/~nps/
E1.2 Digital Electronics 1 10.1 13 November 2008 E1.2 Digital Electronics 1 10.2 13 November 2008
E1.2 Digital Electronics 1 10.3 13 November 2008 E1.2 Digital Electronics 1 10.4 13 November 2008
Example: 2-bit Gray Code “counter” State Tables
E
GCC
• A state table is a tabular form of the state diagram
E D0
D1 a/00 • There is one row for each possible state
E E • It shows the next state that will be entered (on the next clock edge)
CLK for all possible combinations of inputs
• Example:
E d/10 b/01 E
E1.2 Digital Electronics 1 10.5 13 November 2008 E1.2 Digital Electronics 1 10.6 13 November 2008
Assigned state table (S-R flip-flop) Boolean expression from assigned state table
• The assigned state table differs from the state table by showing the
flip-flop outputs assigned to each state instead of the state label
• Ordering the state table inputs like a Karnaugh map enables it to be
• Example for SR flip-flop used directly as a K-map
Present Next output Q+ • It is used to find the Boolean equations that describe the
output inputs: SR next state Q+ from the values of the present state Q and the inputs
Q 00 01 11 10
0 0 0 X 1 Q\SR 00 01 11 10
1 1 0 X 1 0 0 0 X 1
1 1 0 X 1
The input values here have been ordered just like a Karnaugh Map
If the output of the circuit is 1, and the inputs are S=1, R=0: • For the example of the SR flip-flop:
what will be the output of the circuit after the next +ve clock edge? – the next state Q+ is a function of Q, S, R
Answer: 1
E1.2 Digital Electronics 1 10.7 13 November 2008 E1.2 Digital Electronics 1 10.8 13 November 2008
The Karnaugh Map for the S-R flip-flop JK flip-flop states
S Q
Q\SR 00 01 11 10
0 0 0 X 1 J Q JK+JK
CLK
1 1 0 X 1
CLK 1/0 2/1
R Q
Boolean expressions are found by grouping 1s as usual: K Q JK+JK JK+JK JK+JK
E1.2 Digital Electronics 1 10.9 13 November 2008 E1.2 Digital Electronics 1 10.10 13 November 2008
E1.2 Digital Electronics 1 10.11 13 November 2008 E1.2 Digital Electronics 1 10.12 13 November 2008
Mealy state diagrams Mealy state diagram of a JK flip-flop
E1.2 Digital Electronics 1 10.13 13 November 2008 E1.2 Digital Electronics 1 10.14 13 November 2008
SR JK D
+ + +
Q = S + QR Q = JQ + K Q Q =D