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MN-DD2401 Rev. G
Comtech EF Data 2114 W 7th St. Tempe, AZ 85281 (480) 333-2200 Fax: (480) 333-2540 www.comtechefdata.com
Warranty Policy
Warranty Policy
WP
Comtech EF Data products are warranted against defects in material and workmanship for a period of two years from the date of shipment. During the warranty period, Comtech EF Data will, at its option, repair or replace products that prove to be defective. For equipment under warranty, the owner is responsible for freight to Comtech EF Data and all related customs, taxes, tariffs, insurance, etc. Comtech EF Data is responsible for the freight charges only for return of the equipment from the factory to the owner. Comtech EF Data will return the equipment by the same method (i.e., Air, Express, Surface) as the equipment was sent to Comtech EF Data. All equipment returned for warranty repair must have a valid RMA number issued prior to return and be marked clearly on the return packaging. Comtech EF Data strongly recommends all equipment be returned in its original packaging. Comtech EF Data Corporations obligations under this warranty are limited to repair or replacement of failed parts, and the return shipment to the buyer of the repaired or replaced parts. Limitations of Warranty The warranty does not apply to any part of a product that has been installed, altered, repaired, or misused in any way that, in the opinion of Comtech EF Data Corporation, would affect the reliability or detracts from the performance of any part of the product, or is damaged as the result of use in a way or with equipment that had not been previously approved by Comtech EF Data Corporation. The warranty does not apply to any product or parts thereof where the serial number or the serial number of any of its parts has been altered, defaced, or removed. The warranty does not cover damage or loss incurred in transportation of the product. The warranty does not cover replacement or repair necessitated by loss or damage from any cause beyond the control of Comtech EF Data Corporation. The warranty does not cover any labor involved in the removal and or reinstallation of warranted equipment or parts on site, or any labor required to diagnose the necessity for repair or replacement. The warranty excludes any responsibility by Comtech EF Data Corporation for incidental or consequential damages arising from the use of the equipment or products, or for any inability to use them either separate from or in combination with any other equipment or products. A fixed charge established for each product will be imposed for all equipment returned for warranty repair where Comtech EF Data Corporation cannot identify the cause of the reported failure. Exclusive Remedies Comtech EF Data Corporations warranty, as stated is in lieu of all other warranties, expressed, implied, or statutory, including those of merchantability and fitness for a particular purpose. The buyer shall pass on to any purchaser, lessee, or other user of Comtech EF Data Corporations products, the aforementioned warranty, and shall indemnify and hold harmless Comtech EF Data Corporation from any claims or liability of such purchaser, lessee, or user based upon allegations that the buyer, its agents, or employees have made additional warranties or representations as to product preference or use. The remedies provided herein are the buyers sole and exclusive remedies. Comtech EF Data shall not be liable for any direct, indirect, special, incidental, or consequential damages, whether based on contract, tort, or any other legal theory.
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Warranty Policy
Comtech EF Data Corporation th 2114 W 7 Street. Tempe, Arizona 85281 (USA) ATTN: Customer Support Phone: (480) 333-2200 Fax: (480) 333-2540
Any product returned to Comtech EF Data for examination must be sent prepaid via the means of transportation indicated as acceptable to Comtech EF Data. Return Authorization Number must be clearly marked on the shipping label. Returned products or parts should be carefully packaged in the original container, if possible, and unless otherwise indicated, shipped to the above address.
Non-Warranty Repair
When a product is returned for any reason, Customer and its shipping agency shall be responsible for all damage resulting from improper packing and handling, and for loss in transit, not withstanding any defect or nonconformity in the product. By returning a product, the owner grants Comtech EF Data permission to open and disassemble the product as required for evaluation. In all cases, Comtech EF Data has sole responsibility for determining the cause and nature of failure, and Comtech EF Datas determination with regard thereto shall be final.
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Preface
Preface
This manual provides installation and operation information for the Radyne DD2401 VME L-Band Demodulator Card. This is a technical document intended for use by engineers, technicians, and operators responsible for the operation and maintenance of the DD2401 VME Demodulator Card.
Conventions
Whenever the information within this manual instructs the operator to press a pushbutton switch or keypad key on the Front Panel, the pushbutton or key label will be shown in "less than" (<) and "greater than" (>) brackets. For example, the Reset Alarms Pushbutton will be shown as <RESET ALARMS>, while a command that calls for the entry of a 7 followed by ENTER Key will be represented as <7,ENTER>. Cautions and Warnings
A caution icon indicates a hazardous situation that if not avoided, may result in minor or moderate injury. Caution may also be used to indicate other unsafe practices or risks of property damage.
A warning icon indicates a potentially hazardous situation that if not avoided, could result in death or serious injury.
A note icon identifies information for the proper operation of your equipment, including helpful hints, shortcuts, or important reminders.
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Trademarks Product names mentioned in this manual may be trademarks or registered trademarks of their respective companies and are hereby acknowledged.
Copyright
2009, Comtech EF Data This manual is proprietary to Comtech EF Data and is intended for the exclusive use of Comtech EF Datas customers. No part of this document may in whole or in part, be copied, reproduced, distributed, translated or reduced to any electronic or magnetic storage medium without the express written consent of a duly authorized officer of Comtech EF Data
Disclaimer
This manual has been thoroughly reviewed for accuracy. All statements, technical information, and recommendations contained herein and in any guides or related documents are believed reliable, but the accuracy and completeness thereof are not guaranteed or warranted, and they are not intended to be, nor should they be understood to be, representations or warranties concerning the products described. Comtech EF Data assumes no responsibility for use of any circuitry other than the circuitry employed in Comtech EF Data systems and equipment. Furthermore, since Comtech EF Data is constantly improving its products, reserves the right to make changes in the specifications of products, or in this manual at any time without notice and without obligation to notify any person of such changes.
Record of Revisions
Revision Level
1.0 1.1 1.2 1.3 1.4 2.0 F G
Date
1-28-99 1-18-02 2-13-02 3-1-02 9-30-03 6-4-08 12-12-08 2-23-09
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Table of Contents
Table of Contents
ToC
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Glossary..................................................................................................................... G-1
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Introduction
Introduction
1.0 Description
The Radyne DD2401 Satellite Demodulators (see Figure 1-1) are microprocessor-controlled Binary Phase Shift Keyed (BPSK), Quadrature Phase Shift Keyed (QPSK), or optional Offset Quadrature Phase Shift Keyed (OQPSK) Demodulators. They are intended for use as part of the receiving ground equipment in a satellite communications system. The DD2401 can be ordered with a 24 Volt power source for operation of the outdoor Low Noise Block (LNB).
Figure 1-1. DD2401 Satellite Demodulator The DD2401 is designed to perform at one end of a satellite Single Channel Per Carrier (SCPC) Link or as the VSAT Remote Site Demod in a TDMA Hub System. The DD2401 can be used in a Mesh or Star Topology Network. The Demodulator operates independently using BPSK, QPSK or OQPSK (Optional) Modulation in either SCPC or VSAT Modes. All functions can be accessed with a terminal or personal computer via a serial link for complete remote monitor and control (M&C) capability. The DD2401 is also the ideal VSAT Demodulator for use in a Point-to-Point Frame Relay Hybrid Network. Other applications include FDMA, telephony, video conferencing, long distance learning, paging and newsgathering. Selection of any data rate is provided over the following ranges: BPSK: QPSK: OQPSK: 8PSK (Optional*): 9.6 Kbps to 1200 Kbps 9.6 Kbps to 4.375 Mbps 9.6 Kbps to 4.375 Mbps 64.0 Kbps to 5.0 Mbps
* 8PSK Option is available on L-band units only. Note: Data rates of 4.375 Mbps must operate at 7/8 Rate QPSK or 8PSK. The DD2401 can track and acquire a carrier over a programmable range of 1 kHz to 42 kHz. Acquisition times of less than three seconds are typical at data rates greater than 64 Kbps over a range of 25 kHz. To facilitate link testing, the DD2401 incorporates a built-in 2047 test pattern with BER measurement capability.
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Various options are available for the DD2401 L-Band Multi Demod:
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Installation
Installation
There are no user-serviceable parts or configuration settings located inside the DD2401 chassis. There is a potential shock hazard internally at the power supply module. DO NOT open the DD2401 chassis under any circumstances.
Before initially applying power to the unit, it is a good idea to disconnect the transmit output from the operating ground station equipment. This is especially true if the current DD2401 configuration settings are unknown, where incorrect setting could disrupt existing communications traffic.
2.1 Unpacking
The DD2401 Modulator was carefully packaged to avoid damage and should arrive complete with the following items for proper installation: 1. 2. 3. DD2401 Satellite Demodulator Power Cord, six foot with applicable AC Connector Installation and Operation Manual
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unit and ensure that all of the above items are in the carton. If the Prime AC power available at the installation site requires a different power cord/AC Connector, then arrangements to receive the proper device will be necessary before proceeding with the installation. The DD2401 Demodulator is shipped fully assembled. It does not require removal of the covers for any purpose in installation. Always insure that power is removed from the DD2401 before removing or installing a Universal Interface Module (UIM). Should the power cable AC Connector be of the wrong type for the installation, either the cable or the power connector end should be replaced. The power supply itself is designed for universal application using from 100 to 240 VAC, 50 to 60 Hz, 1.0A.
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Theory of Operation
Figure 3-1. DD2401 Demodulator Functional Block Diagram 3.1 Applications Following are just a few representative forms of satellite communications links and networks in which the DD2401 Demod may be used.
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specific parts of the data. The TDMA Network usually looks like the Star network described above. The DD2401 is specifically designed to be usable as the remote site Demodulator of a TDMA network when coupled with a proper Burst Demodulator at the hub site.
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3.2.4 Interleaving
The DD2401 allows for interleaving depths of 4 or 8 R-S blocks. This allows burst errors to be spread over 4 or 8 R-S blocks in order to enhance the error correcting performance of the R-S Codec.
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Table 3-1. Reed-Solomon Codes for IDR Type of Service Data Rate (Kbps) 64 128 256 384 512 768 1024 1536 1544 2048 R-S Code 1 (n, k, t) (126, 112, 7) (126, 112, 7) (126, 112, 7) (126, 112, 7) (126, 112, 7) (126, 112, 7) (126, 112, 7) (126, 112, 7) (225, 205,10) (219, 201, 9) Bandwidth Expansion [ (n/k) -1 ] 0.125 0.125 0.125 0.125 0.125 0.125 0.125 0.125 0.0976 0.0896 Interleaving Depth 4 4 4 4 4 4 4 4 4 4 Maximum R-S Codec Delay (ms) 115 58 29 19 15 10 8 5 9 7
2
1. n = code length, k = information symbols and t = symbol error correcting capability. 2. Design objective. 3. For the DD2401 Demodulator, the IDR Deframing must be supplied externally.
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User Interfaces
4.1
All demodulators can be controlled by an external Monitor & Control (M&C) system through a single Remote Port connection. Communication between the DD240/VME2401/MD2401 Demodulator and the external system control computer is via a binary protocol. The Remote Port provides RS-485 capability and thus is used as a multi-drop control bus allowing a single external M&C computer to control all demodulators. The Remote Port Data is outlined starting with Section 4.4 below.
4.2
Characters contained within the brackets < and > indicate pressing the appropriate key.
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The unit can be interactively monitored and controlled in the Terminal Mode, with a full screen presentation of current settings and status. Programming is accomplished by selecting the item to be modified and pressing the terminal key of the option number. For example, to change the Receive Data Rate, enter 33 at the terminal. The DD240/VME2401/MD2401 DEMODULATOR will respond by presenting the options available and requesting input. Two types of input may be requested. If the input is multiple choice, the desired choice is selected by pressing <Space>. When the desired option is displayed, press <Enter> to select that option. The other possible input type requires a numerical input (such as entering a frequency or data rate). This type of input is followed by pressing <Enter> or the carriage return key. An input can be aborted at any time by pressing <ESC>. Invalid input keys cause an error message to be displayed on the terminal. The Terminal Control Mode supports a serial baud rate of 19200. The connection must be set for 8 data bits, 1 stop bit and no parity (8, N, 1). Three terminal emulations are supported: VT100, WYSE 50, and ADDS. The emulation type can be changed by pressing <$> (dollar sign) on the terminal keyboard.
2.
3.
Modify the selection, if necessary, to match the settings (the Front Panel SYSTEM Sub-Menu contains all the Terminal Emulation Controls).
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4.4
The Remote Port of the DD2401/DD2401L allows for complete control and monitor functions via an RS-485 or RS-232 Internal Dip Switch Configurable Serial Interface. Control and status messages are conveyed between the DD2401/DD2401L and the subsidiary modems and the host computer using packetized message blocks in accordance with a proprietary communications specification. This communication is handled by the Radyne Link Level Protocol (RLLP), which serves as a protocol wrapper for the M&C data. Complete information on monitor and control software is contained in the following sections.
The stop bit, S1 is a mark. Data flow remains in a hold mode until S1 is replaced by a space. If S1 is followed by a space, the space character is considered a start (ST) and not part of the actual data (B0 - B 7). The above byte-oriented protocol is standard for UART based serial communication ports such as Workstation or Personal Computer (PC) COM ports. COM ports should be configured for 8 data bits, no parity, and one stop bit. For example, for 9600-baud operation, COM ports should be configured as: 9600, 8, N, 1 The COMMSPEC developed for use with the Radyne Link Level Protocol (RLLP) organizes the actual monitor and control data within a shell, or protocol wrapper, that surrounds the data. The format and structure of the COMMSPEC message exchanges are described herein. Decimal numbers have no suffix; hexadecimal numbers end with a lower case h suffix and binary values
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have a lower case b suffix. Thus, 22 = 16h = 000010110b. The principal elements of a data frame, in order of occurrence, are summarized as follows: <SYNC> - the message format header character, or ASCII sync character, that defines the beginning of a message. The <SYNC> character value is always 16h (1 Byte). <BYTE COUNT> - the Byte Count is the number of bytes in the <DATA> field (two bytes). <SOURCE ID> - the Source Identifier defines the multi-drop address origin. Note that all nodes on a given control bus have a unique address that must be defined (1 Byte). <DESTINATION ID> - The Destination Identifier serves as a pointer to the multi-drop destination device that indicates where the message is to be sent (1 Byte). <FRAME SEQUENCE NUMBER> -The FSN is a tag with a value from 0 through 255 that is sent with each message. It assures sequential information framing and correct equipment acknowledgment and data transfers (1 Byte). <OPCODE> - The Operation Code field contains a number that identifies the message type associated with the data that follows it. Equipment under MCS control recognizes this code via firmware identification and subsequently steers the DATA accordingly to perform a specific function or series of functions. Acknowledgment and error codes are returned in this field (two bytes). <...DATA...> - The Data field contains the binary data bytes associated with the <OPCODE>. The number of data bytes in this field is indicated by the <BYTE COUNT> value. <CHECKSUM> - The checksum is the modulo 256 sum of all preceding message bytes, excluding the <SYNC> character (1 Byte). The checksum determines the presence or absence of errors within the message. In a message block with the following parameters, the checksurn is computed as shown in Table 4-4 below. Table 4-4. Checksum Calculation Example Byte Field Data Content Running Checksum <BYTE COUNT> (Byte 1) 00h = 00000000b 00000000b <BYTE COUNT> (Byte 2) 02h = 00000010b 00000010b <SOURCEID> F0h = 11110000b 11110010b <DESTINATION ID> 2Ah = 00101010b 00011100b <FSN> 09h = 00001001b 00100101b <OPCODE> (Byte 1) 00h = 00000000b 00100101b <OPCODE> (Byte 2) 03h = 00000011b 00101000b <DATA> (Byte 1) DFh = 11011111b 00000111b <DATA> (Byte 2) FEh = 11111110b 00000101b Thus, the checksum is 00000101b; which is 05h or 5 decimal. Alternative methods of calculating the checksum for the same message frame are: 00h + 02h + F0h + 2Ah + 09h + 00h + 03h + DFh + FEh = 305h. Since the only concern is the modulo 256 (modulo 1 00h) equivalent (values that can be represented by a single 8-bit byte), the checksum is 05h. For a decimal checksum calculation, the equivalent values for each information field are: 0 + 2 + 240 + 42 + 9 + 0 + 3 + 223 + 254 = 773;
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773/256 = 3 with a remainder of 5. This remainder is the checksum for the frame. 5 (decimal) = 05h = 0101b = <CHECKSUM>
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In acknowledgment (response) packets, the operational code <OPCODE> field of the message packet is set to 0 by the receiving devices when the message intended for the device is evaluated as valid. The device that receives the valid message then exchanges the <SOURCE ID> with the <DESTINATION ID>, sets the <OPCODE> to zero in order to indicate that a good message was received, and returns the packet to the originator. This GOOD MESSAGE opcode is one of nine global responses. Global response opcodes are common responses, issued to the M&C computer or to another device, that can originate from and are interpreted by all Radyne equipment in the same manner. These are summarized as follows (all opcode values are expressed in decimal form): Table 4-5. Response Opcodes Response Opcode Description Good Message Bad Parameter Bad Opcode Bad Checksum Command Not Allowed in LOCAL Mode Command Not Allowed in AUTO Mode Bad Destination Unable to Process Command Packet Too Long
Opcode 0000h 00FFh 00FEh 00FDh 00FCh 00FBh 00FAh 00F9h 00F8h
The following response error codes are specific to the DD2401/DD2401L: Response Opcode Description DPARM_MODE_ERROR DPARM_FREQUENCY_ERROR DPARM_DATARATE_ERROR DPARM_SWEEPBOUNDARY_ERROR DPARM_LEVELLIMIT_ERROR DPARM_DEMODULATIONTYPE_ERROR DPARM_CONVDECODER_ERROR DPARM_REEDSOLOMON_ERROR DPARM_DIFFERENTIALDECODER_ERROR DPARM_DESCRAMBLERCONTROL_ERROR DPARM_DESCRAMBLERTYPE_ERROR DPARM_SPECTRUM_ERROR DPARM_BUFFERCLOCK_ERROR DPARM_BUFFERCLOCKPOL_ERROR DPARM_INSERTMODE_ERROR DPARM_FRAMING_ERROR DPARM_OPERATINGMODE_ERROR DPARM_BERMEASUREPERIOD_ERROR DPARM_CIRCUITID_ERROR DPARM_TERRLOOPBACK_ERROR DPARM_BASELOOPBACK_ERROR DPARM_IFLOOPBACK_ERROR DPARM_INTERFACETYPE_ERROR DPARM_NOTIMPLEMENTED_ERROR DPARM_DATAINVERT_ERROR DPARM_SUMMARYFAULT_ERROR DPARM_EXTERNALEXCSOURCE_ERROR DPARM_BUFFERSIZEMSEC_ERROR DPARM_BUFFERSIZEBYTES_ERROR Opcode 0x0600 0x0601 0x0603 0x0604 0x0605 0x0608 0x0609 0x060A 0x060B 0x060C 0x060D 0x060E 0x0610 0x0611 0x0612 0x0615 0x0616 0x0619 0x061A 0x061B 0x061C 0x061D 0x061E 0x0622 0x0623 0x0624 0x0625 0x0629 0x062A
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Multi-Drop Override ID
00 01 02 03 04 05 06 07 08 09 10 20 21 22 23 24
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RCS10 M:N Switch RCS11 1:1 Switch DD2401/DD2401L Demodulator Reserved For Future Equipment Types
25 26 27 28-31
Note that multi-drop override IDs 01 or 02 can be used interchangeably to broadcast a message to a DMD3000/4000 modem, or to a DMD4500/5000, or to a DMD15 modem. Radyne recommends that the multi-drop override IDs be issued only during system configuration as a bus test tool by experienced programmers, and that they not be included in run-time software. It is also advantageous to consider the use of multiple bus systems where warranted by a moderate to large equipment complement. Therefore, if a DD2401/DD2401L is queried for its equipment type identifier, it will return a 27.
The DD2401/DD2401L RLLP is not software-compatible with the following previous Radyne products: RCU5000 and DMD4500. These products may not occupy the same bus while using this protocol as equipment malfunction and loss of data may occur. When Radyne equipment is queried for information (Query Mod, Query Demod, etc.) it responds by sending back two blocks of data; a non-volatile section (parameters that can be modified by the user) and a volatile section (status information). It also returns a count value that indicates how large the non-volatile section is. This count is used by M&C developers to index into the start of the volatile section. When new features are added to Radyne equipment, the control parameters are appended to the end of the non-volatile section, and status of the features, if any, are added at the end of the volatile section. If a remote M&C queries two pieces of Radyne equipment with different software revisions, they might respond with two different sized packets. The remote M&C MUST make use of the non-volatile count value to index to the start of the volatile section. If the remote M&C is not aware of the newly added features to the Radyne product, it should disregard the parameters at the end of the non-volatile section and index to the start of the volatile section. If packets are handled in this fashion, there will also be backward-compatibility between Radyne equipment and M&C systems. Remote M&C systems need not be modified every time a feature is added unless the user needs access to that feature.
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the Inter-Frame Space may be determined empirically in accord with the system configuration, or calculated based on established maximum equipment task processing times. Each piece of supported equipment on the control bus executes a Radyne Link Level Task (RLLT) in accordance with its internal hardware and fixed program structure. In a flow control example, the RLLT issues an internal message in system call to invoke an I/0 wait condition that persists until the task receives a command from the M&C computer. The RLLT has the option of setting a timeout on the incoming message. Thus, if the equipment does not receive an information/command packet within a given time period, the associated RLLT exits the I/0 wait state and takes appropriate action. Radyne equipment is logically linked to the control bus via an Internal I/O Processing Task (IOPT) to handle frame sequencing, error checking, and handshaking. The IOPT is essentially a link between the equipment RLLT and the control bus. Each time the M&C computer sends a message packet, the IOPT receives the message and performs error checking. If errors are absent, the IOPT passes the message to the equipments RLLT. If the IOPT detects errors, it appends error messages to the packet. Whenever an error occurs, the IOPT notes it and discards the message; but it keeps track of the incoming packet. Once the packet is complete, the IOPT conveys the appropriate message to the RLLT and invokes an I/0 wait state (wait for next <SYNC> character). If the RLLT receives the packetized message from the sender before it times out, it checks for any error messages appended by the IOPT. In the absence of errors, the RLLT processes the received command sent via the transmitted packet and issues a message out system call to ultimately acknowledge the received packet. This call generates the response packet conveyed to the sender. If the IOPT sensed errors in the received packet and an RLLT timeout has not occurred, the RLLT causes the equipment to issue the appropriate error message(s) in the pending equipment response frame. To maintain frame synchronization, the IOPT keeps track of error-laden packets and packets intended for other equipment for the duration of each received packet. Once the packet is complete, the IOPT invokes an I/0 wait state and searches for the next <SYNC> character.
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packet; but with the same <FSN>. When the intended receiver detects a duplicate packet, the packet is acknowledged with a response packet and internally discarded to preclude undesired repetitive executions. If the M&C computer sends a command packet and the corresponding response packet is lost due to a system or internal error, the computer times out and re-transmits the same command packet with the same <FSN> to the same receiver and waits once again for an acknowledgment or a NAK packet. To reiterate, the format of the message block is shown in Table B-4, Link Level Protocol Message Block. Table 4-6. Link Level Protocol Message Block SOURCE DESTINATION FSN OPCODE ADDRESS ADDRESS
SYNC
COUNT
DATA BYTES
CHECKSUM
The RLLP Remote Port Packet structure is as follows: <SYNC> Message format header character that defines the beginning of a message. The <SYNC> character value is always 0x16. (1 byte) <BYTE COUNT> Number of bytes in the <DATA> field. (2 bytes) Identifies the address of the equipment from where the message
<DEST ADDR> Identifies the address of the equipment where the message is to be sent. (1 byte) <FSN> Frame sequence number ensures correct packet acknowledgment and data transfers. (1 byte) <OPCODE> This byte identifies the message type associated with the information data. The equipment processes the data according to the value in this field. Return error codes and acknowledgment are also included in this field. (2 bytes) <...DATA...> Information data. The number of data bytes in this field is indicated by the <BYTE COUNT> value. <CHECKSUM> The modulo 256 sum of all preceding message bytes excluding the <SYNC> character. (1 byte)
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Command Demod All Command Demod Frequency Command Demod Data Rate Command Demod Sweep Boundary Command Demod Demodulation Type Command Demod Convolutional Decoder Command Demod Differential Decoder Command Demod Reed-Solomon Command Demod Descrambler Command Demod Descrambler Type Command Demod Spectrum Command Demod Buffer Clock Command Demod Buffer Clock Polarity Command Demod Operating Mode Command Demod BER Measure Period Command Demod Terrestrial Loopback Command Demod Baseband Loopback Command Demod Center Buffer Command Demod Data Invert Command Demod Buffer Size Time/Bytes
2A00h 2A01h 2A02h 2A04h 2A07h 2A08h 2A09h 2A0Ah 2A0Dh 2A0Eh 2A0Fh 2A11h 2A12h 2A17h 2A1Ah 2A1Ch 2A1Dh 2A20h 2A21h 2A31h
Opcode 2403h 240Ah 240Eh 240Fh 2410h 2600h 2616h 261Bh 2C03h 2C04h 2C05h 2C06h 2C07h 2C08h 2C30h
Applies to base band frequency modems only. Applies to LB/ST modem configurations only.
4.4.12 4.4.12.1
Note: All bytes preceded by a * are not applicable to the DD2401/DD2401L and should be considered as reserved and there returned values ignored.
Opcode: <2401h>
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<1>
Number of Nonvol bytes See Paragraph B.6. This is the number of configuration bytes and is an offset to the start of the status block. Configuration Bytes Binary Value, 1 Hz Steps Binary Value, 1 bps Steps Sweep Limits (Max of 4 2 kHz) Unsigned Binary Value in Hz
<4> <4>
<1>
Frequency Data Rate Sweep Boundary External Reference Freq. Reference Source Input Level Limit Demodulation Type Convolutional Decoder
<4>
<1>
0 = Internal, 1 = External
<1> <1>
Lower Level Limit, Binary Value, 1 dB Steps, Negative Sign Implied 0 = QPSK, 1 = BPSK, 2 = 8PSK, 4 = OQPSK
<1>
0 = None, 1 = Viterbi 1/2 Rate, 3 = Viterbi 3/4 Rate, 5 = Viterbi 7/8 Rate, 7 = Sequential 1/2 Rate, 9 = Sequential 3/4 Rate, 11 = Sequential 7/8 Rate, 14 = Trellis 2/3, 20 = TPC 0.793 2D, 21 = TPC 0.495 3D, 23 = TPC , 24 = TPC , 25 = TPC 7/8, 26 = TPC 21/44 0 = Disable, 1 = Enable Unsigned Binary Unsigned Binary Unsigned Binary Unsigned Binary, 4 or 8
Reed-Solomon Reed-Solomon N Reed-Solomon K Reed-Solomon T RS Interleaver Depth Differential Decoder Descrambler Control Descrambler Type
<1>
0 = Off, 1 = On
<1>
0 = Disable, 1 = Enable
<1>
0 = None, 1 = IBS Scrambler, 2 = V35_IESS, 3 = V35_CCITT, 4 = V35_EFDATA, 6 = OM73, 7 = Reed-Solomon Scrambler, 8 = V35_EFRS, 9 = TPC Scrambler 0 = Normal, 1 = Inverted Byte 1 - 2 = Buffer Size in ms Byte 3 - 4 = Buffer Size in Bytes 0 = External, 1 = Internal, 2 = EXC, 3 = RX SAT
<1> <4>
<1>
Buffer Clock
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<1>
0 = Normal, 1 = Inverted
<1> <1>
0 = Normal, 1 = 2047 Test Bit 0 = Receive Processor Fault Bit 1 = Signal Lock Fault Bit 2 = Receive Satellite AIS Fault Bit 3 = Rx AGC/Input Level Fault Bit 4 = Reed-Solomon Sync Fault Bit 5 = Reed-Solomon Excessive Errors Fault Bit 6 = Reed-Solomon Uncorrectable Word Fault) Bit 7 = Receive Forced Alarm (0 = Mask, 1 = Allow) Bit 0 = Buffer Underflow Bit 1 = Buffer Overflow Bit 2 = Buffer Under 10% Bit 3 = Buffer Over 90% Bit 4 = Receive FPGA Configuration Alarm Fault Bit 5 = Rx LNB Fault, LBST Only Bits 6 - 7 = Spares (0 = Mask, 1 = Allow) Bit 0 = IF Synthesizer Lock Detect Fault Bit 1 = Rx Oversample PLL Lock Detect Fault Bit 2 = Buffer Clock PLL Lock Detect Fault Bit 3 = Viterbi Decoder Lock Fault Bit 4 = Sequential Decoder Lock Fault Bit 5 = Rx 2047 Test Pattern Lock Fault Bit 6 = External Reference PLL Lock Fault Bit 7 = Frame Sync/Multiframe Sync Loss (0 = Mask, 1 = Allow) Bit 0 = Buffer Clock Activity Detect Fault Bit 1 = External BNC Activity Detect Fault Bit 2 = Rx Satellite Clock Activity Detect Fault Bit 3 = External Reference PLL Activity Fault Bit 4 = High Stability Activity Detect Fault Bit 5 = High Stability PLL Fault Bit 6 = Eb/No Threshold Fault Bit 7 = Spare (0 = Mask, 1 = Allow) Bit 0 = -12 V Alarm Bit 1 = +12 V Alarm Bit 2 = +5 V Alarm Bit 3 = Temperature Bit 4 = Interface FPGA Fault Bit 5 = Battery Fault Bit 6 = RAM/ROM Fault Bit 7 = Spare (0 = Mask, 1 = Allow) Set to Zero
<1>
Alarm 2 Mask
<1>
Alarm 3 Mask
<1>
Alarm 4 Mask
<1>
<1>
Reserved
MN-DD2401 - Rev. G
4-17
User Interfaces
<1>
BER Measure Period Rx Circuit ID Rx Terrestrial Loopback Rx Baseband Loopback Rx IF Loopback Reserved Data Invert
Unsigned Binary Number of Bits in Measurement Period, in Powers 6 of Ten (ex: 6 = 10 Bits) 24 ASCII Characters 0 = Disabled, 1 = Enabled
<24> <1>
<1>
0 = Disabled, 1 = Enabled
0 = Disabled, 1 = Enabled Ignore 0 = Normal, 1 = Invert Note: The following byte applies only if an Asynchronous, IDR or IBS Interface is installed. If not, ignore.
*<1>
Async Framing
0 = No Framing, 1 = 1/16 Async, 2 = 1/16 IBS, 3 = 96 Kbit IDR Note: The following byte applies only if an asynchronous interface card is installed. If not, ignore.
*<1>
0 = 1200, 1 = 2400, 2 = 4800, 3 = 9600, 4 = 19200, 5 = 50, 6 = 110, 7 = 300, 8 = 600 Note: The following byte applies only if an asynchronous interface card is installed. If not, ignore.
*<1>
0 = RS-232, 1 = RS-485 Note: The following byte applies only if an asynchronous interface card is installed. If not, ignore.
*<1>
Note: The following byte applies only if a synchronous Multiprotocol interface card is installed. If not, ignore. *<1> Multiprotocol Interface Card Interface Type 0 = V.35, 1 = RS-422, 2 = RS-232
Note: The following byte applies only if a symmetric G.703 interface card is installed. If not, ignore. *<1> G.703 Interface Type 0 = G703T1AMI, 1 = G703T1B8ZS, 2 = G703BE1, 3 = G703UE1
Note: The following byte applies to all DMD2401 modems, regardless of interface type.
4-18
MN-DD2401 - Rev. G
User Interfaces
<1>
0 = Normal, 1 = Swapped
Note: The following byte applies only if an IDR OR IBS interface card is installed. If not, ignore. <1> Receive Mode 0 = Closed Net Mode, 1 = IDR Mode, 2 = IBS Mode, 3 = D&I Mode Note: The following byte applies only if an IDR OR IBS interface card is installed and the Receive Mode is set to IDR Mode. If not, ignore *<1> T1/E1 Frame Source 0 = Internal, 1 = External
Note: The following byte applies only if an IDR OR IBS interface card is installed and the Receive Mode is set to IDR Mode. If not, ignore *<1> Receive IDR Overhead Mode 0 = Voice, 1 = 64 K Data
Note: The following byte applies only if an IDR OR IBS interface card is installed and the Receive Mode is set to IDR Mode. If not, ignore *<1> Receive IDR / IBS Backward Alarms Mask Bit 0 = IDR Backward Alarm 1 / IBS Backward Alarm Bit 1 = IDR Backward Alarm 2 Bit 2 = IDR Backward Alarm 3 Bit 3 = IDR Backward Alarm 4 Bits 4 - 7 = Spares (0 = Mask, 1 = Allow) Note: The following byte applies only if an IDR OR IBS interface card is installed and the Receive Mode is set to IDR Mode. If not, ignore *<1> Interface Type
*<2>
Note: The following two bytes apply only if an IDR OR IBS interface card is installed and the Receive Mode is set to IDR Mode. If not, ignore
MN-DD2401 - Rev. G
4-19
User Interfaces
*<2>
*<1>
Bit 0 = IBS Satellite Multiframe Fault Bit 1 = IBS Satellite Frame Fault Bit 2 = Spare Bit 3 = IBS Alarm if BER < 10-03 Bit 4 = IBS Prompt Alarm Bit 5 = IBS Service Alarm Bit 6 = Turbo Codec Lock Fault Bit 7 = Spare (0 = Mask, 1 = Allow) 0 = Disable, 1 = T1-D4, 2 = T1-ESF, 3 = PCM-30, 4 = PCM-30C, 5 = PCM-31, 6 = PCM-31C, 7 = T1-SLC96, 8 = T1-D4-S, 9 = T1-ESF-S Mapping of Satellite Channels to insert Terrestrial Timeslots Bit 0 = Frame Lock Fault Bit 1 = Multiframe Lock Fault Bit 2 = CRC Lock Fault. Valid only in T1-ESF and E1 CRC enabled Bit 3 = T1 Yellow Alarm Received Bit 4 = E1 FAS Alarm Received Bit 5 = E1 MFAS Alarm Received Bit 6 = E1 CRC Alarm Received Bit 7 = CRC Calculation Fault (0 = Mask, 1 = Allow) Bit 0 = Backward Alarm Received from Satellite Bits 1 7 = Spares (0 = Mask, 1 = Allow) Force D&I Terrestrial Backward Alarm to be Trans (0 = Not Forced, 1 = Forced)
*<1>
Insert Mode
*<30> *<1>
*<1>
*<1>
0 = 75 ohms, 1 = 50 Ohms
TPC Interleaver
<1> <1>
0 = Disable Interleaver, 1 = Enable Interleaver Status Bytes Decimal Point Implied Bit 0 = Receive Processor Fault Bit 1 = Signal Lock Fault Bit 2 = Receive Satellite AIS Fault Bit 3 = Rx AGC Input Level Fault Bit 4 = Reed-Solomon Sync Fault Bit 5 = Reed-Solomon Excessive Errors Fault Bit 6 = Reed-Solomon Uncorrectable Word Fault Bit 7 = Receive Forced Alarm (0 = Pass, 1 = Fail) Bit 0 = Buffer Underflow Bit 1 = Buffer Overflow
<1>
Alarm 2
4-20
MN-DD2401 - Rev. G
User Interfaces
Bit 2 = Buffer Under 10% Bit 3 = Buffer Over 90% Bit 4 = Receive FPGA Fault Bit 5 = Rx LNB Fault, LBST Only Bits 6 - 7 Spares (0 = Pass, 1 = Fail) <1> Alarm 3 Bit 0 = IF Synthesizer Lock Detect Fault Bit 1 = Rx Oversample PLL Lock Detect Fault Bit 2 = Buffer Clock PLL Lock Detect Fault Bit 3 = Viterbi Decoder Lock Fault Bit 4 = Sequential Decoder Lock Fault Bit 5 = Rx 2047 Test Pattern Lock Fault Bit 6 = External Reference PLL Lock Fault Bit 7 = Frame Sync/Multiframe Sync Fault (0 = Pass, 1 = Fail) Bit 0 = Buffer Clock Activity Detect Fault Bit 1 = External BNC Activity Detect Fault Bit 2 = Rx Satellite Clock Activity Detect Fault Bit 3 = External Reference PLL Activity Fault Bit 4 = High Stability Activity Detect Fault Bit 5 = High Stability PLL Fault Bit 6 = Eb/No Threshold Fault Bit 7 = Spare (0 = Pass, 1 = Fail) Bit 0 = -12 V Alarm Bit 1 = +12 V Alarm Bit 2 = +5 V Alarm Bit 3 = Temperature Bit 4 = Interface FPGA Fault Bit 5 = Battery Fault Bit 6 = RAM/ROM Fault Bit 7 = Spare (0 = Pass, 1 = Fail) Ignore Bit 0 = Receive Processor Fault Bit 1 = Signal Lock Fault Bit 2 = Receive Satellite AIS Fault Bit 3 = Rx AGC Input Level Fault Bit 4 = Reed-Solomon Sync Fault Bit 5 = Reed-Solomon Excessive Errors Fault Bit 6 = Reed-Solomon Uncorrectable Word Fault Bit 7 = Receive Forced Alarm (0 = Pass, 1 = Fail) Bit 0 = Buffer Underflow Bit 1 = Buffer Overflow Bit 2 = Buffer Under 10% Bit 3 = Buffer Over 90% Bit 4 = Receive FPGA Fault Bit 5 = Rx LNB Fault, LBST Only Bits 6 - 7 = Spares
<1>
Alarm 4
<1>
Common Alarm
<1> <1>
<1>
Latched Alarm 2
MN-DD2401 - Rev. G
4-21
User Interfaces
(0 = Pass, 1 = Fail) <1> Latched Alarm 3 Bit 0 = IF Synthesizer Lock Detect Fault Bit 1 = Rx Oversample PLL Lock Detect Fault Bit 2 = Buffer Clock PLL Lock Detect Fault Bit 3 = Viterbi Decoder Lock Fault Bit 4 = Sequential Decoder Lock Fault Bit 5 = Rx 2047 Test Pattern Lock Fault Bit 6 = External Reference PLL Lock Fault Bit 7 = Frame Sync Fault (0 = Pass, 1 = Fail) Bit 0 = Buffer Clock Activity Detect Fault Bit 1 = External BNC Activity Detect Fault Bit 2 = Rx Satellite Clock Activity Detect Fault Bit 3 = External Reference PLL Activity Fault Bit 4 = High Stability Activity Detect Fault Bit 5 = High Stability PLL Fault Bit 6 = Eb/No Threshold Fault Bit 7 = Spare (0 = Pass, 1 = Fail) Bit 0 = -12 V Alarm Bit 1 = +12 V Alarm Bit 2 = +5 V Alarm Bit 3 = Temperature Bit 4 = Interface FPGA Fault Bit 5 = Battery Fault Bit 6 = RAM/ROM Fault Bit 7 = Spare (0 = Pass, 1 = Fail) Ignore Unsigned Binary Value Unsigned Binary Value
<1>
Latched Alarm 4
<1>
Reserved Error Counter Test 2047 Error Counter Raw BER Mantissa Corrected BER Mantissa Eb/No Offset Frequency Test 2047 Mantissa Raw BER Exponent Corrected BER
<2>
<2>
Unsigned Binary Value, 2 Decimal Places Implied Unsigned Binary Value in Hz, Pos/Neg Indicated Below Bytes 1 - 2 = Unsigned Binary Value Test 2047 BER
<1>
<1>
4-22
MN-DD2401 - Rev. G
User Interfaces
Exponent <1> Test 2047 BER Exponent Offset Frequency Sign BER/EbNo Status Byte 3 = Unsigned Binary Value Exponent
<1>
<1>
Bit 0 = Raw BER and Corrected BER Status (1 = Valid) Bit 1 = Test 2047 BER Status (1 = Valid) Bits 2 - 3 = EbNo Status (0 = EbNo is Invalid, 1 = EbNo is Valid, 2 = EbNo is Smaller Than Indicated Value, 3 = EbNo is Greater Than Indicated Value) Bit 4 = Raw BER Counter Overflow (1 = overflow condition) Bit 5 = Test 2047 BER Counter Overflow (1 = overflow condition) Bits 6 & 7 = Spares Unsigned Binary Value Representing % Buffer Full (0 - 100 in 1% Steps) Unsigned Binary Value in -1 dB Steps, Negative Sign Implied Signed Binary (0 = Equal to, 1 = Greater Than, -1 = Less Than Value in -1 dB Steps, Negative Sign Implied) Bit 0 = IBS Satellite Multiframe Loss Bit 1 = IBS Satellite Frame Loss Bit 2 = Spare Bit 3 = IBS Alarm if BER < 10-03 Bit 4 = IBS Prompt Alarm Bit 5 = IBS Service Alarm Bit 6 = Turbo Codec Lock Fault Bit 7 = Spare (0 = Pass, 1 = Fail) Bit 0 = IBS Backward Alarm or IDR Backward Alarm 1 Bit 1 = IDR Backward Alarm 2 Bit 2 = IDR Backward Alarm 3 Bit 3 = IDR Backward Alarm 4 Bits 4 7 = Spares (0 = Pass, 1 = Fail) Bit 0 = IBS Satellite Multiframe Loss Bit 1 = IBS Satellite Frame Loss Bit 2 = Spare Bit 3 = IBS Alarm if BER < 10-03 Bit 4 = IBS Prompt Alarm Bit 5 = IBS Service Alarm Bit 6 = Turbo Codec Lock Fault Bit 7 = Spare (0 = Pass, 1 = Fail) 0 = Front Panel, 1 = Terminal, 2 = Computer RLLP Bit 0 = Frame Lock Fault Bit 1 = Multiframe Lock Fault
<1>
<1> <1>
*<1>
Alarm 5
*<1>
Backward Alarms
*<1>
Latched Alarms 5
<1> *<1>
MN-DD2401 - Rev. G
4-23
User Interfaces
Bit 2 = CRC Lock Fault. Valid only in T1-ESF and E1 CRC enabled Bit 3 = T1 Yellow Alarm Received Bit 4 = E1 FAS Alarm Received Bit 5 = E1 MFAS Alarm Received Bit 6 = E1 CRC Alarm Received Bit 7 = CRC Calculation Fault (0 = Pass, 1 = Fail)
*<1>
Bit 0 = Backward Alarm Received from Satellite Bits 1 7 = Spares (0 = Pass, 1 = Fail) In Hex, decimal point implied. Binary value, 1 sps steps
<1> <4>
Opcode: <240Ch>
Query a Demodulators Status Query response Decimal Point Implied Bit 0 = Receive Processor Fault Bit 1 = Signal Lock Fault Bit 2 = Receive Satellite AIS Fault Bit 3 = Rx AGC/Input Level Fault Bit 4 = Reed-Solomon Sync Fault Bit 5 = Reed-Solomon Excessive Errors Fault Bit 6 = Reed-Solomon Uncorrectable Word Fault Bit 7 = Receive Forced Alarm (0 = Pass, 1 = Fail) Bit 0 = Buffer Underflow Bit 1 = Buffer Overflow Bit 2 = Buffer Under 10% Bit 3 = Buffer Over 90% Bit 4 = Receive FPGA Configuration Fault Bit 5 = Rx LNB Fault, LBST Only Bits 6 - 7 = Spares (0 = Pass, 1 = Fail) Bit 0 = IF Synthesizer Lock Detect Fault Bit 1 = Rx Oversample PLL Lock Detect Fault Bit 2 = Buffer Clock PLL Lock Detect Fault Bit 3 = Viterbi Decoder Lock Fault Bit 4 = Sequential Decoder Lock Fault Bit 5 = Rx 2047 Test Pattern Lock Fault Bit 6 = External Reference PLL Lock Fault Bit 7 = Frame Sync/Multiframe Sync Fault (0 = Pass, 1 = Fail) Bit 0 = Buffer Clock Activity Detect Fault Bit 1 = External BNC Activity Detect Fault Bit 2 = Rx Satellite Clock Activity Detect Fault Bit 3 = External Reference PLL Activity Fault Bit 4 = High Stability Activity Detect Fault Bit 5 = High Stability PLL Fault
<1> <1>
<1>
Alarm 2
<1>
Alarm 3
<1>
Alarm 4
4-24
MN-DD2401 - Rev. G
User Interfaces
Bit 6 = Eb/No Threshold Fault Bit 7 = Spare (0 = Pass, 1 = Fail) <1> Common Alarm Bit 0 = -12 V Alarm Bit 1 = +12 V Alarm Bit 2 = +5 V Alarm Bit 3 = Temperature Fault Bit 4 = Interface FPGA Fault Bit 5 = Battery Fault Bit 6 = RAM/ROM Fault Bit 7 = Spare (0 = Pass, 1 = Fail) Ignore Bit 0 = Receive Processor Fault Bit 1 = Signal Lock Fault Bit 2 = Receive Satellite AIS Fault Bit 3 = Rx AGC Input Level Fault Bit 4 = Reed-Solomon Sync Fault Bit 5 = Reed-Solomon Excessive Errors Fault Bit 6 = Reed-Solomon Uncorrectable Word Fault Bit 7 = Receive Forced Alarms (0 = Pass, 1 = Fail) Bit 0 = Buffer Underflow Bit 1 = Buffer Overflow Bit 2 = Buffer Under 10% Bit 3 = Buffer Over 90% Bit 4 = Rx FPGA Configuration Fault Bit 5 = Rx LNB Fault, LBST Only Bits 6 - 7 = Spares (0 = Pass, 1 = Fail) Bit 0 = IF Synthesizer Lock Detect Fault Bit 1 = Rx Oversample PLL Lock Detect Fault Bit 2 = Buffer Clock PLL Lock Detect Fault Bit 3 = Viterbi Decoder Lock Fault Bit 4 = Sequential Decoder Lock Fault Bit 5 = Rx 2047 Test Pattern Lock Fault Bit 6 = External Reference PLL Lock Fault Bit 7 = Frame Sync/Multiframe Sync Fault (0 = Pass, 1 = Fail) Bit 0 = Buffer Clock Activity Detect Fault Bit 1 = External BNC Activity Detect Fault Bit 2 = Rx Satellite Clock Activity Detect Fault Bit 3 = External Reference PLL Activity Fault Bit 4 = High Stability Activity Detect Fault Bit 5 = High Stability PLL Fault Bit 6 = Eb/No Threshold Fault Bit 7 = Spare (0 = Pass, 1 = Fail) Bit 0 = -12 V Alarm
<1> <1>
<1>
Latched Alarm 2
<1>
Latched Alarm 3
<1>
Latched Alarm 4
<1>
Latched Common
MN-DD2401 - Rev. G
4-25
User Interfaces
Alarm
Bit 1 = +12 V Alarm Bit 2 = +5 V Alarm Bit 3 = Temperature Fault Bit 4 = Interface FPGA Fault Bit 5 = Battery Fault Bit 6 = RAM/ROM Fault Bit 7 = Spare (0 = Pass, 1 = Fail) Ignore Unsigned Binary Value Unsigned Binary Value
Reserved Error Counter Test 2047 Error Counter Raw BER Mantissa Corrected BER Mantissa EbNo Offset Frequency Test 2047 BER Mantissa Raw BER Exponent Corrected BER Exponent Test 2047 BER Exponent Offset Frequency Sign BER/EbNo Status
<2>
<2>
Unsigned Binary Value, 2 Decimal Places Implied Unsigned Binary Value in Hz, Pos/Neg Indicated Below Bytes 1 - 2 = Unsigned Binary Value Test 2047 BER
<1>
<1>
<1>
<1>
<1>
Bit 0 = Raw BER and Corrected BER Status (1 = Valid) Bit 1 = Test 2047 BER Status (1 = Valid) Bits 2 - 3 = EbNo Status (0 = EbNo is Invalid, 1 = EbNo is Valid, 2 = EbNo is Smaller Than Indicated Value, 3 = EbNo is Greater Than Indicated Value) Bit 4 = Raw BER Counter Overflow (1 = overflow condition) Bit 5 = Test 2047 BER Counter Overflow (1 = overflow condition) Bits 6 & 7 = Spares Unsigned Binary Value Representing % Buffer Full (0 - 100 in 1% steps) Unsigned Binary Value in -1 dB Steps, Negative Sign Implied Signed Binary (0 = Equal to, 1 = Greater Than, -1 = Less Than Value
<1>
<1> <1>
4-26
MN-DD2401 - Rev. G
User Interfaces
in -1 dB Steps, Negative Sign Implied) *<1> Alarm 5 Bit 0 = IBS/IDR Satellite Multiframe Sync Loss Bit 1 = IBS/IDR Satellite Frame Sync Loss Bit 2 = Spare Bit 3 = IBS BER Alarm Bit 4 = IBS Prompt Alarm Bit 5 = IBS Service Alarm Bit 6 = Turbo Codec Lock Fault Bit 7 = Spare (0 = Pass, 1 = Fail) Bit 0 = IBS Backward Alarm or IDR Backward Alarm 1 Bit 1 = IDR Backward Alarm 2 Bit 2 = IDR Backward Alarm 3 Bit 3 = IDR Backward Alarm 4 Bits 4 - 7 = Spares (0 = Pass, 1 = Fail) Bit 0 = IBS/IDR Satellite Multiframe Sync Loss Bit 1 = IBS/IDR Satellite Frame Sync Loss Bit 2 = Spare Bit 3 = IBS BER Alarm Bit 4 = IBS Prompt Alarm Bit 5 = IBS Service Alarm Bit 6 = Turbo Codec Lock Fault Bit 7 = Spare (0 = Pass, 1 = Fail) 0 = Front Panel, 1 = Terminal, 2 = Computer RLLP Bit 0 = Frame Lock Fault Bit 1 = Multiframe Lock Fault Bit 2 = CRC Lock Fault. Valid only in T1-ESF and E1 CRC enabled Bit 3 = T1 Yellow Alarm Received Bit 4 = E1 FAS Alarm Received Bit 5 = E1 MFAS Alarm Received Bit 6 = E1 CRC Alarm Received Bit 7 = CRC Calculation Fault (0 = Pass, 1 = Fail) Bit 0 = Backward Alarm Received from Satellite Bits 1 7 = Spares (0 = Pass, 1 = Fail) In Hex, decimal point implied. Binary value, 1 sps steps Opcode: <2406h> Query a Demodulators Latched Alarms Query response Bit 0 = Receive Processor Fault Bit 1 = Signal Lock Fault Bit 2 = Receive Satellite AIS Fault Bit 3 = Rx AGC Input Level Fault
*<1>
Backward Alarms
*<1>
Latched Alarm 5
<1> *<1>
*<1>
<1> <4>
<1>
Latched Alarm 1
MN-DD2401 - Rev. G
4-27
User Interfaces
Bit 4 = Reed-Solomon Sync Fault Bit 5 = Reed-Solomon Excessive Errors Fault Bit 6 = Reed-Solomon Uncorrectable Word Fault Bit 7 = Receive Forced Alarm (0 = Pass, 1 = Fail) <1> Latched Alarm 2 Bit 0 = Buffer Underflow Bit 1 = Buffer Overflow Bit 2 = Buffer Under 10% Bit 3 = Buffer Over 90% Bit 4 = Receive FPGA fault Bit 5 = Rx LNB Fault, LBST Only Bits 6 -7 = Spares (0 = Pass, 1 = Fail) Bit 0 = IF Synthesizer Lock Detect Fault Bit 1 = Rx Oversample PLL Lock Detect Fault Bit 2 = Buffer Clock PLL Lock Detect Fault Bit 3 = Viterbi Decoder Lock Fault Bit 4 = Sequential Decoder Lock Fault Bit 5 = Rx 2047 Test Pattern Lock Fault Bit 6 = External Reference PLL Lock Fault Bit 7 = Frame Sync/Multiframe Sync Fault (0 = Pass, 1 = Fail) Bit 0 = Buffer Clock Activity Detect Fault Bit 1 = External BNC Activity Detect Fault Bit 2 = Rx Satellite Clock Activity Detect Fault Bit 3 = External Reference PLL Activity Fault Bit 4 = High Stability Activity Detect Fault Bit 5 = High Stability PLL Fault Bit 6 = Eb/No Threshold Fault Bit 7 = Spare (0 = Pass, 1 = Fail) Bit 0 = -12 V Alarm Bit 1 = +12 V Alarm Bit 2 = +5 V Alarm Bit 3 = Temperature Fault Bit 4 = Interface FPGA Fault Bit 5 = Battery Fault Bit 6 = RAM/ROM Fault Bit 7 = Spare (0 = Pass, 1 = Fail) Bit 0 = IBS/IDR Satellite Multiframe Sync Loss Bit 1 = IBS/IDR Satellite Frame Sync Loss Bit 2 = Spare Bit 3 = IBS BER Alarm Bit 4 = IBS Prompt Alarm Bit 5 = IBS Service Alarm Bit 6 = Turbo Codec Lock Fault Bit 7 = Spare (0 = Pass, 1 = Fail)
<1>
Latched Alarm 3
<1>
Latched Alarm 4
<1>
*<1>
Latched Alarm 5
Opcode: <2409h>
4-28
MN-DD2401 - Rev. G
User Interfaces
<1>
Alarm 1
Query response Bit 0 = Receive Processor Fault Bit 1 = Signal Lock Fault Bit 2 = Receive Satellite AIS Fault Bit 3 = Rx AGC/Input Level Fault Bit 4 = Reed-Solomon Sync Fault Bit 5 = Reed-Solomon Excessive Errors Fault Bit 6 = Reed-Solomon Uncorrectable Word Fault Bit 7 = Receive Forced Alarm (0 = Pass, 1 = Fail) Bit 0 = Buffer Underflow Bit 1 = Buffer Overflow Bit 2 = Buffer Under 10% Bit 3 = Buffer Over 90% Bit 4 = Receive FPGA Fault Bit 5 = Rx LNB Fault, LBST Only Bits 6 - 7 Spares (0 = Pass, 1 = Fail) Bit 0 = IF Synthesizer Lock Detect Fault Bit 1 = Rx Oversample PLL Lock Detect Fault Bit 2 = Buffer Clock PLL Lock Detect Fault Bit 3 = Viterbi Decoder Lock Fault Bit 4 = Sequential Decoder Lock Fault Bit 5 = Rx 2047 Test Pattern Lock Fault Bit 6 = External Reference PLL Lock Fault Bit 7 = Frame Sync Fault (0 = Pass, 1 = Fail) Bit 0 = Buffer Clock Activity Detect Fault Bit 1 = External BNC Activity Detect Fault Bit 2 = Rx Satellite Clock Activity Detect Fault Bit 3 = External Reference PLL Activity Fault Bit 4 = High Stability Activity Detect Fault Bit 5 = High Stability PLL Fault Bit 6 = Eb/No Threshold Fault Bit 7 = Spare (0 = Pass, 1 = Fail) Bit 0 = -12 V Alarm Bit 1 = +12 V Alarm Bit 2 = +5 V Alarm Bit 3 = Temperature Fault Bit 4 = Interface FPGA Fault Bit 5 = Battery Fault Bit 6 = RAM/ROM Fault Bit 7 = Spare (0 = Pass, 1 = Fail) Bit 0 = IBS/IDR Satellite Multiframe Sync Loss Bit 1 = IBS/IDR Satellite Frame Sync Loss Bit 2 = Spare Bit 3 = IBS BER Alarm Bit 4 = IBS Prompt Alarm
<1>
Alarm 2
<1>
Alarm 3
<1>
Alarm 4
<1>
Common Alarm 1
*<1>
Alarm 5
MN-DD2401 - Rev. G
4-29
User Interfaces
Bit 5 = IBS Service Alarm Bit 6 = Turbo Codec Lock Fault Bit 7 = Spare (0 = Pass, 1 = Fail) *<1> Insert Alarms Bit 0 = Frame Lock Fault Bit 1 = Multiframe Lock Fault Bit 2 = CRC Lock Fault. Valid only in T1-ESF and E1 CRC enabled Bit 3 = T1 Yellow Alarm Received Bit 4 = E1 FAS Alarm Received Bit 5 = E1 MFAS Alarm Received Bit 6 = E1 CRC Alarm Received Bit 7 = CRC Calculation Fault (0 = Pass, 1 = Fail) Query a Demodulators Eb/No, BER, Level, and AGC Voltage Query response Bytes 1 - 2 = Unsigned Binary Value Raw BER
Opcode: <240Dh>
<2>
Raw BER Mantissa Corrected BER Mantissa EbNo Raw BER Exponent Corrected BER Exponent BER/EbNo Status
<2>
<2> <1>
Unsigned Binary Value, 2 Decimal Places Implied Byte 3 = Unsigned Binary Value Exponent
<1>
<1>
Bit 0 = Raw BER and Corrected BER Status (1 = Valid) Bit 1 = Test 2047 BER Status (1 = Valid) Bits 2 - 3 = EbNo Status (0 = EbNo is Invalid, 1 = EbNo is Valid, 2 = EbNo is Smaller Than Indicated Value, 3 = EbNo is Greater Than Indicated Value) Bit 4 = Raw BER Counter Overflow (1 = overflow condition) Bit 5 = Test 2047 BER Counter Overflow (1 = overflow condition) Bits 6 & 7 = Spares Binary Value in -1 dB Steps, Negative Sign Implied Signed Binary (0 = Equal to, 1 = Greater Than, -1 = Less Than Value in -1 dB Steps, Negative Sign Implied) In Hex, decimal point implied.
<1> <1>
<1>
Opcode: <2437h>
Query a Demodulators Lock Status Query response Bit 0 = Demod Chipset Lock (0 = Unlocked, 1 = Locked) Bit 1 = Viterbi Lock (0 = Unlocked, 1 = Locked) Bit 2 = Reed-Solomon Lock (0 = Unlocked, 1 = Locked) Bit 3 = Sequential Lock (0 = Unlocked, 1 = Locked) Bits 4 7 = Spares
<1>
Lock Status
4-30
MN-DD2401 - Rev. G
User Interfaces
(Decoders not in use default to locked state) Opcode: <2A00h> <4> <4> <1> <4> Frequency Data Rate Sweep Boundary External Reference Freq. Reference Source Input Level Limit Demodulation Type Convolutional Decoder Command a Demodulators Configuration Binary Value, 1 Hz Steps Binary Value, 1 BPS Steps Sweep Limits, Max of 42 kHz Unsigned Binary Value in Hz
<1>
0 = Internal, 1 = External Lower Level Limit, Binary Value, 1 dB Steps, Negative Sign Implied 0 = QPSK, 1 = BPSK, 2 = 8PSK, 4 = OQPSK
<1> <1>
<1>
0 = None, 1 = Viterbi 1/2 Rate, 3 = Viterbi 3/4 Rate, 5 = Viterbi 7/8 Rate, 7 = Sequential 1/2 Rate, 9 = Sequential 3/4 Rate, 11 = Sequential 7/8 Rate, 14 = Trellis 2/3, 20 = TPC 0.793 2D, 21 = TPC 0.495 3D, 23 = TPC , 24 = TPC , 25 = TPC 7/8, 26 = TPC 21/44 0 = Disable, 1 = Enable Unsigned Binary Unsigned Binary Note: Always set to Zero; as the T value is calculated from N and K. Unsigned Binary, 4 or 8
<1>
<1>
0 = Off, 1 = On
<1>
0 = Disable, 1 = Enable
<1>
0 = None, 1 = IBS Scrambler, 2 = V35_IESS, 3 = V35_CCITT, 4 = V35_EFDATA, 6 = OM73, 7 = Reed Solomon Scrambler, 8 = V35_EFRS, 9 = TPC Scrambler 0 = Normal, 1 = Inverted Byte 1 2 = Buffer Size in ms Byte 3 - 4 = Buffer Size in Bytes 0 = External, 1 = Internal, 2 = EXC, 3 = RX SAT 0 = Normal, 1 = Inverted
<1> <4>
<1> <1>
MN-DD2401 - Rev. G
4-31
User Interfaces
Polarity <1> <1> Operating Mode Alarm 1 Mask 0 = Normal, 1 = 2047 Test Bit 0 = Receive Processor Fault Bit 1 = Signal Lock Fault Bit 2 = Receive Satellite AIS Fault Bit 3 = Rx AGC Level Fault Bit 4 = Reed-Solomon Sync Fault Bit 5 = Reed-Solomon Excessive Errors Fault Bit 6 = Reed-Solomon Uncorrectable Word Fault Bit 7 = Receive Forced Alarm (0 = Mask, 1 = Allow) Bit 0 = Buffer Underflow Bit 1 = Buffer Overflow Bit 2 = Buffer Under 10% Bit 3 = Buffer Over 90% Bit 4 = Receive FPGA Configuration Fault Bit 5 = Rx LNB Fault, LBST Only Bit 6 - 7 = Spares (0 = Mask, 1 = Allow) Bit 0 = IF Synthesizer Lock Detect Fault Bit 1 = Rx Oversample PLL Lock Detect Fault Bit 2 = Buffer Clock PLL Lock Detect Fault Bit 3 = Viterbi Decoder Lock Fault Bit 4 = Sequential Decoder Lock Fault Bit 5 = Rx 2047 Test Pattern Lock Fault Bit 6 = External Reference PLL Lock Fault Bit 7 = Frame Sync Fault (0 = Mask, 1 = Allow) Bit 0 = Buffer Clock Activity Detect Fault Bit 1 = External BNC Activity Detect Fault Bit 2 = Rx Satellite Clock Activity Detect Fault Bit 3 = External Reference PLL Activity Fault Bit 4 = High Stability Activity Detect Fault Bit 5 = High Stability PLL Fault Bit 6 = Eb/No Threshold Fault Bit 7 = Spare (0 = Mask, 1 = Allow) Bit 0 = -12 V Alarm Bit 1 = +12 V Alarm Bit 2 = +5 V alarm Bit 3 = Temperature Bit 4 = Interface FPGA Fault Bit 5 = Battery Fault Bit 6 = RAM/ROM Fault Bit 7 = Spare (0 = Mask, 1 = Allow) Set to Zero Unsigned Binary Number of Bits in Measurement Period in Powers of
<1>
Alarm 2 Mask
<1>
Alarm 3 Mask
<1>
Alarm 4 Mask
<1>
<1> <1>
4-32
MN-DD2401 - Rev. G
User Interfaces
Period <24> <1> Rx Circuit ID Rx Terrestrial Loopback Rx Baseband Loopback Rx IF Loopback Reserved Data Invert
<1>
0 = Disabled, 1 = Enabled
0 = Disabled, 1 = Enabled Set to Zero 0 = Normal, 1 = Invert Note: The following byte applies only if an Asynchronous, IDR or IBS Interface is installed. If not, set to zero.
*<1>
Framing
0 = No Framing, 1 = 1/16 Async, 2 = 1/16 IBS, 3 = 96 Kbit IDR Note: The following byte applies only if an asynchronous interface card is installed. If not, set to zero.
*<1>
0 = 1200, 1 = 2400, 2 = 4800, 3 = 9600, 4 = 19200, 5 = 50, 6 = 110, 7 = 300, 8 = 600 Note: The following byte applies only if an asynchronous interface card is installed. If not, set to zero.
*<1>
0 = RS-232, 1 = RS-485 Note: The following byte applies only if an asynchronous interface card is installed. If not, set to zero.
*<1>
Note: The following byte applies only if a synchronous Multiprotocol interface card is installed. If not, set to zero. *<1> Multiprotocol Interface Card Interface Type 0 = V.35, 1 = RS-422, 2 = RS-232
Note: The following byte applies only if a symmetric G.703 interface card is installed. If not, set to zero. *<1> G.703 Interface Type 0 = G703T1AMI, 1 = G703T1B8ZS, 2 = G703BE1, 3 = G703UE1
Note: The following byte applies to all DMD2401 modems, regardless of interface type <1> BPSK Symbol Pairing 0 = Normal, 1 = Swapped
MN-DD2401 - Rev. G
4-33
User Interfaces
Note: The following byte applies only if an IDR OR IBS interface card is installed. If not, set to zero. <1> Receive Mode 0 = Closed Net Mode, 1 = IDR Mode, 2 = IBS Mode, 3 = Drop & Insert Mode Note: The following byte applies only if an IDR OR IBS interface card is installed and the Receive Mode is set to IDR Mode. If not, set to zero. *<1> T1/E1 Frame Source 0 = Internal, 1 = External
Note: The following byte applies only if an IDR OR IBS interface card is installed and the Receive Mode is set to IDR Mode. If not, set to zero. *<1> Receive IDR Overhead Mode Receive IDR / IBS Backward Alarms Mask 0 = Voice, 1 = 64 K data
*<1>
Bit 0 = IDR Backward Alarm 1 / IBS Backward Alarm Bit 1 = IDR Backward Alarm 2 Bit 2 = IDR Backward Alarm 3 Bit 3 = IDR Backward Alarm 4 Bits 4 - 7 = Spares (0 = Mask, 1 = Allow) Note: The following byte applies only if an IDR OR IBS interface card is installed and the Receive Mode is set to IDR Mode. If not, set to zero.
*<1>
Interface Type
If G.703 daughter card installed: 0 = G.703 Unbalanced E1, 1 = G.703 Balanced E1, 2 = G.703 T1, B8ZS If synchronous Multiprotocol daughter card is installed: 0 = V.35, 1 = RS-422, 2 = RS-232 Note: The following two bytes apply only if an IDR OR IBS interface card is installed and the Receive Mode is set to IDR Mode. If not, set to zero.
*<2>
Note: The following two bytes apply only if an IDR OR IBS interface card is installed and the Receive Mode is set to IDR Mode. If not, set to zero. *<2> Receive ESC Audio #2 Volume Alarm 5 Mask -20 to +10, Signed Binary Value in dB
*<1>
4-34
MN-DD2401 - Rev. G
User Interfaces
Bit 1 = IBS Satellite Frame Fault Bit 2 = Spare Bit 3 = IBS Alarm if BER < 10-03 Bit 4 = IBS Prompt Alarm Bit 5 = IBS Service Alarm Bit 6 = Turbo Codec Lock Fault Bit 7 = Spare (0 = Mask, 1 = Allow) *<1> Insert Mode 0 = Disable, 1 = T1-D4, 2 = T1-ESF, 3 = PCM-30, 4 = PCM-30C, 5 = PCM-31, 6 = PCM-31C, 7 = T1-SLC96, 8 = T1-D4-S, 9 = T1-ESF-S Mapping of Satellite Channels to Insert Terrestrial Timeslots Bit 0 = Frame Lock Fault Bit 1 = Multiframe Lock Fault Bit 2 = CRC Lock Fault. Valid only in T1-ESF and E1 CRC enabled Bit 3 = T1 Yellow Alarm Received Bit 4 = E1 FAS Alarm Received Bit 5 = E1 MFAS Alarm Received Bit 6 = E1 CRC Alarm Received Bit 7 = CRC Calculation Fault (0 = Mask, 1 = Allow) Bit 0 = Backward Alarm Received from Satellite Bits 1 7 = Spares (0 = Mask, 1 = Allow) Force D&I Terrestrial Backward Alarm to be Trans (0 = Not Forced, 1 = Forced)
*<30> *<1>
*<1>
*<1>
0 = 75 Ohms, 1 = 50 Ohms
TPC Interleaver
0 = Disable Interleaver, 1 = Enable Interleaver Command a Demodulators Frequency Unsigned Binary Value in Hz Command a Demodulators Data Rate Unsigned Binary Value in BPS Command a Demodulators Sweep Boundary Set in 1 kHz Steps (Max of 42 kHz) Command a Demodulators Demodulation Type 0 = QPSK, 1 = BPSK, 2 = 8PSK, 4 = OQPSK
Opcode: <2A01h>
<4> Frequency
Opcode: <2A02h>
<4> Data Rate
Opcode: <2A04h>
<1> Sweep Boundary
Opcode: <2A07h>
<1>
Demodulation Type
Opcode: <2A08h>
MN-DD2401 - Rev. G
4-35
User Interfaces
<1>
Convolutional Decoder
0 = None, 1 = Viterbi 1/2 Rate, 3 = Viterbi 3/4 Rate, 5 = Viterbi 7/8 Rate, 7 = Sequential 1/2 Rate, 9 = Sequential 3/4 Rate, 11 = Sequential 7/8 Rate, 14 = Trellis 2/3, 20 = TPC 0.793 2D, 21 = TPC 0.495 3D, 23 = TPC , 24 = TPC , 25 = TPC 7/8, 26 = TPC 21/44 Command a Demodulators Differential Decoder 0 = Off, 1 = On
Opcode: <2A09h>
<1>
Differential Decoder
Command a Demodulators Reed-Solomon 0 = Disable, 1 = Enable Unsigned Binary Unsigned Binary Note: Always set to Zero; as the T value is calculated from N and K. Unsigned Binary, 4 or 8
RS Interleaver Depth
Opcode: <2A0Dh>
<1> Descrambler Control
Command a Demodulators Descrambler Control 0 = Disable, 1 = Enable Command a Demodulators Descrambler Type 0 = None, 1 = IBS Scrambler, 2 = V35_IESS, 3 = V35_CCITT, 4 = V35_EFDATA, 6 = OM73, 7 = Reed-Solomon Scrambler, 8 = V35_EFRS, 9 = TPC Scrambler
Opcode: <2A0Eh>
<1>
Descrambler Type
Opcode: <2A0Fh>
<1> Spectrum
Command a Demodulators Spectrum 0 = Normal, 1 = Inverted Command a Demodulators Buffer Clock 0 = External, 1 = Internal, 2 = EXC, 3 = RX SAT Command a Demodulators Buffer Clock Polarity 0 = Normal, 1 = Inverted
Opcode: <2A11h>
<1> Buffer Clock
Opcode: <2A12h>
<1>
Opcode: <2A17h>
<1> Operating Mode
Command a Demodulators Operating Mode 0 = Stop, 1 = 2047 Test Command a Demodulators BER Exponent Number of Bits in Measurement Period in Powers of Ten (ex: 6 = 10
6
Opcode: <2A1Ah>
<1> BER Measure
4-36
MN-DD2401 - Rev. G
User Interfaces
Period
Bits) Command a Demodulators Terrestrial Loopback 0 = Disabled, 1 = Enabled Command a Demodulators Baseband Loopback 0 = Disabled, 1 = Enabled Command Center Buffer (No Parameters) Command a Demodulators Data Invert 0 = Normal, 1 = Inverted Command a Demodulators Buffer Size Byte 1 - 2 = buffer size in ms OR Byte 3 - 4 = buffer size in bytes (Either ms or bytes must be specified - the other field should be 0xFFFF)
Opcode: <2A1Ch>
<1> Rx Terrestrial Loopback
Opcode: <2A1Dh>
<1> Rx Baseband Loopback
Opcode: <2A31h>
<4> Buffer Size
4.4.12.2
Opcode: <2403h>
<1>
Modem ID
Opcode: <240Eh>
<1>
Hour Minute
Second
<1>
<1>
Opcode: <240Fh>
<1> <1>
<1>
Year Month
Day
Opcode: <2410h>
<1> <1>
Year Month
0 99 0 11
MN-DD2401 - Rev. G
4-37
User Interfaces
0 30 0 23 0 59 0 59 Query Module Current Alarms Query response Bit 0 = Transmit Processor Fault Bit 1 = Transmit Output Power Level Fault Bit 2 = Transmit Oversample PLL Lock Fault Bit 3 = Composite Clock PLL Lock Fault Bit 4 = IF Synthesizer Lock Fault Bit 5 = Transmit FPGA Configuration Alarm Fault Bit 6 = Transmit Forced Alarm Bit 7 = External Reference PLL Lock Fault (0 = Pass, 1 = Fail) Bit 0 = Terrestrial Clock Activity Detect Fault Bit 1 = Internal Clock Activity Detect Fault Bit 2 = Tx Sat Clock Activity Detect Fault Bit 3 = Tx Data Activity Detect Fault Bit 4 = Terrestrial AIS (Tx Data AIS Detect Fault) Bit 5 = Transmit Ext BNC Clock Activity Detect Fault Bit 6 = Transmit Reed-Solomon Fault Bit 7 = Tx Calibration Fault (0 = Pass, 1 = Fail) Ignored Bit 0 = Receive Processor Fault Bit 1 = Signal Lock Fault Bit 2 = Receive Satellite AIS Fault Bit 3 = Rx AGC/Input Level Fault Bit 4 = Reed-Solomon Sync Fault Bit 5 = Reed-Solomon Excessive Errors Fault Bit 6 = Reed-Solomon Uncorrectable Word Fault Bit 7 = External Reference PLL Lock Fault (0 = Pass, 1 = Fail) Bit 0 = Buffer Underflow Bit 1 = Buffer Overflow Bit 2 = Buffer Under 10% Bit 3 = Buffer Over 90% Bit 4 = Receive FPGA Fault Bit 5 = Rx LNB Fault, LBST Only Bits 6 - 7 = Spares (0 = Pass, 1 = Fail) Bit 0 = IF Synthesizer Lock Detect Fault Bit 1 = Rx Oversample PLL Lock Detect Fault Bit 2 = Buffer Clock PLL Lock Detect Fault
Opcode: <240Ah>
*<1>
*<1>
<1> <1>
<1>
Demodulator Alarm 2
<1>
Demodulator Alarm 3
4-38
MN-DD2401 - Rev. G
User Interfaces
Bit 3 = Viterbi Decoder Lock Fault Bit 4 = Sequential Decoder Lock Fault Bit 5 = Rx 2047 Test Pattern Lock Fault Bit 6 = External Reference PLL Lock Fault Bit 7 = Frame Sync Fault (0 = Pass, 1 = Fail) <1> Demodulator Alarm 4 Bit 0 = Buffer Clock Activity Detect Fault Bit 1 = External BNC Activity Detect Fault Bit 2 = Rx Satellite Clock Activity Detect Fault Bit 3 = External Reference PLL Activity Fault Bit 4 = High Stability Activity Detect Fault Bit 5 = High Stability PLL Fault Bit 6 = Eb/No Threshold Fault Bit 7 = Spare (0 = Pass, 1 = Fail) Ignored Bit 0 = -12 V Alarm Bit 1 = +12 V Alarm Bit 2 = +5 V Alarm Bit 3 = Temperature Fault Bit 4 = Interface FPGA Fault Bit 5 = Battery Fault Bit 6 = RAM/ROM Fault Bit 7 = Spare (0 = Pass, 1 = Fail) Ignored Bit 0 = Terrestrial Frame Lock Fault (all modes) Bit 1 = Terrestrial Multiframe Lock Fault (PCM-30 and PCM-30C only) Bit 2 = Terrestrial CRC Lock Fault (PCM-30C and PCM-31C only) Bit 3 = Terrestrial Yellow Alarm Received (T1 only) Bit 4 = Terrestrial FAS Alarm Received (E1 only) Bit 5 = Terrestrial MFAS Alarm Received (PCM-30 and PCM-30C only) Bit 6 = Loss of Terrestrial Signaling (reported by DSP) Bit 7 = Spare (0 = Pass, 1 = Fail) Bit 0 = Frame Lock Fault Bit 1 = Multiframe Lock Fault Bit 2 = CRC Lock Fault. Valid only in T1-ESF and E1 CRC enabled Bit 3 = T1 Yellow Alarm Received Bit 4 = E1 FAS Alarm Received Bit 5 = E1 MFAS Alarm Received Bit 6 = E1 CRC Alarm Received Bit 7 = CRC Calculation Fault (0 = Pass, 1 = Fail) Command a Modems Control Mode 0 = Front Panel, 1 = Terminal, 2 = Computer
<1> <1>
<1>
*<1>
Opcode: <2600h>
<1> Modem Control
MN-DD2401 - Rev. G
4-39
User Interfaces
Mode
Opcode: <2616h>
<1> External Ref. Source
Command a Modules External Reference Source 0 = Internal, 1 = External Command a Modules External Reference Frequency Unsigned Binary Value in Hz
Opcode: <261Bh>
<4>
Opcode: <2C03h> Opcode: <2C04h> <1> <1> <1> Hour Minute Second
Command Clear all Latched Alarms (No Parameters) Command Set Time 0 - 23 0 59 0 59 Command Set Date 0 99 0 11 0 - 30 Command Set Time and Date 0 99 0 11 0 30 0 23 0 59 0 59 Command soft reset the modem to the power-up state (no parameters). Commend Eb/No Threshold Unsigned Binary Value, 0-99, Implied Decimal Point 0.0 through 9.9 dB Command Module Set Default Configuration (No Parameters)
Opcode: <2C30h>
4.4.12.3
4-40
MN-DD2401 - Rev. G
User Interfaces
<4>
Frequency
70,000,000 Hz 140,000,000 Hz (**) 950,000,000 Hz (Hardware dependant) **Legacy 100-180 MHz only 2,048,000 BPS 25 kHz
<4> <1>
<00> <1F> <40> <00> <19> <00> <98> <96> <80> <00>
<5A>
<4>
<1>
10,000,000 Hz
0 = Internal
<1> <1>
-90 dBm <00> 0 = QPSK <01> 1 = Viterbi Rate <00> 0 = Disable 126 112 7 4 <01> 1 = On <01> <02>
<00> <00> <01>
<1>
<1>
<1>
<1>
1 = Enable
<1> <4>
2 = V35_IESS
0 = Normal
<1> <1> Buffer Clock <00> <04>
<00>
0 = Normal
<FF>
MN-DD2401 - Rev. G
4-41
User Interfaces
No Alarms Masked No Alarms Masked No Alarms Masked No Alarms Masked No Alarms Masked No Alarms Masked 10 Bits
5
<24>
<1>
<1>
24 ASCII Spaces
0 = Disabled
0 = Disabled
<00> <00>
0 = Disabled <03> <00> 0 = Normal <00> <00> <00> <00> 0 = V.35 <00> 0 = G703T1AMI <00> <00> <00>
<1>
Async Terrestrial Interface Type Multiprotocol Interface Type G.703 Interface Type BPSK Symbol Pairing
Receive Mode
<1>
<1>
<1> <1>
<1>
<1>
0 = Normal
<1>
<00>
4-42
MN-DD2401 - Rev. G
User Interfaces
Interface Type
0 = Voice
<2>
<2>
<0000>
0 = G.703 balanced E1 (G.703 Daughter Card or Universal Daughter Card Installed) or V.35 (Synchronous Multiprotocol Daughter Card Installed) 0 dB
<0000>
<FF>
<00> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <FF>
<1>
0 dB
<1> Insert Alarm Mask <1> Insert Backward Alarm Mask Force Terrestrial Backward Alarm Insert Edit Map
<FF>
<00>
<30>
<01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01>
No Alarms Masked
<00> <01>
No Alarms Masked
0 = Not Forced
MN-DD2401 - Rev. G
4-43
User Interfaces
4-44
MN-DD2401 - Rev. G
Electrical Interfaces
Electrical Interfaces
5.1 Power
The unit is powered from a 100 240 VAC, 50 60 Hz, 1A source. The switch located on the left hand side (as viewed from the rear of the unit) turns power on and off to the unit. A chassis ground connection can be made at the #10-32 threaded stud located to the lower right of the AC Power Connector.
MN-DD2401 - Rev. G
5-1
Electrical Interfaces
5.2
The J1 Interface supports RS-422 synchrounous Terrestrial Data and RS-232 Remote Terminal Communications. It is a Female 25-Pin D-Sub Connector. Refer to Table 5-1 for connector pinouts and Section 4.2 terminal setup and menu descriptions. Radyne supplies an interfacing Y cables that standardize the terrestrial interface to RS-530 or RS-449 connection. The Y cable includes a DB 9 connector for Terminal communications that allows the user to connect to a computer or terminal interface. RS530 Y cable is CAR5941 RS449 Y cable is CA/4263 Table 5-1A. Terrestrial Data Interface Port (J1) - 25-Pin D Female Pin No. 1 3 6 7 8 9 10 16 17 Signal Name Shield RXD-A DSR GND CD-A RXC-B CD-B RXD-B RXC-A Demod is Phase Locked Receive Clock Demod is Phase Locked Receive Data Receive Clock Receive Data Data Set Ready (Always True) Description Direction --Output Output --Output Output Output Output Output
Table 5-1B. Terminal Interface Port (J1) - 25-Pin D Female Pin No. 18 20 21 22 23 25 Signal Name TX-232 Unused RX-232 Unused GND Unused RS-232 (Terminal) Description RS-232 (Terminal) Direction Input --Output -------
5-2
MN-DD2401 - Rev. G
Electrical Interfaces
5.4
The Serial Control Interface Port (J3) is used for remote monitor and control utilizing Radyne's RLLP Protocol. It offers a direct single connection to the individual demodulator. It is a Female 25-Pin D-Sub Connector supporting RS-232 or RS-485. Refer to Table 5-2A for Remote interface pinouts and Table 5-2B for AGC Monitor pinouts. For multi-drop communications, it is recommended that the J5 be used. The J5 connector multidrops all Remote ports connections allowing the user to connect to a single port. Refer to section 5.6 for additional information. Table 5-2A. Serial Control Interface Port (J3) - 25-Pin D Female Pin No. 9 10 16 3 7 GND RXD RS-232 Signal Name TXD RS-485 Signal Name TXD-B TXD-A RXD-B RXD-A GND Direction Output Output Input Input ---
Table 5-2B. AGC Monitor (J3) - 25-Pin D Female Pin # 5 7 Signal AGC GND Description AGC Out Ground Direction Output ---
5.5
RX IN
MN-DD2401 - Rev. G
5-3
Electrical Interfaces
The user must set demodulator addresses prior to connecting to remote port. Refer to Section 5.7, Remote Addresses.
5-4
MN-DD2401 - Rev. G
Electrical Interfaces
MN-DD2401 - Rev. G
5-5
Electrical Interfaces
Table 5-5. S1 DIP Switches Position 5 off on Control Type RS-485 (default) RS-232
5-6
MN-DD2401 - Rev. G
Electrical Interfaces
MN-DD2401 - Rev. G
5-7
Maintenance
MN-DD2401 - Rev. G
6-1
Maintenance
6-2
MN-DD2401 - Rev. G
Technical Specifications
Technical Specifications
7
BPSK: BPSK: BPSK: QPSK: QPSK: QPSK: OQPSK: OQPSK: OQPSK: 8PSK: 1/2 Rate 3/4 Rate 7/8 Rate 1/2 Rate 3/4 Rate 7/8 Rate 1/2 Rate 3/4 Rate 7/8 Rate 2/3 Rate 2.4 to 1200 Kbps 2.4 to 1800 Kbps 2.4 to 2100 Kbps 9.6 to 2500 Kbps 14.4 to 3750 Kbps 16.8 to 4375 Kbps 9.6 Kbps to 2500 Kbps 14.4 Kbps to 3750 Kbps 16.8 Kbps to 4375 Kbps 64 Kbps to 5000 Kbps
7.0 Introduction
This section defines the technical performance parameters and specifications for the DD2401 Satellite Demodulator.
7.3 Options
Concatenated Codec: Turbo Codec: A Reed-Solomon codec Intelsat. Turbo Codec per IESS 315
7.4 Environmental
Prime Power: Operating Temperature: Storage Temperature: 1.7A @ 5.0 V, 0.25A @ +12 V, 0.05A @ -12 V (12 Watts Total). 24 V, 15 Watts for LNB. 0 to 50C, 95% humidity, non-condensing -20 to 70 C, 99% humidity, non-condensing
MN-DD2401 - Rev. G
7-1
Technical Specifications
7.5 Physical
Chassis Size: Weight: Shipping Weight: 19 W x 17 D x 1.75 H (48.26cm x 43.2cm x 4.45 cm) 8 pounds (3.6 Kg) 11 pounds (4.6 Kg)
7-2
MN-DD2401 Rev. G
Technical Specifications
7.6
1E-2
Viterbi Decoder
Typical Performance 1E-3
1E-4
BER
1E-5
1E-6
1E-7
1E-8
1E-9 0 1 2 3 4 5 6 Eb/No in dB 7 8 9 10 11 12
MN-DD2401 Rev. G
7-3
Technical Specifications
1E-3
1E-4
BER
1E-5
1E-6
1E-7
1E-8
1E-9 0 1 2 3 4 5 6 Eb/No in dB 7 8 9 10 11 12
7-4
MN-DD2401 Rev. G
Technical Specifications
1E-2
Turbo Decoder
1E-4
BER
1E-5
1E-6
1E-7
1E-8
1E-9 0 1 2 3 4 5 6 Eb/No in dB 7 8 9 10 11 12
MN-DD2401 Rev. G
7-5
Technical Specifications
1E-2
Trellis Decoder
Typical Performance
1E-3
1E-4
BER
1E-5
1E-9 0 1 2 3 4 5 6 Eb/No in dB 7 8 9 10 11 12
7-6
MN-DD2401 Rev. G
Technical Specifications
Turbo Decoder
1E-3
1E-4
BER
1E-5
1E-6
1E-7
1E-9 0 1 2 3 4 5 6 Eb/No in dB 7 8 9 10 11 12
MN-DD2401 Rev. G
7-7
Technical Specifications
Turbo Decoder
1E-5
1E-6
1E-7
1E-9 0 1 2 3 4 5 6 Eb/No in dB 7 8 9 10 11 12
7-8
MN-DD2401 Rev. G
Technical Specifications
1E-2
Turbo Decoder
1E-3
1E-5
1E-6
1E-7
1E-8
1E-9 0 1 2 3 4 5 6 Eb/No in dB 7 8 9 10 11 12
MN-DD2401 Rev. G
7-9
Technical Specifications
Table 7-1 - B/O/QPSK BER Performance (Viterbi) Specification Typical 1/2 Rate 3/4 Rate 7/8 Rate 1/2 Rate 3/4 Rate 4.2 dB 5.3 dB 6.2 dB 3.9 dB 4.9 dB 4.8 dB 6.1 dB 7.1 dB 4.5 dB 5.6 dB 5.5 dB 6.8 dB 7.9 dB 5.1 dB 6.3 dB 6.1 dB 7.6 dB 8.6 dB 5.7 dB 7 dB 6.7 dB 8.3 dB 9.3 dB 6.2 dB 7.7 dB 7.4 dB 8.9 dB 10.2 dB 6.8 dB 8.4 dB 8.2 dB 9.7 dB 11 dB 7.4 dB 9.1 dB 9 dB 10.3 dB 11.7 dB 8.1 dB 9.8 dB
7/8 Rate 5.8 dB 6.5 dB 7.2 dB 7.9 dB 8.6 dB 9.4 dB 10.1 dB 10.5 dB
Table 7-2 - B/O/QPSK BER Performance (Viterbi - w/RS) BER Specification Typical 1/2 Rate 3/4 Rate 7/8 Rate 1/2 Rate 3/4 Rate 7/8 Rate 1E-3 3.3 dB 5.1 dB 3 dB 4.3 dB 5.3 dB 1E-4 3.5 dB 5.3 dB 3.2 dB 4.5 dB 5.7 dB 1E-5 3.8 dB 5.4 dB 6.5 dB 3.4 dB 4.7 dB 6 dB 1E-6 4.1 dB 5.6 dB 6.7 dB 3.6 dB 4.9 dB 6.4 dB 1E-7 4.2 dB 5.8 dB 6.9 dB 3.8 dB 5.1 dB 6.7 dB 1E-8 4.4 dB 6 dB 7.2 dB 4 dB 5.3 dB 7.1 dB 1E-9 4.7 dB 6.1 dB 7.5 dB 4.2 dB 5.4 dB 7.4 dB 1E-10 5 dB 6.3 dB 7.8 dB 4.4 dB 5.6 dB 7.7 dB
Table 7-3 - B/O/QPSK BER Performance (Turbo) Specification Typical Turbo 0.495 Turbo 0.793 Turbo 0.495 Turbo 0.793 1E-3 2.5 dB 3.3 dB 2.2 dB 3 dB 1E-4 2.7 dB 3.7 dB 2.3 dB 3.2 dB 1E-5 3 dB 4.1 dB 2.5 dB 3.4 dB 1E-6 3.2 dB 4.4 dB 2.6 dB 3.6 dB 1E-7 3.5 dB 4.8 dB 2.7 dB 3.8 dB 1E-8 3.7 dB 5.2 dB 2.9 dB 4 dB 1E-9 4 dB 5.6 dB 3 dB 4.2 dB 1E-10 4.2 dB 5.9 dB 3.2 dB 4.4 dB BER
7-10
MN-DD2401 Rev. G
Technical Specifications
Table 7-4 - 8PSK BER Performance (Trellis) Specification Typical 2/3 Rate 2/3 Rate w/RS 2/3 Rate 2/3 Rate w/RS 6.3 dB 5.8 dB 4.8 dB 4.9 dB 7.3 dB 6.1 dB 5.6 dB 5.1 dB 8.2 dB 6.3 dB 6.4 dB 5.4 dB 9 dB 6.5 dB 7.2 dB 5.6 dB 9.8 dB 6.7 dB 8.1 dB 5.8 dB 10.4 dB 6.9 dB 8.9 dB 6.1 dB 11.1 dB 7.1 dB 9.7 dB 6.3 dB 11.9 dB 7.3 dB 10.5 dB 6.6 dB
Table 7-5 - 8PSK BER Performance (Turbo) Specification Typical Turbo 0.495 Turbo 0.793 Turbo 0.495 Turbo 0.793 7 dB 4.2 dB 5.4 dB 7.3 dB 4.3 dB 5.6 dB 7.7 dB 4.5 dB 5.9 dB 8 dB 4.6 dB 6.2 dB 8.4 dB 4.7 dB 6.4 dB 8.7 dB 4.9 dB 6.7 dB 9.1 dB 5 dB 7 dB 9.5 dB 5.2 dB 7.3 dB
Table 7-6 - (O)QPSK BER Performance (Turbo) Specification Typical 1/2 Rate 3/4 Rate 7/8 Rate 1/2 Rate 3/4 Rate 3.2 dB 4 dB 2.8 dB 3.4 dB 4.1 dB 3 dB 2.7 dB 3.6 dB 4.2 dB 2.4 dB 3.2 dB 2.9 dB 3.8 dB 4.3 dB 2.6 dB 3.4 dB 3.1 dB 4.1 dB 4.4 dB 2.8 dB 3.7 dB 3.3 dB 4.4 dB 4.5 dB 3 dB 4 dB
MN-DD2401 Rev. G
7-11
Technical Specifications
Table 7-7 - 8PSK BER Performance (Turbo) Typical BER Specification 3/4 Rate 7/8 Rate 3/4 Rate 7/8 Rate 1E-3 5.6 dB 6.7 dB 5.4 dB 6.3 dB 1E-4 5.8 dB 6.8 dB 5.6 dB 6.4 dB 1E-5 6 dB 6.9 dB 5.8 dB 6.5 dB 1E-6 6.2 dB 7 dB 6 dB 6.6 dB 1E-7 6.4 dB 7.1 dB 6.2 dB 6.7 dB 1E-8 6.8 dB 7.2 dB 6.6 dB 6.8 dB
7-12
MN-DD2401 Rev. G
Appendices
MN-DD2401 - Rev. G
8-1
Glossary
Glossary
G
A Ampere Alternating Current Automatic Gain Control Alarm Indication System. A signal comprised of all binary 1s. American National Standards Institute American Standard Code for Information Interchange Application Specific Integrated Circuit Automatic Test Equipment B
Bit Error Rate Bit Error Rate Test Binary Digit or Built-In Test Built-In Test Equipment Bits Per Second Binary Phase Shift Keying 8 Binary Digits C
Celsius Computer Aided Test Software Cable Assembly Compact Disk Read Only Memory Clock Centimeter Common Central Processing Unit Cyclic Redundancy Check. A system of error checking performed at the transmitting and receiving stations. Continuous Wave Carrier to Noise Ratio
MN-DD2401 - Rev. G
G-1
Glossary
D dB dBc dBm DC Demod DPLL DVB D&I Decibels Decibels Referred to Carrier Decibels Referred to 1.0 milliwatt Direct Current Demodulator or Demodulated Digital Phase Locked Loop Digital Video Broadcast Drop and Insert E Eb/N0 EEPROM EIA EMI ESC ET Ratio of Energy per bit to Noise Power Density in a 1 Hz Bandwidth. Electrically Erasable Programmable Read Only Memory Electronic Industries Association Electromagnetic Interference Engineering Service Circuits Earth Terminal F F FAS FCC FEC FIFO FPGA Fahrenheit Frame Acquisition Sync. A repeating series bits which allow acquisition of a frame. Federal Communications Commission Forward Error Correction First In, First Out Field Programmable Gate Arrays G g GHz GND Force of Gravity Gigahertz Ground H HSSI HW Hz High Speed Serial Interface Hardware Hertz (Unit of Frequency)
MN-DD2401 - Rev. G
G-2
Glossary
I IBS IDR I/O IEEE IESS IF INTELSAT ISO Intelsat Business Services Intermediate Data Rate Input/Output International Electrical and Electronic Engineers INTELSAT Earth Station Standards Intermediate Frequency International Telecommunication Satellite Organization International Standards Organization J J Joule K Kbps Kbps kg kHz Ksps Kilobits per Second Kilobytes per Second Kilogram Kilohertz Kilosymbols per Second L LCD LED LO Liquid Crystal Display Light Emitting Diode Local Oscillator M mA Mbps MFAS MHz MIB Mod ms M&C Milliampere Megabits per Second Multi-Frame Acquisition Sync. See FAS. Megahertz Management Information Base Modulator or Modulated Millisecond Monitor and Control
MN-DD2401 - Rev. G
G-3
Glossary
N NC NO ns NVRAM N/C Normally Closed Normally Open Nanoseconds Non-Volatile Random Access Memory No Connection or Not Connected O OQPSK Offset Quadrature Phase Shift Keying P PC PLL ppm P/N Personal Computer Phase Locked Loop Parts per Million Part Number Q QAM QPSK Quadrature Amplitude Modulation Quadrature Phase Shift Keying R RAM RF ROM rms RU Rx RxD R-S Random Access Memory Radio Frequency Read Only Memory Root Mean Square Rack Unit. 1 RU = 1.75 Receive (Receiver) Receive Data Reed-Solomon Coding. Reed-Solomon codes are block-based error correcting codes with a wide range of applications in digital communications and storage. S SEQ SYNC Sequential Synchronize
MN-DD2401 - Rev. G
G-4
Glossary
T TBD TM TPC TRE Tx TxD To Be Designed or To Be Determined Technical Manual Turbo Product Codes Trellis Transmit (Transmitter) Transmit Data U UART UUT Universal Asynchronous Receiver/Transmitter Unit Under Test V V VAC VCO VDC VIT Volts Volts, Alternating Current Voltage Controlled Oscillator Volts, Direct Current Viterbi Decoding WXYZ W Watt Misc. s 16QAM 8PSK Microsecond Ohms 16 Quadrature Amplitude Modulation 8 Phase Shift Keying
MN-DD2401 - Rev. G
G-5
Glossary
MN-DD2401 - Rev. G
G-6