UNIT V MICROCONTROLLER BASED SYSTEMS DESIGN LCD INTERFACING There are basically two types of LCDs as far as the

interfacing technique is concerned: parallel LCDs and serial LCDs. Parallel LCDs (e.g. Hitachi HD44 !" series# are connected to the $icrocontroller circuitry such that the data is transferred to the LCD unit using $ore than one data line% and four or eight data lines are &ery co$$on. 'erial LCDs are connected to a $icrocontroller using only one data line and data is usually transferred to the LCD using the standard (')*+* asynchronous data co$$unication protocol. 'erial LCDs are $uch easier to usebut they usually cost $ore than the parallel ones. Parallel LCDs are used in the te$perature pro,ects in this boo- to show the &alue of the $easured te$perature. The progra$$ing of a parallel LCD is usually a co$ple. tas- and requires a good understanding of the internal operation of the LCDs% including the ti$ing diagra$s. /ortunately% /0D C language pro&ides special co$$ands for displaying data on HD44 !" type parallel LCDs. 1ll the user has to do is connect the LCD to the appropriate 234 ports of the $icrocontroller and then use these special co$$ands to si$ply send data to the LCD. HD44780 LCD module HD44 !" is one of the $ost popular LCD $odules used in industry and also by hobbyists. This $odule is $onochro$e and co$es in different shapes and si5es. 6odules with line lengths of !% 78% *"% *4% +*% and 4" characters can be selected. Depending upon the $odel chosen% the display width can be selected as 7% *% or 4 lines. The display pro&ides a 74)pin connector to interface to the e.ternal world.

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. 9ss is the " 9 supply or ground. The 9DD pin should be connected to the positi&e supply. 1lthough the $anufacturers specify a : 9 d.c. supply% the $odules willusually wor- with as low as + 9 or as high as 8 9. Pin + is na$ed as 900 and this is the contrast control pin. This pin is used to ad,ust the contrast of the de&ice and it should be connected to a &ariable &oltage supply. 1 potentio$eter is usually connected between the power supply lines with its wiper ar$ connected to this pin so that the contrast can be ad,usted. This pin can be connected to ground for $ost applications. Pin 4 is the (egister 'elect (('# and when this pin is L4;% data transferred to the display is treated as co$$ands. ;hen (' is H2<H% character data can be transferred to and fro$ the $odule. Pin : is the (ead3;rite ((3;# line. This pin is pulled L4; in order to write co$$ands or character data to the LCD $odule. ;hen this pin is H2<H% character data or status infor$ation can be read fro$ the $odule.

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Pin 8 is the 0nable (0# pin which is used to initiate the transfer of co$$ands or data between the $odule and the $icrocontroller. ;hen writing to the display% data is transferred only on the H2<H to L4; transition of this line. ;hen reading fro$ the display% data beco$es a&ailable after the L4; to H2<H transition of the enable pin and this data re$ains &alid as long as the enable pin is at logic H2<H. Pins to 74 are the eight data bus lines (D4 to D #. Data can be transferred between the

$icrocontroller and the LCD unit using either a single !)bit byte% or as two 4)bit nibbles. 2n the latter case% only the upper four data lines (D4 to D # are used. The 4)bit $ode has the ad&antage that fewer 234 lines are required to co$$unicate with the LCD. Connec !n" #e LCD o #e m!c$ocon $olle$ The LCD $odule is assu$ed by default to be connected to Port = of a P2C $icrocontroller. The pin connections are as follows: LCD module %o$ B &!n' (' (3; 0 D4 D: D8 D =7 =* =+ =4 =: =8 =

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The functions used to send data and control to the LCD $odule are LCD and LCDString. /unction LCD sends a control function to the $odule as gi&en below: LCD ' ( emen )unc !on LCD()7# 2nitiali5e the display to 7 line LCD()*# 2nitiali5e the display to * lines LCD(*: # Clear display and ho$e the cursor LCD(*:!# (eturn the cursor to ho$e position LCD(*:8>7*!>?# (eturn cursor to position ? on line 7% where ? @ " is the first character position on line 7 LCD(*:8>7A*>?# (eturn cursor to position ? on line *% where ? @ " is the first character position on line *

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ANALOG TO DIGITAL CONVERTER There are nu$erous ways in which an analog signal can be con&erted to digital for$. The 1nalog to Digital con&ertors can be classified into two general groups based on the con&ersion technique. 4ne technique in&ol&es co$paring a gi&en analog signal with the internally generated equi&alent signal. This group includes successi&e appro.i$ation% counter% and flash)type con&erters. The second technique in&ol&es changing an analog signal into ti$e or frequency and co$paring these new para$eters against -nown &alues. Thus group includes integrator con&erters and 9oltage to /requency con&erters. The trade)off between the two techniques is based on accuracy 9s speed. The successi&e appro.i$ation and the flash type are faster but generally less accurate than the integrating and the 9oltage to /requency con&erters. /urther$ore% the flash type is e.pensi&e and difficult to design for high accuracy. The $ost co$$only used 13D con&erters are successi&e appro.i$ation and integrating type 13D con&erters. The successi&e appro.i$ation 13D con&erters are used in applications such as data loggers and instru$entation% where con&ersion speed is i$portant. 4n the other hand% integrating type con&erters are used in applications such as digital $eters% panel $eters and $onitoring syste$s% where the con&ersion accuracy is critical.

SUCCESSIVE A%%RO*IMATION A+D CONVERTERS,

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/igure shows the bloc- diagra$ of a successi&e appro.i$ation 13D con&erter. The $a,or ele$ents of this con&erter are a D31 con&erter% the successi&e appro.i$ation ('1(# and the co$parator. Here the output of D31 con&erter is co$pared with the $easured &oltage. The digital input to the D1C is generated using successi&e appro.i$ation $ethod. ;hen the D1C output $atches the analog signal% the input to the D1C is the equi&alent digital signal. /irst bit D+ is turned 4? and the output of the D1C is co$pared with an analog signal. 2f the co$parator changes state% indicating that the output generated by D+ is larger than the analog signal% bit D+ is turned 4// in the '1( and bit D* is turned 4?. The process continues until the input reaches bit D". SUCCESSIVE A%%RO*IMATION TECHNI-UE, 'uccessi&e appro.i$ation process can be shed through either software or hardware approach. 2n software approach% an 13D con&erter is designed using 13D con&erter and the $icroprocessor plays the role of the co$parator and the '1(. =loc- diagra$ for successi&e appro.i$ation 1DC is shown in /ig.

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The successi&e appro.i$ation con&ersion process can be acco$plished through either the software or hardware approach. 2n the software approach% an 13D con&erter is designed using a D31 con&erter% and the $icroprocessor plays the role of the counter and the '1(. /or the hardware approach% co$plete 1DCs are now a&ailable as integrated circuits.

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In e$.(c!n" o. ADC 0804 o 80/0 M!c$ocon $olle$, 1DC "!"4 is a single channel analog to digital con&erter i.e.% it can ta-e only one analog signal. 1DC "!"4 has ! bit resolution. The higher resolution 1DC gi&es s$aller step si5e. 'tep si5e is s$allest change that can be $easured by an 1DC. /or an 1DC with resolution of ! bits% the step si5e is 7A.:+$9 (:93*::#. The ti$e ta-en by the 1DC to con&ert analog data into digital for$ depends on the frequency of cloc- source. The con&ersion ti$e of 1DC "!"4 is around 77"us. To use the internal cloc- a capacitor and resistor are used as shown in the circuit. The input to the 1DC is gi&en fro$ a regulated power supply and a 7"B potentio$eter The !":7 6icrocontroller is used to pro&ide the control signals to the 1DC. C' (chip select# pin of 1DC is directly connected to ground. The pin P7.7% P7." and P7.* are connected to the pin ;(% (D and 2?T( of the 1DC respecti&ely. ;hen the input &oltage fro$ the preset is &aried the output of 1DC &aries also &aries.

/ro$ the circuit it is clear that the 1DC interfaced directly to the $icrocontroller. The Port7 is used as an input port which recei&es the digital data fro$ the 1DC. Port pins P*.: and P*.8 are used for '4C and 04C
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operation. ;hen the con&ersion is o&er the 1DC will send an interrupt signal to the $icrocontroller through the pin P*. .?ow the 6icrocontroller recei&es digital data through the Port7.This data after con&ersion to deci$al data is displayed on the LCD $odule. DIGITAL TO ANALOG CONVERTER Digital to 1nalog con&erters can be classified as current output% &oltage output and $ultiplying type. The current output D1C pro&ides current as the output signal. The &oltage output D1C internally con&erts the current signal into the &oltage signal. The &oltage output D1C is slower than the current output D1C because of the delay in con&erting the current signal into the &oltage signal. The $ultiplying D1C is si$ilar to the other * types e.cept its output represents the product of input signal and the reference source and the product is linear o&er a broad range. Typical applications of D1Cs include digital &olt$eters% pea- detectors% panel $eters% progra$$able gain and attenuation and stepping $otor dri&e. /ollowing figure shows a si$ple + bit D31 con&erter. 2t has a + digital input lines (D*% D7 and D"# and one output line for the analog signal. The + input signals can assu$e co$binations fro$ """ to 777. 2f the input ranges fro$ " to 79 it can be di&ided into ! equal parts (73!9# and each successi&e input is 73!9 higher than the pre&ious co$bination. Thus if the full scale analog &oltage is 79% the s$aller unit (L'=# or ""7 is equi&alent to 73! of 79. The 7"" (6'=# represents half of the full scale &alue. /or the $a.i$u$ input signal 777% the output signal is equal to the &alue of the full)scale input signal $inus the &alue of the 7 L'=. 'o for a fullscale &oltage 79% it will be 3!9 in the abo&e e.a$ple.

The basic $icroprocessor board% 9=6=)""*% incorporates two !)bit Digital to 1nalog con&erters% D1C "!"". D1C "!"" is a $onolithic% high speed% current output Digital to 1nalog con&erter. 2ts unique features are: Typical settling ti$e of 7"" ?anoseconds. Co$ple$entary current outputs.
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 Differential output &oltages of *"9 pea- to pea- with si$ple resistor loads. *)quadrant wide range $ultiplying capability. The D1C interface section co$prises of 234 decoding D31 con&ersion circuit

I+O DECODING, The 2CCs 4L'7+! and 4L'"" for$ the address decoding logic in this interface board. The address lines 1+% 14 and 1: are tied to pin7% pin* and pin+ of 4L'7+! respecti&ely. The address lines 18 and 1 are ?1?Ded together and the ?1?D gate output is connected to pin: of 4L'7+!. 'i$ilarly 24; and 24( signals are ?1?Ded and the ?1?D gate output is connected to pin8 of 4L'7+!. Pin4 is grounded. Thus with A7 7 A1 7 A/ " A4 " A2 " A3 D A0 . A0 D

@ C" (He.# D1C7 is selected% and with

A7 7

A1 7

A/ "

A4 "

A2 7

A3 D

A0 D

A0 D

@ C! (He.# D1C* is selected.

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The D1C outputs are a&ailable at the : pin connector (P*#. D1C 7 and D1C * outputs are ter$inated at pin : and pin4 respecti&ely. Pin7 is connected to the ground. The D1C "!"" is a si$ple $onolithic !)bit D31 con&erter. 2t has fast settling ti$e of 7""ns. 2t can be directly interfaced to TTL% C64'% P64' and others. 2t operates at 4.:9 to >7!9 supply. The nu$ber of data bit inputs decides the resolution of the D1C since the nu$ber of analog output le&els is equal to *E% where n is the nu$ber of data bit inputs. Therefore% an !)input D1C such as the D1C"!"! pro&ides *:8 discrete &oltage (or current# le&els of output. Port 7(! bits of the $icrocontroller is connected to the input data lines of D1C)"!.The reference current is deter$ined by the resistor (7 and the reference &oltage 9 ref. The resistor (* is generally equal to (7 to $atch the input i$pedance of reference source. The output (ta-en fro$ pin nu$ber 4 is obser&ed either on a digital $ulti$eter or on a cathode ray oscilloscope. The output current 2o is calculated as follows: 2o @ 9ref3(7F1o3* > 1734 > 1*3! > G >1 3*:8H The output &oltage 9o is obtained as follows: 9o @2o I (7

SENSOR INTERFACING 6icro)controllers are useful to the e.tent that they co$$unicate with other de&ices% such as sensors $otors% switches% -eypads% displays% $e$ory and e&en other $icro)controllers. 6any interface $ethods ha&e been de&eloped o&er the years to sol&e the co$ple. proble$ of balancing circuit design criteria such as features% cost% si5e% weight% power consu$ption% reliability% a&ailability% $anufacturability. 6any $icrocontroller designs typically $i. $ultiple interfacing $ethods. 2n a &ery si$plistic for$% a $icrocontroller
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syste$ can be &iewed as a syste$ that reads fro$ ($onitors# inputs% perfor$s processing and writes to ( controls # outputs. Sen'o$ T4&e' J Te$perature J Hu$idity J Light J 1cceleration J /orce J /requency J /low J Pressure J Torque J Pro.i$ity

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1 low)cost P2C78/!4 type $icrocontroller is used in the design. The ('T and the CLB inputs of the D' 78*" are connected to port pins (1" and (17 respecti&ely. DK input3output of D'78*" is connected to the (1* pin of the $icrocontroller. The LCD display is connected to Port = of the $icrocontroller. REAL-TIME CLOCK The real ti$e cloc- ((TC# is widely used de&ice that pro&ides accurate ti$e and date for $any applications. 6any syste$s such as 2=6 pc co$e with (TC chip on $other board. (TC chip uses an internal battery which -eeps ti$e and date e&en when the power is off. 2n so$e $icrocontrollers ha&e inbuilt (TC while others requires interfacing. 6ost widely used (TC chip is D'7+" fro$ Dallas 'e$iconductor. 2t uses e.ternal lithiu$ battery of +9 to -eep operating for o&er $a.i$u$ 7" years in the absence of e.ternal power supply.D'7+" uses C64'
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technology to -eep power consu$ption low. 1ccording to datasheet of D'7+" fro$ Dallas% it -eeps trac- of L'econds% 6inutes% and Hours% Day of wee-% Date% 6onth and MearN This chip pro&ides facility of leap year co$pensation &alid up to *7"". Leap year co$pensation is done by chec-ing last two digits of year. 1ll this infor$ation is pro&ided in =CD or H0D for$ats. 6icrocontroller co$$unicates with D'7+" by using 2*C co$$unication protocol. 2*C interface can operate with data transfer rate up to 4""- bits per second. 6icrocontroller can operate in trans$itter or recei&er $ode at a ti$e. (ecei&ed data fro$ (TC chip we displayed by using LCD. 1ll the settings related to ti$ing and date% we did it by using two push buttons. B(c5"$ound 2t is also possible to design (eal Ti$e Cloc- by using si$ply $icrocontroller or $icroprocessor but it will not be true (eal Ti$e Cloc-. 2t needs to ad,ust the days of &arious $onths as +" or +7 (or so$eti$e *A or *! in case of leap and non)leap year# in a year and in addition to that leap year co$pensation will tends to increase in the co$ple.ity of the progra$ to great le&el or it $ay be such a difficult tas- to co$plete. 2t also see$s difficult to get e.act 7 second pulse or counting in $icrocontroller or $icroprocessor due to &arious e.ternal crystal frequencies a&ailability and co$patibility which dri&es the processor% it results in a de&iation in ti$e fro$ real ti$e or it affects the accuracy.

143

%!n connec !on',

144

6icrocontroller co$$unicate with the (TC chip on 2*C protocol% in which $icrocontroller will wor- as a $aster and (TC chip as a sla&e. (TC chip is able to $aintain the ti$e of its own. 6icrocontroller will read the data fro$ (TC chip which is initially written by $icrocontroller perfor$ required operations on it and send that data to the LCD unit which will display it in hu$an readable for$at. This process is going to continue for infinite ti$e. RELAY The !":7 'lic-er board is specifically designed to help students to $aster the required s-ills in the area of e$bedded syste$s. The -it is designed in such way that all the possible features of the $icrocontroller will be easily used by the students. The -it supports in syste$ progra$$ing (2'P# which is done through serial port. ?DPCs !":7 (1T!A9:7(D*#% !":7 slic-er Bit is proposed to s$ooth the progress of de&eloping and debugging of &arious designs enco$passing of speed !)bit 6icrocontrollers. (elays are de&ices which allow low power circuits to switch a relati&ely high Current39oltage 4?34//. 1 relay circuit is typically a s$aller switch or de&ice which dri&es (opens3closes# an electric switch that is capable of carrying $uch larger current a$ounts.

In e$.(c!n" Rel(4 6! # 80/0

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There are * input channels. 0ach input is connected to the triggering coil of the respecti&e relay. There are * output channels that each correspond to an input. ;hen the input is energi5ed% the relay turns on and the O>O output is connected to >7*&. ;hen the relay is off% the O>O output is connected to <round. The O)O output is per$anently wired to <round. 2n 1D= =oard two no. 4f 'PDT relays are used. =oth the relays operate on :9 DC. The outputs of both the ter$inals of the relay are ta-en out on the connecter to connect the e.ternal circuitry. The relay can be connected to the 6icrocontroller through any of the selected port (P".4 P P".:# or (P7.4 P P7.:# or (P*.4 P P*.:# by using the /(C connecter.

%!n A''!"nmen 6! # 80/0

C!$cu! D!("$(m o In e$.(ce Rel(4 6! # 80/0

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PULSE WIDTH MODULATION(PWM) The sche$atic bloc- diagra$ of CCP7 $odule in P;6 $ode is shown in the figure.

/ig : P;6 4peration

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2t can be noted that P(* (Period (egister% ! bit# decides the P;6 period where CCP(7L (!)bits# and CCP7C4? Q::4R (*)bits# decide the P;6 duty cycle. ;hen T6(* equals P(*% the '( latch is set and (C*3CCP7 pin is pulled high. 2n the sa$e ti$e% T6(* is cleared and the duty cycle &alue a&ailable in CCP(7L is latched to CCP(7H. CCP(7H% CCP7C4? Q::4R decide the duty cycle and when this 7")bit equals the T6(*>* pres)caler or K)bits% the '( latch is set and (C*3CCP7 pin is dri&en low.

1 P;6 output as shown has a ti$e period. The ti$e for which the output stays high is called duty cycle. %7M %e$!od The P;6 period is specified by writing to P(* register. The P;6 period can be calculated using the following for$ula: P;6 period @ F( PR *# > 7H 4 T osc (T6(* prescale &alue# P;6 frequency @ 73 P;6 period ;hen T6(* is equal to P(*% the following e&ents occur on the ne.t incre$ent cycle.

T6(* is cleared the CCP7 pin is set (if P;6 duty cycle is " The P;6 duty cycle is latched fro$ CCP(7L into CCP(7H

%7M du 4 c4cle The P;6 duty cycle is specified by writing to the CCP(7L register and to CCP7C4? Q : : 4 R bits. Sp to 7")bit resolution is a&ailable where CCP(7L contains the eight 6'=s and CCP7C4? Q : : 4 R contains the two L'=Os. The 7")bit &alue is represented by CCP(7L : CCP7C4? Q : : 4 R. The P;6 duty cycle is gi&en by P;6 duty cycle @ (CCP(7L : CCP7C4? Q : : 4 R #. T osc . (T6(* prescale &alue#
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To understand the 7")bit counter configuration fro$ Ti$er)*% let us first see the counting $echanis$ of Ti$er) *% as shown in /ig. 2f the prescaler is 7% the 7")bit counter is configured as follows

/ig : Prescaler set to di&ide by one 2f the prescaler is 4% the 7")bit counter is configured as follows.

/ig : Prescaler progra$ed to di&ide by four 2f the prescaler is 78% the 7")bit counter is reali5ed as follows.

/ig : Prescaler progra$ed to di&ide by 78 1lthough CCP(7L and CCP7C4? < : : 4 > can be written to at anyti$e% the duty cycle &alue is not latched into CCP(7H until a $atch between P(* and T6(* occurs. 2n P;6 $ode% CCP(7H is a read)only register. The CCP(7H register and a *)bit internal latch are used to double buffer the P;6 duty cycle. This double buffering is essential for glitchless P;6 operation. ;hen the CCP(7H and *)bit latch $atch T6(* concatenated with an internal *)bit K cloc- or *)bits of prescaler% the CCP7 pin is cleared. 6a.i$u$ P;6 resolution (bits# for a gi&en P;6 frequency can be calculated as

2f the P;6 duty cycle is longer than the P;6 period% then the CCP7 pin will not be cleared.
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%7M %e$!od (nd du 4 c4cle c(lcul( !on 0.a$ple: Desired P;6 frequency @ f osc @ *"6H5 T6(* Prescalar @ 7 !.7*: -H5

/ind the $a.i$u$ resolution of duty cycle that can be used with a !.7*4 -H5 frequency and *" 6H5 oscillator.

*:8 @ *P;6 (esolution 1t $ost% an !)bit resolution duty cycle can be obtained fro$ a !.7*: -H5 frequency and *" 6H5 oscillator ie% " CCP(7L : CCP7C4? Q: : 4R T *:: .

1ny &alue greater than *:: will result in a 7"" % duty cycle. The following table gi&es the P;6 frequency fP;6 if fosc @ *"6H5

Du 4 c4cle $e'olu !on 008B! coun e$ 'c(le %R3 9(lue %$e'c(le$ 0 %$e'c(le$ 4 %$e'c(le$ 01 7" bit U 7" bit ! bit 8 bit 7"*4 7""" *:8 84 *:: *4A 8+ 7: 7A.:+ BH5 4.!! -H5 *"-H5 :-H5 7.** -H5 7.*:-H5 4.!!-H5

!.7*:-H5 7A.:+-H5 +7*.:-H5

!.7*:-H5 7A.:+-H5

DC MOTOR INTERFACING:

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1 DC $otor runs with the help of Direct Current. 2t produces torque by using both electricity and $agnetic fields. The DC $otor has rotor% stator% field $agnet% brushes% shaft% co$$utator. The DC $otor requires $ore current to produce initial torque than in running state.2nterfacing the DC $otor directly to !":7 $icrocontroller is not possible. =ecause the DC $otor uses large current (*"")+""$1 in s$all DC $otors# to run. ;hen this current flow into the !":7 $icrocontroller% the 2C will get da$aged. Therefore we use a dri&ing circuit with an opto isolator and a L*A! Dual H)=ridge dri&er. The opto)isolator pro&ides additional protection to the $icrocontroller.

Continuous% sustained operation of the $otor will cause the L*A+ Dual H)=ridge dri&er to o&erheat. 'o%a suitable heat sin- $ust be used. STEPPER MOTOR INTERFACING STE%%ER MOTOR, 1 $otor in which the rotor is able to assu$e only discrete stationary angular position is a stepper $otor. The rotary $otion occurs in a stepwise $anner fro$ one equilibriu$ position to the ne.t.
151

'tepper $otor control is a &ery popular application of $icroprocessor in control area. They are widely used in a &ariety of applications such as co$puter peripherals and in the areas of process control $achine tools% $edicine% nu$erically controlled $achines and (obotics.

CONSTRUCTIONAL )EATURES, 1 stepper $otor could be either of the reluctance type or of the per$anent $agnet type (P6#. 1 P6 stepper $otor consists of $ultiphased stator and two part per$anent $agnet rotor. The 9( stepper $otor has un$agnetised rotor. P6 stepper $otor is the $ost co$$only used type. The basic two phase stepper $otor consists of two pairs of stator poles. 0ach of the four poles has its own winding. The e.citation of any one winding generates a north pole (?#% a south pole ('# gets induced at the dia$etrically opposite side.

STE%%ER MOTOR CROSS8SECTIONAL VIE7

TY%ICAL STE%%ER MOTOR ROTOR

152

1s shown in the figure the four pole structure is continuous with the stator fra$e and the $agnetic field passes through the cylindrical stator annular ring. The rotor $agnetic syste$ has two end faces. The left face is per$anently $agneti5ed as 'outh Pole and the right face as ?orth Pole. The 'outh Pole structure and the ?orth Pole structure possess si$ilar pole faces. The ?orth Pole structure is twisted with respect to the 'outh Pole structure so that 'outh Pole co$es precisely between two north poles. The ?orth Pole structure is offset with respect to the 'outh Pole structure by one pole pitch. The cross sectional &iew is shown in fig. 2n an arrange$ent where there are four stator poles and three pairs o rotor poles% there e.its 7* possible stable positions in which a south pole of the rotor can loc- with a north pole of the stator. /ro$ this it can be noted that the step si5e is :210o+;N'<N$=> ;here ?s is the no. of stator poles. ?r is the no. of pairs of rotor poles. <enerally step si5e of the stepper $otor depends upon ?(. These stable positions can be attained by si$ply energi5ing the winding on any one of the stator poles with a DC. There are three different sche$es a&ailable for stepping a stepper $otor. These are: a# ;a&e sche$e b# *)phase sche$e and
153

c# Half stepping or $i.ed sche$e. 38%HASE SCHEME, 2n this sche$e% any two ad,acent stator windings are energi5ed. There are two $agnetic fields acti&e in quadrature and none of the rotor pole faces can be in direct align$ent with the stator poles. 1 partial but sy$$etric align$ent of the rotor poles is of course possible. Typical equilibriu$ conditions of the rotor when the windings on two successi&e stator poles are e.cited are illustrated in the following fig. 2n step (a#% 17 and =7 are energi5e. The pole)face '7 tries to align itself with the a.is of 17(?# and the pole face '* with =7(?#. The north pole ?+ of the rotor finds itself in the neutral 5one between 17(?# and =7(?#. '7 and '* of the rotor% position the$sel&es sy$$etrically with respect to the two stator north pole. ?e.t% when =7 and 1* are energi5ed% '* tends to align with =7(?# and '+ with 1*(?#. 4f course% again under equilibriu$ conditions% only partial align$ent is possible and ?7 finds itself in the neutral region% $idway between =7(?# and 1*(?# Fstep (b#H. 2n step (c#% 1* and =* are on. '+ and '7 tend to align with 1*(?# and =*(?#% respecti&ely% with ?* in the neutral 5one. 'tep (d# illustrates the case with 17 and =* are on.

)!"? S e& ;(=

)!"? S e& ;@=

154

)!"? S e& ;c=

)!"? S e& ;d=

The step angle is +"o as in the wa&e sche$e. Howe&er% the rotor is offset by 7: o in the two)phase sche$e with respect to the wa&e sche$e. 1 total of 7* steps are required to $o&e the rotor by +8" o ($echanical#. Two)phase dri&es produce $ore torque than the wa&e dri&es. The switching sequence for the *)phase sche$e is gi&en in the following table.

Cloc56!'e S e& 7 * + 4 A3 7 " " 7 A3 " 7 7 " B0 " " 7 7 B3 7 7 " " S e& 7 * + 4 A3 7 " " 7

An !8cloc56!'e A3 " 7 7 " B0 7 7 " " B3 " " 7 7

T(@le, %#('e '6! c#!n" 'c#eme

HAL) STE%%ING SCHEME, The wa&e sche$e as well as the *)phase sche$e gi&es steps of si5e +" o for the stepper $otor under consideration. Howe&er% there is an offset of 7: o between these two sche$es. =y interlea&ing these two sche$es% the step si.e can be reduced to 7: o% thereby i$pro&ing the accuracy of the stepper $otor. The half stepping sche$e is a $i.ture of the wa&e sche$e and the *)phase sche$e.
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The switching sequence is: 7. *. +. 4. :. 8. . !. A. 17 (4?# 17 and =7 (4?# =7 (4?# =7 1?D 1* (4?# 1* (4?# 1* and =* (4?# =* (4?# =* and 17 (4?# 17 (4?#% etc.

0ight steps are required to $o&e the shaft by 7*"o and *4 steps for one co$plete re&olution. =y re&ersing the switching sequence% we can re&erse the direction of rotation. 4ne $a,or disad&antage of the half stepping sche$e is torque fluctuations. This is because the aligning torque for the wa&e sche$e is different fro$ that for the *)phase sche$e. CASE STUDIES: DATA ACQUISITION SYSTEM ;hen con&erting an analog signal to digital for$% it is usually not enough ,ust to find a suitable 1DC. Ssually% $ore than one input is required and the signal needs processing before it can be con&erted. 2n $ost cases% therefore% it is necessary to build up a co$plete data acquisition system. The ele$ents of such a syste$ are shown in /igure 77.7. This shows% in bloc- diagra$ for$% a syste$ with $ultiple inputs% a$plification% filtering% source selection% sa$ple and hold% and finally the 1DC itself. The different ele$ents are outlined in the sections which follow.

/igure: 0le$ents of a (four)channel# data acquisition syste$ T#e An(lo"8 o8D!"! (l Con9e$ e$ The tas- of the 1DC is to deter$ine a digital output nu$ber that is the equi&alent of its input &oltage. The design of such circuits is a non)tri&ial tas-. 6any &ery different 1DC circuits ha&e been de&eloped%
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targeted towards different applications. 'o$e% li-e the dual ra$p 1DC% are slow but with &ery high accuracy% and useful for precision $easure$ents such as digital &olt$eters. 4thers% li-e the /lash con&erter (not to be confused with /lash $e$ory technology#% are fast but of lesser accuracy% and are used to con&ert highspeed signals li-e &ideo or radar. 4thers% li-e the successi&e appro.i$ation 1DC% are of $ediu$ speed and $ediu$ accuracy% and useful for general)purpose industrial applications. This is the type $ost co$$only found in e$bedded syste$s. 1n 1DC is characteri5ed principally by the following features. Con9e$'!on C#($(c e$!' !c The 1DC accepts an input &oltage that is infinitely &ariable. 2t con&erts this to one of a fi.ed nu$ber of output &alues. 1n e.a$ple 1DC con&ersion characteristic is shown in /igure 77.*% where the input &oltage is represented on the hori5ontal a.is and digital output on the &ertical. 2f the 1DC is con&erting continuously and the input &oltage is gradually increased fro$ 5ero% the output is also initially 5ero. 1t a certain &alue of input% the output changes to G""7. 2t stays at this sa$e &alue as the input increases further% until at another input &alue the output switches to G"7". 2f the input &oltage increases continuously% the output at so$e point reaches its $a.i$u$ &alue. The input has then tra&ersed its full range. The output will ha&e $o&ed stepwise up to its $a.i$u$ &alue. /or an n)bit 1DC% the $a.i$u$ output &alue will be (* n ) 7#. /or e.a$ple% for an !) bit 1DC% the final &alue will be (*! ) 7#% or 77777777=% or *::D.

/igure. The ideal 1DC input3output characteristic The input range shown in /igure starts fro$ 5ero and goes up to the &alue V$a.. This is placed a little to the right of where one $ight e.pect it% at the centre of where a step for * n would occur. This positioning allows the hori5ontal a.is to be di&ided into e.actly *n equal seg$ents% each centred on an output transition. 6any 1DCs ha&e a characteristic li-e in /igure% for e.a$ple with an input range of "V: 9. 4thers% howe&er% ha&e a bipolar range% with the input &oltage ta-ing both positi&e and negati&e &alues% for e.a$ple ): to >: 9. 2n e&ery case the input range Vr is the difference between $a.i$u$ input &oltage and $ini$u$ input &oltage. The range usually relates in a direct way to the &alue of the &oltage reference% which for$s part of the 1DC.
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2t can be seen intuiti&ely fro$ the diagra$ that the $ore the nu$ber of output bits% the $ore will be the nu$ber of output steps and the finer is the con&ersion. 1 $easure of the fineness of con&ersion is called the resolution. This is the a$ount by which the input has to change to go fro$ one output &alue up to the ne.t. 2n the diagra$% the resolution is the width of one step in the con&ersion characteristic. 1n 1DC with n output bits can ta-e *n possible output &alues% fro$ " up to * n ) 7. 2t therefore has a resolution of Vr *n% where Vr is the input &oltage range. 1n inco$ing signal should use as $uch of the input range as possible% without e.ceeding it. 2f it only uses a part of it% then the effecti&e resolution is degraded and the 1DC is not being put to best use. Con9e$'!on S&eed 1n 1DC ta-es ti$e to do its wor-. That ti$e is called the con&ersion ti$e. 1 slow 1DC% with a high con&ersion ti$e% will only be able to con&ert low)frequency signals% as ?yquistOs criterion $ust always be satisfied. The con&ersion ti$e of an 1DC defines which type of signal it can be used to con&ert. 1s suggested earlier% high)accuracy 1DCs generally ta-e longer to co$plete a con&ersion.

D!"! (l In e$.(ce The digital interface is $ade up of the control signals and the data output. Typical control signals are shown in /igure. <enerally% there is a signal to the 1DC that causes a con&ersion to start. ;hen the con&ersion is co$plete% the 1DC signals that co$pletion with an output signal. 1 further signal causes the 1DC to output its data. Depending on the type of interface required% the 1DC has a parallel or serial data interface. 1n 1DC always wor-s in con,unction with a !oltage reference. This is a de&ice or circuit that $aintains a &ery precise and stable &oltage% and is based around a 5ener diode or a band)gap reference. The 1DC effecti&ely uses the &oltage reference as the ruler% with which it $easures the inco$ing &oltage. 1n 1DC is only as good as its &oltage reference. /or accurate 1)to)D con&ersion% a good 1DC $ust be used with a good reference. S!"n(l Cond! !on!n" A Am&l!.!c( !on (nd )!l e$!n" To $a-e best use of the 1DC% the input &oltage should tra&erse as $uch of its input range as possible% without e.ceeding it. Met $ost signal sources% say a $icrophone or ther$ocouple% produce &ery s$all &oltages. Therefore% in $any cases a$plification is needed to e.ploit the range to best effect. 9oltage le&el shifting $ay also be required% for e.a$ple if the signal source is bipolar while the 1DC input is unipolar (&oltage is positi&e only#. 2f the signal being con&erted is periodic% then a funda$ental require$ent of con&ersion is that the con&ersion rate $ust be at least twice the highest signal frequency. This is -nown as the ?yquist sa$pling criterion. 2f this criterion is not $et% then a deeply unpleasant for$ of signal corruption ta-es place% -nown as aliasing. 1nti)aliasing filtering $ay therefore be required to ensure that the ?yquist criterion is satisfied. T#e An(lo" Mul !&leBe$ 2f there are to be $ultiple inputs% then an analog $ultiple.er is used. The alternati&e% of $ultiple 1DCs% is both costly and space consu$ing. The $ultiple.er acts as a selector switch% choosing which input out of se&eral is connected to the 1DC at any one instant. The $ultiple.er is built around a set of se$iconductor
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switches. 2t is i$portant to -now that the se$iconductor switch is an i$perfect de&ice. 2n particular% when switched OonO% it has internal series resistance% which can range fro$ tens to thousands of oh$s. This can i$pact on the data acquisition process% as we shall see.

S(m&le (nd HoldC (nd AcDu!'! !on T!me =ecause $ost 1DCs are unable to con&ert accurately a changing &oltage% a sam"le and #old ('PH# circuit is often found. This ta-es a sa$ple of the &oltage% li-e a snapshot% and holds it steady for the duration of the con&ersion. 1 circuit of a si$ple but practical 'PH is shown in /igure 77.+. 1t its heart are ,ust a se$iconductor switch and a capacitor. ;hen the switch is closed% the capacitor charges up to the input &oltage V'. 1t this $o$ent% ideally V4 @ VC @ V'% as the buffer a$plifier ,ust has unity gain. ;hen the switch opens% the charge is left on the capacitor and VC (and hence V4# re$ains at a fi.ed &alue. 2n practice there is so$e lea-age fro$ the capacitor% so the output &oltage drifts. This circuit is so$eti$es also called trac$ and #old% as when the switch is closed the output &oltage follows% or trac-s% the input.

/igure 7. 1 si$ple for$ of sa$ple and hold circuit 4ne proble$ with this si$ple circuit is that there is ine&itably series resistance in the signal path. This is represented by the resistor in the circuit. ;hen the switch closes% therefore% the capacitor &oltage VC does not ta-e on the signal &oltage i$$ediately% but rises towards it e.ponentially. This is shown in /igure 7.

/igure *. 0.ploring acquisition ti$e (not to scale# 4ur interest fro$ a data acquisition point of &iew is to ensure that the &oltage has risen sufficiently close to its final &alue with the switch closed% before the switch is opened (the signal is then OheldO#% and a con&ersion allowed to start. The ti$e that VC (and hence V4# ta-es to reach a &alue dee$ed to be acceptable is called the acquisition time.
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Let us suppose that VC $ust rise to A" per cent of its final &alue% V' ".AV' e.p()t3RC# )t t @ V'W7 ) e.p()t3RC#X @ 7 ) ".A @ RC ln(".7# @ *.+RC.

This is shown in /igure *. 2t is% howe&er% an unde$anding require$ent. To ensure good accuracy in data con&ersion% the error introduced by this process should be less than the equi&alent of half of 7 L'=. Hence% for !)bit con&ersion% this i$plies that the acquired &oltage &alue VC $ust reach Y (:77 :7*%V'% or ".AA!"V'. /or 7")bit con&ersion it $ust be Y (*"4 *"4!#V'% or ".AAA:V'. /ollowing the calculation abo&e% but substituting the 7")bit &alue in% we get: ) t @ RC ln(7 *"4!# t @ .8RC. The resulting acquisition ti$es are shown in /igure *. 2t is clear that acquisition ti$e increases with increasing resistance% capacitance and with accuracy required. ;e will $eet practical application of this calculation later in the chapter. 2t is worth noting that the $ultiple.er circuit and 'PH circuit can be $erged into one% with the $ultiple.er switches for$ing the 'PH switch. This is co$$on practice. T!m!n" (nd M!c$o&$oce''o$ Con $ol Ssually% a data acquisition syste$ is under the control of a $icroprocessor or $icrocontroller. This can control the o&erall syste$ ti$ing% including which input is being selected% when the selected signal is sa$pled and when the con&ersion starts. The process of a single con&ersion can be represented as a flow diagra$% as shown in /igure +. Two $a,or ti$e require$ents need to be satisfied Z the acquisition ti$e (of the 'PH# and the con&ersion ti$e (of the 1DC#. 4nce the syste$ is initiali5ed% the $ultiple.er switch can be set. The 'PH can then start its sa$ple process. 1 period of ti$e equal to or greater than the required 'PH acquisition ti$e $ust elapse. The 1DC can

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then start its con&ersion. 1gain% this ta-es finite ti$e. The 1DC flags when it has co$pleted a con&ersion and the $icroprocessor can read the output data.

/igure +: Typical ti$ing require$ent of one 1)to)D con&ersion D( ( AcDu!'! !on !n #e M!c$ocon $olle$ En9!$onmen 0$bedded syste$s need 1DCs% so it is natural to e.pect to find an 1DC integrated onto a $icrocontroller as one of its peripherals. 2t is i$portant% howe&er% to realise that 1DCs and $icrocontrollers do not $a-e happy bedfellows. To operate to a good le&el of accuracy% an 1DC needs a quiet life (electronically spea-ing#% with e.cellent and clean power supply and ground% and freedo$ fro$ electro$agnetic interference. 1 $icrocontroller% on the other hand% being a digital de&ice% tends to corrupt its power supply and ground with a &oltage spi-e on e&ery switching edge. 1s a consequence% with all its intensi&e internal digital acti&ity% it radiates a s$og of local interference. Therefore% to integrate an 1DC onto a $icrocontroller is at best a co$pro$ise and high accuracy is not usually possible. Despite this% 1DCs are widely a&ailable in the $icrocontroller en&iron$ent% with $any $icrocontrollers ha&ing an on)chip 1DC. These are $ostly !) or 7")bit.
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TEMPERATURE MONITORING SYSTEM 1n electric heater is used to heat)up the te$perature of water in a tan- and the ai$ is to -eep the te$perature at the desired &alue. integrated circuit sensor (L6+:D[#. The sensor output is con&erted into digital for$ and is co$pared with a stored desired te$perature to for$ an error signal. 1 P2 and a P2D type controller algorith$s will be i$ple$ented by the $icrocontroller in order to achie&e the desired output. The output of the $icrocontroller is con&erted into analog for$ and this signal is used as an input to a dri&er circuit which pro&ides power to the heater ele$ent.

1 P2C78/!

type $icrocontroller is used in this pro,ect. The reason for using this also has a large $e$ory which is

$icrocontroller is because of its 13D con&erter input and also Pulse ;idth 6odulated (P;6# output% which is used to dri&e the heater ele$ent. P2C78/! needed to i$ple$ent floating)point arith$etic and the P2 or the P2D algorith$.
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1s shown in the figure% the water te$perature is sensed using an analog The te$perature sensor is connected to analog channel 1?" of the $icrocontroller. Pulse width $odulated output of the $icrocontroller (Pin CCP7# dri&es the gate input of a power 64'/0T transistor directly. The heater is connected to the drain input of the 64'/0T. 2t is i$portant to ensure that the 64'/0T transistor chosen can dissipate the required $a.i$u$ power. 2t $ay be necessary to $ount the transistor on a heat)sin- so that the required power can safely be dissipated without da$aging the transistor. 1n 2(L7""4 type power 64'/0T is used in this pro,ect. This transistor has a logic)le&el gate dri&e input and it can ha&e a $a.i$u$ continuous drain current of 7+"1. The $a.i$u$ power which can be dissipated by this transistor is *"" ;. The desired te$perature set point is hard)coded inside the control progra$.

MANIPULATOR ROBOT ARM

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The co$$on industrial $anipulator is often referred to as a robot ar$% with lin-s and ,oints described in si$ilar ter$s. 6anipulators which e$ulate the characteristics of a hu$an ar$ are called articulated ar$s. 1ll their ,oints are rotary (or re&olute#. 1 representati&e articulated $anipulators is the 1'01 robot.

The $otion of articulated robot ar$s differs fro$ the $otion of the hu$an ar$. ;hile robot ,oints ha&e fewer degrees of freedo$% they can $o&e through greater angles. /or e.a$ple% the elbow of an articulated robot can bend up or down whereas a person can only bend their elbow in one direction with respect to the straight ar$ position. 6any applications do not require ar$s with articulated (or re&olute# geo$etries. 'i$pler geo$etries in&ol&ing pris$atic or sliding ,oints are often adequate. Pris$atic and re&olute ,oints represent the opposite e.tre$es of a uni&ersal screw. 2n a re&olute ,oint% the screw pitch is 5ero% constraining the ,oint to pure rotation. 2n a pris$atic ,oint% the pitch is infinite% constraining the ,oint to pure sliding $otion. (e&olute ,oints are often preferred because of the strength% low friction and reliability of ball bearings. \oints that allow a co$bination of translation and rotation (such as lead screws# are not nor$ally used to ,oin the lin-s of robot ar$s. 6anipulators are grouped into classes according to the co$bination of ,oints used in their construction. 1 Cartesian geo$etry ar$ (so$eti$es called a gantry crane# uses only pris$atic ,oints% and can reach any position in its rectangular wor-space by Cartesian $otions of the lin-s. =y replacing the waist ,oint of a Cartesian ar$ with a re&olute ,oint% a cylindrical geo$etry ar$ is for$ed. This ar$ can reach any point in its cylindrical wor-space (a thic-)shelled cylinder# by a co$bination of rotation and translation. 2f the shoulder ,oint is also replaced by a re&olute ,oint% an ar$ with a polar geo$etry is for$ed. The wor-space of this ar$ is half a thic- spherical shell% and end effectors positions are best described with polar coordinates. /inally% replacing the elbow ,oint with a re&olute ,oint results in a re&olute geo$etry% or articulated ar$? The wor-space of an articulated ar$ is a rather co$ple. thic- walled spherical shell. The outside of the shell is a single sphere% but the inside is a set of intersecting spheres.

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2t includes the $icrocontroller board% the DC $otor asse$bly% so$e e.ternal gears% a position sensor% and an antialiasing filter. The $icrocontroller board consists of a -eypad% a LCD display% 13D and D31 con&erters% and the !":+: $icrocontroller. The $icrocontroller pro&ides *4 bits of digital 234% 4 counters3ti$ers% and 7" e.ternal interrupts. The $icrocontroller board is $anufactured by 061C 2nc.% which is located in Carbondale% 2L. 1 potentio$eter is used for the position sensor. The pot ar$ is connected to the robot ar$ &ia a 7:7 gear. 1 &oltage supply of >3) : &olts is used for the pot so that the ar$ position of 5ero degrees corresponds to 5ero &olts. This feedbac- &oltage which will consist of power supply noise is filtered with a capacitor as the antialiasing filter. The co$bination of the potentio$eter resistance and the capacitor is a low)pass filter. The power a$plifier% DC $otor% gear train% potentio$eter% and the antialiasing filter is part of a syste$ $anufactured by Kuanser Consulting.

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