Birla Institute of Technology & Science, Pilani Work-Integrated Learning Programmes Division Second Semester !"#- !

"$ %ourse &andout %ourse 'o( %ourse Title Instructor : IS )%#*# : %om+uter ,rgani-ation & .rchitecture / 0eeta Patil

%ourse Descri+tion Overview of logic design; Instruction set architecture; Assembly language programming; Pipelining; Computer Arithmetic; Control unit; Memory hierarchy; Virtual Memory; Input and output systems; Interrupts and e ception handling; Implementation issues; Case !tudies" Sco+e and ,12ectives

Introduction to Computer Organi#ation $ MIP! I!A and data path design for !ingle Cycle architecture % Programming with MIP!& MIP! Address modes: ' $ type& I $ type and ( $ type& !ingle Cycle )ata path design for a sub set of MIP! I!A; MIP! I!A and data path design for Multi% Cycle and pipelined architectures; )'AM % Memory hierarchy& Memory interleaving& *volution; Cache Memory $ Mapping functions: )irect mapped& !et Associative and +ully Associative; Cache Misses $ Compulsory& Conflict and Capacity misses& 'eplacement Algorithms; Optimi#ation of Cache performance and Inter connection structures; Advance concepts in Computer Organi#ation $ Instruction%level parallelism and !uperscalar Processors& Parallel Processing& Multi Core Architectures"
Prescri1ed Te3t Books ,-" ,1" !tallings .illiam& Computer Organisation / Architecture& Pearson *ducation& 0 th *d"& 12-2" 3ennenssy / )"A" Patterson& Computer Organi#ation / )esign& Morgan 4aufmann 5th *d"& 1226

4eference Books '-" C 3amacher& 7 Vranesic and ! 7a8y& Computer Organi#ation by Mc9raw3ill& :th *d" 1221

'1"

!amir Palnit8ar& ;Verilog 3)<: A 9uide to )igital )esign and !ynthesis=& Pearson *ducation& 122>"

.ccess to La1 4esources / '>" '5" <ab !heets : Visit ,a ila 3ome Page for access information"

<ab !erver ? !ource to !oftwares : Model!im P* !tudent *dition is intended for use by students in pursuit of their academic coursewor8 and basic educational pro@ects" I can be downloaded for free from http:??www"mentor"com?company?higherAed?modelsim%student% edition

IS )%#*#

5%ourse &andout6

Second Semester !"#- !"$

Page

Plan of Self Study

S('o(

To+ics Computer Organi#ation vs" Computer Architecture& !tructure and +unctions of various components of a computer system& 3istory of Computers& IntelBs 02 0C Architecture and Organi#ation& Computer Performance parameters and assessment ,op level view of computer function& Instruction fetch and e ecution& Interrupts and I?O functions& Interconnection of various components of a computer system& Fus !tructure and Fus design principles Ge"g" PCI FusH Arithmetic and <ogic Init& )ata 'epresentation% Integer / +loating Point 'epresentation GI***%J:5H and Arithmetic Operations& Addition& !ubtraction& Multiplication& FoothBs Multiplication Algorithm& Arithmetic Operation on floating point data"

Learning ,12ectives ,o understand the various sub systems& their functionality& and performance measurement metrics of a computer system" ,o understand the organi#ational and architectural aspects of a computer system with an e ample of 02 0C" ,o understand the top level view of a computer system and information?data flow among various components" 3ow Fuses provide a path to data flow among various components of a computer system with an e ample of standard Fus structures" ,o understand how the data is represented inside a computer" 3ow A<I is designed to perform basic Arithmetic and <ogic operations on the data"

4eference to Te3t1ook

2-

,- Ch"- D-"-& -"1E ,- Ch"1 D1"-&1"1&1">&1":E

21

,- Ch"> D>-"%>":E

2>%2C

,- Ch"6 D6"-%6":E

2J

Assessing and Inderstanding Performance evaluation Programming with MIP! MIP! Address modes: ' $ type& I $ type and ( % type
4evie7 Session

,o understand how to measure& report and summari#e performance and describe the ma@or factors that determine the performance of computer ,o understand MIP! instruction set architecture

,1 Ch" 5

20 26

,1 Ch" :"-%:"1

Syllabus for Mid-Semester Test (Closed Book): Topics in S. No. 1 to -2%-1 ->%-5

!ingle Cycle )ata path design for a sub set of MIP! I!A MIP! I!A and data path design for Multi%cycle architecture MIP! I!A and data path design for Pipelined

,o understand MIP! data path design for each instruction in !ingle Cycle architecture" ,o understand MIP! data path design for each instruction in Multi Cycle and Pipelined architecture"

,1 Ch" :"> $ :"5 ,1 Ch" :": $ :"6 ,1 Ch" C"- $ C"C

architecture
Computer Memory !ystem Overview& Memory hierarchy& Cache Memory Organi#ation and )esign& Performance measurement of two level memory system" !emiconductor Main Memory G'AM& 'OM& P'OM& *P'OM etc"H& * ternal Memory GMagnetic )is8& Magnetic ,ape& Optical MemoryH& 'AI) ,o understand the memory hierarchy of a computer system" ,oo gain the 8nowledge of different types of memory and their characteristics Ge"g" cost& si#e& design& access speed& organi#ation etc"H used in a typical computer

,- Ch"5 D5"-%5"5E

,1 Ch" J"5 $ J"6

,- Ch": D:"-%:">E ,1 Ch" J"- $ J"> ,- Ch"C DC"-%C"5E

-:%-J

-0

4evie7 Session Syllabus for Compre!ensi"e #$am (%pen Book): &ll topics 'i"en in (lan of Self Study

Programming La1s/
<abs will be based on 02 0C Assembly programming using MA!M GMicrosoft AssemblerH" <ab K ,opic <earning Ob@ective -" .hat is Verilog 3)<L iH 9etting started with 3)< programming using

3ow to open / compile the programL

Modelsim !imulator ii6 Inderstand basic Verilog language primitives Ge"g" module& data types& identifiers& vectors& registers& 8eywords etc"H

1"

9ate level modelling

i6 9etting familiar with gate level modelling ii6 )esign and simulate combinational logic circuits using gate level modeling i6 9etting familiar with )ataflow modelling ii6 )esign and simulate combinational logic circuits using )ataflow modeling i6 9etting familiar with Fehavioral modelling ii6 )esign and simulate combinational logic circuits using behavioral modeling

>"

)ata +low Modelling

5"

Fehavioral Modeling

:"

)esign of 5 bit ripple counter .riting simple programs using Verilog And )esign of 0 function A<I Note: )ab s!eet on eac! topic *ill be pro"ided separately *it! sol"ed and unsol"ed pro'rammin' e$ercises.

IS )%#*#

5%ourse &andout6

Second Semester !"#- !"$

Page $

8valuation Scheme/ 8% 'o( 8%-" 8%8%-# 8valuation %om+onent & Ty+e of 83amination Assignment?Mui# Mid%!emester ,est 5%losed Book69 Comprehensive * am 5,+en Book69 Duration NN )etails to be announced on <M! ,a ila website by Instructor 1 3ours > 3ours Weightage -:O >:O :2O +ay, +ate, Session,Time NN )etails to be announced on <M! ,a ila website by Instructor !unday& -C?21?12-5 G+PHN -2 AM $ -1 Poon !unday& 2C?25?12-5 G+PHN 6 AM $ -1 Poon

99 (lease c!eck t!e details by -anuary 1., /.10 on )MS Ta$ila *eb site. .'/ AfterPoon !ession: ;'/ +orePoon !ession %losed Book Test/ Po reference material of any 8ind will be permitted inside the e am hall" ,+en Book 83am/ Ise of any printed ? written reference material Gboo8s and noteboo8sH will be permitted inside the e am hall" <oose sheets of paper will not be permitted" Computers of any 8ind will not be allowed inside the e am hall" Ise of calculators will be allowed in all e ams" Po e change of any material will be allowed"

'ote/ It shall be the responsibility of the individual student to be regular in maintaining the self study schedule as given in the course handout& attend the online?on demand lectures as per details that would be put up in the BITS L<S Ta3ila website 777(ta3ila(1its-+ilani(ac(in and ta8e all the prescribed components of the evaluation such as Assignment 5%ourse Page on L<S Ta3ila6, Mid !emester ,est and Comprehensive * amination according to the *valuation !cheme given in the respective Course 3andout" If the student is unable to appear for the 'egular ,est?* amination due to genuine e igencies& the student must refer to the procedure for applying for Ma8e%up ,est?* amination& which will be available through the Important Information lin8 on the BITS L<S Ta3ila website 777(ta3ila(1its-+ilani(ac(in on the date of the 'egular ,est?* amination" ,he Ma8e%up ,ests?* ams will be conducted only at selected e am centres on the dates to be announced later" Instructor-in-%harge