NATIONAL POWER ELECTRONICS CONFERENCE (NPEC 10)

POWER FACTOR IMPROVEMENT OF CASCADED BUCK BOOST CONVERTER

Majid Jamil Zahra Mehdi Department of Electrical Engineering Jamia Millia Islamia University, New Delhi-25

ABSTRACT Conventionally the AC DC conversion is done by making use of full wave bridge rectifier and a capacitor filter at the output to absorb the input power pulsation thereby reducing the ripple in the output voltage. But this conventional technique does not take account of the input power factor which must be high. Low power factor reduces the power available from utility grid. An ideal power factor corrector must have a resistor on the supply side and at the same time it should maintain fairly regulated output voltage. The objective of the present work is to design the proposed two switch cascaded BuckBoost converter with high power factor, low voltage stresses, low switch losses and with the ability to set the output voltage arbitrarily. Firstly, this paper describes the modes of operations of the proposed converter. Secondly, average current control technique is applied to the cascaded Buck-Boost converter for power factor correction. Key words: Power factor correction, BuckBoost, AC-DC converter, PSPICE

INTRODUCTION There are various types of converters which can be applied to power factor correction (PFC) such as canonical switching cell (CSC), CUK converter, Zeta converter [1]. The CSC converter is the main block for all high frequency switching converters. It is found that the CSC converter has minimum components and it is reasonable. The CSC converter is suitable for single phase rectifier circuit with power factor correction. It is shown that CSC converter is suitable for this application because of its high input impedance and low output impedance [1]. For large capacity applications SEPIC and ZETA converters are used. However, these converters do not take into account the output voltage regulation, component stresses, second harmonics of line frequency which leads to distortion of output voltage and the interference due to commutation noises. Reference [2] describes piecewise broken line approximation method implementation in stability analysis of bidirectional Buck/Boost converters cascaded system. This method simplifies the closed loop output and input impedance of the converters. Some of the main factors providing output voltage stabilization for Boost PFC circuit with 100HZ switching frequency is described in reference [3]. However there is no provision for wide variation of output voltage. 1

NATIONAL POWER ELECTRONICS CONFERENCE (NPEC 10) This paper describes the average current control technique applied to cascaded Buck-Boost converter. In this technique there are two loops attached to the BuckBoost converter. The inner loop is the current loop which has a current error amplifier. The current error amplifier will improve the power factor of the circuit by comparing the input current with sinusoidal current reference. The outer loop has two main functions to serve. Firstly, the voltage error amplifier of the outer loop will regulate the output voltage and secondly it minimizes the distortion. The proposed two switch converter together with the power factor correction circuit can be applied to a single phase power factor correction. The Boost converter is a conventional PFC (power factor correction) circuit, since its input current can be programmed to follow the input voltage. The basic requirement of Boost converter is that the output voltage must be higher than the input voltage. This condition limits its application for wide range of output voltage. Thus, when cascaded Buck-Boost converter is used then higher power factor can be obtained together with wide range control of output voltage. The two switch topology as in the proposed converter offers higher efficiency, reduced component stresses and ability to arbitrarily choose the dc output voltage. Moreover, the proposed converter will have lower voltage stresses on the components as compared to conventional single switch Boost converter. PROPOSED TWO SWITCH BUCKBOOST CONVERTER
S1 Lf D2

D1

S2

Co

Fig.1 Proposed two switch Buck-Boost converter Figure (1) shows the proposed converter without the power factor correction circuit. This converter will work as Buck or Boost converter depending upon the input output conditions. When the converter works as Boost converter then switch S1 of the Buck cell is always ON. On the other hand when the converter works as Buck converter then diode D2 of the Boost cell is ON. The proposed converter has lower stresses on the switches and on the components as the switches are operated only twice in each mode of operation. OPERATING MODES OF BUCK-BOOST CONVERTER Figure (2) shows the operating modes of the Buck-Boost converter. Each mode has two sequences of operation. Fig. 2(a), 2(b) shows sequence 1 and 2 of Boost mode. In sequence 1 switch S2 is ON and in sequence 2 switch S2 is OFF. Taking inductor current IL and capacitor voltage VC as state variables, the state equations for sequence 1 are derived as follows

And ...................(2) State equations for sequence 2 (Boost mode) are derived as

NATIONAL POWER ELECTRONICS CONFERENCE (NPEC 10)

...................(3) And ...................(4) Buck operation mode has two sequences of operation, sequence 3 and sequence 4 depending upon the state of switch S1. In sequence 3 switch S1 is ON and D1 is OFF. The state equations can be derived as follows ...................(5) And

S1

Lf

D2

D1

S2

Co

Figure 2(c) Sequence 3, switch S1 is ON

S1 Lf D2

D1

S2

Co

Figure 2(d) Sequence 4, switch S1 is OFF ...................(6) ......(7) In sequence 4, the switch S1 is OFF and D1 is ON. State equations are ...................(8) ...................(9) PROPOSED TWO SWITCH BUCKBOOST POWER FACTOR CORRECTION CIRCUIT Average current control technique is applied to the cascaded Buck-Boost converter for power factor improvement as shown in figure 3. A diode rectifier effects the AC to DC conversion and a multiplier is used to generate the reference current signal (Iref). Signal A represents the waveform of rectified input voltage. Signal B is the output signal of the voltage error amplifier of the feed back loop. Signal C is the output signal of the feed forward circuit. In the technique shown in figure 3, the input current is sensed by using current sensing scheme. The input current sensing is required as the proposed converter has two operating modes, so the current has to be sensed and controlled in both the modes. Charge average current sensing scheme is used in this technique in which average input current is determined by integrating the real input current over one switching cycle. Next, the input current sensing signal Vx is compared with the current reference signal Iref. Based upon the output of the 3

S1

Lf

D2

D1

S2

Co

Figure 2(a) Sequence 1, switch S2 is ON

S1 Lf D2

D1

S2

Co

Figure 2(b) Sequence 2, switch S2 is OFF

NATIONAL POWER ELECTRONICS CONFERENCE (NPEC 10) current error amplifier, two driving signals are generated by using PWM generators for the two main active switches. These switches (S1, S2) will operate in such a manner so as to properly shape the input current in accordance with its reference. The outer loop has voltage error amplifier which is used for the purpose of voltage regulation. The basic requirement of the outer voltage loop is to minimize the input distortion for which the voltage loop should have a small bandwidth. This helps to attenuate second harmonics of the line frequency.
S1 Lf

In the proposed technique, the converter works in continuous inductor current mode (CICM) which will reduce the input filter requirements. Average current control technique offers certain advantages such as, constant switching frequency, control is less sensitive to commutation noises due to current filtering. Above all the overall circuit is simple and cost effective.

D2

Vo

Vin D1

S2

Co

Dbuck

Iref C

Dboost

Current Sensing Scheme

Vx 1/K

PWM GENERATORS

VEA

multiplier section

Figure (3) Buck- Boost power factor correction circuit

Vin

S1

Lf

D2

D1

S2

Co

6V 3V

Vx 1/K Iref C A multiplier section B

Vc

3V 0V

VEA

Figure (4) Proposed PFC PWM Generator Circuit

NATIONAL POWER ELECTRONICS CONFERENCE (NPEC 10) converter which is regulated. Similarly figure 6(c) shows that input voltage and current are in same phase in Boost mode. Figure 6(d) the regulated output voltage (V = 200V). Thus, with average current control technique applied to cascaded two switch Buck-Boost converter, the input current comes in phase with the input voltage which improves the power factor. The technique is simulated by using very convenient soft ware package called PSPICE.
200

V0

-200 0s

20ms

40ms Time

60ms

80ms

100ms

Figure 6(a)

Figure 5(a) & 5(b) PWM output waveforms

60V

BUCK BOOST PFC PWM GENERATORS There are two main active switches in the proposed converter. The driving signals of the two switches are generated by using pulse width modulation generators. Figure (4) shows the schematic of the current compensator and the PWM generators. Vx is the output of the average current sensing circuit. The compensator output Vc is compared with two ramps to create the buck duty cycle and boost cycle. The two ramps have the same shape but the different dc bias so that buck duty cycle is one while the boost switch is switching, and the boost duty cycle is zero when the buck switch is running. Figure 5(a) and 5(b) shows PWM output waveforms in the Buck and Boost modes. SIMULATION RESULTS Figure (6) shows the simulation results for the proposed converter for both the modes. Input voltage of the converter is 220V and peak to peak voltage is 440V. Figure 6(a) shows that the input voltage and current are in same phase in Buck mode. Figure 6(b) shows the output voltage (V = 50V) of the proposed 5

40V 20V 0V 0s 4ms 8ms 12ms Time 16ms 20ms 24ms 28ms

Figure 6(b)

400

VV0
-400 0s 20ms 40ms Time 60ms 80ms 100ms

Figure 6(c)

398 200 V 0

-200 0.2ms 4.0ms 8.0ms Time 12.0ms 16.0ms 20.0ms

Figure 6(d)

CONCLUSIONS Power factor correction of cascaded BuckBoost converter is done by using average

NATIONAL POWER ELECTRONICS CONFERENCE (NPEC 10) current control technique. The inner loop has a current error amplifier which improves the power factor by properly shaping the input current in accordance with its reference. This reference signal is always synchronized and proportional to the line voltage hence the input current comes in phase with the input voltage. Thus by improving the power factor maximum active power can be delivered to the load. The voltage loop is being controlled by the voltage error amplifier and the multiplier. Voltage regulation is done by the voltage error amplifier and input distortion is minimized by the voltage loop. REFRENCES 1. K.Matsui, I.Yamamoto, T.Kishi, M.Hasegava, A Comparison Of Various Buck-Boost Converters And Their Application To PFC, IEEE Trans Power Electronics,VoI 50, July. 2002, pp30-36. 2. Haw Wang, Jinjun Liu And Dan Hou, Piecewise Broken Line Approximation Method Implementation In Stability Analysis Of Bidirectional Buck/Boost Converters Cascaded System,IEEE Trans Power Electronics, Vol 75, July 2009, pp1317-1322 3. Leopoldo Rossetto, Giorgio Spiazzi And Paolo Tenti, Boost PFC With 100-Hz Switching Frequency Providing Output Voltage Stabilization And Compliance With EMC Standards, IEEE Trans Power Electronics,Vol 60,July 2004,pp931938. 4. L.Rossetto, G.Spiazzy, and P.Tenti "Control Techniques for Power factor correction converters. IEEE Trans.Indu.Elect., Vol 49, Jan 2002, pp 642-651. 5. Positive to negative Buck-Boost converter using LM267X simple switcher regulator, national 6 semiconductor application note 1157, November 2000. 6. Micah Ortuzar, Juan Dixon And Jorge Moreno, Design,Construction And Performance of A Buck-Boost Converter for An Ultra capacitorBased Auxiliary Energy System for Electric Vehicles, IEEE Trans Power Electronics, Vol 55,Oct. 2003, pp2889-2894.