When IOS was first developed, there was only one switching method, known today a

s process switching.
Process switching
Fast switching
Autonomous switching
Silicon switching engine (SSE) switching
Optimum switching
Distributed fast switching
Cisco Express Forwarding (CEF)
Distributed Cisco Express Forwarding (dCEF)
Process Switching:
- It consume large amounts of CPU time.
- provides some traffic load sharing capabilities not found in most of the other
switching methods. ie., It has per-packet load sharing capability.
- This begins with the network interface on the router sensing there is a packet
on the wire that needs to be processed.
Step1: The interface hardware receives the packet and transfers it into input/
output (I/O) memory.

Step2: The network interface interrupts the main processor, telling it there i
s a received packet waiting in I/O memory that needs to be processed; this is ca
lled the receive interrupt. The IOS interrupt software inspects the packet's hea
der information (encapsulation type, network layer header, and so on), determine
s that it is an IP packet, and places the packet on the input queue for the appr
opriate switching process.
Note: For IP packets, the switching process is named ip_input.

Step3: Once the packet is in the input queue of the ip_input process, ip_input
(switching process) becomes eligible to run.

Step4: The actual packet-forwarding operation will begin. ip_input looks in th
e routing table to see whether a route exists to the destination IP address. If
one is found, it retrieves the address of the next hop. The ip_input process bui
lds a new MAC header with the help of ARP cache, writing over the old one in the
input packet.

Step5: Finally, the packet is queued for transmission out the outbound network
interface.

Step6: When the outbound interface hardware senses a packet waiting for output
, it dequeues the packet from I/O memory and transmits it on to the network.

Step7: After the outbound interface hardware finishes transmitting the packet,
it interrupts the main processor to indicate that the packet has been transmitt
ed. IOS then updates its outbound packet counters and frees the space in I/O mem
ory formerly occupied by the packet.

Disadvantages:
- a key disadvantage of process switching is its speed. It requires a routing ta
ble lookup for every packet. As the size of the routing table grows, so does the
time required to perform a lookup. Recursive routes consumes more length of loo
kup time.
Looking back at the IP process switching example, the ip_input process needs thr
ee key pieces of data to switch the packet:
Reachability
Is this destination reachable? If so, what is the IP network address of the next
hop toward this destination? This data is in the routing table (also called the
forwarding table).
Interface
Which interface should this packet be transmitted on to reach its destination? T
his data is also stored in the routing table.
MAC layer header
What MAC header needs to be placed on the packet to correctly address the next h
op? MAC header data comes from the ARP table for IP or other mapping tables, suc
h as the Frame Relay map table.
Fast Switching: Caching to the Rescue
- caching means storing some frequently used data with very fast access properti
es.
- Fast switching keeps a copy of the reachability/interface/MAC-header combinati
ons learned while process switching packets.
- Unlike process switching, fast switching does not support load sharing on a pe
r-packet basis. Load sharing occurs based strictly on the destination address.
- Fast Cache is accessed using a hash table in earlier releases, and is accessed
via a two-way radix tree in later releases.
Step1: Consider the process switching method againonly this time the newly buil
t Fast Cache is introduced. Again, the switching process begins with the interfa
ce hardware sensing there is a packet on the wire. It receives the packet and tr
ansfers it to I/O memory

Step2: interface hardware tells the main processor about the new packet.

Step3: Now, instead of placing the packet in the input queue for ip_input as b
efore, the interrupt software consults the Fast Cache directly to determine whet
her an outbound interface and a MAC header have been cached for this destination
. If there's one, the interrupt software reads the MAC header from the entry and
writes it into the packet. It also reads a pointer to the appropriate outbound
interface from the cache entry

Step4: The main processor then notifies the outbound interface hardware that a
packet in I/O memory is ready to transmit and dismisses the interrupt so other
processes can continue.

Step5: The interface hardware dequeues the packet from I/O memory and transmit
s.

Step6: outbound interface hardware then interrupts the main processor to updat
e its counters and release the I/O memory

Thus, fast switching introduced the concept of "route once, forward many times."
But This lack of a deterministic load-balancing scheme is an area of concern fo
r many network designers. In response, newer switching methods now support load-
balancing schemes that help overcome this problem. One such method, Cisco Expres
s Forwarding (CEF).

Optimum Switching:
- Optimum switching is essentially fast switching with some caching optimization
s.The primary difference between optimum and fast switching is in the way the ro
ute cache is accessed. Unlike fast switching, optimum switching is available onl
y for the IP protocol. The optimum cache is accessed via a 256-way multiway tree
(mtree)

Cisco Express Forwarding:
Cisco Express Forwarding (CEF) is the newest, and fastest, switching method avai
lable in IOS. CEF was invented to help overcome the major deficiencies of the fa
st switching method. Reviewing the description of fast switching for a moment, t
he major deficiencies noted were:
Lack of support for overlapping cache entries.
Any change in the routing table or ARP cache results in the invalidation of larg
e sections of the route cache, because there is little or no correlation between
the route cache and the tables on which the cache is based.
The first packet to any given destination must be process switched to build a ro
ute cache entry.
Inefficient load balancing in some situations (primarily in cases where many hos
ts are transacting with one server).

CEF builds its own structures that mirror the entire routing and MAC address tab
les,
CEF table
Adjacency table
CEF Table: The CEF table is a "stripped-down" version of the routing table, impl
emented as a 256-way mtrie data structure for optimum retrieval performance.
Adjacency Table: The adjacency table contains the MAC-layer packet-header data f
or directly connected next hops.
There are several types of adjacency entries you might see in the Address column
of show adjacency:
Cached adjacency A prebuilt MAC header for the next hop toward this destination.
Punt Packets destined to this address must be passed up to the next switching pat
h to be switched.
Host-route This destination is a directly connected host.
Drop Packets destined to this address are dropped.
Incomplete The MAC-layer header for this destination is incomplete; typically, th
is means the ARP cache entry for this destination is incomplete or otherwise mal
formed.
Glean This is a directly attached destination, but there is no pre-built MAC-laye
r header; an ARP request needs to be sent so a MAC-layer header can be built.
While fast switching requires the first packet to any given destination be proce
ss switched to build a cache entry, CEF does not. Instead, the CEF table is buil
t directly from the routing table and the adjacency table is built directly from
the ARP cache. These CEF structures are built before any packets are switched.
Entries in the CEF structures never age out. Any changes in the routing table or
the ARP cache can be easily reflected in the CEF structures. Also, with CEF the
re is no longer any need to invalidate a large number of entries when the routin
g table or the ARP cache change.
Traffic load sharing with CEF switching can be either per source/destination pai
r (the default)--> Also called as per flow or per packet.
Summary:
Process switching doesn't cache any information, and switches packets in the con
text of a process.
Fast switching caches reachability information and the MAC headers needed to for
ward packets in a radix tree and switches packets during interrupts.
Optimum switching caches reachability and the MAC headers in a multiway tree (mt
ree), and switches packets during interrupts.
CEF switching caches reachability information in an mtrie, and the MAC headers n
eeded to forward packets within an adjacency table. CEF switches packets during
interrupts.