Verilog A

Example: Gain block definition:

include disciplines.vams
module gain_block(in,out);
input in;
output out;
electrical in,out;
parameter real gain=10.0;

analog
v(out) <+ V(in)*gain; // It defines the relationship between the in and out ports
endmodule

v(out) <+ v(in)*gain;
v(out)<+1.0;

is same as

v(out)<+ v(in)*gain + 1.0;

The v() function is called the Access function
Access functions may have 1 or 2 arguments each of which must refer to a port or an internal
node
If v() is defined with two arguments ,it takes the potential difference between 2 nodes
Eg: V(a,b)
If v() is supplied with only 1 node, it takes the potential difference between that node and the
ground
The access function I() access the current flowing between its 2 nodes. If only 1 node is supplied
it takes the current flowing between that node and ground
The access functions V() and I() are defined by the electrical discipline contained within the
disciplines.vams file
Keyword Parameter is used to define the constants
Parameter real gain=10.0 defines the variable gain as 10.0
This value can be edited at the netlist level
electrical in, out; In this case both the ports are defined using electrical discipline
Other disciplines include: thermal, mechanical and rotational. All these disciplines are included
in disciplines.vams file which is included using include disciplines.vams


Resistor Verilog A program:
include disciplines.vams
module va_resistor(a,b);
parameter real resistance= 1000.0 from (0.0:inf];
electrical a,b;
analog
I(a,b)<+ V(a,b)/Resistance;
Endmodule

We might get an error if the resitance is Zero, inorder to avoid that

include disciplines.vams
Module va_resistor(a,b);
Parameter real resistance=1000.0;
Electrical a,b;
Analog
Begin
If(resistance!=0)
I(a,b)<+V(a,b)/resistance;
Else
V(a,b)<+0;
End
Endmodule

localparam cannot be changed by the user
local parameters are constant, they cannot be altered by the user
eg: localparam real band= (vhigh-vlow)*soft;
Parameters can be limited by maximum and minimum values
Soft=0.1 from (0:1.0) ; it takes values between 0 to 1, but excludes 0 and 1 ) exclusive
Soft=0.1 from (0:1.0]; it takes all values between 0 and 1, including 1; ] inclusive
Multiple statements must have begin and end statements











Capacitor VeilogA Program:
include disciplines.vams
module va_capacitor(a,b);
parameter real capacitance=1n;
electrical a,b;
analog
I(a,b)<+capacitance*ddt(V(a,b)); // I=c*(dv/dt)
endmodule
Constants.vams file includes all Mathematical Constants
Eg: w=2*pi*f; // w=2.0*M_PI*f

Digital AND gate deifinition:

include disciplines.vams
module and_gate(in1,in2,out);
electrical in1,in2,out;
parameter real digThresh=2.0;
digOutHigh=5.0;
digOutLow=0;
trise=10n;
tfall=10n;