Direct Current Hybrid Breakers

DIRECT CURRENT HYBRID BREAKERS:
A DESIGN AND ITS REALIZATION
Cover: The Hindu temple in Lake Bratan, Bali, Indonesia.

PROEFSCHRIFT
ter verkrijging van de graad van doctor aan de
Technische Universiteit Eindhoven, op gezag van de
Rector Magnificus, prof.dr. M. Rem, voor een
commisie aangewezen door het College voor
Promoties in het openbaar te verdedigen
op donderdag 4 Mei 2000 om 16.00 uur
door
Ali Mahfudz Surya Atmadji

geboren te Semarang, IndonesiN
Dit proefschrift is goedgekeurd door de promotoren:
prof. ir G.C. Damstra

en
prof. dr.-ing. H. Rijanto
CIP-DATA LIBRARY TECHNISCHE UNIVERSITEIT EINDHOVEN

Atmadji, Ali M.S.
Direct current hybrid breakers : A design and its realization / by Ali
M.S. Atmadji. - Eindhoven : Technische Universiteit Eindhoven, 2000.
Proefschrift. - ISBN 90-386-1740-2
NUGI 832
Trefw.: kortsluitingsbeveiliging / kortsluitstromen /
vacuumschakelaars / elektrische schakelaars.
Subject headings: current limiters / short-circuit currents /
vacuum circuit breakers / switchgear testing.
Copyright 2000 by A.M.S. Atmadji, Departement of Electrical Engineering, Eindhoven
University of Technology, Eindhoven, The Netherlands.
iv
Do not believe in anything simply because you have heard it. Do not
believe in anything simply because it is spoken and rumored by many. Do
not believe in anything simply because it is found written in your religious
books. Do not believe in anything merely on the authority of your teachers
and elders. Do not believe in traditions because they have been handed
down for many generations. But after observation and analysis, when you
find that anything agrees with reason and is conducive to the good and
benefit of one and all, then accept it and live up to it.
Buddha
To my parents
Samoeri and Koestiwati
Summary
The use of semiconductors for electric power circuit breakers instead of conventional breakers
remains a utopia when designing fault current interrupters for high power networks. The major
problems concerning power semiconductor circuit breakers are the excessive heat losses and their
sensitivity to transients. However, conventional breakers are capable of dealing with such matters. A
combination of the two methods, or so-called hybrid breakers, would appear to be a solution;
however, hybrid breakers use separate parallel branches for conducting the main current and
interrupting the short-circuit current. Such breakers are intended for protecting direct current (DC)
traction systems. In this thesis hybrid switching techniques for current limitation and purely solidstate current interruption are investigated for DC breakers.
This work analyzes the transient behavior of hybrid breakers and compares their operations with
conventional breakers and similar solid-state devices in DC systems. Therefore a hybrid breaker was
constructed and tested in a specially designed high power test circuit. A vacuum breaker was chosen
as the main breaker in the main conducting path; then a commutation path was connected across the
vacuum breaker where it provided current limitation and interruption. The commutation path
operated only during any current interruption and the process required additional circuits. These
included a certain energy storage, overvoltage suppressor and commutation switch. So that when
discharging this energy, a controlled counter-current injection could be produced. That countercurrent opposed the main current in the breaker by superposition in order to create a forced currentzero. One-stage and two-stage commutation circuits have been treated extensively.
This study project contains both theoretical and experimental investigations. A direct current shortcircuit source was constructed capable of delivering power equivalent to a fault. It supplied a direct
voltage of 1kVDC which was rectified having been obtained from a 3-phase 10kV/380V supply. The
source was successfully tested to deliver a fault current of 7kA with a time constant of 5ms. The
hybrid breaker that was developed could provide protection for 750VDC traction systems. The
breaker was equipped with a fault-recognizing circuit based on a current level triggering. An
electronic circuit was built for this need and was included in the system. It monitored the system
continuously and took action by generating trip signals when a fault was recognized. Interruption
was followed by a suitable timing of the fast contact separation in the main breaker and the currentzero creation. An electrodynamically driven mechanism was successfully tested having a dead-time
of 300:s to separate the main breaker contacts. Furthermore, a maximum peak current injection of
3kA at a frequency of 500Hz could be obtained in order to produce an artificial current-zero in the
vacuum breaker. A successful current interruption with a prospective value of 5kA was achieved by
the hybrid switching technique. In addition, measures were taken to prevent overvoltages.
Experimentally, the concept of a hybrid breaker was compared with the functioning of all
mechanical (air breaker) and all electronical (IGCT breaker) versions. Although a single stage
interrupting method was verified experimentally, two two-stage interrupting methods were analyzed
theoretically.
vi
Samenvatting
Het gebruik van halfgeleider schakelaars om conventionele schakelaars te vervangen blijft een
utopia voor de foutstroom onderbreking in elektrische netten. Voor de halfgeleider
stroomonderbrekers zijn er beperkingen zoals het grote warmte verlies en de gevoeligheid voor
transienten waar conventionele schakelaars juist heel goed tegen bestand zijn. Samenstellingen van
beide soorten schakelaars noemt men hybride schakelaars. Hybride schakelaars maken gebruik van
twee afzonderlijke paden; voor de doorgaande nominale stroom en voor de foutstroom
onderbreking. Zulke schakelaars zijn grotendeels bedoeld voor de beveiliging van tractiesystemen.
In dit proefschrift zijn hybride technieken voor de stroombegrenzing en volledige halfgeleider
stroomonderbreking behandeld voornamelijk in gelijkstroom circuits.
In dit werk wordt een analyse gepresenteerd van het transient gedrag van hybride schakelaars en
worden hun functies vergeleken met conventionele en halfgeleider schakelaars. Een ontwerp voor
een hybride schakelaar is gerealiseerd en beproefd in een hiertoe opgebouwd gelijkstroom test
circuit. Een vacuum schakelaar is gekozen als de hoofdschakelaar in het hoofdpad. Hieraan parallel
is een commutatie pad aangebracht dat voorziet in stroombegrenzing en stroomonderbreking. Het
commutatie pad wordt alleen gedurende een stroomonderbreking bedreven om de commutatie van
de hoofdstroom mogelijk te maken. Het commutatie proces vereist componenten voor het opslaan
van energie en het onderdrukken van overspanningen. Door het vrijgeven van opgeslagen energie
kan een gecontroleerde tegenstroom injectie worden bewerkstelligd. Deze tegenstroom forceert een
stroom nuldoorgang in het hoofdpad. Een en twee-trap commutatie circuits zijn vergeleken.
Het onderzoek bevat zowel theoretisch als experimenteel werk. Een gelijkstroom circuit is gebouwd
om de kortsluitstroom te leveren van 7kA met een tijdkonstant 5ms. De bron heeft een nominale
spanning van 1kVDC door gelijkrichting van twee distributie transformatoren (10kV/380V). Het
ontwerp van de hybride schakelaar is gericht op toepassing voor het beveiligen van 750VDC tractie
systemen. De schakelaar is uitgerust met een foutdetectiesysteem gebaseerd op een stroomlevel trip.
De stroom in het circuit wordt bewaakt waarbij uitschakel commando gegenereerd wordt zodra de
stroom in het circuit de ingestelde waarde overschrijdt. Het feitelijke onderbrekingsproces wordt
bepaald door de snelheid van contactscheiding in de vacuum schakelaar en het creNren van de
benodigde nuldoorgang. Een snelle contactscheiding na ongeveer 300:s is gerealiseerd met een
elektrodynamische aandrijving. Een injectie stroom met een frequentie van 500Hz en amplitude
3kA is gebruikt voor het creNren van de nuldoorgang in de vacuum schakelaar. Een successvolle
stroomonderbreking van een prospective gelijkstroom van 5kA is met de hybride techniek
gerealiseerd. Bovendien is een geschikte overspanning onderdrukking bereikt. Het hybride concept
is experimenteel vergeleken met volledig mechanische en volledig electronische (IGCT)
schakelaars. Terwijl alleen de een-trap commutatie circuit ook experimenteel is uitgevoerd, zijn 2
twee-trap commutatie circuits alleen theoretisch geanalyseerd.
vii
CONTENTS
Summary
vi
Samenvatting
vii
1 Concepts of direct current limitation and interruption ........................
1.1 Introduction .............................................................................................................

1.2 Current limiting and interrupting techniques ...........................................................
1.2.1 Conventional direct current air breakers .......................................................
1.2.2 Current Limiting Fuses .................................................................................
1.2.3 Pyrotechnique ................................................................................................
1.2.4 Positive Temperature Coefficient Resistors (PTCR) .....................................
1.2.5 Superconducting Current Limiter (SCCL) .....................................................
1.2.6 Solid-state breakers (SSBs) .........................................................................
1.3 Hybrid switching techniques ...................................................................................
1.4 Outline of thesis .......................................................................................................
1.5 References and reading lists ....................................................................................
1
3
3
6
6
7
8
9
10
14
14
2 Analysis of commutating circuits for hybrid breakers ..........................
19
2.1 Introduction ...............................................................................................................

2.2 Analysis of the active commutation circuit ...............................................................
2.3 Dimensions for the components of the parallel circuit .............................................
2.4 Simulating one-stage interruptions using MATLAB ................................................
2.4.1 Successful interruption using a bi-directional switch ..................................
2.4.2 Successful interruption at the first current-zero using a uni-directional
switch ...........................................................................................................
2.4.3 Successful interruption at the second current-zero using a uni-directional
switch ...........................................................................................................
2.4.4 Unsuccessful interruption .............................................................................
2.5 Protection against excessive overvoltages ................................................................
2.5.1 Linear energy absorbing devices as the primary protection .........................
2.5.2 Non-linear energy absorbing elements as the secondary protection ............
2.5.3 Snubber circuits as the tertiary protection ....................................................
2.5.4 Applications of the freewheeling diode .......................................................
2.5.5 Combining all the components .....................................................................
2.6 Circuit simulation using PSPICE ..............................................................................
2.6.1 Device modelling .........................................................................................
2.6.2 Simulation diagram ......................................................................................
2.6.3 Simulation results using PSPICE .................................................................
2.7 Conclusions ...............................................................................................................
2.8 References and reading lists ......................................................................................
19
22
32
35
38
40
40
41
44
45
46
48
48
49
49
51
52
57
57
3 Two-stage commutation circuits for direct current interrupters .........
59
3.1 Introduction ..............................................................................................................

3.2 Basic principles of the first variant ..........................................................................
3.3 Basic principles of the second variant ......................................................................
3.4 Computer simulation using PSPICE .........................................................................
3.4.1 The short-circuit simulation of a DC source with a prospective current of
10kA .............................................................................................................
59
61
67
72
73
viii
39
3.4.2 The one-stage DC interruption of 10kA with Itrip=5kA ................................

3.4.3 The first variant of two-stage DC interruption with Itrip=5kA ......................
3.4.4 The second variant of two-stage DC interruption with Itrip=5kA .................
3.5 Conclusions ..............................................................................................................
3.6 References and reading lists ....................................................................................
74
75
76
77
77
4 Fault identification and direct current measurement ...........................
79
4.1 Introduction ..............................................................................................................

4.2 Realization of a detection circuit ..............................................................................
4.3 Direct current transducers .........................................................................................
4.4 Rogowski-coils as current transducers .....................................................................
4.5 Conclusions ..............................................................................................................
4.6 References and reading lists .....................................................................................
79
80
81
84
88
88
5 Fast electrodynamic drives for the hybrid breaker ...............................
91
5.1 Introduction ..............................................................................................................

5.2 Description of the electrodynamic drive system .......................................................
5.3 Mathematical analysis of the electrodynamic drive system ......................................
5.3.1 Analysis of the electrodynamic drive using the coupled coils theory ..........
5.3.2 Analysis of the electrodynamic drive using equivalent lumped parameters
5.4 Comparison between simulation and measurement results ......................................
5.5 Conclusions ..............................................................................................................
5.6 References and reading lists .....................................................................................
91
92
94
95
103
107
116
116
6 Test circuit for DC breakers .....................................................................
119
6.1 Introduction ...............................................................................................................

6.2 Analysis of rectifier circuits for a direct current short-circuit source .......................
6.2.1 One 3-phase rectifier ....................................................................................
6.2.2 Two 3-phase rectifiers in series ....................................................................
6.3 Realization of the direct current short-circuit source (DCSCS) ................................
6.3.1 Sequential timing operation .........................................................................
6.3.2 Overvoltage suppression ..............................................................................
6.3.3 Surge phase-currents in the transformer secondary when switching-on ......
6.3.4 Overcurrent protection by I2t fusing .............................................................
6.3.5 Protection from overheating..........................................................................
6.4 Simulation results ......................................................................................................
6.4.1 Simulation of a 10kA prospective short-circuit current ...............................
6.4.2 A short-circuit current directly after the bridge ............................................
6.5 Measured and simulated results ................................................................................
6.5.1 An open circuit test ......................................................................................
6.5.2 Short-circuit test ...........................................................................................
6.6 Conclusions ...............................................................................................................
119
120
121
123
129
130
131
134
138
139
140
141
142
143
144
144
145
146
7 Experimental and modelling results ........................................................
149
7.1 The air breaker experiment .......................................................................................

7.2 The hybrid breaker experiment .................................................................................
7.2.1 Hybrid breaker test without anti-parallel diode across the vacuum breaker
7.2.2 Hybrid breaker test with anti-parallel diode across the vacuum breaker .....
7.3 The solid-state breaker experiment ...........................................................................
149
151
151
156
159
ix
7.2.1 A brief description of the Integrated Gate Commutated Thyristor (IGCT) ..

7.2.2 Experimental and simulated results using IGCT ..........................................
7.4 Conclusions ...............................................................................................................
160
161
164
165
8 General conclusions and future developments .......................................
167
8.1 General conclusions ..................................................................................................

8.2 Future developments .................................................................................................
167
169
Appendix A .......................................................................................................
171
List of symbols .................................................................................................
173
Acknowledgements ..........................................................................................
177
Biography .........................................................................................................
179
xi
xii
Chapter 1
Concepts of direct current limitation and interruption
Abstract
This chapter presents an overview of available electric current limitation and interruption
techniques for protecting direct current systems. Some of them were installed in networks for long
periods while others are still in the development stage. Attention was focused on hybrid switching
techniques which were the subject of this study. Finally, the form of this thesis is discussed.
1.1 Introduction
Faults in electric currents impose severe thermal and mechanical stresses on electrical systems and
their related apparatus and the severity depends on the peak current value and the time of the
interruption. Thermal overloading can result in the burning of lines or cables, while electrodynamic
forces can deform bus bars or the coils of reactors and transformers. Moreover, arcing resulting
from a fault can initiate explosions. Protection against such events is usually provided by installing
circuit breakers or current limiters in the line to be protected. A conventional AC circuit breaker is
capable of conducting high continuous currents and has a substantial short-circuit interrupting
capacity; but it is not able to perform current limitation at nominal high current ratings. On the other
hand, fuses which are the best known current limiting devices, have a relatively low continuous
current rating. Due to this contradictory situation, an ideal circuit breaker should have the following
features which are difficult to combine into one concept:
fast breaking action (at earliest current-zero);
minimal arcing after contact separation (to reduce contact erosion);
minimal conduction losses (a small voltage drop across the contacts);
reliable and efficient protection against all types of faults;
repetition of switching operation (allowing contacts to reclose after a fault clearance);
prevention of excessive overvoltage (during operation).
While these features are applicable for all circuit breakers, the task of direct current breakers is even
heavier because current limitation is required in the absence of current-zeros.
Direct current (DC) can be used for a large voltage range. According to the provisions of standards,
DC voltages are classified as low voltages (LV) up to 1200V (for instance, urban vehicles use
750V), systems for 1500V and 3000V are generally referred to as medium voltages (MV) and high
voltage (HV) is up to 1500kV. High voltage direct current (HVDC) technology applies especially to
high power transmission lines and for the back-to-back stations of AC systems. In the medium
voltage range, direct current is used principally in electric traction, electric heating devices and
some drives. In the low voltage range, direct current is used for most kinds of urban and mine
electric traction, in various drives and converter systems. Short-circuit parameters for specific
Chapter 1
circuits are very different. Time constant values in HV circuits generally are rather high. In LV and
MV circuits, time constants are in the range of 5 to 30ms, prospective short-circuit currents are in
the range of 10 to 150kA, initial rates of current rise in the range of 0.5 to 15A/:s and magnetic
energy of the short-circuits in the range of 5 to 30kJ [1.1].
Current interruption in DC systems is more problematic than in AC systems since there is no natural
current-zero available and the magnetic energy stored in the circuit inductance has to be dissipated.
Breakers must not only be able to interrupt but also to reduce the current to zero within a certain
time [1.2,3,4,5]. During the interruption process, an excessive high voltage should not be created in
the system.
A current-zero can be created in two ways. The first one is the traditional method used in DC
circuits: a switching device develops arc voltages significantly in excess of the system voltage. The
second method creates a virtual current-zero by producing a counter-current from auxiliary
commutation circuits. This counter-current is usually provided by a capacitor bank. The diagram in
Figure 1.1 shows the classification of fault clearances in DC systems [1.4].
DC Interruption
Inverse voltage method
Current commutation method
Current Oscillation
Current Limiting
Self oscillation
Non-linear material
or devices
Impulse circuit
LC & Switches
Arc
R+Arc+Switches
LC+Arc
(passive)
Forced oscillation
Switches & LC or
RLC (active)
Unknown
PTC-resistor
Superconductor
Pure solid-state
breakers
Fuses
Explosive charge
fuses
Conventional
DC and HVDC
breakers
Hybrid breakers
Figure 1. 1 Classification of DC interrupting methods; where PTC: Positive Temperature Coefficient,

R: resistor, RLC and LC: oscillating loops with and without damping.
1.2 Current limiting and interrupting techniques

A current limiting device can be seen as a series of elements in the line; they offer low impedance to
the load current and high impedance to the fault current. In principle, it is not necessary for the
current limiting device itself to create the final current-zero. An auxiliary interrupter can be
connected in series in order to interrupt the limited current. In the following sub-sections, a number
of current limiting techniques are summarized.
1.2.1 Conventional direct current air breakers

Classical direct current interruption utilizes arc plasma in order to build up the inverse voltage
opposing the supply voltage for the current-zero creation. In the closed position, conventional
mechanical breakers are able to conduct high continuous currents with low power dissipation. In the
open position, these breakers provide excellent isolation. During the switching process, the arc
plasma causes contacts to erode and it generates noises and hot gasses. Moreover, these switches
generally react slowly. Hence, they hardly limit the maximal fault current, due to their slow opening
and long arcing times which together take longer than 20ms, which is usually above the time
constant of a circuit.
Interrupting DC is accompanied by different phenomena depending on the systems parameters and
the exact location of the breaker. For example, see Figure 1.2, for a given simple 1kV DC system
containing the total lumped resistance RS=100mS and inductance LS=400:H with a breaker and
load. In the closed position, the breaker has a low resistance. During a fault, the current has to be
interrupted. The prospective short-circuit current is 10kA. The fault is distinguished from a normal
current load by the setting of a trip current value. As soon as the current exceeds that trip value, the
electromagnetic device in the circuit breaker (CB) separates the contacts creating an arc between the
electrodes.
LS
ES
RS
i(t)
VCB
Load
Figure 1. 2 A typical DC system with a conventional breaker.
The current can be reduced to zero only if the breaker can generate and maintain a switching arc
voltage of VCB that is higher than the systems voltage E S for long enough. While this occurs, the
Chapter 1
breaker dissipates the inductive energy and any excess energy delivered by the source during the
interruption process. Obviously, this method is suitable for conventional air breakers. Figure 1.2
shows the application of a conventional breaker in a simple circuit.
Much depends on the way that the switching arc voltage VCB is generated, this may be represented
by a function of several different quantities, such as: current, time derivative, stored magnetic
energy, time, etc. The equation for voltages in the circuit (Figure 1.2) is given by the expression:
E S = VR + VL + VCB
(1.1)
16
where: VR = RS i t , VL = LS

di
di
and VCB = f i , , i dt , t .
dt
dt
During the switching process, the energy stored in the system must be dissipated by the circuit
resistance and the breaker. The energy dissipated in the resistance is calculated by:
I
I
WR = RS i 2 dt
(1.2)
And the arcing energy is given by the relationship:

WCB = VCB i dt
(1.3)
The let-through energy integral for the breaker can be computed using the expression:
i 2 dt i 2 t .
To demonstrate the interruption process, a switching arc voltage VCB across the breaker was
represented empirically by some idealized algebraic functions, in order to simulate the relationship
between the voltage across the breaker and the current through it. The trip current for opening the
breaker was set to 2kA. After a successful interruption, a transient recovery voltage appears across
the breaker. Now two cases: A and B, for empirical switching arc voltage traces will be presented
(Table 1.1).
Table 1. 1 Switching arc voltage patterns.
Case A
0
VCB
%
1t 6 = K
&
K S 1t t 6
'
1
Case B
0
0 t t1
t1 t t 2
VCB
%
1t 6 = K
&
K3S 1t t 6
'
1
0 t t1
t1 t t 2
where: t1 is tripping time, t2 is current-zero time and S is the slope of the switching arc voltage. The
interruption time is defined as the time difference between t2 and t1 . In case A, the rate of change of
the switching arc voltage S was about 250V/ms which is a typical value for conventional breakers.
The switching arc voltage increased and suppressed the current within 6.8ms, see the left hand
column of Figure 1.3. In case B, the switching arc voltage grew three times faster (750V/ms). The
interrupting time then became 2.95ms, see the right hand column of Figure 1.3. The energy balance
for both cases can be calculated too as shown below the current and voltage graphs.
Case A
Case B
4000
3000
ICB
VCB
3000
2500
Current [A], Voltage [V]
Current [A], Voltage [V]
3500
ICB
VCB
2000
2500
1500
2000
1000
1500
1000
500
0
500
0
10
-500
time [ms]
Current and voltage
10
Current and voltage
25
8
7
WTot
WR
WCB
15
Energy [kJ]
20
Energy [kJ]
time [ms]
10
WTot
WR
WCB
4
3
2
5
1
0
10
time [ms]
10
time [ms]
Energy balance
Energy balance
Figure 1. 3 DC interruption for different patterns of the arc voltage with a trip current I trip=2kA;
where: ICB and VCB are the current in and voltage across the breaker and W Tot, WR and WCB represent the
energy dissipated during the interruption; due to the total, line resistance and in the breaker, respectively.
From these results, it can be seen why the interruption must not be too fast because it caused high
surge voltages and not too slow because it caused long energy dissipation times that might damage
the contacts. The simulated results are summarized in Table 1.2.
Table 1. 2 The energy balance of the interruption;
WR and WCB for the dissipated energy in the line resistance and the breaker respectively.
Case A with S=250V/ms

Case B with S=750V/ms
WR
[Joule]
6322
1586
WCB
[Joule]
13909
5576
tint
[ms]
6.8
2.95
Imax
[A]
3929
2807
Adequate current limiting capacity could be achieved by minimizing the arcing time and generating
switching voltages 1.1 to 1.5 times higher than the supply voltage. This was possible by using a
special cooling mechanism to destabilize the arc plasma. Clearly, the appearance of switching
voltages across the breaker could cause energy dissipation through the arcing process. It was
Chapter 1
released mainly as heat to the surroundings. At the same time, this energy could damage and
corrode the contacts, thus shortening the breaker life and reducing its interrupting capacity.
In this thesis, a conventional air breaker was investigated and it is described in Chapter 7.
1.2.2 Current limiting fuses

The simplest current limiting device is the fuse [1.6], which is able to conduct a continuous current,
sense a fault automatically, limit the current, dissipate the energy and interrupt the fault. Current
limiting fuses unlike circuit breakers become operational before the short-circuit current reaches a
prospective peak value and thereby they effectively limit the let-through current to lower values.
Due to this current limiting action and the subsequent rapid interruption and isolation of the circuit,
thermal and electrodynamic effects on components of the circuit are reduced to a minimum. The
most important characteristics of fuses are low continuous current ratings, small size, cheapness and
suitability for both low and medium voltage AC and DC systems.
Self-recovery fuses based on sodium (Na) have been developed in the past [1.7], but so far further
development is uncertain; however, it should be noted that the fuse arc voltage will be
superimposed on the system and must, therefore, be limited to avoid excessive overvoltages. On the
other hand, energy considerations and fuse size limitations require that the fuse arc voltage is
typically up to twice the line to neutral voltage. Disadvantages of a fuse are its limited continuous
current rating and the need for replacement after each fault. These shortcomings can be partly
overcome by using triggerable current limiting devices with a parallel path for the continuous
current.
1.2.3 Pyrotechnique
By separating the continuous current conduction and interruption duties of triggerable current
limiting devices, the fusible element is shunted by a link which can be removed as required. The
interrupting duty is provided by a fuse once the current has been commutated from the shunting
device. In principle, such breakers consist of two main components, firstly a special copper
conductor which can carry large continuous currents during normal operation, but it can be sheared
at high speed by a pyrobreaking technique when overloaded, and, secondly, current limiting fuses
which are mounted in parallel with the large continuous current conductor [1.8]. A diagram of this
device is depicted in Figure 1.4.
Control Circuit
dI/dt
I
Main conductor
Fuse
Figure 1. 4 Schematic of the Pyrotechnique
The main current conductor is broken by the pyrotechnique mechanism which is triggered by a
control circuit fed by a sensor system. The pyrotechnique mechanism contains an explosive
chemical charge. After that charge explodes, the current commutates to the fuse for controlling
current limitation and interruption. System parameters, such as the current and current slope, are
monitored using appropriate sensors. The signal generated by the sensors is compared with a preset
reference value in the control circuit and this can trigger the chemical charge. The pyrotechnique
circuit interrupter is very useful for protecting electrical systems with high continuous currents
(>5kA) when rapid interrupting is required. Clearly, this device can not be reset. The recovery time
is long and the cost of the replacement is high.
Several manufacturers deliver pyrotechnique products [1.8,9,10]. Their main uses are in medium
voltage AC networks although they can be used in DC systems too (but not for traction, due to fast
reclosing requirements).
1.2.4 Positive Temperature Coefficient Resistors (PTCR)

A composite of polymer and metal forms the main part of this device which like fuses, is inserted in
the line where it carries a rated current continuously. In such situations, the ohmic losses are
sufficiently low in order to prevent any real resistance increase. When the current suddenly
increases, the internal heating will exceed the natural cooling capability. If the temperature of the
polymer resistor increases above a critical limit, its resistance changes stepwise up to ten orders of
the normal magnitude (Figure 1.5). Consequently, the current is limited. A load breaker then
interrupts the final current. When the internal temperature returns to the ambient temperature, the
PTCR resumes normal service after the short-circuit has been removed; therefore, this device can be
used repetitively.
Chapter 1
10
Spec. Resistivity [cm]
10
10
10
10
10
-2
20
40
60
80
100
120
140
Temperature [C]
Figure 1. 5 Specific resistivity as a function of temperature TiB 2.
These devices have been tested in 220V AC networks [1.11] when a prospective current of 16kA
can be reduced to just 3kA. Recently, a device for 12kV networks was announced [1,12] for
repetitive current limitation of prospective currents of 4 to 14kA within 1ms. Their reliability and
economy are not yet generally accepted and suitability for DC networks is also unknown as yet.
1.2.5 Superconducting Current Limiters (SCCL)

Because superconducting materials operate below the ambient temperature they require cooling in
order to maintain their superconducting properties. A fault current brings the superconducting
material to its normal resistive state which limits the fault current to an acceptable level. Basically,
two methods are employed; firstly, the so-called resistive method which uses a superconducting
element for transferring the fault current to a shunt resistor thereby limiting it, see Figure 1.6 (a).
Secondly, a system of coupled coils in which the secondary winding is connected to the
superconducting material, see Figure 1.6 (b). This is also known as the inductive method
[1.13,14,15].
Cryogenic shield
Cryogenic shield
Load breaker
iline
Lsec
Load breaker
Rshunt
(a)
iline
Lprim
(b)
Figure 1. 6 Schematic of the superconducting current limitation types; (a) resistive (b) inductive.
Resistive type
Commutating the current is accomplished by switching the superconducting element from a state of
zero resistance (this occurs below the critical temperature TC) to its resistive state, by increasing the
temperature above TC. The critical temperature TC depends on the superconducting material. Under
normal conditions, the load current flows through the superconductor but after a fault, the resistance
of the superconductor becomes much greater than the shunt resistance. So, after commutation only a
small current flows in the superconducting element. A load breaker for fully rated continuous
current can finally interrupt the limited current.
Inductive type:
Under normal conditions, coupled coils consisting of a normal conducting primary coil and a
superconducting secondary coil act as a short-circuited transformer, so that a low impedance is
introduced into the primary circuit. But when the current exceeds a certain value, the current
induced in the secondary coil becomes too high, resulting in a change in the state of the
superconducting material. A high impedance value will then appear on the primary side and it limits
the fault current. Finally, a load breaker can disconnect this current. The secondary side can also
include a stack of short-circuit rings composed of superconducting material [1.16].
These interrupting devices have the following advantages : there are no moving parts; and there are
low losses, but the main drawback is their need for permanent cooling. Apparently, the
superconducting current limiter may become economically attractive for medium voltage AC
networks; however, the inductive type is unsuitable for DC systems.
1.2.6 Solid-State Breakers (SSB)

Since the invention of power semiconductors (power diode, thyristor, GTO-thyristor, power
transistor, IGBT, power MOSFET, and recently the IGCT), these components have been considered
for load switching in power networks [1.17,18,27,30,32,37]. Power semiconductor switches provide
a fast acting arcless mechanism with great reliability and reduced maintenance. There are some
disadvantages, however, such as their sensitivity to transient overvoltage and overcurrent. Such
transients can break down the junctions of power semiconductors. Also the power losses in them
can be relatively high which will limit their current ratings. Effective cooling is required too. Figure
1.7 shows an overview of the voltage-current-range capacities of solid-state devices [1.28]. The
IGCT has a rating comparable with the GTO.
4
10
SCR
GTO-thyristor
HPBT
10
SIT
IGBT
10
MOSFET
10 1
10
10
10
Current maximum [A]
10
Figure 1. 7 Application ranges of power semiconductor devices

where SCR: Silicon Controlled Rectifier or Thyristor; GTO-thyristor: Gate Turn-Off thyristor;
HPBT: High Power Bipolar Junction Transistor; IGBT: Insulated Gate Bipolar Transistor;
SIT: Static Induction Transistor; MOSFET: Metal Oxide Semiconductor Field Effect Transistor;
10
Chapter 1
As a controllable solid-state switch with its highest rating for forward currents and blocking
voltages, the thyristor is still invincible, followed by the GTO-thyristor and the IGCT. Since such
devices are controlled by currents, they can be unsuitable for some applications. Transistor-based
devices which are controlled by voltage are faster, but generally, they have much lower current
ratings and blocking voltages. Figure 1.8 shows a general application of solid-state breakers with
auxiliary protective devices.
Control Circuit
SSB
dI/dt
Commutation Circuit
Snubber Circuit
Voltage Limiting Element
Figure 1. 8 Schematic of the Solid-state breaker (SSB).
Research and testing of breakers based on pure solid-state switches have been reported in many
papers both for AC and DC systems. Basically, two methods are known; one and two-stage
interruptions. One-stage interruption is the commonest type where the interruption process can be
difficult, because the device must reduce the overcurrent to zero [1.19,20,21,22,33,43,49,56].
During this process, the solid-state switches may undergo stresses and not be able to interrupt the
current, particularly in high voltage or high current systems. A combination of both series and
parallel arrangements of the solid-state switches may help solve the problem. However, a new
problem arises, that is, the sharing of voltages and currents among those switches. On the other
hand, two-stage interruption facilitates the interruption process by firstly reducing the fault current
to a much lower value after which the current is interrupted in the second stage [1.23].
In this thesis, a new solid-state device (IGCT) was investigated and the results are presented in
Chapter 7.
1.3 Hybrid switching techniques

Purely mechanical and solid-state breakers have both positive and negative points. Table 1.3
summarizes and compares a number of breaker features.
Feature
11
Table 1. 3 Comparison of mechanical and semiconductor breakers.

mechanical breaker
semiconductor breaker
Switching mechanism
metallic contact and arc
PN-junction
Contact resistance
S- mS
few mS
Power loss
very small
relative high
Voltage drop at rated current
less than 10mV
1-2V
Galvanic isolation
Yes
No
Isolation capability
very high
limited (sensitive for overvoltage)
Overload capability
very high
limited by I2t value
Delay/response time
few ms-20ms
few s
Life expectancy
limited by contact erosion
theoretically unlimited
Contact reliability
high
very high
Frequent switching ability
high
very high
Surge capabilities
high
limited (device dependence)
Overvoltage protection
not necessary
snubber circuit/varistor
Size & volume
compact and small
Maintenance
necessary
relatively big due to cooling being

necessary
not necessary
Cost
relatively low
relatively high
Integrating solid-state devices with a mechanical breaker in a combined configuration is called the
Hybrid Switching Technique (HST) [1.24,25,26,31,35,36,40,42,44,48,49]. Intentionally, the positive
points from each method are retained and the negative points are eliminated. As a result of the fast
actions of semiconductors, the moving mechanism of the main contact is critical. The hybrid
switching technique is very suitable for limiting currents especially for repetitive use.
Generally, within a hybrid switching system, two different mechanical switches are incorporated; a
main breaker and an isolation switch; the main breaker is accompanied by a solid-state switch in
parallel. The main breaker provides a path for the continuous current, while the isolation switch
allows dielectric separation of the load after a current interruption. The solid-state switch will
operate only when the main current has to be interrupted. Figure 1.9 shows the basic components of
hybrid switching. A commutation path is connected in parallel with the main breaker, it includes a
snubber circuit as a transient suppressor and a voltage limiting element as an energy absorber.
During normal operation, the snubber circuit and voltage limiting element provide high impedance
paths. The commutation path is introduced by solid-state switches and only operates during the
interruption process. All the switches are controlled by electronic circuits.
12
Chapter 1
Main Breaker
Isolation Switch
Commutation
Circuit
Solid-state
Switch
Snubber Circuit
Voltage Limiting Element
Figure 1. 9 Basic components of hybrid switching techniques.
The fact that the reaction times of solid-state switches are much quicker than those of the
mechanical ones, means that the mechanical drive of hybrid breakers must be as fast as possible
[1.53]. The higher the rated current, the greater the mass of the mechanism that is needed. Also, the
main breaker MB must be able to maintain insulation at the time of the first current-zero event;
consequently, a vacuum breaker is most suitable because of its excellent insulating properties after
the current-zero. For the development of a high-speed current limiting circuit breaker based on
hybrid switching techniques, the features needed are listed in Table 1.4 [1.29,50,52].
Table 1. 4 Design requirements for hybrid breakers.
Subject
Purpose
Methods
High-speed operation
fast fault detecting time
suitable criteria for faults in a certain
network based on parameters i , di/dt
fast main breaker MB opening adoption of a fast electrodynamic drive
time
system
decrease the entire mass of the moving
part of the MB
High-current interruption fast current commutation from reduction of circuit inductance on the
main breaker MB to
commutation path
commutating path
increase the arc voltage in the MB
adaptation of main breaker
application of fast switches for
MB and commutating devices
initiating the counter-current, (high
di/dt and dv/dt capabilities)
limitation of the overvoltage
using proper overvoltage protection
during the interruption
devices (snubber and non-linear
resistance)
free-wheeling diodes to absorb the loadstored inductive energy
increase the capacitance value and
decrease its initial voltages
13
Economic considerations will follow these engineering design aspects of hybrid breakers in the
field. Investigations of contact erosion with HST are reported in [1.34,38], whilst the role of ZnO as
a voltage clipper during operation is discussed in [1.45,46].
An interest in developing HST breakers has been shown by a few electric power companies and
their breakers are detailed in Table 1.5.
Table 1. 5 Commercial types of HCB for fault current limitation.
ACEC (1992)
Meiden (1995)
Fuji
Zwar (1996)
(1994)
rated voltage
rated current
interruption
time
limiter
interrupting
current
arc
750V,1.5kV,3kV
(DC)
6kA
1.5kV(DC)
400V(AC)
3kV(DC)
4kA
2kA
250, 400A
<2ms
<16ms
< 1ms
<2ms
<5kA of 63kA
19kA
< 10kA of
60kA
<5kA of 40kA, 20ms

60kA, 30ms
No
Yes
No
No
<200kA
fast switch in air
fast switch in air
fast switch fast switch in vacuum

in vacuum
GTOthyristor
thyristor
ISO 9001
breaking
capacity
mechanical
switch
solid-state
switch
standard
thyristor
thyristor
IEC 801, ISO 9001
Literature
[1.39,41]
JEC-7152-1991,
JEC-2500, JEM1425
[1.51]
[1.29]
[1.54,55]
The use of hybrid switching techniques is still very much in the development stage, because their
fundamental and technical limits are not generally known. Experimental results with test circuits are
rarely found in literature. The study described in this thesis concerns an analysis of hybrid systems,
both experimental and theoretical with simulated extensions. A prototype design for a hybrid
breaker was developed. That breaker has been tested in a specially designed test circuit using two
distribution transformers and double rectifier bridges (see Chapter 6). Its behavior has been
compared with those of purely mechanical or purely solid-state solutions (see Chapter 7).
In the Seventies, a severe DC interrupting problem appeared in the large Joint European Torus
(JET) project at Culham but it was solved by AEG. The interruption technique that they used was an
existing pressurized air breaker (80 bar) in a counter current injection circuit with a capacitor of
2mF at 25kV [1.57]. After intensive testing at KEMA, the system worked successfully for more
than 20 years. Also vacuum interrupters have been used for the Japanese Torus (JT60) in a similar
way by Toshiba. At Pulse Physics laboratory of TNO, a repetitive mechanical high current opening
switch of 500kA was designed to commutate current to a rail accelerator; it used commutation
14
Chapter 1
capacitance of 1.44F with initial voltage of 400V [1.58]. Nevertheless, this solution could not
penetrate into existing DC applications because of their triggering criteria and economics.
1.4 Outline of thesis

The outline of this thesis is given below.
Chapter 2 characterizes one-stage hybrid interruption techniques using analytic and numeric
solutions.
Chapter 3 presents two-stage interruption methods that alleviate the component problems, with the
aid of analysis and simulations.
Chapter 4 describes DC measurement and fault detection methods.
Chapter 5 describes and models the fast opening mode of the prototype breaker developed using a
specially designed electrodynamic drive.
Chapter 6 gives an explanation of the direct current short-circuit source with the models required for
the experiments.
Chapter 7 covers the experimental and simulation results including those for an air breaker, a hybrid
breaker and a solid-state breaker.
Chapter 8 presents and discusses the conclusions that can be drawn from the work described in this
thesis giving recommendations for future work.
1.5 References and reading lists

[1.1]
[1.2]
[1.3]
[1.4]
[1.5]
[1.6]
[1.7]
[1.8]
[1.9]
Bartosik, M., Progress in D.C. breaking, Proc. 8th Int. Conf. Switching Arc Phenomena,
Summary of discussed items on fuses, Lodz, Poland 3-6 Sept. 1997, Vol. 2, p. 24-41.
(Published in 1998)
Kenn Lian, DC Breaker Applications, HVDC Circuit Breaker Symposium 1972, IEEE
Summer Power Conference, p. 9-10.
Schaufelberger, F.G., HVDC Circuit Breakers- Application, HVDC Circuit Breaker
Symposium 1972 IEEE Summer Power Conference, p. 13-4.
Pucher, W., Fundamentals of HVDC Interruption, Electra, No. 5, 1968, p. 24-38.
Lee, A., et. al., The development of a HVDC SF6 breaker, IEEE Trans. on Power
Apparatus and Systems, Vol. PAS-104, No. 10, October 1985, p. 2721-9.
Newbery, P. and Wright, A., Electric fuses, Proc. IEE, Vol. 124, No. 11R, November
1977, p. 909-24.
Nakayama, H. et.al., Development oh high voltage, self-healing current limiting element
and verification of its operating parameters as a CLD for distribution substations, IEEE
Trans. on Power Delivery, Vol. 4, No. 1, January 1989, p. 342-8.
Benouar, M., Pyrotechnique circuit interrupter for the protection of electrical systems,
IEEE Trans. on Power Apparatus and Systems, Vol. PAS-103, No. 8, August 1984, p.
2006-10.
-, Is-limiter, ABB Calor Emag Schaltanlagen AG, 1996.

[1.10]
[1.11]
[1.12]
[1.13]
[1.14]
[1.15]
[1.16]
[1.17]
[1.18]
[1.19]
[1.20]
[1.21]
[1.22]
[1.23]
[1.24]
[1.25]
[1.26]
[1.27]
[1.28]
[1.29]
[1.30]
[1.31]
15
Das, J.C., Limitations of fault current limiters for expansion of electrical distribution
systems, IEEE Trans. on Industry Applications, Vol. 33, No. 4, July/August 1997, p.
1073-82.
Skindhrj, J., et.al., Repetitive current limiter based on polymer PTC resistor, IEEE
Trans. on Power Delivery, Vol. 13, No. 2, April 1998, p. 489-94.
Strumpler, R., et.al., Novel medium voltage fault current limiter based on polymer PTC
resistors, IEEE Trans. on Power Delivery, Vol. 14, No. 2, April 1999, p. 425-30.
Tixador, P., et.al., Hybrid superconducting a.c. fault current limiter principle and previous
studies, IEEE Trans. on Magnetics, Vol. 28, No. 1, January 1992, p. 446-9.
Gray, K.E., and Fowler, D.E., A superconducting fault-current limiter, Journal of
Applied Physics, 49(4) April 1978, p. 2546-50.
Noe, M., Supraleitende Strombegrenzer als neuartige Betriebmittel in
Elektroenergiesystemen, PhD Dissertation 1998, Hannover University. (In German)
Tanaka, T, et.al, Electrical insulation in HTS power cables, fault-current limiters and
transformers, Electra, No. 186, October 1999, p. 11-29.
Smith, R.K., et. al., Solid state distribution current limiter and circuit breaker: application
requirements and control strategies, IEEE Trans. on Power Delivery, Vol. 8, No. 3, July
1993, p. 1155-64.
Ueda, T., et. al., Solid-state current limiter for power distribution system, IEEE Trans.
On Power Delivery, Vol. 8, No. 4, October 1993, p. 1796-1801.
Jinzenji, T., and Kudor, T., GTO DC circuit breaker based on a single-chip
microcomputer, IEEE Trans. on Industrial Electronics, Vol. IE-33, No. 2, May 1986, p.
138-43.
Salama, M.M.A., et. al., Fault-current limiter with thyristor-controlled impedance (FCLTCI), IEEE Trans. on Power Delivery, Vol. 8, No. 3, July 1993, p. 1518-27.
Chokhawala, R., and G. Castino, IGBT Fault current limiting circuit, IEEE Industry
Applications Magazine, September/October 1995, p. 30-5.
Zyborski, J., J. Czucha and M. Sajnacki, Thyristor circuit breaker for overcurrent
protection of industrial d.c. power installations, Proc. IEE, Vol. 123, No. 7, July 1976, p.
685-8.
McEwan, P.M., and Tennakoon, S.B., A two stage DC thyristor circuit breaker, IEEE
Trans. on Power Electronics, Vol. 12, No. 4, July 1997, p. 597-607.
Atmadji, A.M.S., Hybrid switching: a review of current literature, Int. Conf. on Energy
Management and Power Delivery 1998, Mar. 1998 Singapore, p. 631-8.
Amft,
D.,
and
Drummer,
G.,
Hohere
Schaltstuecklebensdauer
durch
Hybridschutztechnik, Elektrie 24, 1970, H.5, p. 165-7. (In German)
Humann, K., and Koppelmann, F., Lichtbogenfreies von Wechselstrom mit mechanischen
Schaltern in Verbindung mit Paralleldioden im Niederspannungsbereich,
Elektrotechnische Zeitschrift ETZ-A, Bd. 86, 1965, H. 15, p. 496-500. (In German)
Baliga, J., Modern power devices, Wiley-Interscience, 1987.
Chen, D.Y., Power Semiconductors: fast, though and compact, IEEE Spectrum
Magazine, September 1987, p. 30-5.
Genji, T., et. al., 400V class high-speed current limiting circuit breaker for electric power
system, IEEE Trans. on Power Delivery, Vol. 9, No. 3, July 1994, p. 1428-35.
Bonhomme, H., and Legros, W., Use of Power semiconductors in circuit breakers,
Proceedings of the fifth International PCI Conf., September 28-30 1982, Geneva
Switzerland, p. 319-25.
Hartig, G., and Wedell, H., Betrachtungen uber Ausgleichvorgange bei der
Parallelschaltung von mechanischen Schaltstrecken und Halbleiterleistungsventilen,
Elektrie 27, 1973, H. 6, p. 309-10. (In German)
16
[1.32]
[1.33]
[1.34]
[1.35]
[1.36]
[1.37]
[1.38]
[1.39]
[1.40]
[1.41]
[1.42]
[1.43]
[1.44]
[1.45]
[1.46]
[1.47]
[1.48]
[1.49]
[1.50]
Chapter 1
Humann, K., and Koppelmann, F., Kontaktloses Schalten mit steuerbaren
Halbleiterelementen im Niederspannungsbereich, Elektrotechnische Zeitschrift ETZ-A,
Bd. 86, 1965, H. 17, p. 552-7. (In German)
Bonhomme, H., et.al., A 6kV/500A Switching device with thyristors : dream or reality,
Proceedings of the sixth International PCI Conf., April 1983, Orlando, USA, p. 1-5.
Greitzke, S., Untersuchungen an Hybridschaltern, Dissertation TU Braunschweig, 1988.
(In German)
Bonhomme, H., et. al., A semistatic switching device, Int. Conf. on Power Electronics
and Variable-Speed Drives, PEVSD '84, London, May 1984, p. 27-9.
Krstic, S., and P.J. Theisen, Push-Button Hybrid Switch, IEEE Trans. on Components,
Hybrids and Manufacturing Technology, Vol. CHMT-9, No. 1, March 1986, p. 101-105.
Holroyd, F.W., and Temple, V.A.K., Power Semiconductor devices for hybrid breakers,
IEEE Trans. on Power Apparatus and Systems, Vol. PAS-101, No.7, July 1982, p. 2103-8.
Greitzke, S., and Lindmayer, M., Commutation and erosion in hybrid contactor systems,
IEEE Trans. on Components, Hybrids and Manufacturing Technology, Vol. CHMT-8, No.
1, March 1985, p. 34-9.
Collart, P., and Pellichero, S., A new high speed DC circuit breaker: the DHR, IEE
Colloquium on Electronic-aided current limiting circuit breaker developments and
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Chaly, M., et. al., Switching arc in combined switching systems, 3th Int. Symp. on
Switching Arc Phenomena (SAP), Lodz, Poland, September 1977, Part 1, p. 153-6.
Collart, P., and Pellichero, S., A super high speed intelligent circuit breaker, GEC
Alsthom Technical Review, No. 9, 1992, p. 35-42.
Theisen, J., et. al., 270-V DC Hybrid Switch, IEEE Trans. on Components, Hybrids and
Manufacturing Technology, Vol. CHMT-9, No. 1, March 1986, p. 97-100.
Lasota, R., Reduction of switching arc energy in direct current hybrid switches with GTO
thyristors, 7th International Conference Switching Arc Phenomena (SAP), 27 September 1 October 1993, Lodz, Poland, p. 264-7.
Shammas, N.Y.A., Combined conventional and solid-state device breakers, IEE
Colloquium on Power semiconductor devices, No. 1994/247, p. 5/1-5.
Hasan, S., et.al., The critical switching parameters of a new hybrid AC low voltage circuit
breaker without and with ZnO varistor, 6th Int. Symp. On Short-Circuit Currents in
Power System, September 1994, Liege Belgium, p. 3.11.1-8.
Czucha, J., et.al., AC low-voltage arcing fault protection by hybrid current limiting
interrupting device, 7th Int. Symp.on Short-Circuit Currents in Power Systems, September
1996, Warsaw Poland, p. 3.8.1-5.
Brice, C.W., et.al., Review of Technologies for Current-Limiting Low-Voltage Circuit
Breakers, IEEE Trans. on Industry Applications, Vol. 32, No. 5, Sept./Oct. 1996, p. 100510.
Lasota, R., The work of hybrid switches in low voltage direct current circuits, Fifth
International Symposium on Switching Arc Phenomena (SAP), September 1985, Lodz,
Poland, p. 152-5.
Lasota, R., Some problems of arc energy limitation in the DC hybrid switches with power
MOSFET, Sixth International Conference on Switching Arc Phenomena (SAP),
September 1989, Lodz, Poland, p. 40-3.
Bartosik, W., Theoretical and practical aspects of fault direct current switching-off by
counter-current, Proc. of the Int. Conf. on Electrical Contacts, Arcs, Apparatus and Their
Applications, May 3-7 1989, Xi'an China, p. 5-12.

[1.51]
[1.52]
[1.53]
[1.54]
[1.55]
[1.56]
[1.57]
[1.58]
17
Takehara, K. and Yamada, Y., High-speed circuit-breaker incorporating a digital current

detector to support safe operation of electric trains, Meiden review [International
Edition], 1995, No. 3, p. 29-32.
Shammas, N.Y.A., and Naumovski, N., Combined conventional and solid-state device
breakers 'Hybrid circuit breakers' , Proc. 29th Univ. Power Eng. Conf, UPEC 1994,
Galway (Ireland), p. 716-9.
Czucha, J., and J. Zyborski, Ultra fast hybrid circuit breaker for AC network theoretical
analysis, 29th University Power Engineering Conf, UPEC 1994, Galway Ireland, Vol. 1,
p. 173-6.
-, Ultra high-speed direct current-limiting vacuum circuit breakers, Manufacture Catalogue
Sheet, 1996, Zwar, Poland.
Bartosik, W., et. al., Arcless DC Hybrid circuit breaker, Eight International Conference
on Switching Arc Phenomena (SAP), September 1997, Lodz Poland, p. 115-9.
Dawson, F.P., et.al., A fast DC current breaker, IEEE Trans. on Industry Applications,
Vol. IA-21, No. 5, Sept./Oct. 1985, p. 1176-81.
Dokopoulos, P. and Kriechbaum, K., Gleichstromschalter fuer 73kA und 24kV in der
Plasmaphysik, Elektrotechnische Zeitschrift ETZ-A, Bd. 97, 1976, H.8, S. 499-503. (In
German)
Dijk, E. van., Experimental results obtained with the 1 MA resonant series counterpulse
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June 29 - July 2 1997, Baltimore, Maryland, USA, p. 287-92.
18
Chapter 1
Chapter 2
Analysis of commutating circuits for hybrid breakers
Abstract
For DC networks, current limiting devices are necessary for disconnecting faulty circuits rapidly.
This work presents an analysis of the hybrid techniques which apply to current commutation.
Firstly the basic commutation circuit known as one-stage interruption is described. Results from
simulations of the complete system are presented giving an estimation of the possible transient
behavior during the interruption processes. Analytical and numerical solutions have been obtained
for the relevant differential equations.
2.1. Introduction
The fact that DC systems have no natural current-zero, becomes a problem when currents have to be
interrupted. Principally, breakers may use two ways of producing current-zeros. According to one
method, an arc voltage is created between the electrodes of the breaker which opposes the supply
voltage. The breaker has to be able to produce arc voltages greater than the systems voltage in order
to produce the current-zero. The success of arc plasma quenching depends on the ability of the
surrounding medium to absorb all the inductive energy stored in the system. Unfortunately, this
method eventually results in long arcing times causing considerable erosion of the contacts of the
breaker. The greater the inductive energy content of the system, the longer the arcing times
necessary. An effective current limitation may be hampered by the chance of the contacts opening
and a fast voltage building up in the early stages of the interruption process.
Another way of interrupting a current is known as current commutation. The commutation process
requires additional circuits to be connected in parallel across the main breaker. Generally, such
circuits are able to store a certain amount of energy and by discharging this energy, a controlled
counter-current injection can be made. This counter-current injection opposes the main current in
the breaker (by superposition) in order to produce a forced current-zero. Indeed, current-zero can
only be produced if the counter-current injected is greater than the instantaneous fault current;
consequently, it is very important to identify the fault current level in which the counter-current
injection will be able to force the current to zero. This method reduces the arcing time effectively
thereby reducing contacts erosion [2.1]. The basic DC commutation system is shown in Figure 2.1
[2.2,3].
20
Chapter 2
iS
iB
S1
iC
RT
CC
LT
+
ES
-
S3
LC
RLoad
S2
DFW
vC
LLoad
iMOV
MOV
Figure 2. 1 Basic DC systems with a commutation circuit; S1: main breaker, S2: auxiliary switch,
S3: load breaker, CC and LC : commutation capacitor and coil, and MOV: metal oxide varistor.
A DC source ES with circuit resistance RT and inductance LT is connected in series with a main
breaker S1 and a load breaker S3 followed by a load. The circuit resistance and inductance may
comprise the value of the DC source and linking lines or tracks. The current normally passes
through the main breaker S1. A commutation circuit is connected in parallel across the main breaker
S1; it consists of capacitor CC, coil LC and auxiliary switch S2. The metal oxide varistor (MOV)
connected across S1 have a clamp voltage protecting devices in the system. The capacitor CC can be
initially pre-charged, as is required of the active commutation mode, otherwise it is called the
passive commutation mode. Because the load is inductive, the system may require a freewheeling
diode DFW in parallel with the load side. The freewheeling diode DFW will bypass the circuit current
when the current slope changes to negative. Intentionally, this is very useful for avoiding any energy
being transferred from the downstream lines (transmission lines and inductive loads) to the
commutation capacitor CC during the interruption. In contrary, the source side inductive energy
cannot be bypassed using the freewheeling diode.
In the active mode, a current oscillation provided by the precharged commutation capacitor CC will
arise instantly and it will grow to oppose the current in the main breaker S1 when the auxiliary
switch S2 is closed. A trip command provided by a fault sensor controls closing of the auxiliary
switch S2 and opening the main breaker S1. A proper combination of LC and CC will create an
oscillation that generates at least one current-zero crossing in the main breaker S1. After an
interruption at current-zero in the main breaker S1, the main current iS will commutate to the
parallel path thereby changing the polarity of the capacitor CC. Oscillation of the commutated
current will create another current-zero crossing in the switch S2 that will be determined by the
upstream line and the commutation parameters. Therefore, the capacitor will be charged up to a
value depending on the initial voltage, the system voltage and a voltage related to the stored
inductive energy in the upstream line. In short, the residual capacitor voltage will depend on the
network parameters to a great extent. When the main breaker S1 is not separated at the first currentzero, the current interruption can be produced at the second current-zero crossing. If the switch S2 is
21
bi-directional, the damped current will oscillate in the circuit until it becomes zero and the capacitor
voltage becomes equal to the supply voltage. As a matter of fact, this oscillation enables the stored
inductive fault energy to be dissipated in the circuit resistance. However, the switch S2 and the
rectifier station are generally uni-directional. As a consequence, after the first current-zero occurs in
the switch S2, it opens and the capacitor CC will have to withstand high voltages. At this instant,
current interruption is achieved. Finally, the load breaker S3 can be opened without any arcing. For
a successful commutation, the main breaker S1 must be able to maintain the isolation between its
electrodes at and after the current -zero creation. This active commutation circuit is known as the
one-stage interruption method. Disadvantages of this method include:
the need of a continuous external voltage for charging the capacitor CC;
high overvoltages across the breaker when a current interruption occurs and this requires
voltage limiting devices, such as arresters, MOVs, etc.;
CC must have a large capacitance value, consequently, it must have a large size and a high
price;
the commutation circuit may be unable to fulfill its function after an interruption failure.
Apart from the active mode described above, a passive mode is needed sometimes. In the passive
commutation mode, it can be assumed that a short circuit has been caused on the load-side, resulting
in fault current iS=iB flowing in the circuit. When the fault current iS exceeds the critical limit, the
main breaker S1 will open drawing an arc between its electrodes. The switch S2 subsequently must
be closed in order to initiate a counter-current iC in the branch S1. A proper combination of LC and
CC will create an oscillation that generates at least one current-zero crossing in the main breaker S1.
For the passive mode, the current commutation needs a longer time due to the interaction between
the arc and the LCCC-loop. An oscillatory current will be created by an uncharged capacitor that is
repeatedly charged and discharged by the arc voltage in the course of current interruption. The
condition for current interruption in the main breaker S1 is created solely by passive elements in
parallel with the breaker and by the properties of the arc itself. When the contacts are separated, arc
plasma is formed. The arc voltage will increase further as a result of arc lengthening and the heat
loss increases. During a short period, the current in the LCCC branch will show a growing
oscillation. At a time when its magnitude is equal to the main current, current-zero in the main
breaker S1 can be produced. The main current iS commutates entirely to the parallel path.
Consequently, the source will charge up the capacitor increasing its voltage. At a moment that the
current is zero in the auxiliary switch S2, the capacitor will be fully charged so that its voltage will
reach its highest value. As a result, the interruption succeeds. If the auxiliary switch S2 is bidirectional, the oscillation can continue until the capacitor voltage is equal to the supply voltage,
otherwise the interruption will occur as soon as the current becomes zero.
Every DC system has a maximum fault current. Obviously, the rate of change of the fault current
depends on the line inductance. Since the energy stored in the commutation capacitor is limited too,
there will be another significant quantity of energy available for creating a successful current-zero.
Therefore, the maximum trip current for recognizing a fault has to be determined carefully for each
DC system. As an illustration of the current interruption procedure, a DC system with a prospective
22
Chapter 2
fault current of 10kA will now be analyzed. For the fault current, a rate of change between 1 and
10A/:s has been assumed. Figure 2.2 shows typical DC faults and their current slopes.
10
9
=1ms
=3ms
=6ms
=9ms
3
2
1
0
=1ms
=3ms
=6ms
=9ms
di
__ [A/s]
dt
Current [kA]
10
3
2
1
0
10
time [ms]
10
time [ms]
(a)
(b)
Figure 2. 2 Typical DC faults with Ipros=10kA and 4 different time constants;
(a) the currents and (b) the current slopes.
This study will now concentrate on the active counter-current injection method which is controlled
by a uni-directional solid-state switch. That will lead to the realization of a hybrid breaker with a
current limiting ability using the current commutation principle which can limit a 5kA prospective
DC fault to just 3kA in 1kV/1kA DC systems.
2.2. Analysis of the active commutation circuit

A typical sequence for one-stage DC interruption is illustrated in Figure 2.3. For convenience, the
current is represented by a straight line rising from zero.
vC
i
It1
iS
(a) t0#t#t1
t0
t0
t
iS
I t1
(c) t2#t#t3
vC
iC
(b) t1#t#t2
t1
1st CZ
2nd CZ VCt2
iB
Isp
It2
VCO
t1
t1
t2
t
t
vC
VCE
iS=iC
t2
t2
t3
t3 t
Figure 2. 3 The sequence of one-stage DC fault interruption; CZ current-zero crossing in the main breaker.
23
At time t1, the source current iS reached a level It1, see (a), the threshold for starting the interruption
process. A counter-current injection iC was applied to oppose the source current iS, see (b). As a
result, the current in the breaker iB would decrease. At instant t2, the current iB became zero and the
voltage across the commutation capacitor reached VCt2. After that, current-zero was produced and
the current iS was completely commutated from the main breaker to the parallel path. During the
interval t1-t2, the source current iS kept increasing. When charging in the interval t2-t3, the source
current was firstly increased due to the stored magnetic energy transfer and that remaining in the
capacitor CC. Subsequently, charging changed to the opposite polarity. At time t3, the source current
iS reached zero when the capacitor CC was fully charged, see (c). The capacitor current was
eventually interrupted and its final voltage (VCE) increased to a higher value but having an opposite
polarity. Hereafter, the load breaker S3 could be opened in order to isolate the fault from the source.
The final voltage across the capacitor CC had to be limited which depended on the magnetic energy
stored in the system, the initial voltage of the capacitor, and the supply voltage. When that voltage
reached the clipping value of the arrester, it limited the overvoltage. This process prevented any
further voltage rise as the arrester partly absorbed the inductive DC-line energy (Wm = 1 2 L i 2 ).
Obviously, a proper choice of arrester voltage for the clip was vital. Energy absorption by the
arrester would lead to a decay of the fault current at a certain time depending on the line inductance
and the last current value before the commutation. However, in a very high inductive system, the
arrester might not be capable of absorbing such amounts of energy repetitively. If this energy was
excessive, it might cause permanent damage or even destruction of associated devices (S2, MOV,
capacitor, etc.). Accordingly, the whole breaker would not interrupt the current and it would lose its
ability to function repetitively.
For the sake of clarity, the following analysis does not include circuit resistance. Furthermore, the
line inductance on the source side LT was considerably larger than in the commutation coil LC. The
energy required for a counter-current injection depended on the capacitance value and the initial
voltage (WCO = 1 2 CC VCO ). Such energy had to be prepared and maintained permanently. The larger
2
currents had to be interrupted so that more energy was needed. Charging energy for the capacitor
could be supplied by the main voltage system itself or by means of an external supply.
In an oscillatory circuit without damping, the maximum counter-current injection could be
determined roughly by the equation (2.1) :
CC
i$C = VCO
.
LC
(2.1)
Obviously, a high initial voltage would result in a high initial rate of change of the counter-current.
A rough expression for this slope of the current is diC dt
16
conditions apply; S1 is closed, S2 is open, vC t
t =0
max
= VCO LC . The following initial
= VCO and the circuit current could be considered
to increase linearly. Assuming, that the current in the source iS reached the trip value, then S2
24
Chapter 2
closed and initiated a counter-current iC . This counter-current can be represented linearly, see
16 1
Figure 2.3 (b), so that iC t = tVCO
16
16
6L
and the capacitor voltage can be written as :
1
t2
iC d + VCO
VCO + VCO
2 LC CC
CC 0
vC t =
At time t 2 , current in the breaker becomes zero; which can be defined as current-zero time t z
16 16 16
changes to v 1t 6 = 3 t
16
i B t z = iS t z iC t z . This current will be iC t z = iz = t z VCO

C
2
z
VCO
8 12 L C 6 + V
C
CO
6L
and the capacitor voltage
. Subsequently, current from the source will follow the
commutation path, see Figure 2.1. This current obeys the following differential equation:
di
E S + vC t z = LT + LC C + vC t
(2.2)
dt
with the initial current iC t z = iz .
16 1
16
16
The solution of this differential equation is :
+ t
1 6 E 1 L v+1L 66 sin2 1t t 67 + i cos2 1t t 67
iC t =
where : o =
1L
(2.3)
+ LC CC
Introducing a new parameter :

i L + LC
iz
tan = z o T
=
E S + vC t z
o CC E S + vC t z
16
1 67
(2.4)
and using the trigonometric equivalent, the capacitor current from equation (2.3) can be rewritten
as:
6
1 6 1E + vL 16t cos sin2 1t t 6 + 7
L +
C 2 E + v 1t 67 sin 1t t 6 +
=
7
cos 2
iC t =
(2.5)
16
By integrating this current, the capacitor voltage becomes : vC t =
I
t
16
1
iC d + K
CC t z
and substituting : t = t z , the integration constant can be found : K = E S .

The capacitor voltage is governed by :
+v
1 6 E cos 1t 6 cos2 1t t 6 + 7 E
vC t =
(2.6)
The maximum current of the capacitor obtained from equation (2.5) at t x occurs when :
2 1
6 7
sin o t x t z + o = 1, so that iC max =
C 2 E + v 1 t 67 .

cos
o
z max
From equation (2.4), the maximum current iz max can be defined as :

tan o =
iz max
o CC E S + vC t z max
1 67
so that :
t x = tz +
25

(2.7)

1 67
iz max
1
arctan
o 2
o CC E S + vC t z max
(2.8)
i or sin = i .
i
i
The time when the capacitor voltage is zero at the instant when v 3t 8 = 0 , can be derived from
E cos
equation (2.6), namely cos4 3t t 8 + 9 =
E + v 1t 6
Further, from the trigonometry, we can define o = arcsin
z max
z max
C max
C max
so that :
ty =

+ t
1 6

1
E S cos
arccos
o
E S + vC t z
(2.9)
1 6
The current becomes zero when iC t int = 0 . The time t int is called the total interrupting time and it is
written as :
arctan

C 2 Ei + v 1t 67
+t
z
t int =
From equation (2.7) : o =
(2.10)
iz max
.
tan o CC E S + vC t z max
1 67
Substituting this into equation (2.9) and extracting CC , gives :

iz max
CC =
t y tz
E S cos o
tan o E S + vC t z max arccos
o
E S + vC t z
1 67

1 6
1
By definition : LL = LT + LC = 2 , therefore :
o CC
LL =
3

(2.11)
1 67
tan 2 o CC E S + vC t z max
iz max
After substituting (2.11) and performing algebraic manipulation, this becomes :
LL =
1 673t
tan o E S + vC t z max
iz max
tz
arccos E cos
E + v 1t 6
S
(2.12)
To make the expressions (2.11) and (2.12) appropriate, it is necessary to define three new terms:
i t
v t
v t
CCo = C z max t y t z , LLo = C z max t y t z and parameter k = C z max .
vC t z max
iC t z max
ES
1 63
1 6
1 63
1 6
1 6
A per unit basic expression can be obtained by simplifying the above ratio as :
26
Chapter 2
CC
=
CCo
1 E cos
tan 1 + arccos
k E + v 1t 6
S
and
LL
LLo
(2.13)

=
arccos E cos
E + v 1t 6
tan o 1 +
1
k
(2.14)
The graphs in Figure 2.4 represent equations (2.13) and (2.14) for two different k values. The
horizontal axis represents the term sin o from equation (2.7).
10
20
18
k=1
k=4
16
k=1
k=4
14
12
CC_
___
CCo
LL_
___
LLo
10
8
4
6
3
2
1
0
0.1
0.2
0.3
0.4i
0.5
zmax
____
icmax
0.6
0.7
0.8
0.9
0
0
0.1
0.2
0.3
0.4i
0.5
zmax
____
icmax
0.6
0.7
0.8
0.9
(a)
(b)
Figure 2. 4 (a) The unit base of the capacitor and (b) The unit base of the circuit inductance.
Next, in order to make the circuit analysis more realistic, circuit resistance had to be included in the
analytical solution. Figure 2.5 presents the extended circuit to show the interrupting sequences.
Additionally, discharged energy stored in the commutation capacitor can be taken into account by
extending an energy absorbing circuit across the capacitor. The energy absorbing circuit (LA, and
RA) played a part only after the capacitors polarity changed, so that in the idling (waiting) state, the
pre-charged capacitor had to retained its stored energy continuously. Therefore a reverse biased
diode D1 was required. The following new symbols are introduced now : the MS-make switch and
the Thy-thyristor as an auxiliary switch. When considering ideal DC systems, the following
assumptions can be made :
27
the DC voltage source ES is constant in time and the internal resistance is negligible;
switches are ideal (no voltage drop or heat loss) and they introduce no transients during
switching;
the lines and devices have linear characteristics without limitation for the rate of change of
current and voltage.
Therefore, the interruption process could be separated into intervals in which each interval
represents a linear differential equation. In this way, each differential equation could be solved
successively to give analytical solutions.
RS
LS
MS
CC
vC
+
ES
RS
LA
LS
ES
S1
D1
LC,R C
Thy
LS
MS
RA
RS
MS
S1
CC
ES
S1
LC,R C
Thy
A
B
RS
LS
RS
MS
CC
ES
LC,R C
LA
MS
CC
ES
-
LS
RA
D1
Thy
RS
LS
MS
+
ES
-
Thy
D
Figure 2. 5 The sequence of the one-stage interruption; MS: make switch, S1: main breaker.
By solving the differential equations that corresponded to each interval, the analytical solution was
obtained, where the end state of the previous interval was introduced as the initial state of the
following interval.
A
The first interval 0 t t1
In this interval, when make switch MS was closed, the current can be expressed by the differential
equation :
di t
LS S + RS iS t = vS t ,
(2.15)
dt
Generally, before a fault occurred, the rated current I R flowed, so that the initial condition becomes:
16
16
iS t
t =0
16 16
16
= I R otherwise iS t
t =0
= 0.
16
The source is defined as a constant voltage source: vS t = E S for all values of t . The source current
iS can be solved from the expression:

i (t ) = 1 I I 6 1 e + I

where: is the time constant ( =
(2.16)
LS
), LS and RS are the inductance and the resistance at the fault
RS
location relative to the source; I is the steady-state fault current (prospective) determined only
28
Chapter 2
from the resistance and DC voltage system, ( I =
ES
). For convenience, it is assumed that I R is
RS
zero. In the commutation path, the capacitor voltage and its current are constants
vC (t ) = vC (t1 ) = VCO and iC (t ) = 0 . Initially, the current in the breaker was equal to the current in the
source until the commutation process occurred during the next interval i B (t ) = iS (t ) . At the end of
the first interval, the source current becomes iS (t1 ) = I t 1 (where a counter-current injection would
be performed).
B
The second interval t1 t t 2
The counter-current iC was injected during the second interval in which the current in the main
breaker opposed the counter-current. Then the current in the source satisfies the following
differential equation:
di t
LS S + RS iS t = vS t
(2.17)
dt
with the initial value : iS t t = t1 = iS t1 = I t 1.
16
16 16
16 1 6
The commutation capacitor discharged its stored energy obeying the following differential equation:
16
16 16
d 2 vC t
dv t
(2.18)
LC CC
+ RC CC C + vC t = 0
2
dt
dt
The resistance of the commutation path was RC ; therefore, the initial conditions are vC t t = t1 = VCO
16
16
dvC t
t = t1 = 0 .
dt
The counter-current obeys the following relationship:
dv t
iC t = CC C
dt
d 2iC t
di t
This can be rewritten as: LC CC
+ RC CC C + iC t = 0 ,
2
dt
dt
di t
VCO
.
with the initial conditions: iC t t = t1 = 0 and C
t = t1 =
dt
LC
and
16
16
16
16
16
(2.19)
16 16
Applying the superposition theory allows the breaker current to be calculated as:
i B t = iS t iC t
16 16 16
(2.20)
Solutions for these differential equations give the following expressions:

The source current increase is given by:
6
iS ( t ) = I I t 1 1 e
1t t 6
1
+I

(2.21)
t1
The capacitor voltage and current are given by:
2 1 67
6 sin21t t 67
2 1 67
vC (t ) = VCO e 1 t t1 6 cos t t1 + A1 sin t t1
iC (t ) = A2 e 1 t t1
(2.22)
(2.23)

where: =
RC
; o =
2 LC
29
1
; = o2 2
LC CC
V
A2 = CO
LC
A1 =
During the commutation process, the current in the main breaker was i B (t ) = iS (t ) iC (t ) . This
current would become zero at time t 2 , when the source current commutated to the parallel path. The
time required to reach current-zero was Tz = t 2 t1. The determination of this time zero Tz can be
obtained from the function f : = I I e
Tz + t1
1 6
A2 e Tz sin Tz = 0 , where t1 is the instant when
the counter-current began to flow with reference to the beginning of the fault time. This function is
a transcendental equation; so that the solution for Tz can only be found numerically using the
Newton-Raphson method [2.28]. Generally, this method could be used to find the root of the nonf xn 1
linear equation f by successive linearization, given that: xn = xn 1
. From function f ,
df
x
dx n 1
the following expression could be derived for the iteration process:
1 6
1 6
1 e 1
I

Tzold + t1
Tz new = Tz old
Ie
Tzold + t1
A e sin1T 6

2 sin1T 6 cos1T 67
Tzold
zold
(2.24)
+ A2 e Tzold
zold
zold
The new Tz computation was repeated by back substitution until the function f (Tz ) 0 was
satisfied.
In order to have current-zero in this interval, the maximum counter-current had to be at least the
same as the fault current; therefore, a maximum trip level for the fault current had to be determined
from the following relationship: I C max iS t trip + Tz . Generally, t trip t1 , in a system without delay
and it is clear that t trip = t1. The trip level current
I trip = iS (t trip ) = I (1 e
Tz
I trip
could be obtained from:
t trip
) . After algebraic manipulation, the maximum trip level is expressed as:
I trip I (1 e ) + A2 e
Tz
(2.25)
This relationship shows the necessity for matching the network parameters ( , I ) and the
commutation parameters (VCO , and ) for a successful interruption.
When: i B (t 2 ) = 0 , the final capacitor voltage vC (t 2 ) = VCt 2 and current iS (t 2 ) = iC (t 2 ) = I t 2 could

be used as the initial inputs for the next interval.
C
The third interval t 2 t t 3 .
30
Chapter 2
In this interval, the current at the source would equal to the current in the capacitor. Both the
+
capacitor voltage and current would have the following initial values; vC (t 2 ) = VCt 2 and
+
iC (t 2 ) = iS (t 2 ) = I t 2 .
The differential equation for the capacitor voltage can be expressed as:
16
6 16 16 16
d 2 vC t
dvC t
+ CC RS + RC
+ vC t = v S t
2
dt
dt
with the initial conditions:
CC LS + LC
16
vC t
t = t2
16
= vC t 2 = VCt 2 and
16
dvC t
dt
t = t2
16
iS t
CC
t = t2
(2.26)
It 2
.
CC
The current in the capacitor satisfies the equation:

dv t
iC t = CC C
dt
16
16
(2.27)
6 16
6 16 16
d 2 iC t
di t
which can be written in another form as: CC LS + LC
+ CC RS + RC C + iC t = 0 ,
2
dt
dt
when the initial conditions are:
16
iC t
t =t2
16
=i S t
t =t2
16
= iS t 2 = I t 2 and
16
diC t
dt
t = t2
2E
1 67
vC t
LS + LC
t =t2
1R
6 16
+ RC
iS t
LS + LC
S
t =t2
Solving these differential equations led to the following expressions for the capacitor voltage and
current :
2 1 67
2 1 67
cos21t t 67 + K sin21t t 67
vC (t ) = K1 + e 1 t t2 6 K2 cos t t 2 K3 sin t t 2
iS (t ) = iC (t ) = e 1 t t2 6 I t 2
where : RT = RS + RC ; LT = LS + LC ; =
K1 = E S
K2 = VCt 2 E S
1
!
1 1E
=
!
K3 =
K4
1
I
VCt 2 E S + t 2
CC
S
VCt 2
I t 2
LT
(2.28)
(2.29)
RT
; o =
2 LT
1
; = o2 2 ;
LT CC
"#
$
"#
$
When the source current became zero at time t 3 , the auxiliary switch Thy turned off and time t 3 can
be found from the relationship: iS (t 3 ) = iC (t 3 ) = 0 ,

arctan
t3 = t2 +
I
K .
t2
So that the final capacitor voltage VCE can be written as :
vC (t 3 ) = K1 + e

!

K sin 1 arctan I
K
K

K cos 1 arctan I t 2
2
arctan t 2
K4
t2
"#
#$
(2.30)

D
31
The fourth interval t 3 t t 4
The previous intervals show the non-conducting state of the diode D1, but in this interval, the diode
D1 was forward-biased allowing the energy stored in the commutation capacitor to discharge to the
passive absorbing path. Basically, this path would protect against any continuous high voltages that
remained in the capacitor; however this could only be done when the switch Thy had turned off.
The new initial capacitor voltage could be obtained from the final voltage of the previous state:
vC (t 3 ) = VCt 3 . The voltage of the capacitor becomes:
vC (t ) = K1 s2 e s1t s1e s2 t
(2.31)
and its current is :
iC (t ) = K2 e s1t e s2 t
where : =
K1 =
RA
; o =
2 LA
(2.32)
1
; = 2 o 2 ; s1 = ; s2 = +
LA Cc
VCt 3
V
= Ct 3
s2 s1 2
2
2
s1s2 CC VCt 3 CC VCt 3
K2 =
=
s2 s1
2
The fifth interval t 4 t t5
In this interval, the fault current was interrupted, so that the make switch MS could be disconnected.
For convenience, the formulas in the intervals C and D have been based on the situation when an
absorbing circuit operates only in the fourth interval. This assumption can only be justified if the
absorbing circuit has very high resistance and inductance values which means that the time constant
is considerably greater than that of the commutation circuit. Otherwise, its contribution has to be
included it in the third interval
too.
The absorbing components had to have high values in order to satisfy the requirement of the
auxiliary switch Thy being turned off naturally. In that way, the voltage between anode and cathode
would be negative reducing the current flow to less than its holding value. If this condition was met,
the switch Thy turned off and at that instant, the source could not continue to maintain the current
flow in the absorbing path. Finally, the commutation capacitor discharged its stored energy.
Theoretically, the discharging process may continue indefinitely, but in practice it was only a few
hundred milliseconds at instant t 4 . In other words, the absorbing circuit should not affect the
commutation principle described in the intervals B and C . Low absorbing component values may
cause interruption failures, because the thyristor remained in a conducting state in which case,
another load breaker might be able to suffice interrupt the residual current.
The analytical equations that have been derived in this section can be used for calculating the
required peak device voltage, the device current, the current-zero time, etc., when all of the
32
Chapter 2
component values and the input-output conditions are known. However, a design problem was that
of circuit synthesis in order to calculate the values of the component capacitance and inductance
which were required for circuit operation within the limit of maximum voltage, di dt , dv dt , etc.,
as specified for the components used.
2.3. Dimensions for the components of the parallel circuit

The commutation device values had to be chosen in such a way that the commutation frequency
f Com of 0.5, 1 and 2 kHz was fast enough to make the necessary current-zeros within 500:s. The
circuit resistance of the commutation path was taken to be constant (20mS). The initial capacitor
voltage was chosen to approximate the supply voltage. Figure 2.6 shows the relationship of the
capacitance values and the maximum counter-current produced by two initial voltages (a) -500V
and (b) -1000V for three different commutation frequencies.
10
Ipeak [kA]
20
18
fCom =500Hz
fCom =1kHz
fCom =2kHz
fCom =500Hz
fCom =1kHz
fCom =2kHz
16
14
Ipeak [kA]
12
10
500
1000
1500
2000
500
CC [F]
1000
1500
2000
CC [F]
(a)
(b)
Figure 2. 6 The maximum peak currents with three commutation frequencies
as function of commutation capacitance values; (a) V CO=-500V (b) VCO=-1000V.
Figure 2.7 shows the commutation inductance required for realizing these counter-currents.
300
300
fCom =500Hz
fCom =1kHz
fCom =2kHz
LC [H]
200
250
Inductance [H]
250
150
100
50
200
150
100
50
500
1000
CC [F]
1500
2000
50
100
150
200
250
Number of turns [-]
(a)
(b)
Figure 2. 7 (a) The required commutation coil and (b) its realization with one-layer solenoid.
The inductance of a small single-layer air-core solenoid can be calculated using the following
empirical relationship [2.35] :
33
0.394r 2 N 2
2
in H; valid only if l > r ; r and l are in cm
LC =
9r + 10l
3
where: r the radii of the solenoid, l the length of the solenoid and N the number of turns (r=5.5cm,
l=N*1cm).
Table 2.1 lists the time required for current-zero from the chosen counter-current frequencies,
calculated from equation (2.24).
Table 2. 1 The relationship between frequency of the counter-current and a current-zero event;
(CC=1000:F, VCO=-1kV, RC=20mS, t1 =0.5ms, with I =10kA).
f Com [kHz]
0.5
1
2
Tz [:s]
137
28
7
Rapid current commutation required the counter-current to have a high frequency; clearly, this could
be realized by using commutation coil as low as possible. However, that would require more effort
and it can be tedious, due to the limitation of the auxiliary switch (S2 or Thy) having to handle
initial counter-currents. Therefore, the commutation coil had to limit the di dt in order to prevent
internal damage. Furthermore, the switching time at turn-on and turn-off could be quite critical.
Other considerations included the reverse and forward blocking capacities of the auxiliary switch,
particularly after current-zero at the source, when the commutation capacitor had to sustain high
overvoltages. The auxiliary switch should withstand the maximum voltage across the capacitor. In
practice, there could be various technical and economic reasons for preferring one choice to another;
therefore, a compromise would often determine the final decisions.
Depending on the trip level chosen for the fault detection system, the most suitable capacitor and its
initial voltage could be found from Figure 2.8.
20
VCO =-500V
VCO =-1kV
VCO =-1.5kV
VCO =-2kV
18
Current [kA]
16
14
12
10
8
6
4
2
0
500
1000
1500
2000
2500
3000
CC [F]
Figure 2. 8 The maximum counter-current as a function of the capacitance values and the initial voltages;
the circuit resistance is 20mS and the frequency is 1kHz.
34
Chapter 2
With the aid of those graphs, a choice of initial voltage level and corresponding capacitor value for
a certain DC system could be made. When there was no inductance or resistance in the upstream
line and the source side, the minimum voltage across the capacitor would be at the end of the
commutation equal to the initial voltage, but in reverse polarity, plus the supply voltage. However,
in practice, lines were considered to be inductive which could increase the residual voltage, because
of the energy exchange between the stored magnetic field and the stored electric field in the
capacitor.
Next, an attempt had to be made to reach a solution when interrupting a DC fault which had to be
isolated from the source within 5ms. Depending on the component values and the type of switches
S1 & S2, several current-zero crossings were possible; therefore the current-zero event and the
contact separation had be matched carefully. The current commutation process took place after the
electrodes of the main breaker S1 had opened a certain distance to allow for any overvoltages
afterwards. Since the auxiliary switch S2 was chosen uni-directional, obviously, the counter-current
from a resonant LC-circuit could provide two current-zeros, so giving two opportunities for an
interruption. As criteria, it was intended that a successful interruption should occur in the first
current-zero when the increasing fault current was still small. If this was not possible, then the
second current-zero can be used; however the fault current would be greater. A vacuum breaker
with its excellent ability to interrupt at the current-zero could meet the requirements. By detecting
the fault rapidly and operating the breaker quickly, a fault current could be reduced to zero before it
became too high. With the aid of a quick-acting mechanism, the time difference between detection
and the contact opening could be kept low (in the order of 300:s). If the counter-current was unable
to produce the current-zero at the second time, there no be another opportunity to interrupt the
current. The fault current would become greater and the capacitor polarity would change remaining
less energy than at first, so that, the entire interruption process would fail. Subsequently, this would
cause the upstream breaker in the AC network to clear the fault, although the fault may have
occurred long enough to damage the downstream network.
Depending on the commutation values chosen, a suitable switch S2 might be found from the
available power semiconductors. Solid-state switches were commonly vulnerable to increasing
initial currents. The switch had to be able to withstand surge counter-currents when switching on
and surge voltages when switching off. Basically, power semiconductors allowed high current to be
switched by lowering its frequency and vice-versa.
This one-stage interruption concept could have different variants depending on the switch types,
such as:
1. hybrid breakers: the main breaker was a mechanical breaker and the commutation switch
was a solid-state switch (air breaker - thyristor [2.26], vacuum breaker - thyristor [2.4,5], or
vacuum breaker - GTO thyristor [2.6]);
2. purely mechanical breakers: the main breaker as well as the commutation switch were
mechanically operated (vacuum switch - vacuum switch [2.34], air switch - triggered spark
gap, vacuum switch - triggered spark gap);

3.
35
purely solid-state breakers: both the main breaker and the commutation switch were solidstate types (thyristor - thyristor [2.7,8], GTO - thyristor or the IGCT alone).
2.4. Simulating one-stage interruptions using MATLAB

The time-dependent patterns of relevant currents and voltages in the electric circuit of Figure 2.5
can be calculated analytically, as is done in Section 2.2. However that is laborious due to presenting
their solutions graphically with a succession of different time periods. Therefore, calculations
implemented in MATLAB programming was done instead. The effect of changing the component
values should be seen immediately. The basic differential equations given in the previous section
can be manipulated in their different discretization forms making them suitable for computation
[2.9,10]. First order approximations would be carried out by writing numerical routines. For
simplicity, the trapezoidal integration method [2.11] has been used to solve the linear differential
equations with respect to the associated time intervals in order to give a time domain solution for
the linearized equations. Such a technique was ideal for this application because a very accurate
solution was not required and the method was numerically stable; consequently large step sizes
could be used. Numerical stability more or less meant that the solution did not blow up if the time
step was too large. Instead the higher frequencies would not be correct in the results, but the lower
frequencies at which the chosen time steps provided an appropriate sampling rate would still be
reasonably accurate. Changes in the circuit topology could be monitored at each time step, due to
current-zero events in switches. Therefore, at this event, the numerical routine for the appropriate
topology was executed.
Any set of network equations can be formulated according to the Kirchhoffs Current Law and
Kirchhoffs Voltage Law and based on them, the discretization form given by any differential
equations can be constructed. By using the Backward Euler integration rule, the element
relationship in its discretization form can be rewritten as :
Resistor: v k + 1 = R i k + 1
Capacitor:
Inductor:
1 6 1 6
C
i 1 k + 16 = 2v1 k + 16 v1 k 67
t
L
v1 k + 16 = 2i 1 k + 16 i 1 k 67
t
(2.33)
The solution of such linear networks described above can be found by assuming that all currents and
voltages denoted by k + 1 are unknown at the k-th time step and all variables denoted by k are
1 6
16
known. Computer software such as EMTP (Electromagnetic Transient Program) were developed to
implement this method [2.12,13]. The differential equations given in the Section 2.2 are
decomposed at each interval making them ready for numerical implementation as follows :
36
Chapter 2
Step 1
Step 2
Algorithm of one-stage interruption

: Assign component values and simulation times length
: Initialize all states at k = 0, t k = 0 , iS (0) , i B (0) , iC (0) and vC (0)
Step 3
: Increment the time step t k +1 = t k + t
Step 4
: Set the circuit topology,

If topology is A :
Calculate iS t k +1 , iC t k +1 , vC t k +1
1 6 1 6 1 6
{Checking
1 6
If iS t k +1
a fault event based on the trip level or trip time}

I trip or t k +1 = t trip Then Initialize new initial values for topology B
If topology is B :
Calculate iS t k +1 , iC t k +1 , i B t k +1 , vC t k +1
1 6 1 6 1 6 1 6
{Checking current-zero events in the breaker}

If i B t k +1 0 Then Initialize new initial values for topology C
1 6
If topology is C :
Calculate iS t k +1 , vC t k +1
1 6 1 6
{Checking
1 6
If iS t k +1
a current-zero event in the thyristor}

0 vAK 0 Then Initialize new initial values for topology D
If topology is D :
Calculate iC t k +1 , vC t k +1
1 6 1 6
Step 5
End states occur

: Stop if time t k +1 t end , otherwise Return to Step 3
Step 6
Step 7
Step 8
: Calculate the energy balance (Energy input equals Energy output)

: Graphical processing
: End.
This algorithm was implemented in the MATLAB program [2.14]. The accuracy of the algorithm
could be verified by calculating the energy balance in the circuit. The law of energy conservation
states that the total energy input is equal to the energy output. This is expressed by the following
relationship :
(2.34)
Ein t = Eout t
16
16
The total energy input at any particular time t k is defined as :
in
1t 6 = Initial stored energy + delivered energy by the source

1
= C V + I E i 1t 6 dt
2
k
t = tk
CO
(2.35)
S S
t =0
By discretization, an approximation is given by :
16
16
Nk
1
2
Ein k 2 CC VCO + ES iS k t
k =1
where t k = t t N k .
(2.36)
37
In the same manner, the total energy output can be calculated by :
out
1t 6 = Energy Stored in C + Energy Stored in Ls + Dissipated by Rs

1
1
1
= C V 1t 6 + L i 1t 6 + L i 1t 6 + I i 1t 6 R dt + I i 1t 6 R
2
2
2
k
t = tk
t = tk
S S
C C
(2.37)
t =0
dt
t =0
Its numerical approximation is written as :
16
Eout k
1 6
1 6
1 6
16
16
Nk
Nk
1
1
1
2
2
2
2
2
CC VC N k + LS iS N k + LC iC N k + iS k RS t + iC k RC t (2.38)
2
2
2
k =1
k =1
Table 2.2 shows the results from two different simulation time steps. Smaller time steps will
improve a numerical energy balance; however, they will need a large memory and will require long
simulation times. By choosing a sufficiently small step size, the trade-off between accumulated
errors and the computing time will be beneficial which results in choosing the time step four times
smaller than the smallest time constant in the system. For verifying of the result of computer
program, several time steps need to be used.
Table 2. 2 The energy balance in the simulated system in relation to the simulation time steps until t=1.5ms
(CC=280:F, VCO=-2kV, LC=85:H, RC=20mS, Itrip=2kA and I =10kA).
t [:s]
Ein [J]
Eout [J]
1
0.1
2799.39
2797.97
2800.93
2797.67
Conveniently, the energy balance of the entire simulation time could be determined and rewritten
as:
= Initial stored energy + delivered energy by the source
in
t =t
16
(2.39)
e
1
2
= CC VCO + E S iS t dt
2
t =0
In its discretized form, this becomes :

N
1
2
Ein k CC VCO + E S iS k t
2
k =1
and for the output energy
16
out
16
(2.40)
= Final energy stored + energy dissipated by circuit resistances
t =t
16
t =t
16
t =t
1 61
(2.41)
2
2
3
1
CC VCE 2 + iS 2 t RS dt + iC 2 t RC dt + iS 2 t RS + RC dt
2
t =0
t = t1
t =t2
Its discretized form is :
out
16
16
16
1 61
N3
N2
N2
1
2
2
2
k CC VCE + iS k RS t + iC k RC t + iS 2 k RS + RC t
2
k = N2
k = N1
k =1
(2.42)
where : N1 , N 2 , and N 3 correspond to the summation indexes associated with the upper and lower
values of the integration, respectively.
38
Chapter 2
Table 2.3 gives the energy balance computation for the entire 5ms of simulation time.
Table 2. 3 The energy balance in the simulated system related to the entire simulation time of 5ms
(CC=280:F, VCO=-2kV, LC=85:H, RC=20mS, Itrip=2kA and I =10kA).
t [:s]
Ein [J]
Eout [J]
1
0.1
3555
3553
3561
3554
The implemented algorithm was tested by examining its robustness when computing the following
four cases of one-stage DC interruption:
1.
The switch in the commutation path was bi-directional and the interruption was
satisfactory.
2.
The switch in the commutation path was uni-directional and the interruption was
satisfactory at the first current-zero in the main breaker.
3.
The switch in the commutation path was uni-directional and the interruption was
satisfactory at the second current-zero in the main breaker.
4.
Unsuccessful interruption due to a very high trip level.
In the program, implementation of both the linear time step and the automatic time step were
performed. Since a large time step could cause numerical instabilities, free choice was needed to
analyze a system to give a first impression when using the most appropriate devices. Furthermore,
time tripping and current tripping options were also included. Finally, additional snubber circuits
should be integrated across the main breaker S1 and thyristor in order to approach duplicate the
laboratory setup. The simulation was carried out using the following parameters; time step:
t = 2s , source voltage: E S = 1000V , inductive load: LS = 460H , limiting resistance:
RS = 100m , commutation capacitor: CC = 280F with initial voltage: VCO = 2kV , commutation
coil: LC = 85H , commutation resistance RC = 20m and for the snubber circuit across the
thyristor Rsn = 20 and Csn = 1F . The function of the snubber circuit will be presented later in this
chapter. Results of those four cases are presented in the following sub-sections.
2.4.1 Successful interruption using a bi-directional switch

In this case, after the source current was commutated, the current oscillation continued for several
time periods according to the circuit damping, even until the capacitors final voltage was equal to
the supply voltage. During oscillation, energy was transferred among the source, the commutation
capacitor, the circuit resistance and inductance. Figure 2.9 shows the simulation results for a short
simulation time of 5ms have been conducted and trip current of 2kA.

3000
39
5000
vS1
vCc
vLc
vThy
4000
2000
Voltage [V]
Current [A]
3000
1000
-1000
is
iS1
iCom
-2000
-3000
2000
1000
0
-1000
-2000
-3000
time [ms]
time [ms]
(a)
(b)
Figure 2. 9 Successful interruption with oscillation in an ideal DC system (I trip=2kA)
(a) currents in the source i s, the breaker iS1 and the commutation capacitor iCom
(b) voltages across the main breaker vS1, the commutation capacitor vCc, the coil vLc and the thyristor vThy.
2.4.2 Successful interruption at the first current-zero using a uni-directional switch

In practice, the DC source could not let the current through in both directions, because the polarity
of the rectifying diodes and the auxiliary switch S2 (thyristor) in the commutation path only allowed
the current to flow in one direction. The trip current level is 2kA and Figure 2.10 presents the
simulation results.
3000
5000
4000
2500
Voltage [V]
2000
Current [A]
3000
is
iS1
iCom
1500
1000
2000
1000
0
-1000
vS1
vCc
vLc
vThy
-2000
500
-3000
0
-4000
-500
time [ms]
-5000
time [ms]
(a)
(b)
Figure 2. 10 Successful interruption at the first current-zero in an ideal DC system (Itrip=2kA)
(b) voltages across the main breaker vS1, the commutation capacitor vCc, coil vLc and the thyristor vThy.
With such small capacitance, the maximum capacitor voltage reached 4.5kV and although this
overvoltage was discharged through the absorbing circuit, it was still harmful and too high for 1kV
systems.
40
Chapter 2
2.4.3 Successful interruption at the second current-zero using a uni-directional

switch
Instead of an interruption occurring only at the first current-zero, this time the program managed to
simulate an interruption at the second current-zero as well. Figure 2.11 shows the simulation
results.
4000
5000
4000
is
iS1
iCom
2000
3000
Voltage [V]
Current [A]
3000
1000
2000
1000
0
-1000
vS1
vCc
vLc
vThy
-2000
-3000
-1000
-4000
-2000
-5000
time [ms]
time [ms]
(a)
(b)
Figure 2. 11 Successful interruption at the second current-zero in an ideal DC system (Itrip=2kA)
2.4.4 Unsuccessful interruption

In the last example, the trip current level was set to 4kA. The energy stored in the capacitor was not
sufficient to deliver the necessary counter-current at this level. During injection, the source current
fell. Since the current did not drop to zero, the source current increased again and returned to its
prospective value. The counter-current oscillated for half a period and Figure 2.12 shows the
simulation results.
8000
2000
7000
is
iS1
iCom
5000
1000
Voltage [V]
Current [A]
6000
4000
3000
2000
-1000
-2000
vS1
vCc
vLc
vThy
1000
-3000
0
-1000
time [ms]
-4000
time [ms]
(a)
(b)
Figure 2. 12 Unsuccessful interruption with the oscillation in an ideal DC system (Itrip=4kA)
41
The capacitor voltage changed its polarity and lost part of its energy due to the commutation
resistance. The fault current was not interrupted due to the very high trip level.
2.5. Protection against excessive overvoltages

Generally speaking, in a network with a lot of switching devices, overvoltages can occur. Those
overvoltages will become excessive if the system is very inductive. In conventional breakers, an
arcing process provides for the energy stored in the system to be released. When the medium
surrounding the arc plasma is capable of absorbing the energy released, the arc plasma will cool
down and extinguish. High temperatures in the arc plasma for long duration can damage contacts.
However, hybrid switching overcomes energy dissipation through arcing because the arcing time in
the main breaker is short or not at all. Instead, the energy does not become dissipated through the
arcing but it changes its state to a stored form. The energy is stored normally in the commutation
path and remains as overvoltages across the capacitor. The commutation capacitor stores the
magnetic energy into electric energy. Usually, a large residual voltage across the capacitor can
damage the system. However overvoltages can be limited to an optimal compromise of between 1.5
and 2 times that of the nominal system voltage. So, if the level of the overvoltages can be estimated,
components and solid-state switches can be chosen and the necessary protection system can be
determined to suppress the overvoltages. Unfortunately, this depends upon the network and in all
circumstances, precautions and protective measures have to be considered as integral parts of any
hybrid breaker application.
16
16
The magnetic energy Wm stored in an inductive system could be defined as Wm t = 1 2 LT i 2 t ,

where: LT is the total inductance of the system. In Figure 2.13, the magnetic energy stored in the
inductance is given as a function of the line inductance and the circuit current. The graph helps to
select the best components for energy absorption. The magnetic energy stored in the system was
very important for determining which arrester was required and the maximum surge parameters of
the devices used.
Wm (t) [Joule]
8000
6000
4000
2000
0
600
500
5000
400
4000
300
3000
200
LT [H]
2000
100
1000
i(t) [A]
Figure 2. 13 The magnetic energy stored in a system, as a function of the current and the line inductance.
As mentioned earlier, in hybrid interruption systems, the arcing process was minimized, however,
the switching-off energy would be transferred to the commutation capacitor resulting in high
42
Chapter 2
overvoltages. In the practical examples here, the residual voltages were calculated for a 1kV DC
system in order to determine their values. The variables chosen included :
the line inductance and resistance values representing variables at fault locations in the
transmission line,
the trip level of the fault current in which the counter-current was initiated.
Since the energy stored in the capacitor was finite, for each of the chosen capacitors there would be
a limit to the trip current (Itrip parameter) which was just sufficient to produce current-zero.
Therefore, this limit had to be chosen carefully. The algorithm was completed in order to produce
results. It could show the limit for a trip level and the consequences of residual overvoltages across
the commutation capacitor. For the computation, two commutation capacitors (500:F and 1000:F)
were used having initial voltages of -500V and -1kV with respect to a commutation frequency of
1kHz. The line resistance is 100mS. Figure 2.14 and Figure 2.15 present the expected maximum
capacitor voltages for both capacitance values.
3000
5000
2500
VCmax [V]
VCmax [V]
4000
2000
3000
1500
2000
1000
500
1000
0
600
500
0
600
2000
400
500
1500
300
400
1000
200
300
500
100
LS [H]
200
Itrip [A]
100
LS [H]
(a)
500
1000
1500
2000
2500
3000
3500
Itrip [A]
(b)
Figure 2. 14 The 3-D graphs of the maximum residual voltage across the capacitor of 500:F as a function
of the trip current (Itrip) and the source and line inductance (L S); fCom=1kHz ; (a) VCO=-500V (b) VCO=-1000V.
4000
5000
4000
VCmax [V]
VCmax [V]
3000
3000
2000
2000
1000
1000
0
600
0
600
500
500
400
300
200
LS [H]
100
500
1000
1500
2000
2500
Itrip [A]
3000
3500
400
300
200
LS [H]
100
1000
2000
3000
4000
5000
6000
7000
Itrip [A]
(a)
(b)
Figure 2. 15 The 3-D graphs of the maximum residual voltage across the capacitor of 1000:F as a function
of the trip current (Itrip) and the source and line inductance (L S); fCom=1kHz ; (a) VCO=-500V (b) VCO=-1000V.
43
Considering Figure 2.14 and Figure 2.15, it was possible to determine the current trip level that
should be set for successful interruption. The upper surfaces indicate where successful interruption
occurred and associated critical trip currents can be found along the edges. A minimum current just
above the rated current was used as a trip reference. An electronic detection circuit required such a
reference level in order to select and deliver pulses for discharging the capacitor when opening the
main breaker S1 and for sending a triggering pulse (with or without a delay) to initiate the countercurrent in S1. The energy absorbed by the suppression element could be approximated by:
t0
16 16
Wtr = Vcl t I tr t dt . Here, Wtr is the transient energy, Vcl is the clamping voltage, I tr is the transient
0
current and t 0 is the impulse duration of the transient.

The results showed that the residual capacitor voltage after a successful current interruption could
be so high that it exceeded the maximum overvoltage limit for the associated devices. Such
excessive overvoltages could also breakdown the insulating material of the capacitor itself.
Moreover, this residual capacitor voltage could trigger the solid-state switch incorrectly (misfiring)
and lead to defects in the devices. New measures were taken to prevent this by inserting an
overvoltage limiter. Its design conformed to the inductive energy stored in the system. The greater
the clamping voltage, the less the energy that had to be absorbed by the overvoltage suppressor. So,
a compromise had to be found between the capacitance value and the components capacities for
withstanding higher overvoltages or absorbing energy. The main characteristics of energy absorbing
devices could be summarized as follows:
they must absorb enough energy to dissipate the stored energy both with regard to
inductive as capacitive energy;
they must have a peak current capacity higher than the maximum interrupted current;
they must give a clamping voltage below the isolation breakdown voltage of devices in
the system.
However in operation, they must not change the main interruption sequence. Therefore, the time
constant of the absorbing circuit must be long enough to allow the thyristor changing to the blocking
state after its natural current-zero.
Furthermore, several transients were considered to be important for components, where applicable,
such as:
the maximum surge voltage of the commutation capacitor;
the maximum voltages across the thyristor (anode to cathode) in both blocking and
reverse states;
the instant when the current inversion begins;
the maximum di dt for the thyristor at the instant when the current inversion begins;
the maximum dv dt for the thyristor at the instant when the current inversion (turn-on)
begins and when it ceases conducting (turn-off);

the instant when current-zero occurs in the main breaker.
44
Chapter 2
In order to keep the capacitor residue voltages below the maximum non-repetitive overvoltage of
the system, the following measures had to be considered :
applying free-wheeling devices in high inductive systems where possible at the load
side,
choosing suitable capacitors and solid-state switches, so that they were able to withstand
long lasting non-repetitive high voltages,
developing overvoltage suppressing/absorbing circuits which enable the residue energy

to be dissipated (coming from an inductive system during a current interruption) in the
capacitor as heat; this circuit will consist of passive linear devices only,
connecting the terminals of sensitive components with non-linear overvoltage

suppressor devices, such as SiC (Silicon Carbide) or ZnO (Zinc Oxide),
fitting snubber circuits (carbon resistors and small capacitors), however, they should be
considered as secondary measures, since solid-state switches normally require such
circuits.
The first three choices could require redesigning some features of hybrid breakers, whilst the fourth
required more knowledge of non-linear device behaviors. As a whole, the protection circuit had to
meet the following requirements:
a rating voltage of at least 1kV and a low leakage current ( a few mA),
a clamping voltage of 2kV,
an energy absorption of at least 3kJ.

The precautions presented above should be considered only with regard to inductive switching. In a
normal situation, there should be no thermal run off. Each protection measure is explained in detail
in the following sub-sections.
2.5.1 Linear energy absorbing devices as the primary protection

The linear energy absorbing circuit was composed of passive elements and it could be connected in
parallel with the commutation capacitor. Since the capacitor had an initial voltage, a diode should
be used having a reverse biased in order to prevent discharging in the idle state. The resistance
operated as the primary energy absorbing element which converted the electrical energy stored in
the capacitor into heat. The resistance was made from carbon (Morganite) which had a considerable
high heat capacity. Combining those elements provided a dissipation path that prevented any longlasting overvoltages in the circuit. After the commutation process was completed, the circuit current
became zero. However, the interruption process was not completed. The current-zero in the thyristor
changed the polarity across the anode-cathode to produce a reverse blocking state. The time required
for this process was finite allowing its majority charge carriers in the depletion. When this process
was completed, the energy absorbing circuit could dissipate the potential energy by discharging it;
however, the energy absorbing elements had to be chosen so that the main interruption process
could continue undisturbed.
45
A passive circuit could fulfill these requirements so that the absorbing problem would be solved. It
is suggested that simply connecting a resistor, coil and diode in series (RLD) will suffice. Such a
circuit was connected across the commutation capacitor. The discharging current had to be carefully
controlled as an overdamped transient, because that would decrease the capacitor voltage slowly and
the thyristor remained in the blocking state. Rapid discharging would disturb the main interruption
process. Moreover, rapid changes in the capacitor voltage could result in malicious triggering so that
the thyristor returned to its conducting state. As a result, the current is not interrupted but limited.
The requirements of a passive suppressor circuit are the following :
it should be capable of absorbing the potential energy as heat (written as

2
1 2 CC VCE = mcT ; where m is the mass of the resistor element, c is the heat capacity
of the element and T is the temperature difference between the material and the
ambient),
the current slope just after the current commutation should be zero ( di dt t =tc = 0 ) or at
least as low as possible,
it should be a second 2nd-order circuit (if necessary, a higher order might meet the
requirement).
The estimated energy absorption was about 3kJ from the experimental setup, of course, it depended
on the maximum energy stored in the system before the current commutated from the main path to
the parallel path.
The simulation used a resistor of RA=10S and an inductor of LA=10mH. The need for such a large
inductance was necessary to maintain a low di dt in the interval
. With those values, an
overdamped circuit was created. All energy stored in the capacitor would be absorbed in that circuit.
2.5.2 Non-linear energy absorbing elements as the secondary protection

The usual device for dealing with transient overvoltages is a Metal Oxide Varistor (MOV). A
varistor is a voltage-dependent resistor in which any increase of the devices current in relation to
the voltage across it, will be non-linear. This device has advantages such as: a high current capacity,
relatively low cost and availability in a broad current/voltage spectrum. However, it has the
disadvantage during operation of undergoing gradual degradation which requires more maintenance
tasks and regular replacement. A combination of a MOV and a diode in series may prevent rapid
degradation depending on the diodes reverse voltage. Most overvoltage suppressors are made from
SiC or ZnO. An arrester made from SiC responds too slowly to the transient, but it is able to absorb
considerably more energy compared with the arrester made from ZnO. Former applications of SiC
included connecting it in series with an air gap to prevent continuous heat losses under normal
conditions.
46
Chapter 2
The zinc oxide particles are compressed together so that the inter-particle contacts act as a
semiconductor junction. Millions of these particles mimic diodes at various voltages; as the voltage
across a MOV increases, more and more junctions start conducting. Excess current is then bled off
through the component, while power is absorbed by the mass of the MOV. The power handling
capacity per unit-volume of varistors is much higher than that of surge suppression diodes. Because
the varistor effect is a feature of all the material volume of a component and not just the
semiconductor junction alone. However, the millions of junctions in a MOV can lead to a much
higher leakage current at low voltages. Response time to impulses is as fast as in a Zener diode and
varistors are mainly used for AC load protection where networks for single-phase and three-phase
supplies are easy to construct [2.23]. Their characteristics include : soft voltage clamping and high
leakage current at nominal voltages; however, there is a tendency for both of those characteristics to
deteriorate with temperature changes and repeated pulse diversions. Therefore, MOVs are used for
the accurate and repeatable protection needed for instrumentation and communications equipment.
The time required for a suppressor to begin operating is very important when it is used to protect
sensitive components. If the suppressor is slow-acting and a fast-rise transient spike appears in the
system, the voltage across the protected device can rise to damaging levels before any suppression
begins.
Care had to be taken when selecting an arrester, as the only energy absorbing element, particularly
when repetitive switching with high energy supplies. Since deterioration would affect the arrester, it
could lead to malicious behavior during continual use [2.24]. Under normal conditions, its current
leakage became very high resulting in excessive heating. From the outside, such deterioration may
not be visible. If such an arrester fails, irreversible damage may occur in associated devices. A diode
in series with the absorbing circuit and an arrester is a combination that would prevent stress under
normal conditions being the alternative.
In short, non-linear devices alone were not sufficient for continual operation; therefore, the MOV
was not intended for such conditions. Overvoltage switching up to 2.5kV could be tolerated by 1kV
systems which meant that all the other devices would have to suffer. However, arresters with a
rating of 900VDC were suitable. Those arresters had clamping voltages of approximately 2.1kV and
they were used to protect the commutation capacitor and the thyristor. Moreover, the arresters had to
be capable of withstanding thermal constraints too, so that capacitor charging would not be
restricted.
2.5.3 Snubber circuits for tertiary protection

Despite the fact that modern power semiconductors have high voltage and current ratings, they still
needed some help during switching processes. The auxiliary circuit which assists power
semiconductors to perform the correct switching functions and reduce the stress in solid-state
switches during operation is called a snubber circuit [2.29,30,31,32,33].
47
In general terms, the transient behavior of solid-state switches is illustrated in Figure 2.16 in both at
turn-on and turn-off [2.15].
IF
a)
0 i(t)
diR/dt
diF/dt
trr
Irr
t4
t3
t5
VFP
b)
Von
v(t)
-VR
VR
Vrr
t1
t2
Figure 2. 16 Typical transient behavior of solid-state switches when turned-on t1 t 2 and

when turned off t 3 t5 ; (a) the current in the device and (b) the voltage across the device.
Solid-state switches have generally low capability of transient overvoltage (breakdown of the
junction) and energy absorption (heat dissipation). A solid-state switch thyristor was used in S2.
The main purpose of protecting thyristors is because only a trigger signal can switch on thyristors
and assists in the switching states. The protection can be classified into different parts:
protection against too high dv dt during reverse blocking,
protection against too high dv dt during forward blocking,
protection against too high di F dt during the turn-on phase,
protection against too high dv dt during the turn-off phase.
The first two were required in static conditions to protect the thyristor from any surges coming from
the other parts of the network. And the latter two were for dynamic switching on its own. From
Figure 2.14 and Figure 2.15, it is possible to estimate the residual voltage across the capacitor CC
that have to be withstood by the thyristor. The commutation coil LC can limit the rate of change of
thyristor currents during a turn-on; however, the maximum rate of change for the forward current
( di F dt ) at the moment of current commutation by triggering the thyristor Thy must not exceed the
manufacturers recommendations. So, a combination including LC and CC had to be chosen
carefully. Generally speaking, power thyristors with switching frequencies of 1kHz are widely
available. A suitable snubber circuit would protect the thyristor from very abrupt changes in the
commutation path. A simple RC network provided dv dt protection; Rsn=10S and Csn=2.4:F. An
additional protection measure was applied by connecting an arrester in parallel across the thyristor.
48
Chapter 2
2.5.4 Applications of the freewheeling diode

Generally in DC systems, freewheeling diodes are connected across inductors or inductive circuits,
but in a circuit with switching devices, there is a possibility that current will be chopped off
abruptly. Consequently, the presence of a line inductance will oppose the chopping by producing
high overvoltages in the system. Freewheeling paths are necessary to divert the circuit current when
it is decreased by switching actions. This is a safe way to absorb the stored magnetic energy.
Unfortunately, it could not be used because every power line had stray inductance.
Therefore, if possible, the freewheeling diode DFW should be placed across the limiting inductance
LT (inductive load). It would always have a reversed bias if the circuit current iS was constant or
when it increased during normal operation, otherwise the current would decrease another way
causing a negative rate of change of the source current ( diS dt < 0 ). This would cause the voltage
across the inductance LT to change its polarity. That negative polarity would make the diode DFW
have a forward bias, so that it would conduct instead. The inductive energy stored in the coil
(1 2 LT I 2 max ) was then dissipated by the total resistance R of the freewheeling path; I max was the
inductor current at the instant when diS dt changed. The freewheeling diode path had a time
constant of FW = LT R and this could eventually alleviate the energy absorption problem.
Additional di dt protection using a coil of 12 H if necessary could be connected in series with the
diode DFW in order to soften the surge current through the diode. The inductance value of this coil
should be much smaller than the inductive load (200-500 H).
In the experimental setup, the freewheeling circuit was inserted manually when needed.
2.5.5 Combining all the components

It is generally necessary to use more than one type of protective components in the network in order
to obtain the best possible combination of advantages. The most common combination forming a
multi-protection circuit incorporates a high-current component that is relatively more slow-acting
than a lower power-rated component, in such a way, it is possible to minimize the power
dissipation. The design of such a circuit should also take into account the consequences of surges in
the fragile low power devices of the system.
Finally, before adopting those protective measures in the system, it was advisable to make sure that
any additional components would not change the nature of the main components that they were
intended to protect. Combining all the protection devices would prevent rapid degradation of
devices as well as the hybrid breaker as well as in the system. All those measures will ensure that
repetitive tests can be done with the hybrid breaker.
49
2.6. Circuit simulation using PSPICE

Up to now, numerical calculations have been performed satisfactorily with MATLAB programming
for the simplified circuits like those in Figure 2.5. However, for a realistic network including the 3phase distribution transformer and the double rectifier bridges, it will be better to use programming
software which includes whole components and a choice was made for PSPICE. In this section, 6pulse rectifier circuits feeding the commutation circuit are used for simulating DC interruptions; in
this way, the simulation will be closer to the laboratory setup conditions. In the other sections, all
components were previously determined, so that they could be used for simulating the entire circuit
directly. After all the devices had been modeled, similar circuits were arranged as sub-circuits so
that the complete circuit could be simulated. The simulation was performed with PSPICE
[2.16,17,18,19]. By modifying connections and component values, several circuit configurations
could be simulated effectively and used as an aid to understanding how switching transients behave
in those situations.
2.6.1 Device modelling

Behavior of the network can only be simulated if the basic specifications of devices are clear as well
as the relationships between the current in and voltage across those devices. Unfortunately,
modelling non-linear devices can be very tedious due to their complexity. Using fine models will
increase accuracy, but it may require a longer simulation time; however, oversimplified models may
fail due to numerical instability during the computation. Any compromise using simple or complex
models to simulate complex situations have to be considered depending on the network
configuration. In this section, the non-linear devices employed for modelling are described.
The thyristor model
Several thyristor models have been described in literature [2.20,21,22], but the choice depends on
how detailed the behavior of devices has to be and the amount of computational time that will be
acceptable. The basic thyristor model will have a certain minimum electrical behavior such as:
switching to the ON state with application of a gate signal (positive VGK or IG), only if the
Anode-Cathode voltage (VAK) is positive;
remaining in the ON state so long as the Anode-Cathode current (IAK) continues to flow;
switching to the OFF state when IAK goes through zero and VAK changes its polarity.
Basically, two methods are possible. Firstly, models that are based on the physical structure of an
intrinsic three junctions pnpn. They form a four-layer of semiconductor assigned to a three-terminal
device. This configuration is the same as a pnp transistor connected to an npn transistor with
additional diodes between the junctions. The transistors can be represented by an Ebers-Moll model.
The corresponding circuit diagram is shown in Figure 2.17 (a). The Ebers-Moll model requires
precise transistor parameters which, in SPICE, can be more than forty. The parameters define the
50
Chapter 2
transistors characteristics, such as, the variation of gain in both the forward and reverse states, the
storage time effects and the non-linear junction behavior. These parameters of the corresponding
transistors will depend on their material and manufacturing processes. Generally, these values will
not be available from the manufacturer, particularly, for high power devices. A practical transistor
model switch for the thyristor may require fewer parameters.
Anode
Anode
Anode
Anode
Anode
Gate
Cathode
D1
n
Gate
Gate
Csw
D2
Q2
Rgk
SW
Q1
D3
Cathode
Rsw
Vy
Rt Ct F1
Ron
Dthy
Cathode
Cathode
SW
+
Vx
Ron
Dthy
+ Gate
Rgt
VA
Rt
Gg
Le
Rgt
+ Vx
Igt
Cathode
Gate
(a)
(b)
Figure 2. 17 Thyristor equivalent circuits (a) the transistor model (b) the lumped element models.
Secondly, thyristor models that are based on electrical behavior only in which the state changes
depend on triggering and the Anode-Cathode current can also be used [2.19]. These models contain
elementary electronic devices, such as: diode, resistor, capacitor, voltage-controlled switches,
current control devices and ideal switches. Such models as shown in Figure 2.17 (b) and they are
commonly used for power electronic simulations. The simulation employed in this project used
lumped element models. The first thyristor model required a pulse current while the second used a
pulse voltage.
The main breaker model
Theoretically, the main breaker has a similar behavior to the thyristor, namely it requires currentzero to be achieved before the main breaker changes its state from conducting to insulating. In
contrast with the thyristor, the main breaker allows the current to flow in either direction. It was
sufficient to use a thyristor model based representing the main breaker in DC circuits.
The arrester model
The IEEE Working Group 3.4.11 suggests a model based on lumped element components [2.25] as
depicted in Figure 2.18. This model requires the voltage-current (vi) properties obtained from the
pulse test.
Li
Lo
Ro
Ao
Ri
Ai
Figure 2. 18 Frequency dependent model of arresters.
51
Arresters are frequency dependent devices. The voltage across an arrester is a function of both the
rate of increase and the magnitude of the current conducted by the arrester. The non-linear viproperties of an arrester are represented by two sections of non-linear resistance and designated by
Ao and Ai. The two sections are separated by an RL-filter. For slow-front surges, the RL-filter has
very small impedance and the two non-linear sections of the model are essentially in parallel. For
fast-front surges, the impedance of the RL-filter becomes more significant and results in a greater
discharge current flowing in Ao than in Ai. Unfortunately, its complexity went against modelling
with this device for the complete circuit simulation.
2.6.2 Simulation diagram

The above models now have to be integrated into the network scheme and simulated with respect to
the systems behavior during short-circuited and hybrid interruptions. Figure 2.19 shows the
complete circuit for a one-stage interruption.
10
XD IO11
1
XD IO 13
VZERO1
XSCLOA D
40 SW5 41
XDIO15
LA
XRATE
XF1
6
XR113
XR123
XTRV
XD IO 12
Tr1
XS1
23
XSUP11 XSUP12
XDIO16
VZERO2
Rtrv
XD IO 21
Rc
Ctrv
XD IO 23 XDIO25
22
XZTR21
20
XSUP13
XCN1
11
XABS
Lc
XDIO14
VR
DA
Cc
XZTR13
VT
RA
Uco
XFWH EEL
XZTR12
VS
3
XR112
VR
2
14
SW3
SW2
XZTR11
30 SW1
XTHY
Rsn
7
12
XZTR22
VS
8
13
XSNUB
VZERO5
VZERO3
XR212
5
15
Csn
XF2
XZTR23
VT
XR213
XR223
VZCOMM1
Tr2
XD IO 24
XD IO 26
XD IO22
50
VZERO4
16
21
XCOMM
XSUP21 XSUP22 XS UP23
XCN2
Figure 2. 19 Scheme for complete system simulation.
The simulation network was built starting from the secondary side of two transformers. Two 3phase systems in balance supplied the voltage represented by VR, VS and VT, each phase of the
secondary side being connected to an impedance XZTRxx in order to represent the inner impedance
of the transformer. The transformers neutral points were earthed by high capacitive impedance
XCN1 and XCN2. Next, continuous loads XSUPxx functioning as overvoltage suppressors were
installed between each phase and the neutral of the transformer. Subsequently, small capacitors and
resistors in series represented the arresters XRxxx on the AC side of the circuit. Then, two Graetz 3phase rectifiers (XDIO11...XDIO16 and XDIO21...XDIO26) were connected to each on the AC side
for delivering two rectified voltages at their outputs. Small continuous loads (XF1 and XF2) linked
both DC poles to the ground. Both rectified voltages were connected in series and the connection
52
Chapter 2
was earthed with VZERO2 making a symmetrical source. Finally, the time-controlled switches SW1
and SW5 linked the DC source to the load side. The load side, depending on the simulation, could
be designed in such a way that only the necessary devices were connected and disconnected. It
consisted of a freewheeling circuit XFWHEEL, a limiting inductive load XSCLOAD, a rated load
XRATE, the make switches SW1 and SW5, and the interruption circuit containing of the main
breaker XS1, the commutation circuit XCOMM, the snubber network XSNUB and the absorbing
circuit XABS. The switch SW2 controlled the connection in the freewheeling simulation and the
switch SW3 was used for the rated load. VZEROxs represented the current sensors. The switch
SW5 were always in a closed position. Closing the switch SW1 simulated the short-circuit situation.
Figure 2.20 depicts the sub-circuit components which simplify the simulation configuration.
XRxxx
XSUPxx
XCNx
XZTRxx
RR1
Ri
Cn
R1
CR1
C2
Rn
Li
C1
R3 R2
XSCLOAD
XRATE
XDIOxx
XFWHEEL
DFW
Rload
RD1
Lload
XFx
Rrate
Rf1
RFW
CD1
Rf2
Lrate
Cf1
LFW
Figure 2. 20 Sub-circuits.
Device values were:

XCOMM; Cc:280:F, Lc:85:H, Rc:20mS
XABS; RABS:10S LABS:10mH
XRxx; RR1:1k CR1:200nF
XSUPxx; R1:22S, R2:10k, R3:50S, C1:6:F
C2:100:F
XZTRxx; Ri:3mS, Li:30:H
XSNUB; Rsn:10S Csn:2.4:F
XCN; Cn:500nF, Rn:12kS
XSCLOAD; Lload:460:H, Rload:233mS-2S

XDIOxx; RD1:1kS, CD1:100nF
XFWHEEL; RFW: 1mS, LFW:1:H
XTHY; Csw:1pF, Rgt:50S,Rt:1,Ct:10:F
XFx; Rf1:1k, Rf2:500S, Cf1:200nF
XRATE; Rrate: 2.25S, Lrate:40:H
2.6.3 Simulation results using PSPICE

A number of possible events are described in the following paragraphs with the help from
simulation results. The following cases are reported:
The simulation of unsuccessful interruption
Firstly, a typical failure interruption will be described which could occur when the fault current is
higher than the counter-current due to slow detection and triggering of the thyristor. A current-zero
in the main breaker will not occur resulting unsuccessful interruption. The simulation results are
shown in Figure 2.21 (simulation time between 0 and 20ms) and Figure 2.22 (simulation time
between 5 and 10ms). Figure 2.21 (a) shows the rectified voltages of the two 3-phase Graetz bridge
53
(VPO and VNO are the positive and negative poles with respect to the ground potential and VPN is the
voltage between the poles). Figure 2.21 (b) depicts the currents in the DC source IDCS, the main
breaker IS1, and the commutation capacitor ICc, respectively. Figure 2.21 (c) presents the voltages
across the make switch VMS, the main breaker VS1, the commutation capacitor VCc, and the thyristor
VThy, respectively. And Figure 2.21 (d) shows the associated phase currents (IR, IS and IT). Figure
2.22 shows the simulation at the more detailed situation during the interruption. Figure 2.22 (a)
presents the voltages across the make switch VMS, the main breaker VS1, the commutation capacitor
VCc, and the thyristor VThy, respectively. Figure 2.22 (b) depicts the currents in the DC source IDCS,
the main breaker IS1, and the commutation capacitor ICc, respectively.
The simulation of a successful hybrid interruption at the first current-zero
The circuit for a successful hybrid interruption at the first current-zero, no freewheeling but with an
energy absorber; small CC, high VCO; with an absorbing circuit (DA, RA=10S and LA=10mH); big
commutation capacitor and a low initial voltage (CC=320:F, VCO=-800V, LC=80:H). The
simulation results are shown in Figure 2.23 (simulation time between 0 and 20ms) and Figure 2.24
(simulation time between 5 and 10ms). Figure 2.23 (a) shows the rectified voltages of the two 3phase Graetz bridge (VPO and VNO are the positive and negative poles with respect to the ground
potential and VPN is the voltage between the poles). Figure 2.23 (b) depicts the currents in the DC
source IDCS, the main breaker IS1, the commutation capacitor ICc, and the absorbing circuit IRA,
respectively. Figure 2.23 (c) presents the voltages across the make switch VMS, the main breaker
VS1, the commutation capacitor VCc, and the thyristor VThy, respectively. And Figure 2.24 (d) shows
the associated phase currents (IR, IS and IT). Figure 2.24 shows the simulation at the more detailed
situation during the interruption. Figure 2.24 (a) presents the voltages across the make switch VMS,
the main breaker VS1, the commutation capacitor VCc, and the thyristor VThy, respectively. Figure
2.22 (b) depicts the currents in the DC source IDCS, the main breaker IS1, the commutation capacitor
ICc, and the absorbing circuit IRA, respectively.
The simulation of successful hybrid interruption with an anti-parallel diode
The circuit parameters and conditions are similar with the previous case except a diode DS1 is now
connected across the main breaker S1. Normally, the diode is in a reversed bias state, but its state
will change only after the current-zero occurs in the breaker. This anti-parallel diode DS1 will allow
arcless contacts opening for the main breaker. The simulation results are shown in Figure 2.25
(simulation time between 0 and 20ms) and Figure 2.26 (simulation time between 5 and 10ms). The
legends of the graphs are similar with the previous simulation except the absorbing circuit current
IRA will not be shown and instead of it, the current in the reverse diode IDS1 is presented, see Figure
2.25 (c) and Figure 2.26 (b).
54
Chapter 2
The simulation graphs of an unsuccessful interruption

1500
9000
8000
IDCS
IS1
ICc
7000
Current [A]
Voltage [V]
1000
500
VPO
VNO
VPN
6000
5000
4000
3000
2000
-500
1000
0
-1000
10
15
-1000
20
time [ms]
10
15
20
time [ms]
(a)
(b)
DC voltages; 2 poles: VPO and VNO and total Circuit currents; source IDCS, main breaker IS1 and
voltage VPN
capacitor ICc
1500
0.6
1000
x 10
0.8
0.4
Current [A]
2000
Voltage [V]
2500
500
0
-500
VMS
VS1
VCc
VThy
-1000
-1500
-2000
-2500
10
15
IR
IS
IT
0.2
0
-0.2
-0.4
-0.6
-0.8
-1
20
time [ms]
10
15
20
time [ms]
(c)
(d)
Device voltages; make switch VMS, main breaker
Phase currents IR, IS and IT
VS1, commutation capacitor VCc and thyristor
VThy
Figure 2. 21 The circuit voltages and currents in an unsuccessful interruption.
2500
6000
2000
IDCS
IS1
ICc
5000
1500
4000
Current [A]
Voltage [V]
1000
500
0
VMS
VS1
VCc
VThy
-500
-1000
-1500
3000
2000
1000
0
-2000
-2500
time [ms]
10
-1000
10
time [ms]
(a)
(b)
Device voltages; make switch VMS, main breaker Circuit currents; source IDCS, main breaker IS1 and
VS1, commutation capacitor VCc and thyristor capacitor ICc
VThy
Figure 2. 22 Window enlargement during an interruption.
55
The simulation graphs of a successful hybrid interruption at the first current-zero

1500
1600
1400
IDCS
IS1
ICc
IRA
1200
Current [A]
Voltage [V]
1000
500
VPO
VNO
VPN
1000
800
600
400
200
-500
0
-200
-1000
10
15
-400
20
time [ms]
10
15
20
time [ms]
(a)
(b)
DC voltages; 2 poles: VPO and VNO, and total Circuit currents; source IDCS, main breaker IS1,
voltage VPN
capacitor ICc and absorbing circuit IRA
2500
2000
2000
1500
1000
500
0
VMS
VS 1
VCc
VThy
-500
-1000
-1500
-2000
IR
IS
IT
1000
Current [A]
Voltage [V]
1500
10
500
0
-500
-1000
-1500
15
20
-2000
time [ms]
10
15
20
time [ms]
(c)
(d)
VThy
Figure 2. 23 The circuit voltages and currents in a hybrid interruption.
1600
2000
1400
1500
1200
500
0
-500
VMS
VS1
VCc
VThy
-1000
-1500
-2000
IDCS
IS1
ICc
IRA
1000
1000
Current [A]
Voltage [V]
2500
time [ms]
800
600
400
200
0
-200
10
-400
10
time [ms]
(a)
(b)
Device voltages; make switch VMS, main breaker Circuit currents; source IDCS, main breaker IS1,
VS1, commutation capacitor VCc and thyristor capacitor ICc and absorbing circuit IRA
VThy
Figure 2. 24 Window enlargement during a hybrid interruption.
56
Chapter 2
The simulation graphs of successful hybrid interruption with an anti-parallel diode

1500
1600
1400
IDCS
IS1
ICc
IDS1
1200
Current [A]
Voltage [V]
1000
500
VPO
VNO
VPN
1000
800
600
400
200
-500
0
-200
-1000
10
15
-400
20
time [ms]
10
15
20
time [ms]
(a)
(b)
DC voltages; 2 poles: VPO and VNO and total Circuit currents; source IDCS, main breaker IS1,
voltage VPN
capacitor ICc, and reverse diode IDS1
2500
1500
2000
1000
500
Current [A]
Voltage [V]
1500
1000
500
0
VMS
VS1
VCc
VThy
-500
-1000
-1500
10
15
0
-500
IR
IS
IT
-1000
-1500
20
-2000
time [ms]
10
15
20
time [ms]
(c)
(d)
VThy
Figure 2. 25 The circuit voltages and currents in a hybrid interruption.
2500
1600
VMS
VS1
VCc
VThy
2000
IDCS
IS1
ICc
IDS1
1200
1000
Current [A]
Voltage [V]
1500
1400
1000
500
0
800
600
400
200
-500
0
-1000
-1500
-200
5
time [ms]
10
-400
10
time [ms]
(a)
(b)
Device voltages; make switch VMS, main breaker Circuit currents; source IDCS, main breaker IS1,
VS1, commutation capacitor VCc and thyristor capacitor ICc, and reverse diode IDS1
VThy
Figure 2. 26 Window enlargement during a hybrid interruption.
57
2.7. Conclusions
In this chapter, hybrid interruption techniques have been analyzed theoretically and then simulated.
Testing with higher currents required solving overvoltage problems and taking protective measures.
Hence, when coordinating protection devices, well-matched network parameters and breaking
capacity had to be determined accurately. Unfortunately, in order to reduce overvoltage stresses
after a fault interruption, a higher commutation capacitor was necessary and a passive dissipation
path had to be introduced. Obviously, limitation of the fault current required a minimal value for the
commutation capacitor. Simulation models were developed for the purpose of dimensioning the
components of the circuit.
2.8. References and reading lists

[2.1]
[2.2]
[2.3]
[2.4]
[2.5]
[2.6]
[2.7]
[2.8]
[2.9]
[2.10]
[2.11]
[2.12]
[2.13]
[2.14]
Greitzke, S., and Lindmayer, M., Commutation and erosion in hybrid contactor systems,
IEEE Trans. on Components, Hybrids and Manufacturing Technology, Vol. CHMT-8, No.
1, March 1985, p. 34-9.
Greenwood, A.N. and Lee, T.H., Theory and applications of the commutation principle
for HVDC circuit breakers, IEEE Trans. on Power Apparatus and Systems, Vol. PAS-91,
July-December 1972, p. 1570-4.
Kanngiesser, K.W., The current commutation function of HVDC switching devices,
Electra, No. 124, May 1989, p. 32-9.
Premerlani, W.J., Forced Commutation Performance of vacuum switches for HVDC
Breaker Application, IEEE Trans. on Power Apparatus and Systems, Vol. PAS-101, No.
8, August 1982, p. 2721-7.
Senda, T., et. al., Development of HVDC circuit breaker based on hybrid interruption
scheme, IEEE Trans. on Power Apparatus and Systems, Vol. PAS-103, No. 3, March
1984, p. 545-52.
Johnson, D.E., et. al., Commutating direct current out of a vacuum interrupter with a
GTO-thyristor, IEEE Trans. on Magnetics, Vol. MAG-22, No. 6, November 1986, p.
1552-7.
Zyborski, J., Czucha, J. and Sajnacki, M., Thyristor circuit breaker for overcurrent
protection of industrial d.c. power installations, Proc. IEE, Vol. 123, No. 7, July 1976, p.
685-8.
McEwan, P.M. and Tennakoon, S.B., A two stage DC thyristor circuit breaker, IEEE
Jensen, R.W. and Watkins, B.O., Network analysis: Theory and computer methods,
Prentice-Hall, 1974.
Kremer, H., Numerical analysis of linear networks and systems, Artech House 1987.
Alvarado, F.L., et.al., Testing of trapezoidal integration with damping for the solution of
power transient problems, IEEE Trans. on Power Apparatus and Systems, Vol. PAS-94,
Jan/Febr. 1975, p. 89-96.
Dommel, H.W. and Sato, N., Fast transient stability solutions, IEEE Trans. on Power
Apparatus and Systems, Vol. PAS-91, 1972, p. 1643-50.
Dommel, H.W. and Meyer, W. S., Computation of electromagnetic transients, Proc. of
the IEEE, Vol. 62, No. 7, July 1974, p. 983-93.
Mathworks, Computer software: Matlab ver. 4.2c, 1994.
58
[2.15]
[2.16]
[2.17]
[2.18]
[2.19]
[2.20]
[2.21]
[2.22]
[2.23]
[2.24]
[2.25]
[2.26]
[2.27]
[2.28]
[2.29]
[2.30]
[2.31]
[2.32]
[2.33]
[2.34]
[2.35]
Chapter 2
Mohan, N., et.al., Power electronics: converters, applications, and design, 2nd ed. Chichester : Wiley, 1995.
Nagel, L.W., SPICE2: A computer program to simulate semiconductor circuits,
Electronics Research Laboratory, Univ. California of Berkeley, Memorandum, ERL-M
520, May 1975.
Microsim, Computer software: PSPICE ver. 5.0, 1992.
Rashid, M.H., SPICE for power electronics and electric power, Prentice Hall, 1993.
Ramshaw, R. and Schuurman, D., Pspice simulation of power electronics circuits : an
introductory guide, London, Chapman & Hall, 1997.
McGhee, J., A transient model of a three terminal p-n-p-n switch and its use in predicting
the gate turn-on process, Int. J. Electronics, 1973, Vol. 35, No. 1, p. 73-9.
Losic, N.A., Computer-aided analysis and design of commutating, di/dt and dv/dt circuits
for thyristors, IEEE Industry Applications Society Annual Meeting, 1990, Seattle, USA,
Cat. No. 90CH2935-5, Vol. 2, p. 1196-201.
Williams, B.W., State-space thyristor computer model, Proc. IEE, Vol. 124, No. 9,
September 1977, p. 743-6.
Sakshaug, E.C., et.al., A new concept in station arrester design, IEEE Trans. on Power
Apparatus and Systems, Vol. PAS-96, No.2, March/April 1977, p. 647-56.
Tominaga, S., et.al., Stability and long term degradation of metal oxide surge arresters,
IEEE Trans. on Power Apparatus and Systems, Vol. PAS-99, No. 4 July/Aug. 1980, p.
1548-56.
IEEE Working Groups, Modeling of current-limiting surge arresters, IEEE Trans. on
Power Apparatus and Systems, Vol. PAS-100, No. 8, August 1981, p. 4033-40.
Collart, P., and Pellichero, S., A super high speed intelligent circuit breaker, GEC
Alsthom Technical Review, No. 9, 1992, p. 35-42.
Holbrook, J.G., Laplace transforms for electronic engineers, - 2nd rev. ed. - New York :
Pergamon Press, 1969.
Abramowitz, M. and Stegun, I.A., Handbook of Mathematical Functions, Dover
Publication Inc., 1965, 17.6, NY: Dover.
McMurray, W., Optimum snubbers for power semiconductors, IEEE Trans. on Industry
Applications, Vol. IA-8, No. 5, Sept./Oct. 1972, p. 593-600.
Lee, C.W., and Park, S.B., Design of a thyristor snubber circuit by considering the reverse
recovery process, IEEE Tran. on Power Electronics, Vol. 3, No. 4, October 1988, p. 4406.
Steyn, C.G., Analysis and optimization of regenerative linear snubbers, IEEE Tran. on
Power Electronics, Vol. 4, No. 3, July 1989, p. 362-70.
Swanepoel, P.H., and Wyk, J.D. van, Analysis and optimization of regenerative linear
snubbers applied to switches with voltage and current tails, IEEE Tran. on Power
Electronics, Vol. 9, No. 4, July 1994, p. 433-42.
Steyn, C.G., and Wyk, J.D. van, Study and application of nonlinear turn-off snubber for
power electronic switches, IEEE Trans. on Industry Applications, Vol. IA-22, No. 3,
May/June 1986, p. 471-7.
Bartosik, M., et.al., New generation of DC circuit breakers, 3rd International Conf. on
Electrical Contacts, Arcs, Apparatus and their Applications (IC-ECAAA), Xian, P.R.
China, May 1997, p. 349-53.
Kaufman, M., and Seidman, A.H., Handbook of electronics calculations : for engineers
and technicians, McGraw-Hill, 1979, p. 4-11.
Chapter 3
Two-stage commutation circuits for direct current interrupters
Abstract
The overvoltage problems like those discussed for one-stage interruption can be reduced by twostage interruption methods. This method limits firstly the fault current to a certain level meanwhile
absorbing a part of the inductive energy after which it proceeds to the final interruption procedure.
This method aims at reducing transient surges; however, when using this method, it is necessary to
operate more switching devices. As a consequence, the overall reliability of the breaker decreases;
furthermore, the interruption time becomes longer. Two variants of this method were extensively
studied and analytical and numerical computations were used to test the working of these variants.
In this thesis, they are only reported theoretically.
3.1 Introduction
Chapter 2 dealt with the hybrid interruption process using the basic commutation method (one-stage
interruption). In this method the residual voltage across the commutating capacitor needed special
attention, because in highly inductive systems, the residual voltage could become excessive. Hence,
as a refinement of one-stage commutating circuits, combinations of switching devices and limiting
resistors should be utilized to reduce the switching overvoltages.
The concept of two-stage interruption is an idea of McEwan [3.1] while studying a pure solid-state
DC breaker arrangement of system-stored energy which was transferred to the commutating
capacitor in several steps. This chapter will start with comments on an existing method and then it
will introduce an extension. As with the one-stage commutation, the current interruption process
was initiated by injecting a counter-current in the main breaker from a commutating circuit.
However, for the two-stage commutation method, the commutating path contained a limiting
resistor Rlim and auxiliary switches was added to the LC components. If the counter-current was
large enough to create a current-zero in the main breaker, the fault current was successfully
commutated to this path. Subsequently, it would reach the limiting value Ilim governed by the
limiting resistor. Given that LS was the system inductance, the fault inductive energy in the system
2
(1 2 LS I trip 2 ) would be dissipated in this resistor to become 1 2 LS I lim ; consequently,

I lim < I trip < I pros . At the current limited level, the interruption became easier due to its low system-
stored energy content. When the diverted fault current had dropped to its minimum value, the
second step was proceeded by creating another current-zero using the residual capacitor voltage. If
the current-zero was produced in the main breaker, the commutated current charged the capacitor to
a lower level when compared with the one-stage interruption. As a result, any transient overvoltages
introduced in the system could be minimized but the entire interrupting time was longer.
60
Chapter 3
Figure 3.1 Diagram (a) shows the circuit concept for the two-stage commutation proposed by
McEwan [3.1]. Figure 3.1 Diagram (b) shows a variant. The principle operations will be analyzed
and simulated later in this chapter.
S1
iS Anode iB
S1
iS Anode iB
Cathode
Cathode
Rlim
S2
Feeder
side
CC LC
vC
Rlim
i lim
iC
S4
S3
CC
Load
side
(a) first variant
Feeder
side
vC
S2
i lim
LC
iC
S3
S4
Load
side
(b) second variant
Figure 3. 1 Two-stage commutating circuits; S1: main breaker, S2,S3,S4: uni-directional switches.
Under normal load conditions, only the main breaker S1 was closed while the other switches S2, S3
and S4 were open. The capacitor CC was precharged with a negative initial voltage VCO. Interrupting
the nominal rated current could be realized for the first variant by closing only the switches S2 & S3
simultaneously and only the switch S3 for the second variant. Obviously, those procedures were
similar to the one-stage interruption described earlier. However, for a fault clearance, the
interruption procedure would obey different principles to those for the two concepts described in the
following paragraphs.
First variant
When the fault current iS=iB exceeded a predefined value, the main breaker S1 opened.
When a certain gap had been reached, the
switches S2 and S3 closed simultaneously. Then,
the counter-current iC produced by LCCC
opposed the fault current iB in the main breaker
S1, see the loop CC-LC-S3-Cathode-S1-AnodeS2-CC. When the injection current reached the
fault current level, a current-zero would occur in
S1 and the fault current then commutated to the
parallel paths: Anode-Rlim-S3-Cathode and
Anode-S2-CC-LC-S3-Cathode. The main breaker
S1 was now separated and it remained so. The
diverted fault current iS would not increase due
to the presence of the limiting resistor Rlim. In
the meantime, the capacitor CC changed its
polarity and its current became zero, thereby
Second variant
When a fault on the load side had to be
interrupted, the main breaker S1 opened. When
a certain gap had been opened, the switch S3
closed enabling a counter-current iC to flow in
the path CC-LC-S3-Cathode-S1-Anode-CC. The
counter-current iC produced by LCCC forced the
current in the breaker iB so that it became zero
when the counter-current was equal to the fault
current. This current-zero occurrence allowed
the main current to commutate to the path:
Anode-CC-S3-Cathode. The main breaker S1
remained open. Subsequently, the switch S2
closed, so that the main current could be
distributed to the path: Anode-Rlim-S2-Cathode
and Anode-CC-LC-S3-Cathode. When the
capacitor CC had changed its polarity, the
switch S3 opened. By closing the switch S4, the

turning off the switch S2. The current decreased
to a certain level. Subsequently, the switch S4
closed discharging the capacitor CC into the loop
CC-S4-S3-LC-CC. When a current-zero occurred
in S3, it turned off and the main current
commutated again in the path Anode-Rlim-LCCC-S4-Cathode. The switch S4 opened when a
current-zero was created resulting in a new
energy balance in which the capacitor was fully
charged.
61
capacitor CC would change its polarity again

and the current became zero which turned off
the switch S4. Next, switch S3 closed
producing a counter-current in the loop CC-LCS3-S2-Rlim-CC. When current-zero occurred in
S2, the main current iS commutated to the path:
Anode-CC-S3-Cathode. The switch S3 opened
when current-zero was created; so, a new
energy balance was achieved in which the
capacitor was fully charged.
Based on those two variants and using appropriate combinations of mechanical and solid-state
switches, the two-stage hybrid breakers could be developed too. Depending on future technological
progress and a breakthrough in the manufacture of solid-state devices for high power applications,
they could be used for fault interruption purposes. Theoretical analysis will be presented in the
following sections and it will be tested later in this chapter to show that there is no need for arresters
because overvoltages will be minimized. Finally, simulation was performed for comparing different
interruption method with prospective DC currents of 10kA. They included continuous fault
computation followed by interrupting the fault using the one-stage method and both variants of the
two-stage method.
3.2 Basic principles of the first variant

In order to improve the understanding of the circuit behavior when current was zero, the auxiliary
switches S2, S3 and S4 were replaced by thyristors Th1, Th2, Th3, respectively. Similar to a onestage interruption, the capacitor energy had to be used optimally when producing a counter-current.
This required the discharged current to flow through the lowest resistance path in order to produce a
virtual current-zero in the main breaker S1 during current commutation. The limiting resistance was
connected in series with a diode, so that in total, this variant required four solid-state switches (three
thyristors and one diode), because the one-stage interruption required at least one. Generally
speaking, DC systems can deliver uni-directional currents only; therefore, an ideal DC source ES
and a diode DS when connected in series can represent practical DC systems. The interrupting
sequences of the first variant are presented in Figure 3.2 and its timing diagram in Figure 3.3.
62
Chapter 3
RS
Th1
MS
LS
RS
CC
R lim
ES
S1
-
MS
+
Th2
LC
LS
ES
S1
-
DS
DS
Th3
A
RS
LS
RS
Th1 C
C
MS
LS
MS
+
LC
S1
ES
DS
ES
Th3
LC
B
RS
LS
R lim
DS
Th3
MS
RS
CC
R lim
LC
ES
DS
LS
MS
Th3
RS
CC
+
Th2
Th2
LS
MS
R lim
LC
ES
DS
MS
ES
Th3
DS
LS
R lim
RS
Th1 C
C
ES
DS
G
Figure 3. 2 Two-stage interruption sequences of the first variant.

B
Th1
t
E
Th2
t
t4
Th3
t1
Figure 3. 3 Timing diagram of the triggering of thyristors.
Analytical solutions
When considering all switches to be ideal, the solution can be written analytically for each interval.
The switches are assumed having zero and infinite resistance in the closed and open states,
respectively. At each interval, the Kirchhoffs voltage law for the network equations can be written
in order to solve the differential equations for the circuit current in each branch and the voltage
across the capacitor. Continuity between the intervals is maintained by using the end states of the
previous intervals to be the initial states for the next intervals.
During the fault, the source current iS can be represented by:
A

i (t ) = 1 I I 6 1 e + I

t
S
(3.1)

where: S is the time constant ( S =
63
LS
), LS and RS are the inductance and the resistance at the
RS
fault as seen from the source; I is the steady-state fault current (prospective) determined only from
E
the resistance and the DC voltage system E S ( I = S ); I R is the rated current. For convenience, it
RS
can be assumed that I R will be zero. In the commutation path, the capacitor voltage and current
16
16
remain constant vC t = VCO and iC t = 0 . Initially, the current in the breaker is equal to the current
in the source i B (t ) = iS (t ) until injection during the second interval
. At the end of this interval,
the source current becomes iS (t1 ) = I St 1 and the capacitor voltage remains vC (t1 ) = VCt 1 = VCO .
B
In the event of the fault current exceeding the pre-defined trip value ( I trip ), a counter-current will be
initiated in the main breaker S1 by triggering the switches Th1 and Th3 simultaneously. This
counter-current flows in the path: CC-LC-Th3-S1-Th1-CC. The injection current will oppose the fault
current in the main breaker S1 thereby reducing the current in the main breaker. When the injection
current meets the fault current, current-zero occurs in S1 which will result in it ceasing to
conduction. Now, the fault current will be commutated to the path: ES-LS-RS-MS-Th1-CC-LC-Th3DS-ES. In this interval, the current in the main breaker can be written as i B (t ) = iS (t ) iC (t ) . The
counter-current iC (t ) is applied at the instant that the current in the source iS (t ) exceeds the trip
value I trip . In this interval, the current in the main breaker is opposed by the capacitor current. The
source current increases further according to the expression:
iS (t ) = I I St 1
1 e 1 6 + I
6

t t1
S
(3.2)
St 1
The voltage across the capacitor and the counter-current are expressed below:
2 1 67
6 sin21t t 67
2 1 67
vC (t ) = VCt 1 e 1 t t1 6 A1 sin t t1 + cos t t1
iC (t ) = A2 e 1 t t1
where =
RC
; o =
2 LC
(3.3)
(3.4)
1
; = o2 2 ;
LC CC
V
A2 = Ct 1
LC
A1 =
When the source current and the counter-currents meet, i B (t 2 ) = 0 . Hence, from the equation
iS (t 2 ) = iC (t 2 ) = I St 2 , the current-zero time Tzvcb of the main breaker can be calculated from
Tzvcb = t 2 t1 using the following nonlinear equation: f : = I I e
Tzvcb + t1
S
A2 e Tzvcb sin Tzvcb = 0 .
The solution of this function can be obtained by using numerical iteration so-called NewtonRaphson method from the following equation:
64
Chapter 3
1 e 1
I

Tzvcbold + t1
S
Tz vcbnew = Tz vcbold
Tzvcbold + t1
S
A e

Tzvcbold
sin Tzvcbold
2 1 6 1 67
Iteration is terminated when the condition f 1T
6 0 is satisfied. At the end of that interval, the
Ie
+ A2 e Tzvcbold sin Tzvcbold cos Tzvcbold
zvcbnew
capacitor voltage can be obtained from the relationship vC (t 2 ) = VCt 2 and the current in the source
reaches iS (t 2 ) = I St 2 .
The third interval t 2 t t 3

In this interval, the commutated fault current is split into two paths, the limiting path; ES-LS-RS-MSRlim-D-Th3-DS-ES and the oscillatory path: ES-LS-RS-MS-LC-CC-Th3-DS-ES. The first path
continues conducting whilst the second path will only conduct until the voltage across the
commutating capacitor CC changes its polarity and becomes fully charged. Then, the current in the
second path will become zero causing the thyristor Th1 to cease from conducting. In that interval,
the current will be split into two parallel paths: current i D (t ) flows in the limiting path and current
C
iC (t ) flows along the oscillatory path. When the capacitor voltage satisfies the relationship
VCt 2 vC (t ) 0 , then the current i D (t ) will remain zero, because the diode connected in series still
has a reversed bias. The capacitor voltage and current are written as follows:
2 1 67
2 1 67
vC (t ) = K1 + e 1 t t2 6 K2 cos t t 2 + K3 sin t t 2
(3.5)
The current in the source is equal to the current in the oscillatory path and this is represented by
2 1 67
2 1 67
iS (t ) = iC (t ) = e 1 t t2 6 I St 2 cos t t 2 + K4 sin t t 2
where: RT = RS + RC ; LT = LS + LC ; =
RT
; o =
2 LT
(3.6)
1
; = o2 2 ;
LT CC
K1 = E S
K2 = VCt 2 E S
1
!
"#
$
K3 =
I
1
VCt 2 E S + St 2
CC
K4 =
1
2 E S VCt 2 + RT I St 2
2LT
These expressions are only valid until t = t a where: vC (t a ) = 0 . Time t a can be calculated from the
following equation in order to find its root, f : = K1 + e taold K2 cos t aold + K3 sin t aold
Finally, after numerical iteration, the equation becomes:
6
1 6
e
1K K 6 cos1t 6 + 1K + K 6 sin1t 6 .
The iteration ends when it satisfies f 1t 6 0 . Hence the time t is found, so that the current in the
t anew = t aold +
6 = 0.
K1 + e taold K2 cos t aold + K3 sin t aold
t aold
aold
anew
source is iS (t a ) = iC (t a ) = I Sta .
aold
65
Next, the following expressions are valid for the interval t a t t 4 . The voltage across the capacitor
changes its polarity and begins to increase. Accordingly, the source current can be written as :
iS (t ) = iC (t ) + i D (t )
(3.7)
i D (t ) = I lim I Sta
1 e 1 6 + I
6

t t2
lim
(3.8)
Sta
ES
L
, lim = S , Rtot = RS + Rlim
Rtot
Rtot
where: I lim =
The capacitor current and voltage are given by
2 1 67
2 1 67
6 K sin21t t 67 E cos21t t 67
iC (t ) = e 1 t t2 6 I Sta cos t t 2 + K5 sin t t 2

vC ( t ) = E S + e 1 t t 2
where :
K5 =
1
2 E S Rtot I Sta
2LT
K6 =
1 I Sta
ES
CC

!
"#
$
(3.9)
(3.10)
At the end of this interval, the capacitor current becomes zero, iC (t 3 ) = 0 which turns off the switch

1
I Sta
Th1. The time can be calculated from t 3 = t 2 + arctan
. The time required for turning-off
K5
Th1 is : Tzth1 =
VCt 3 = E S + e

K cos 1 arctan I
! K
1
I Sta
arctan
. The capacitor voltage is : vC (t 3 ) = VCt 3 ;
K5

arctan Sta
K5
Sta
+ K sin 1 arctan I
K

Sta
"#
$#
(3.11)
Hence, now the source current will become: iS (t 3 ) = i D (t 3 ) = I St 3 . In other words, the limiting path
succeeds to take over the current to the oscillatory path completely.
When the thyristor Thy1 is turned off, the fault current becomes limited by the resistance Rlim in the
path: ES-LS-RS-MS-Rlim-D-Th3-DS-ES. It decreases until it reaches a steady value of about
1
ES
, which means that during the fault, the inductive system-stored energy LS I 2 trip is
I lim =
RS + Rlim
2
1
absorbed in Rlim becoming only LS I 2 lim . In that interval, the current from the source decreases
2
according to the following expression :
D
iS (t ) = i D (t ) = I t 3 I lim e
where : lim =
1t t 6
3
lim
+ I lim
E
LS
, Rtot = RS + Rlim and I lim = S
Rtot
Rtot
(3.12)
66
Chapter 3
At the end of this interval, the current in the source should reach the steady-state limit, namely
iS (t 4 ) = i D (t 4 ) = I t 4 I lim . In the meantime, the voltage across the commutating capacitor will
remain unchanged as in the previous interval, that is: vC (t 4 ) = VCt 4 = VCt 3 .
When the fault current reaches its (limited) steady value, the thyristor Th2 is fired and the
commutating capacitor CC discharges its energy through the path: CC-Th2-Th3-LC-CC. In that
interval, the energy stored in the CC has to be sufficient to produce a current-zero in the thyristor
Th3, which also means that the second counter-current injection has to be greater than the steady
current I lim flowing in the thyristor Th3. In that interval, the second current injection uses from the
E
residual voltage capacitor to produce another current-zero for switching off Th3. The current in the
source just before closing the switch Th2 is written as: iS (t ) = I t 4 I lim . By closing switch Th2, the
capacitor voltage and the capacitor current will be given by the following equations:
2 1 67
6 sin21t t 67
2 1 67
vC (t ) = VCt 3 e 1 t t4 6 A1 sin t t 4 cos t t 4
iC (t ) = A2 e 1 t t4
where : =
RC
; o =
2 LC
(3.13)
(3.14)
1
; = o2 2 ;
LC CC
V
A2 = Ct 4
LC
A1 =
When the limited source current is equal to the counter-current, the current is zero in the switch Th3
turning off Th3. The time when this occurs can be obtained from the function :
21
f : = I St 4 A2 e 1 t5 t4 6 sin t5 t 4
67 = 0 , with T
zth3
the following function :

Tzth 3new = Tzth 3old
= t5 t 4 . The time Tzth3 can be found by iterating
I St 4 A2 e Tzth 3 old sin Tzth 3old

A2 e
Tzth 3 old
2 sin1T 6 cos1T 67 ,
zth 3old
zth 3old
until the condition f Tzth 3new 0 is achieved. Then t5 = t 4 + Tzth 3 and the current in switch Th3
becomes zero. The associated capacitor voltage is written as : vC (t5 ) = VCt 5 . Now, the limited source
current will commutate along the branch LC-CC-Th2 having a value of : iS (t5 ) = iC (t5 ) = I St 5 .
The sixth interval t5 t t 6
When the current through the thyristor Th3 becomes zero, Th3 ceases to conduct and the limited
fault current commutates along the path: ES-LS-RS-MS-Rlim-D-LC-CC-Th2-DS-ES. In this interval,
the current oscillates in order to charge the capacitor CC with an opposite polarity. When currentzero occurs in thyristor Th2, the fault current is interrupted. This means that the fault is cleared.
After commutation, the source current will be equal to the capacitor current. The capacitor voltage
and the capacitor current can be represented with the following relationships :
F
2 1 67
2 1 67
vC (t ) = E S + e 1 t t5 6 K1 sin t t5 + K2 cos t t5
(3.15)
2 1 67
67
2 1 67
iS (t ) = iC (t ) = e 1 t t5 6 I St 5 cos t t5 + K3 sin t t5
where : RT = RS + RC ; LT = LS + LC ; =
K1 =
1
!
1
I
VCt 5 E S + St 5
CC
K2 = VCt 5 E S
K3 =
"#
$
RT
; o =
2 LT
(3.16)
1
; = o2 2 ;
LT CC
1
2 E S VCt 5 RT I St 5
2LT
At the end of that interval, the current in the source becomes zero : iS (t 6 ) = iC (t 6 ) = 0 at

1
I St 5
. Consequently, this current-zero causes the switch Th2 turning-off and the
t 6 = t5 + arctan
K3
current-zero time for Th2 will be Tzth 2 =

1
I St 5
arctan
K3

Then, the residual voltage across the commutating capacitor becomes vC (t 6 ) = VCt 6 ;
VCt 6 = E S + e

!

K cos 1 arctan I St 5
2
arctan St 5
K3
K3
+ K sin 1 arctan I
K

St 5
"#
$#
(3.17)
Thereafter, no current flows in the circuit so that, the make switch MS can be opened without
arcing.
G
The seventh interval

Since the system now has no current, and the make switch MS can be opened, finally, the end state
will show a successful interruption in which all the switches are open.
3.3 Basic principles of the second variant

In order to understand how the circuit behaves at current-zero, the auxiliary switches S2, S3 and S4
will be represented by thyristors Th1, Th2, Th3, respectively. Furthermore, the source can deliver
uni-directional currents only as represented by an ideal DC source ES and a diode DS connected in
series. The interruption sequences of the second variant are depicted in Figure 3.4 and its timing
diagram appears in Figure 3.5.
Analytical solutions
Considering all the switches to be ideal, the solution can be written analytically for each interval.
68
Chapter 3
RS
RS
MS
LS
Th3
R lim
ES
S1
MS
CC
ES
LC
S1
-
Th2
DS
LS
DS
Th1
A
RS
LS
MS
+
S1
ES
RS
C
+ C
LC
LS
MS
Th1
DS
LC
CC
LC
Th1
DS
Th2
Th2
C
MS
R lim
RS
LS
RS
MS
CC
CC
LC
LC
ES
Th1 D S
ES
DS
R lim Th3
ES
B
LS
MS
DS
LS
CC
ES
RS
RS
R lim
LS
MS
+
ES
Th1
DS
Th2
Figure 3. 4 Two-stage interruption sequences of the second variant.

B
Th1
t1
t4
Th2
t
t2
Th3
t3
Figure 3. 5 Timing diagram of triggering the thyristors.

Initially, the main breaker S1 is in its closed position and the make switch MS is in its open
position. All thyristors are in their off-states. By closing the make switch MS, a fault current is
initiated so that it flows along the path: ES-RS-LS-MS-S1-DS-ES. The current increases according to
a time constant given by RS and LS. During the fault, the source current iS can be represented by:
A

i (t ) = 1 I I 6 1 e + I

t
S
where: S is the time constant ( S =
(3.18)
LS
), LS and RS are the inductance and the resistance of the
RS
fault relative to the source; I is the steady-state fault current (prospective) determined only by the
E
resistance and the DC voltage system: E S ( I = S ); and I R is the rated current. For convenience,
RS
it is assumed that I R will be zero. In the commutation path, the capacitor voltage and its current
16
69
16
remain constant: vC t = VCO and iC t = 0 . Initially, the current in the breaker equals the current at
the source: i B (t ) = iS (t ) until the counter-current injection occurs during the second interval
. At
the end of this interval, the source current becomes iS (t1 ) = I t 1 and the capacitor voltage remains
vC (t1 ) = VCt 1 = VCO .
B
In the event of the fault current exceeding a pre-defined trip value ( I trip ), the counter-current iC (t )
will be initiated by triggering the switch Th1. In this second interval, the current in the main breaker
is opposed by the capacitor current: i B (t ) = iS (t ) iC (t ) . The counter-current flows along the path:
CC-LC-Th1-S1-CC and opposes the fault current in the main breaker S1 in order to reduce the
current in it. When the counter-current is equal to the fault current, current-zero occurs in S1 which
results in S1 ceasing to conduct. Now, the fault current commutates along the path: ES-RS-LS-MSCC-LC-Th1-DS-ES.
iS ( t ) = I I t 1
1 e 1 6 + I
6

t t1
S
(3.19)
t1
The capacitor voltage and current are expressed below:
2 1 67
6 sin21t t 67
2 1 67
vC (t ) = VCt 1 e 1 t t1 6 A1 sin t t1 + cos t t1
iC (t ) = A2 e 1 t t1
where: =
RC
; o =
2 LC
(3.20)
(3.21)
1
; = o2 2 ;
LC CC
V
A2 = Ct 1
LC
A1 =
16 16
At the end of this interval, the source current and the capacitor current are equal: iS t 2 = iC t 2 = I St 2
and the current in the breaker becomes i B (t 2 ) = 0 . Then, the associated capacitor voltage will be
16
vC t 2 = VCt 2 .
The third interval t 2 t t 3
In the third interval, the capacitor CC continues to discharge and its polarity changes due to being
fed from the source. At a given capacitor voltage, the switch Th2 is fired so that a new commutating
path: ES-RS-LS-MS-Rlim-Th2-DS-ES is introduced; while the capacitor current decreases to zero and
turns off the switch Th1; the source current will then decrease further to a value limited by Rlim. At
ES
the end of that interval, the current in Rlim becomes i R lim t 3 I lim =
and the time constant
RS + Rlim
LS
is lim =
. During this interval, the current in the Rlim can be expressed by :
RS + Rlim
C
16
70
Chapter 3
i R lim (t ) = I lim
1 e 1 6

t t2
lim
(3.22)
The capacitor current and voltage are given by :
2 1 67
2 1 67
6 K sin21t t 67 + K cos21t t 67
iC (t ) = e 1 t t2 6 K1 sin t t 2 + K2 cos t t 2
vC ( t ) = E S + e 1 t t 2
where : RSC = RS + RC ; LSC = LS + LC ; =

K1 =
(3.24)
RSC
; o =
2 LSC
LSC CC
; = o2 2
1
2 E S VCt 2 I 2 t 2 RSC
2LSC
K2 = I 2 t 2
K3 =
(3.23)
1
!
I
1
VCt 2 E S + 2 t 2
CC
K4 = VCt 2 E S
"#
$
The current in the source is written as :

iS (t ) = i R lim (t ) + iC (t )
(3.25)
16
capacitor current will be i 1t 6 = 0 and the capacitor voltage is v 1t 6 = V
At the end of this third interval, the source current becomes iS t 3 = I st 3 I lim =
C
Ct 3
ES
, then the
RS + Rlim

During this interval, the source current is considered to be constant. The switch Th3 turns on so that
the capacitor discharges and changes its polarity until the current becomes zero (half-sine
waveform). The capacitor current is limited only by the negligible circuit resistance RC so that the
D
capacitor current can attain a very high value.

iS (t ) = I lim
1 e 1 6 + I

t t3
S lim
St 3e
1 t t 6
3
S lim
I lim
(3.26)
The capacitor current and voltage are expressed below:
2 1 67
6 A sin21t t 67 + cos21t t 67
iC (t ) = A2 e 1 t t3 6 sin t t 3
vC (t ) = VCt 3 e 1 t t3
where : =
RC
; o =
2 LC
V
A2 = Ct 3
LC
A1 =
1
; = o2 2
LC CC
(3.27)
(3.28)
71
16
At the end of this fourth interval, the source current becomes iS t 4 = I St 4 I lim =
16
ES
, and the
RS + Rlim
capacitor current is iC t 4 = 0 , thereby turning off the switch Th3. The associated capacitor voltage
16
becomes vC t 4 = VCt 4 .

The source current is still constant. By triggering the switch Th1, a counter-current in the switch
Th2 is generated which results in a change of the capacitor polarity. When a current-zero occurs, the
switch Th2 turns off and the source current commutates along the path ES-RS-LS-MS-CC-LC-Th1DS-ES expressed by :
E
iS (t ) = I St 4 I lim e
1 t t 6
4
lim
+ I lim I lim
(3.29)
The capacitor current and voltage are expressed below:
2 1 67
6 A sin21t t 67 + cos21t t 67
iC (t ) = A2 e 1 t t4 6 sin t t4
vC (t ) = VCt 3 e 1 t t4
(3.30)
(3.31)
ES
L
; lim = S ; RS lim = RS + Rlim ; RC lim = RC + Rlim ;
RS lim
RS lim
R
1
= C lim ; o =
; = o2 2
2 LC
LC CC
where: I lim =
V
A2 = Ct 4
LC
A1 =
At the end of this fifth interval, the source current and the capacitor current are equal:
iS t5 = iC t5 = I St 5 and the capacitor voltage becomes vC t5 = VCt 5 .
16 16
16
The sixth interval t5 t t 6

In this interval, the limited fault current charges the capacitor CC with the opposite polarity. When a
current-zero occurs in Th1, the current ceases to flow. The capacitor current and voltage are given
by :
F
16
2 1 67
2 1 67
6 K sin21t t 67 + K cos21t t 67
iS t = iC (t ) = e 1 t t5 6 K1 sin t t5 + K2 cos t t5
(3.32)
vC ( t ) = E S + e 1 t t 5
(3.33)
where : RSC = RS + RC ; LSC = LS + LC ; =
RSC
; o =
2 LSC
1
LSC CC
; = o2 2
72
Chapter 3
K1 =
1
2 E S VCt 5 I St 5 RSC
2LSC
K2 = I St 5
K3 =
1
!
I
1
VCt 5 E S + St 5
CC
K4 = VCt 5 E S
"#
$
At the end of this sixth interval, the source current and the capacitor current are equal
iS t 6 = iC t 6 = 0 and the capacitor voltage becomes vC t 6 = VCt 6 .
16 16
16
The seventh interval

The system has no current now, so that the make switch MS can be opened. Finally, at the end state,
a successful interruption shows all the switches are open.
3.4 Computer simulation using PSPICE

The proposed circuits were simulated using PSPICE [3.7,8,9] with a complete circuit containing
double 6-pulse rectifier bridges to provide 1kV DC systems. Four cases have been investigated in
the following paragraphs for comparing the methods described earlier, with a trip current of 5kA;
3.4.1. Continuous short-circuiting of the DC source with a prospective current 10kA (see Figure
3.6). The source will be extensively described in Chapter 6.
3.4.2. Interruption of the short-circuit using the one-stage interruption (see Figure 3.8) which has
been extensively described in Chapter 2, but without the absorbing circuit.
3.4.3. Interruption of the short-circuit using the two-stage interruption, 1st variant (see Figure
3.10).
3.4.4. Interruption of the short-circuit using the two-stage interruption, 2nd variant (see Figure
3.12).
The circuit components are presented in Table 3.1.
Table 3. 1 Circuit components.
Case 2: Section 3.4.2
Limiting load
RRATE=500mS
RSC=70mS, LSC=40:H
idem

idem
idem
Commutating components
CC=3mF,VCO=-1kV, LC=12:H,
RC=20mS
idem plus Rlim=500mS
idem
At the time t=0, the simulation starts and the DC load current increases. At the instant when t=5ms,
a short-circuit occurs intentionally. The simulation results of Case 1 show the waveforms of relevant
voltages (VPO and VNO are the positive and negative poles with respect to the ground potential, VPN
is the voltage between the poles and VSW1 is the voltage of the closing switch SW1) of the DC side
in Figure 3.7 (a) and the DC source current (IDCS) and phase currents (IR, IS and IT) in Figure 3.7
73
(b). In Case 2, the one-stage interruption occurs after the fault current exceeds the trip value of 5kA;
Figure 3.9 (a) shows the DC voltages (VPO and VNO are the positive and negative poles with respect
to the ground potential and VPN is the voltage between the poles); Figure 3.9 (b) depicts the relevant
voltages (VSW1 is the voltage of the closing switch SW1, VS1 is the voltage of the main switch S1
and commutation capacitor VCc); Figure 3.9 (c) shows the relevant currents in the DC side (IDCS is
the DC source current, IS1 is the main breaker current, and ICc is the capacitor current) and Figure
3.9 (d) shows the phase currents (IR, IS and IT). Case 3 and Case 4 simulate the two-stage
interruptions of the first and second variants in Figure 3.11 and Figure 3.13, respectively; where:
(a) shows the DC voltages, (b) depicts the relevant voltages in the switches and commutation
capacitor, (c) shows the relevant currents on the DC side including the limiting resistance (IRLIM)
and (d) shows the phase currents.
3.4.1 The short-circuit simulation of a DC source with a prospective current of 10kA

The simulation diagram is depicted in Figure 3.6 and the results are shown in Figure 3.7.
10
VZERO1
XD IO11
XZTR11
XDIO13
40
XDIO15
SW5
41 XSCLOA D 30 SW1
14
XZTR12
XR112
VR
VS
XRATE
XF1
5
3
XZTR13
VT
6
XR113
XR123
XDIO12
Tr1
XDIO14
23
XSUP11 XSUP12
XDIO16
XCN1
VZERO2
20
XSUP13
XD IO21 XDIO23 XD IO 25
22
11
VR
XZTR21
VZERO3
XR212
7
12
XZTR22
VS
8
13
XF2
XZTR23
VT
XR213
XR223
Tr2
XD IO24
XDIO26
XDIO22
50
VZERO4
21
XSUP21 XSUP22 XSUP23
XCN2
Figure 3. 6 Simulation diagram for the short-circuit.

1
1000
x 10
0.8
800
0.6
600
Current [A]
Voltage [V]
1200
400
VPO
VNO
VPN
VSW1
200
0
-200
0.2
0
-0.2
IDCS
IR
IS
IT
-0.4
-0.6
-400
-600
0.4
-0.8
0
10
time [ms]
15
20
-1
10
15
20
time [ms]
(a) DC voltages; 2 poles: VPO and VNO, total

(b) The DC circuit current and phase currents I R,
voltage VPN and make switch VSW1
IS and IT
Figure 3. 7 Simulation results for the short-circuit.
74
Chapter 3
3.4.2 The one-stage DC interruption of 10kA with I trip=5kA

10
XDIO11
1
XZTR11
XDIO13
VZERO1
40
XDIO15
SW5
41 XSCLOAD 30 SW1
14
XZTR12
XR112
VR
VS
XRATE
Uco
XF1
Cc
XZTR13
VT
XR113
XR123
XDIO12
Tr1
Lc
XDIO14
XDIO 16
23
XSUP11 XSUP12
VZERO2
XS1
20
XSUP13
XCN1
XDIO21
Rc
5
XDIO23 XDIO25
22
11
XZTR21
XR212
VR
XSNUB
XTHY
VZERO3
15
Rsn
7
12
XZTR22
VZERO5
VS
8
13
Csn
XF2
XZTR23
VT
XR213
XR223
VZCOMM1
Tr2
XDIO24
XDIO26
XDIO22
50
16
VZERO4
21
XCOMM
XCN2
Figure 3. 8 Simulation diagram for the one-stage interruption.
2000
2500
VPO
VNO
VPN
VSW1
VS1
VCc
2000
1500
1000
Voltage [V]
Voltage [V]
1500
500
1000
500
0
-500
-1000
-500
10
15
-1000
20
10
15
20
time [ms]
time [ms]
(a) DC voltages; 2 poles: VPO and VNO, and total

voltage VPN
(b) Device voltages; make switch VSW1, main

breaker VS1 and commutating capacitor VCc
8000
8000
7000
6000
IDCS
IS1
ICc
5000
4000
3000
2000
2000
0
-2000
-4000
1000
-6000
0
-1000
IR
IS
IT
4000
Current [A]
Current [A]
6000
10
time [ms]
15
20
-8000
10
15
time [ms]
(c) Circuit currents; source I DCS, capacitor ICc and

(d) Phase currents IR, IS and IT
main breaker IS1
Figure 3. 9 Simulation results for the one-stage interruption.
20
75
3.4.3 The first variant of two-stage DC interruption with I trip=5kA

XC OMM
10
XDIO11
XDIO13
VZERO1
SW5
40
XDIO15
41 XSCLOAD 30 SW1
14
Tr1
XZTR11
XTHY1
XR112
VR
4
2
Uc o
XRATE
XZTR12
XZTR13
Cc
VS
XF1
VT
Rlim
Lc
6
XR113
XR123
XDIO12
8
XDIO14
XSUP11 XSUP12
XTHY2
XDIO16
23
VZERO2
XS1
Rc
20
XSUP13
XCN1
XDIO 21
XDIO23 XDIO25
22
Tr2
11
VZERO3
XZTR21
15
XR212
VR
7
12
XZTR22
XTHY3
VS
VZERO5
8
13
XF2
XZTR23
VT
XR213
XR223
VZC OM M6
XDIO 24
XDIO26
XDIO 22
50
16
VZERO4
21
XCN2
Figure 3. 10 Simulation diagram for the first variant of two-stage interruption.
2000
2000
VP O
VNO
VP N
VSW1
VS1
VCc
1500
1000
1000
Voltage [V]
Voltage [V]
1500
500
500
0
-500
-500
-1000
-1000
10
15
-1500
20
10
15
20
time [ms]
time [ms]

voltage VPN

breaker VS1, and commutating capacitor VCc
8000
8000
4000
Current [A]
Current [A]
4000
IR
IS
IT
6000
IDCS
IS1
ICc
IRLIM
6000
2000
2000
0
-2000
-4000
-2000
-4000
-6000
10
time [ms]
15
20
-8000
10
15
time [ms]
(c) Circuit currents; source I DCS, capacitor ICc ,

main breaker IS1 and limiting resistor Rlim
Figure 3. 11 Simulation results for the first variant of two-stage interruption.
20
76
Chapter 3
3.4.4 The second variant of two-stage DC interruption with I trip=5kA

XC OMM
10
XDIO11
XDIO13
VZERO1
SW5
40
XDIO 15
41 XSCLOAD 30 SW1
14
Tr1
1
XZTR11
XZTR12
XZTR13
XR112
VR
Uc o
XRATE
VS
Cc
XF1
VT
Rlim
Lc
6
XR113
XR123
XTHY3
XDIO12
XDIO14
XDIO 16
23
XSUP11 XSUP12
VZERO2
XS1
Rc
20
XSUP13
XCN1
XDIO21
XDIO23 XDIO25
11
XZTR21
VZERO3
XR212
VR
XTHY2
22
Tr2
15
7
12
XTHY1
XZTR22
VS
VZERO5
8
13
XF2
XZTR23
VT
XR213
XR223
VZC OM M7
7
XDIO24
XDIO 26
XDIO22
50
16
VZERO4
21
XCN2
Figure 3. 12 Simulation diagram for the second variant of two-stage interruption.
2000
2000
VP O
VNO
VP N
1000
500
-500
-1000
VSW1
VS1
VCc
1500
Voltage [V]
Voltage [V]
1500
1000
500
-500
10
15
-1000
20
10
15
20
time [ms]
time [ms]

voltage VPN

breaker VS1, and commutating capacitor VCc
8000
8000
7000
5000
4000
IR
IS
IT
4000
Current [A]
Current [A]
6000
IDCS
IS1
ICc
IRLIM
6000
3000
2000
2000
0
-2000
1000
-4000
0
-6000
-1000
-2000
10
time [ms]
15
20
-8000
10
15
time [ms]
(c) Circuit currents; source I DCS, capacitor ICc,

main breaker IS1 and limiting resistor Rlim
Figure 3. 13 Simulation diagram for the second variant of two-stage interruption.
20
77
3.5 Conclusions
Two variants of the two-stage interruption have been described, analyzed, simulated and compared
with the one-stage interruption. The results are presented in Table 3.2, for circuits with a source
voltage of 1kV, a prospective fault current of 10kA, a trip level of 5kA, commutating inductance of
12:H, commutating capacitor of 3mF, an initial capacitor voltage of -1kV and a limiting resistance
of 500mS.
Table 3. 2 Final state after successful interruption.
VCend [kV]
One-stage
Two-stage 1st variant
Two-stage 2nd variant
tint [ms]
I 2 t [kA2s]
I 2 Rlimt [kJ]
2
1
1.9
2
12
6
65
106
114
0
53
57
From the table, it is clear that the one-stage interruption caused a high residual voltage across the
commutating capacitor in comparison with the variants of the two-stage interruption. For the twostage variant, as suggested by McEwan, the residual capacitor voltage was limited to 50%; however,
at the expense of having more circuit components, longer interruption time and increased resistor
heating. An attempt to limit the interruption time and thus the Joule energy in the resistance,
however, was at the cost of a higher end value for the capacitor voltage.
3.6 References and reading lists

[3.1]
[3.2]
[3.3]
[3.4]
[3.5]
[3.6]
[3.7]
[3.8]
[3.9]
McEwan, P.M., and Tennakoon, S.B., A two-stage DC thyristor circuit breaker, IEEE
Mohan, N., Power electronics : converters, applications, and design, 2nd ed. - Chichester :
Wiley, 1995.
Baliga, J., Modern power devices, Wiley-Interscience, 1987
Holbrook, J.G., Laplace transforms for electronic engineers, - 2nd rev. ed. - New York :
Pergamon Press, 1969.
Abramowitz, M. and Stegun, I.A., Handbook of Mathematical Functions, Dover
Kreyszig, E., Advanced engineering mathematics, 6th ed., Chichester Wiley, 1988.
Ramshaw, R. and Schuurman, D., Pspice simulation of power electronics circuits : an
introductory guide, London,Chapman & Hall, 1997.
78
Chapter 3
Chapter 4
Fault identification and direct current measurement
Abstract
The fact that faults are accompanied by changing several other events instantaneously, means that
they can be used for fault discrimination. A detector designed to sense such an event has a crucial
function in distinguishing faults from arbitrary transients. If a fault is detected, a switch-off
command signal is sent to a circuit breaker. Comparing the available detection techniques resulted
in the design of a detector circuit, including the choice of sensor and electronic circuit.
4.1. Introduction
In general, before causing damage, a fault shows abrupt changes in the physical parameters, such as
current flow, current slope, voltage drop, temperature increase and other relevant features.
Therefore, a reliable detector will show when an abrupt change occurs and whether it is a fault or
not which has vital importance. Continual monitoring of the systems parameters helps to
discriminate between normal operation and a fault. Appropriate sensors should be chosen to watch
over each of these parameters simultaneously. Also note that during normal conditions, some
transients may behave like short-circuits. Switching capacitive loads may lead to high surge currents
which may be interpreted as a fault; so, a reliable sensing method is required which is able to
distinguish between possible faults and transient noise backgrounds after a sequence of logical
checks before the trip mechanism is operated. A method will be presented for continuous
monitoring of the system and performing certain operations in response to the parameters being
exceeded. In addition, an appropriate tripping signal can be produced to trigger the commutation
circuit and the main breaker actuator.
Some detection methods are listed below:
A. Detection of a current level [4.1,2]. When a short-circuit exceeds a prescribed trip value a trip
signal is generated. This very simple method is generally preferred for protecting overhead
power lines. This method has some drawbacks such as: differences between short-circuits, shorttime overloads and switching transients are difficult to distinguish.
B. Detection of the level of rate of current rise [4.2,3]. This method identifies rapid current changes
below the maximum allowable current where this often will cause malicious tripping. Normally,
Rogowski-coils provide the rate of current rise (di dt ) instantly.
C. Detection of the level of rate of current rise sustained during an interval [4.3,4,5,6]. When the
rate of rise of a current exceeds the prescribed trip level during a certain time interval t (50:s),
a trip signal is generated. This avoids false tripping due to transients, short overloads and
starting currents.
80
Chapter 4
D. Detection based on a combination of A and B [4.2,7].

E. Detection of a current leap during an interval [4.2,5]. When the change in current ( i ) exceeds a
prescribed trip level during a certain time interval t (50:s), a trip signal is generated. After
each interval t , the current is measured and compared with its previous value thus determining
a new i . The time interval can be chosen freely considering whether a fast detection system or
a reliable detection system is wanted. A compromise has to be made. In a network with frequent
transient disturbances, it is clear that the smaller the time interval, the less reliable the fault
detection will be.
When, designing a detection system, it has to match a particular network behavior during faults. If
the network is too complex, a rough estimation may fulfill this need.
Figure 4.1 shows waveforms of a short-circuited direct current system at t=20ms with the
associated current slope.
10
9
1.5
di A
_
__ [ __ ]
dt s
Current [kA]
6
5
0.5
3
2
-0.5
1
0
10
20
30
40
50
-1
10
60
time [ms]
20
30
40
50
60
time [ms]
(a)
(b)
Figure 4. 1 Waveforms of the short-circuit current (a) and the associated current slope (b).
4.2. Realization of a detection circuit

From the alternatives described in Section 4.1, method E was finally chosen for detecting faults.
Figure 4.2 shows a block diagram of the fault detection circuit based on method E.
i(t)
S/H
Trip
signal
fs
V ref
)t
Figure 4. 2 Block diagram of the detection unit;
S/H: sample and hold unit, fS: sample frequency, Vref: reference voltage.
Due to high interference levels, the detection circuit should be kept as simple as possible. From the
block diagram depicted in Figure 4.3, the following detector circuit was built to detect faults.
81
+15
10k
3
S/H
47k
7 1
1n
+
8
LM 318 6
2 4
10k
10k
IN
7
10k 6 1/2 LM 393
LM 398
6
10k
7 1
8
LM 318 6
+
3
4
3
S/H
20k
4k7
8
10k5
LM 398 5
6
51
10k
50k
level
10k 2
10k3
1
1
10k2 1/2 LM 393
4k7
10k
MPS U52
100k
8
6
7
NE 555
OUT
2k7
BC414
1k
10k
Red LED
IR LED
0
-15
+15
Fuse 250mA
Tr 30VA
7815
Transfoshunt
1000A/0.2A 4
270
BC416
15V
VM48
1k
LED
Green
220V
Net filter
15V
1k
8
7
+15
osc 20kHz
M
10
3 out 2
12
VM48
-15
1
2
Mon
-15
13
10
9
1k
9
4093
6
2
11
10
1
10k
33k
NE 555
10
100k
6
1k
3 12
13
4093
11
7915
Figure 4. 3 The diagram of a practical detector circuit.
A current transducer produces the continuous signal M which can be used to record measurements,
at the same time it acts as a detector. The signal M becomes an input IN to be sampled by S/H
circuits. After amplification and comparison of the sampled signal to a reference voltage, an IC
timer will produce a trip signal OUT when the sampled signal exceeds the predetermined value. The
trip signal has two different forms; electrical and optical. The electrical trip signal will be used for
triggering the thyristor and opening the main breaker in the hybrid breaker setup described in
Chapter 2 and Chapter 7, while the optical signal will be used for turning off the solid-state breaker
(IGCT) as described in Chapter 7. Part of this chapter has been published in [4.8].
4.3. Direct current transducers

There are many current transducers that are suitable for detection circuits, some will be described
below:
Low-resistance shunts [4.9]. This type of transducer is the best known, but it does not provide the
potential separation between the object and the recording device; however, since the circuit is
symmetrical in respect to the ground ( 500V), the application of this measuring device was taken
out of the feasibility. Furthermore, this transducer dissipates considerable heat-losses when high
currents are involved (For example 0.1mS shunts dissipate power 2500W of current 5000A).
82
Chapter 4
Kr@mer transformer method [4.10]. To overcome the difficulties with a normal current transformer,
which is only applicable for AC circuits, Kr@mer invented a DC transducer. The transductor consists
of two single phase transformers with the direct current to be measured flowing through the primary
windings in series, while the secondaries are connected to a source
of AC voltage. The secondaries are connected in series and in
opposite phase. The cores are alternately unsaturated and driven far
into saturation in successive half-cycles of the supply. While one of
the cores is unsaturated, the secondary current in it is related to the
primary current by the ratio of turns. So that when a direct current
flows in the primary, the secondary current is approximately a
square-wave at the same frequency as the supply. Over part of the cycle of the AC excitation the
secondary current is slightly too large due to magnetizing current of the cores. Twice per cycle the
secondary current passes through zero, as it reverses. Rectifying this secondary current generates a
direct current which is a measure of the direct current in the primary.
Zero-flux method [4.11]. This method as applied by Holec is based on obtaining a perfect balance
between the magnetic flux generated by the current in the primary current carrier NP and the flux
generated by the current in the secondary winding NS and the auxiliary winding NA1 around the
toroidal T1 ferromagnetic core of the measuring head, see Figure 4.4 (a). The auxiliary winding is
connected to the input of a high gain power amplifier which feeds the secondary winding and a
burden resistor. Any change of current in the primary causes a change of flux through the toroid
which in turn induces a voltage in the auxiliary windings. This voltage is fed to the power amplifier
and the current in the secondary winding produces an opposing flux to counteract the original
change of flux. The balance point is known as the condition of zero-flux. Assuming the amplifier
has infinite gain and zero offset, no change of flux occurs in the toroid. In practice the gain of the
power amplifier can not be infinite. The consequence is that a small voltage is induced in the
auxiliary winding which influences the secondary current. In combination with the power amplifier
it produces an increasing imbalance of flux (drift). To minimize the effect of drift the zero-flux
current transformer is furnished with a magnetic modulator. Two extra cores (T2 and T3) are fitted
in the measuring head. The auxiliary winding NA2 and NA3 around these toroids are wound in the
same direction. They are excited by means of a sinusoidal voltage of fixed frequency generated by
an oscillator. The auxiliary windings are connected in mutually opposite sensing to the oscillator. If
the flux in the core is not zero, the balance between the induced flux in NA2 and NA3 is disturbed.
The peak detector recognizes this and the voltage is fed to the power amplifier in the secondary
circuit. The output current of the amplifier then restores a perfect flux balance so that the necessary
zero-flux condition is maintained. The advantage of this method is its great accuracy of 99.98% but
of course this transducer is expensive.
Ampere-turn compensation. A simplified version of the zero-flux method uses a Hall-sensor (made
by LEM) placed in the air-gap across the core for measuring the field-strength which is used as the
electronic input for generating the compensation current, see Figure 4.4 (b). The advantage of this
method is that only a relatively small field in the core is required, so that problems in saturation and
83
losses in the core are negligible. Moreover, this method can be used for measuring direct currents
too. Since the current generated in the secondary winding is provided by power amplifiers, they may
restrain for measurement high currents where the electronic part may not be able to generate the
required compensation current.
T1
T2
T3
Ip
Ferromagnetic core
iP
iS
NP
nP
NS
IS
NA1
Power amplifier
NA2
NA3
nS
Burden
resistor
Burden
resistor
Hall-sensor
Peak detector
iH
Power amplifier
Oscillator
(a)
(b)
Figure 4. 4 Current transducers; (a) Zero-flux method and (b) Ampere-turn compensation method.
Since the considerable accuracy provided by a zero-flux transformer is not required, in this instance,
the most appropriate one is the LEM current transducer which provides galvanic separation from the
live conducting paths and produces a high output signal that is ready for processing. The rated
current setting range using current transformers is limited because of their saturated current
transformer cores. To extend this range, larger current transformers must be designed. The LEM
transducer gives the corresponding linear value with a high precision (less than 0.1%). A fast
response LEM transducer with a nominal current rating of 1.5kA is preferable. However, the total
circuit current may reach a prospective current of 6kA which may damage the electronics.
Therefore, multiple parallel bars were constructed to split the total circuit current, so that only a part
of the current would be used for the detection. Such a transducer on one branch of the three parallel
copper bars placed in the main current path, was used, see Figure 4.5 (a). Depending on how those
shunt bars are located with respect to the total current and the circuit symmetry, the current in each
shunt may not be shared equally. The measurement of the main current ITot distributed among those
three parallel bars (Ibar1, Ibar2 and Ibar3) is displayed in Figure 4.5 (b).
2m
6000
5000
bar1
ITot
Ibar3
Ibar1
Ibar2
bar3
20cm
1.5m
bar2
Current [A]
4000
3000
2000
1000
bar1
bar3
bar2
0
-1000
10
15
20
time [ms]
25
(a)
(b)
Figure 4. 5 (a) Diagram of the main current busbar and the parallel shunts and (b) graphs of the current
distribution.
84
Chapter 4
Since the current distribution shows that it is not shared equally among the parallel bars, that
difference has to be taken into account when setting the detection level of the chosen bar, then a
better insight will be obtained of the total current in the circuit. The LEM transducer would be used
for the detection circuit.
4.4. Rogowski-coils as current transducers

The current transducers in the experimental setup used differentiating and integrating (DI) systems
which contained Rogowski-coils and active electronic integrators. They measured currents in the
main and commutating paths. Measuring direct currents became a problem when high currents were
involved, especially because using a conservative shunt to measure the currents could lead to
excessive heating in the shunt; also isolating problems arose if arbitrary circuit currents were
needed. Hence, isolating the shunt and the measurement recorder was essential. This could be
achieved by introducing indirect measurements. Such methods provided safer measurements
because they were completely isolated from the circuit and easily insulated against high voltages.
Therefore, they could be readily transferred from one branch to another. In general, they could
measure only alternating fields induced by the current itself. A Rogowski-coil should have regularly
spaced turns in a coil-form of constant cross-section A , whereas the field to be measured should
vary only slightly from turn to turn and across the cross-section. Under those conditions, the total
voltage induced into the coil connected in series turns is given by :
r
dB r
VRC = AN
dl
(4.1)
dt
where : N is the number of turns per meter length and N dl is the number of turns of the coil
element dl . Using Maxwells law, the relationship becomes :

di
di
VRC = 0 AN = M
dt
dt
where : i is the main current enclosed by the Rogowski-coil.
(4.2)
Rogowski-coils [4.12] measure the B-field around current conductors using a toroidal coil without a
magnetic core, see Figure 4.6. The main current induces a voltage in the coil with respect to the
magnetic coupling between the main current conductor and the coil. By integrating the induced
voltage, it is possible to recover the equivalent waveform of the original current. The integration can
be performed with either analog circuits or discrete calculations. Of course, Rogowski-coils are only
suitable for the measurement of transient currents in DC circuits and not continuous currents.
Metal Shielded
Rogowski-coil
I
I
Figure 4. 6 The Rogowski-coil.
85
A flexible Rogowski-coil was constructed so that it could be wrapped around the conductor under
interest in order to measure the enclosed current. The time integral of the voltage induced in the coil
was long enough and the time constant of the integrator was short enough. An RC integrator was
used and its output signal was in phase with and directly related to the impulse current multiplied by
the integrator constant. The Rogowski-coil had a flexible coil form of area A=4.9cm2 , 400 turns and
total length of 4m which was long enough to wrap around a casing of 15cm outer diameter. The
return conductor of the coil was brought back through the center of the coil form in order to avoid
encircling possible longitudinal fluxes. A metallic shielding was used to minimize any external
disturbances. The output voltage of the Rogowski-coil was integrated by the three integration steps
shown in Figure 4.7.
C1
R1
R3
+
R1 . C1 = 10 s ec
R1 / R2 = 1000
Rc
R4
R2 . C1 = R3 . C2
R2
L / Rc = R4 . C2
C2 = 200 nF
C2
R4 = L . 10^5
Rog in
4M7
18
4M7
1u
22
2k7
"offset"
+15V
20k
47
x1
10
x2
"gain"
2k
x4
47
2 3
10
47
8
6
+
4
47k
x8
39
10
1k8
x16
10
1k8
-15V
100
out 2Vpp
10
4k7
100
150n
10
out 20Vpp
25n
5n
10
Figure 4. 7 Schematic of the three-step integration circuit.
The integrator was tested separately using a step function as the input of the integrator and the
resultant integrated signal was recorded. Figure 4.8 shows the step function and its integration
signal in which the distortion was negligible at the beginning of the integrating process.
86
Chapter 4
2.5
2
Step-voltage [V]
1.5
1
0.5
0
-0.5
50
100
150
200
150
200
time [s]
0.06
Response-Voltage [V]
0.05
0.04
0.03
0.02
0.01
0
-0.01
50
100
time [s]
Figure 4. 8 A step input with arise time of 20ns and the response of the integrator.
The pulse and frequency characteristics of the integrator are presented in Figure 4.9.
5
10
10
Attenuation factor
Input voltage [V]
10
10
-1
10
50
100
150
10
200
-1
-2
-3
-4
10
time [s]
10
10
10
10
frequency [Hz]
(a)
(c)
0.05
0.04
-20
0.03
Phase angle
Output voltage [V]
0.02
0.01
-40
-60
-80
0
-100
-0.01
50
100
time [s]
(b)
150
200
10
10
10
frequency [Hz]
(d)
Figure 4. 9 The electronic integrator measurements;
Pulse response in the left-hand axis and frequency response in the right-hand axis.
10
87
It was verified that the Rogowski-coil was also able to measure flux changes in a DC circuit where
both a coaxial-shunt and a Rogowski-coil were used to measure a direct current of 2000A. Before
that test, both current transducers were calibrated separately. The coaxial-shunt had a resistance
value of 2.56mS. The mutual inductance coupling M of the Rogowski-coil was about 85:H and the
results are shown in Figure 4.10. With a shunt it became apparent that the pickup noise was very
small because the sensitivity difference between them was great; the shunt gave 1V/div and the
Rogowski-coil 10mV/div. Obviously, the output signal form of the shunt was greater than the
background noises and that smoothed out the measurement samples. The Rogowski-coil and the
integration process seemed to exhibit more noise due to the fact the low sensitivity setting had to be
used.
2000
1500
1500
Current [A]
2500
2000
Current [A]
2500
1000
500
-500
1000
500
10
20
30
time [ms]
40
50
-500
10
20
30
40
50
time [ms]
(a)
(b)
Figure 4. 10 Direct current of 2kA sensed by (a) the shunt and (b) the Rogowski-coil and its integrator.
Although the shunt was able to give a smooth signal, it could not be used to measure high currents
due to insulation and overheating problems. A comparison of the two devices can be seen in Figure
4.10 which shows a good agreement between the waveform currents with regard to each conversion
factor; (a) for the shunt and (b) for the Rogowski-coil and its integrator. So this confirmed that the
Rogowski-coil could be used now for measuring direct current transients. Although the test circuit
described in Chapter 6 produced direct currents, the hybrid breaker tests were categorized as
generating fault currents which produced pulse forms. A prospective current of 5kA would be
generated where the device under test (DUT) could interrupt that current at 3kA. A Rogowski-coil
was very suitable for measuring such pulses. Despite the fact that the Rogowski-coil in this case was
viable, its calibration was essential; therefore, a current measurement with four current transducers
had to be compared. Figure 4.11 shows the measurement for one period of a damped sinusoidal
current using the Rogowski-coil, Shunt, Transfo-shunt (LEM) and Current transformer (Pearson),
respectively.
88
Chapter 4
2000
Zoomed Region
950
1500
900
850
1000
800
Current [A]
750
500
700
0.46 0.47 0.48 0.49
0.5
0
-500
-1000
-1500
0.2
0.4
0.6
time [ms]
0.8
Figure 4. 11 Comparing different current transducers when measuring one period of 2kA damped sinus.
4.5. Conclusions
For the operation of a circuit breaker, the method of Ampere-turn compensation was chosen for
current sensing, while Rogowski-coils were chosen for measuring the currents in various branches.
The signal from the current sensor was used as the input value for an electronic detection circuit
which had both electrical and optical outputs. The electrical output could be used directly to trip the
main breaker and the thyristor for the hybrid setup, while the optical output would be used to trigger
solid-state devices.

[4.1]
[4.2]
[4.3]
[4.4]
Bartosik, M., et.al., Arcless DC hybrid circuit breaker, 8th Int Conf on Switching Arc
Phenomena and Electrical Technologis for Environmental Protection, SAP & ETEP97,
Lodz, Poland 3-6 Sept. 1997, Vol. 1 p. 115-19.
Stege, M., Kurzschlu8 Erkennungsalgoritmen zum strombegrezenden Schalten, Univ.
Carolo-Wilhelmina, Fakultat fur Maschienenbau und Elektrotechnik, Braunschweig,
Germany, 1992. (PhD thesis in German)
Tennakoon, S.B., DC thyristor circuit breakers: An investigation of current interrupting
ability, Lancashire Polytechnic, Lancashire, UK, 1986. (PhD thesis)
Fernandez, J.A., A new concept for protecting lines against faults in DC traction
network, Brown Boveri Review, Vol. 9, 1983, p. 372-8.

[4.5]
[4.6]
[4.7]
[4.8]
[4.9]
[4.10]
[4.11]
[4.12]
89
Morton, J.S., Circuit breaker and protection requirements for DC switchgear used in rapid
transit system, IEEE Trans. on Industry Applications, Vol. IA-21, No. 5, Sept./Oct. 1985,
p. 1268-73.
Glenn, D.J., Cook, C.J., A new fault-interrupting device for improved medium-voltage
system and equipment protection, IEEE Trans. on Industry Applications, Vol. IA-21,
1985, p. 1324-32.
Kedders, Th., Leibold., A.A., A current limiting device for service voltages up to 34.5kV
AC, IEEE PES Summer meeting 1976, paper A76-436-6, p. 1-7.
Prins, H.A., Kerkenaar, R.W.P., and Atmadji, A.M.S., Simulated high-speed fault-current
detection system for DC hybrid circuit-breakers, 34th Universities Power Engineering
Conf., Sept. 1999, Leicester, p. 111-4.
Schwab, A.J., Low-resistance shunts for impulse currents, IEEE Trans. on Power
Apparatus and Systems, Vol. PAS-90, 1971, p. 2251-7.
Kr@mer, W., Ein einfacher Gleichstromwandler mit echten Stromwandlereigenschaten,
Elektrotechnische Zeitschrift ETZ, Bd. 49, 1937, p. 1309-13. (In German)
Groeneboom and Lisser, J., Accurate measurement of d.c. and a.c by transformer,
Electronic & Power, IEE, Vol. 23, January 1977.
Pettinga, J.A.J., and Siersema, J., A polyphase 500kA current measuring system with
Rogowski coils, IEE Proc., Vol. 130, Pt. B, No. 5, September 1983, p. 360-3.
90
Chapter 4
Chapter 5
Fast electrodynamic drives for the hybrid breaker
Abstract
The limitation of stored energy in order to produce a current-zero must be accompanied by
minimizing the breaker opening time, so that, the time between a faults detection and the contacts
opening can be made as short as possible. Therefore, a fast-acting circuit breaker is an important
part of the hybrid breaker. One of the best known methods for accelerating a metallic disk is that of
using an electrodynamic propulsion drive in which the opening time can be determined. The deadtime has to be considered after a fault is detected in order to determine that the counter-current is
sufficient for a current-zero creation before the fault current becomes detrimental. To understand
the phenomenon, one of the several methods that can be employed to analyze transient behavior is
needed. Those methods can show how different approaches can be used for a simulation that
includes attempts numerical and symbolical analysis using the coupled coil theory. Since each of
those methods has different advantages, results from them will give different outcomes depending
on objectives.
5.1. Introduction
A satisfactory fast-opening mechanism will play an important role in the success of a hybrid
switching technique. Such a mechanism has been used for electrodynamic propulsion drives which
operate with impulse currents. When a conductor is exposed to a pulsed magnetic field, that field
does not penetrate into the conductor instantaneously. Surface currents, known as eddy currents, are
induced which initially shield out the magnetic field and then gradually permit it to penetrate. This
process causes the movable part of the drive to change its position or state. The impulse current and
electrodynamic force relationship in the electric circuit is associated with what is taking place in the
mechanical system. In turn, the current and the electrodynamic forces affect the mechanical
movements. A mechanical movement causes the electrodynamic force to change and interact with
the current so that energy is interchanged [5.1,2]. The electrodynamic force accelerates the moving
parts; however, this force acts only on a comparatively small initial segment determined by the area
of the electrodynamic interaction with the excitation coil. This induction phenomenon has been
extensively used for both destructible and non-destructible purposes. Induction devices have many
applications; such as mass launchers [5.3,4,5,6], railguns [5.7], metal forming [5.8,9], mass
levitation [5.10,11], plungers [5.12,13,15,18], valves control in pneumatic systems [5.14,15,18], etc.
The difficulty of designing moveable induction devices that are needed for opening switches is
caused by having to coordinate the characteristics of the drive, the moving parts and the clasp, that
reduces the efficiency and limits the operating times. A contradiction between fast opening and
braking mechanisms requires a well-matched catching (clamping) device.
92
Chapter 5
Computer simulation of the electrodynamic driven mechanism has been performed in which the
phenomenon is represented by non-linear differential equations. The energy conversion from
electric energy to kinetic energy in this phenomenon is a non-linear process too. Different
approaches and methods will be employed for simulating the process general point of view by using
first linear lumped parameters to outline where the solution may be found. Then, this is followed by
the application of non-linear lumped parameters to obtain a particular solution. The simulation that
was performed with MATLAB/Simulink computing software [5.31] gave measurement results that
confirmed the validity of such a simulation model.
5.2. Description of the electrodynamic drive system

The electrodynamic drive is illustrated in Figure 5.1. A moveable terminal (26) for the vacuum
contacts is mounted at the top of a nylon rod (12). The excitation coil (22) is connected to a precharged capacitor (set-capacitor) by controllable solid-state switches. Opening of the vacuum
contacts occurs when the nylon rod moves downwards. The rod is fixed to a metallic disk (1) and a
spring 1 (10) is placed in the hole through the disk and it goes inside the rod. The permanent magnet
(14) holds the disk in an open-state of the vacuum contacts. The demagnetization coil (15), springs
1 and 2 (10 and 11) reclose the contact breaker by discharging a pre-charged capacitor (resetcapacitor).
Principle operations:
Opening
When the set-capacitor discharges its stored energy by turning-on the control switch, an impulse
current arises and builds up the magnetic flux lines. Part of this flux links through the metallic
disk. The flux linkage induces eddy currents in the disk that in turn generate secondary flux lines
opposing the primary flux which results in a downward movement of the disk because it is nearly
free to move. Then, this movement changes the flux linkages generating other eddy currents, and
the process repeats itself. Theoretically, these processes will continue repetitively until all the
stored energy in the capacitor has been entirely dissipated. The combination of solid-state
switches allows a damped sine current to flow for one period. Within that period, the disk has
sufficient kinetic energy to move on its own; whilst moving, spring 1 shrinks storing part of the
kinetic energy as potential energy. Some of that kinetic energy is transferred to the damper body
(7), causing the disk velocity to decrease which allows the disk to touch the demagnetization coil
gently but remain attached to the permanent magnet that is fixed to the plexi-glass body. In the
meantime, the damper body moves downwards into the damping chamber (13) which transfers
kinetic energy into air compression and decompression with the aid of spring 2. During this
process, the air in the chamber does work that may take a part of the disks kinetic energy to
allow a higher disk speed to be held by the permanent magnet. The kinetic energy of the disk is
shared with the springs and the damper, while a little is absorbed by surface friction.
93
Closing
A different principle is used for closing the contact breaker. By discharging another small precharged reset-capacitor to the demagnetization coil, closing the contacts is possible. A small
impulse current generates a flux line opposing the flux emerging from the permanent magnet,
which results in minimizing the holding force from the magnet so that spring 1 is able to release
the potential energy thus restoring its length; its return moves the disk upwards causing the
vacuum switch to close.
Figure 5. 1 Cross-sectional view of the moving mechanism.
94
Chapter 5
Obviously, by varying the initial capacitor voltage, the kinetic energy of the disk can be regulated.
On the one hand, increasing the initial voltages may cause higher impulse currents that raise
excessive forces acting on the disk, so that it moves faster. However, if the kinetic energy of the
disk is too high just prior to touching the demagnetization coil, the spring 1 would not be able to
store the kinetic energy properly. Subsequently, the disk will attach to the magnet for a while, but
since the collision is near perfect, the disk bounces back in the upward direction. In other words, the
disk is not held by the permanent magnet. It moves back assisted by the released energy of the
spring 1 that leads to the contacts reclosing. On the other hand, insufficient initial capacitor voltages
would not make the disk attach to the magnet. Instead the disk keeps attached to the magnet, it
moves a while and repulses back in the upward direction by the spring 1 resulting in the contacts
reclosing. Shortly, for successful contacts separation, at the instant the disk attaches the magnet, its
velocity has to be minimized to avoid the bouncing phenomenon. An appropriate combination of
springs to store the kinetic energy of the disk in potential energy has to be determined carefully. The
opening time is made to be as short as possible but it must ensure no bouncing. Other devices can be
added for assisting the spring function, such as, the air damper at the bottom as shown in Figure
5.1. Normally, mechanical friction between the stationary and moving parts is always present during
the entire process, but its influence is negligible. The copper spirally wound drive coil of diameter
67mm is cast in a mold and has 100 turns with a self-inductance of 85:H and a resistance of 238mS
in the closed mode of the breaker.
This design was a modification of a fast opening switch made in Hazemeyer Research laboratory in
the sixties. Since then, electrodynamic drives had been also successfully used as make switches for
high power tests [5.36,37].
5.3. Mathematical analysis of the electrodynamic drive system

Events during operation of the electrodynamic drive described above are transient in nature and they
can be analyzed using a lumped-element method (coupled-circuit theory) [5.3,4,10,14,34] and other
involving field theories [5.15,16,17,18,19,20,21,32,33]. The first method requires an equivalent
network scheme associated with both electrical and mechanical equations. The second method
needs the solution of the Maxwells equations with respect to the configuration in space and time.
Both methods contain non-linear differential equations for the electromechanical coupling and each
has advantages and disadvantages. Each method has its own strength and weakness. The lumpedelement method can represent a system composed of passive devices which simplifies the modelling
considerably. Hence, new modifications can be integrated relatively easy; whilst the application of
Maxwells laws is difficult and requires an understanding of electromagnetic fields in space and
time. Symbolical calculations from Maxwells equations are suitable only for simple configurations.
Therefore, analyzing such complex phenomena, one needs finite or boundary element programs
particularly designed for dealing with 3D-space and time varying systems. Such software is
commercially available. It calculates eddy currents in the disk, acceleration, force, effective circuit
95
inductance and resistance, etc. Apparently, it would take much effort if the system has to be
modified. Moreover, it generally requires long computing times and computer resources and it is
costly.
5.3.1 Analysis of the electrodynamic drive using the coupled coils theory
This method used lumped elements to describe behavior of the system. For convenience, it was
assumed that the system transferred the energy through coupled coils. The excitation coil had N1
turns and the disk was considered to represent a single coil for the first approximation. Both coils
were axially symmetric and by splitting the disk into coaxial rings, a better approximation could be
achieved, but its computation would be cumbersome.
The drive contained two parts; the actuator comprises a stationary coil, a pre-charged capacitor and
two control switches; whilst the dynamic part consisted of a metallic disk, springs and a damper.
Figure 5.2 shows the diagram for the analysis.
R1
CSW
Zin
i1
L1
VCO
Thy
Disk
D
x
Figure 5. 2 Diagram of the electrodynamic drive system.
The system was based upon the principle of a current transformer in which the secondary part (a
good conducting metal disk) was nearly free to accelerate; while the primary part consisted of the
stationary excitation coil L1 , the precharged capacitor CSW as an energy store (WCO = 1 2 CSW VCO )
2
and the solid-state switches (thyristor Thy and diode D) which controlled the discharge process. In
the initial position, the disk as the secondary coil, was placed near the excitation coil, so that, they
could be considered to behave as a pair of coupled coils. The thyristor Thy was triggered only once,
causing current to flow into the coil and produce an electrodynamic force on the disk. The diode D
provided an alternative path for the current in the negative half of the cycle. The current built up the
magnetic field in the excitation coil L1 and the flux lines could then cross the disk, because it was
made of metal, eddy currents flowing in the disk opposed the original flux lines. When considering
the disk as a single-turn coil, its current flowed in the opposite direction to the current in the
excitation coil. The expanding nature of the field caused a strong impulsive force to move the disk
downwards. In turn, this movement decreased the rate of change in the mutual coupling between the
96
Chapter 5
disk and the excitation coil; thus, the disks motion was caused by energy being discharged from the
excitation coil.
The coupled-circuit theory presents two different formulae for the electrodynamic force based on
the known electrical parameters. The first formula is based on the following equation : [5.3,6,10]
dM
FED x , t = i1 i2
(5.1)
dx
where : i1 is current in the primary coil, i2 is current in the disk, M is the mutual inductance
1 6
between the primary coil and the disk and x is displacement of the disk, respectively. This formula
requires both the coil currents and the differentiation of mutual inductance to be known with respect
to the disk displacement.
Another expression is presented below: [5.8,12,14]
1 2 dLeq
FED x , t = i1
(5.2)
dx
2
where : i1 is current in the primary coil and Leq is the equivalent (effective) inductance of the
1 6
primary coil in the presence of the disk. In this way, the propulsive force was found to equal onehalf the coil current squared multiplied by the circuit inductance per unit length (inductance
gradient). The circuit inductance increased because of the motion of the disk. Its linear relationship
with the force exerted helped to design the drive. Basically, the drive could be considered as a single
turn motor; therefore, it required a very high current with a relatively low voltage. A high current
could be achieved if the circuit inductance was considerably low. Consequently, the energy
conversion would be less efficient.
In its simplest form, the system can be represented by the coupled coils circuit as shown in Figure
5.3.
R1
CSW
Zin
i1
VCO
Req
M
L1
i2
L2
R2
/C
SW
Zin
i1
VCO
S1
Leq
S1
Figure 5. 3 A coupled electrical circuit and its equivalent.
where : CSW , VCO , R1 , L1 , R2 and L2 are the storage capacitor, the initial capacitor voltage, the inner
resistance and self inductance of the coil, the inner resistance and self inductance of the disk,
respectively. When switch S1 closed, current i1 flowed in the primary circuit inducing current i2 in
the secondary circuit. The disks motion decreased the coupling between the primary and secondary
circuits that, in turn, affected current i1. Then field lines of the two coupled coils are illustrated in
97
the left-hand column of Figure 5.4. The coupling factor k represents the fraction of the generated
flux enclosed by the secondary coil; it is defined as k = M
L1 L2 , where : M is the mutual
inductance between those two coils.

b
Mutual inductance M [H]
0.125
Stationary coil
d
Moving coil
xO
0.12
0.115
0.11
0.105
0.1
a
0.095
10
distance d [mm]
(b)
(a)
Figure 5. 4 (a) A simplified model of two coupled coils
(b) Mutual inductance of two axis-symmetrical coils (a=48mm, b=57mm).
The mutual inductance of two coaxial thin wire loops is defined as: [5.23]
1 K16 E 16"#

(5.3)
! 2
$
ab
d
where : = 2
, K 1 6 = I
and E 1 6 = I 1 sin d ;
1a + b 6 + d
1 sin
K 1 6 and E 1 6 are the complete elliptic integrals of the first and second kinds, respectively [5.24].
M=
2
ab
/2
/2
The solution of the integration can be found with numerical techniques. The stationary coil has N1
turns, so that the total mutual inductance becomes approximately M T = M N 1.
The resistance of the stationary coil R1 and inductance L1 can be calculated from : [5.35]
2 N 1 l al
(5.4)
R1 =
2
Rl
8a 7
R 4
L1 = al N1 ln
2
(5.5)
where : l is the coil resistivity, al is the radius of the coil loop and Rl is the radius of the coil cross
section.
By assuming the disk to be a single turn coil, R2 and L2 can be calculated from :
2 a
R2 = d 2 d
Rd
8a 7
R 4
L2 = ad ln
(5.6)
(5.7)
where : d is the disk resistivity, ad is the effective radius of the disk loop and Rd is the effective
radius of the disks cross section. In practice, it is impossible to measure L2 and R2 .
98
Chapter 5
The impedance seen by the capacitor CSW can be found in the s-domain by replacing the capacitor
with a voltage source. To get a visualization of the changed equivalent inductance and resistance,
the following fundamental equations in the time-domain are given for both loops :
di
di
VS t = R1 i1 t + L1 1 + M 2
(5.8)
dt
dt
di
di
0 = R2 i2 t + L2 2 + M 1
(5.9)
dt
dt
16
16
16
Since all the initial conditions are zero, in the s-domain, these equations will become :
VS s = R1 + sL1 I1 s + sMI 2 s
16 1
6 16 16
0 = 1 R + sL 6 I 1 s6 + sMI 1 s6
2
(5.10)
(5.11)
s
1 6 R M IsL1s66 and this
1 +
From equation (5.11), the current in the secondary loop can be found : I 2 s =
allows I 2 to be replaced in equation (5.10). Then, the equivalent impedance becomes :
7 1
1
6
1 6 11 66
s 2 L1 L2 M 2 + s R1 L2 + R2 L1 + R1 R2
VS s
Zin s =
=
I1 s
R2 + s L2
By substituting the coupling factor relationships, the term M is eliminated becoming :
1 6
Zin s, k =
7 1
s 2 L1 L2 1 k 2 + s R1 L2 + R2 L1 + R1 R2
sL2 + R2
1 6
(5.12)
1 6
1 6
In the frequency domain, the equivalent impedance Zin , k = Req , k + jLeq , k can be found
by substituting s = j ( = 2 f ). The equivalent circuit resistance can be extracted :
1 6
R1 R2 + R2 L1 L2 2 k 2 + 2 L2 R1
Req , k =
2
2
R2 + 2 L2
2
and the equivalent circuit inductance is :
1 6 4
Leq , k =
L1 2 L2 2 1 k 2 + R2 2
R2 + 2 L2
2
(5.13)
(5.14)
Figure 5.5 shows the resistance and inductance curves as functions of the coupling factor
( 0 k 0.9 ) and frequency ( 0 f 2000). Factual data was used for the computation, namely
CSW = 120F , VCO = 1800V , R1 = 150m , R2 = 10m , L1 = 85H and L2 = 10H . The traces for
Req and Leq coincided with an oblique line across the surface starting from high to low frequencies
and high to low coupling factors. The lines with an arrow indicated how the parameters changed
during the disks movement.
99
220
200
Leq [H]
Req [m ]
100
180
160
80
60
40
20
140
2000
0
0
0.2
0.4
1500
500
0.8
1000
0.4
500
0.8
1500
0.2
0
f [Hz]
0.6
1000
0.6
0
2000
k [
]
k [
]
f [Hz]
(a)
(b)
Figure 5. 5 Three-dimensional view of (a) the equivalent resistance and (b) the equivalent inductance,
as functions of coupling-factor and frequency,
where the arrow shows their variations with respect to the disk moving.
According to the equivalent drive system shown in Figure 5.3, applying Kirchhoffs voltage law to
obtain the current in the excitation coil and the voltage across the capacitor by substituting I 2 s and
16
1 6 sIC1s6 + Vs ; (the negative sign is consistent with respect to the
16
replacing VS s by VC s =
CO
SW
reference current) in equation (5.10). After some rearrangement, the capacitor voltage in the sdomain can be expressed by :
16
VC s =
7 1
21 k 7 + s 1 R L + R L 6 C
2
CSW VCO s 2 L1 L2 1 k 2 + s R1 L2 + R2 L1 + R1 R2
3
s L1 L2 CSW
SW
+ s L2 + R1 R2 CSW + R2
and the capacitor current can be written as :

CSW VCO sL2 + R2
I1 s = 3
s L1 L2 CSW 1 k 2 + s2 R1 L2 + R2 L1 CSW + s L2 + R1 R2 CSW + R2
16
7 1
(5.15)
(5.16)
(5.17)
In the secondary circuit, the current is represented by :
16
I2 s =
s L1 L2 CSW 1 k
3
sk CSW VCO L1 L2
7 + s 1 R L + R L 6C
2
SW
+ s L2 + R1 R2 CSW + R2
The fact that the relationship between the coupling factor k and the speed v of the moving disk is
unknown, it is very unlikely that complete symbolical solutions will be found. Even if this
relationship were known, the coefficients in the expressions would change gradually as functions of
k giving only one unique solution for each coefficient k , as a function of time (assuming that
k = f v , d , t , where: d is the disk displacement and t is the time). Therefore, the following
equations can be derived by rearranging the equations (5.15), (5.16) and (5.17), so that, the
following convenient expressions can be found :
16
16
b2 s 2 + b1s + b0
VC s = 3
s + a2 s 2 + a1s + a0
c1s + c0
I1 s = 3
s + a2 s 2 + a1s + a0
(5.18)
(5.19)
100
Chapter 5
16
I2 s =
d1 s
s + a2 s + a1s + a0
3
(5.20)
where : the constants a2 , a1 , a0 , b2 , b1 , b0 , c1 , c0 and d1 are the appropriate ones normalizing the
coefficient of the highest order. This will allow symbolic solutions to be found after determination
of time-varying poles and zeros. Hence, one of three following cases may occur:
(1) underdamped system
(2) critical damped system
(3) overdamped system
Since the analytical solution is rather laborious, a more implicit way of solving this problem would
be to use the state-space method (SSM) [5.25,27] where high order differential equations are
reduced to multiple first order equations. The state-space approach requires canonical state
&
x = A x + BU
equations written in a matrix form as :
and the initial state values as : x 0 = xo .
y=Cx
05
Time-domain solutions can be obtained by rewriting the respective state-space equations, so that in
this case, the equations become :
dx1
x1
0
1
0
0
dt
dx2
x2 + 0 U
0
1
= 0
(5.21)
dt
dx3
1
a0 a1 a2 x3
dt
"#
##
##
! #$ !
"# "# "#

## ## ##
## ## ##
$! $ ! $
x 106"# 0 "
## = 0 ## and U = 0 .
with the initial condition x 106
## ##
! x 106$ !V #$
The capacitor voltage, capacitor current and the disk current can be calculated from :
v 1t 6"# b b b " x "
## = c c 0 ## x ##
i 1t 6
## ##
##
! i 1t 6 $ ! 0 d 0 #$ ! x #$
1
CO
An exact solution of the state-space equations will be [5.28] :

x t = e At xo
05
(5.22)
(5.23)
where : e At is the transition matrix that can be expressed by the infinite matrix series [5.26] :
At
m= 0
Amt m
m!
(5.24)
where : A 0 = I = identity matrix . Since an approximation of the transition matrix will be uniformly
convergent in any finite interval, the matrix e At can be evaluated with a prescribed accuracy.
101
Numerically, an approximation of the transition matrix can be related to a finite m; therefore, a

recursive formula can be derived :
x n + 1 t = e At x nt
(5.25)
10 5 6
0 5
This numerical technique provides a unique solution for a certain k -value by varying the
coefficients in matrices A and C . Figure 5.6 illustrates the state-space computational method.
i2(t)
d1
d1
c1
c1
+
+
i1(t)
c0
c0
b2
b2
b1
b1
x3
x2
1
s
x1
+
+
+
b0
b0
vC(t)
a2
a2
+
+
a1
a1
+
a0
a0
Figure 5. 6 Simulation diagram for the state-space equations.
The results of this method are shown in Figure 5.7 (a) for the capacitor current and Figure 5.7 (b)
for the capacitor voltage.
Another implicit method was developed by starting from the previous equations (5.15) and (5.16).
Approximating the t -domain solution in the same way as the s -domain in successive steps
overcame the need to calculate zeros and poles of the transfer functions explicitly. The method is
known as the Numerical Inverse-Laplace Method (NILM). More detailed mathematical formulation
is given in [5.29,30]. For given parameter values and a certain coupling factor, the capacitor voltage
and current in the s-domain could be set and computed numerically for a range of time-intervals
under study. The inverse-Laplace f t of an arbitrary transfer function F s is defined as :
16
f t =
+ i
16
1
e st F s ds
2i i
16
16
(5.26)
16
where : is chosen in such a way as to leave all singularities of F s , s = + i . In most cases, the
transform could not easily be inverted analytically. This method is based on constructing the
102
Chapter 5
16
function f t in its Fourier series by means of a numerical inversion. Since f is a real-value

function for a real t , its mathematical equivalent form can be obtained by manipulating the real and
imaginary parts of (5.26) to give :
16
f t =
< 1 6A 1 6
2 t
e Re F s cos t d
0
(5.27)
Then, the series is discretized with the trapezoidal rule to give :
16
% ("#
& )#$
*
'
!
This expression can be approximated numerically to become :
% ik e ("#
1 F 1 6
f 1t 6 e
+ Re& F +
T ! 2
*
' T )$#
16
f t =
1 t F
ik ikT t
e
+ Re F +
e
T
2
T
k =1
ikt
T
2M
(5.28)
k =1
where : T is the step size computation and M is the acceptable maximum index after discretization.
The discretized form of equation (5.28) was implemented; however, in operation it took a lot of
computing time because at each specific axial separation (and each coupling factor), a new
numerical inverse-Laplace had to be computed. In a trial run, ten different k s were computed and
for each k , the computation was assumed to be static with reference to the capacitor voltage
equation (5.15) and the capacitor current equation(5.16). The results of this method are shown in
Figure 5.7 (c) for the capacitor current and Figure 5.7 (d) for the capacitor voltage.
Figure 5.7 compares the State-space Method (SSM) assigned as (a) and (b) with the Numerical
Inverse-Laplace Method (NILM) assigned as (c) and (d). From a theoretical point of view, the
electrical parameters (v , i ) of the system could indicate where to find boundary solutions of this
situation. Simulation results obtained with these two methods were found to be identical which
suggested how to find and to check the real solutions. The calculations for capacitor voltage and
capacitor current indicated that decreasing k decreased the frequency, current amplitude and
effective resistance; therefore, the oscillation lasted longer. These two methods, however, could
only provide qualitative solutions and they were practically unusable since the coupling factor k
was either undefined or indeterminable. However, the practical situation appeared to be more
dynamic, so that in practice, the capacitor current and voltage traces had curves starting from the
coordinates k 0 , t 0 = (0.9, 0) to ki , ti = (0,1ms) . As a result, actual voltage and current ( vC , iC )
1 6
1 6
traces were oblique across the k and the t axes ( k -t plane) as shown in Figure 5.7.
103
Voltage [V]
2000
Current [A]
4000
1000
0
1000
2000
2000
1
0.8
2000
0
0.6
1
0.2
0.8
0.4
0.4
0.6
0.6
0.4
0.8
0.2
0.2
1
k [
]
k [
]
time [ms]
(a) Capacitor current using SSM
0.2
0.4
0.6
0.8
time [ms]
(b) Capacitor voltage using SSM

Voltage [V]
2000
Current [A]
4000
1000
0
1000
2000
2000
1
0.8
2000
0
0.6
1
0.2
0.8
0.4
0.4
0.6
0.6
0.4
0.8
0.2
0.2
1
k [
]
k [
]
time [ms]
0.2
0.4
0.6
0.8
time [ms]
(c) Capacitor current using NILM

(d) Capacitor voltage using NILM
Figure 5. 7 (a) The capacitor current and (b) the capacitor voltage using SSM
(c) The capacitor voltage and (d) the capacitor voltage using NILM.
If the problem could be solved symbolically, the electrodynamic force could be calculated using the
following formulae :
dM
FED x , t = i1 t i2 t
(5.29)
dx
1 6 16 16
dM
=
dx

"#

2ab
K 1 6 1 +
41a b6 + x 9 E 1 6#$#
41 a + b 6 + x 9 !
x
(5.30)
dM
is the gradient of the mutual inductance between the two current loops given by
dx
ab
equation (5.3) and x = 2
.
2
a + b + x2
where :
1 6
In the next section, a second approach will be used to eliminate the coupling factor k from the
equations.
5.3.2 Analysis of the electrodynamic drive using equivalent lumped parameters

This method eliminates the need for k -values. After the solution domain has been reduced, nonlinear lumped parameters can be used to describe the electrical and mechanical equations by
104
Chapter 5
rewriting the problem as coupled differential equations in their original forms and solving them
numerically. Then the equations developed can be solved with numerical software, in this case,
MATLAB and Simulink [5.31] are suitable. Clearly, non-linear RL-lumped parameters will arise
due to the disks motion, so that, they will vary with reference to the displacement from the initial
position. The RL-lumped parameters can be determined by measuring, at particular distances, the
inductance and resistance related to the coils terminal, in the presence of the conducting disk. This
can give the equivalent inductance Leq and resistance Req by finding suitable polynomials, while
these lumped parameter functions can be determined with respect to the displacement.
The following assumptions were made when analyzing the system :
the material saturation could be neglected and the system was infinitely permeable,
the friction was considered to be linear increasing with speed,
the spring force was linearly proportional to the elongation,
the control switches (Thy and D) were to be considered ideal.
The simulation of electrodynamically driven fast switches must include the determination of the
following system parameters: the capacitor current iC , the capacitor voltage vC , the disk
dx
d2x
, the disk acceleration 2 , the impulse force Fd at the disk,
dt
dt
and the energy balance in the system.
displacement x , the disk velocity
Having a system like that depicted in Figure 5.2, an impulse current can be generated by triggering
the switch Thy. The impulse current iC in the system will flow in the primary coil, by definition
iC = i1 and it will obey Kirchhoffs voltage law :
16 16 16
d
1
R i + 3L i 8 +
dt
C
v R t + v L t + vC t = 0
eq C
eq C
SW
(5.31)
iC dt + VCO = 0
Assuming that the magnetic flux linkage in the disk and the coil had a linear relationship with the
coil current, the flux linkage between coil and disk can be written as x , t = L x i t ; x being the
1 6 1 616
displacement of the disk relative to a fixed reference point. Given that the inductance followed the
dLeq dLeq dx
=
. In
relationship : Leq = L x , the rate of change of the inductance can be written as
dt
dx dt
the same way the resistance Req = R x and the rate of change of the resistance can be written as
16
dReq
16
dReq dx
. Using this expression would make damping of the system less than for only a static
dt
dx dt
DC coil resistance.
=
Substituting the terms
dLeq
and
dReq
in equation (5.31), then, after differentiating it with respect to

dt
dt
time and performing algebraic manipulation, a non-linear second order differential equation is
obtained :
105

dLeq dx
dReq dx
d 2i
di
1
dx
Leq 2C + C Req + 2
+ iC
+
+
dt
dt
dx dt
CSW
dx dt
dt
d 2 Leq
dx

dLeq d 2 x
=0
dx dt 2
(5.32)
The second and the third terms represent mechanical contributions.

Then, some relevant parameters can be defined :
The capacitor voltage :
16
16
1
iC d + VCO
CSW 0
vC t =
(5.33)
Disk velocity :
16
dx
dt
Disk acceleration :
vd t =
(5.34)
16
dvd d 2 x
= 2
(5.35)
dt
dt
Rewriting equation (5.32) using these new parameters will lead to a more comprehensible form :
ad t =
Leq

2
dLeq
dLeq
dReq
d 2iC diC
1
2 d Leq
+
+ iC
+ vd
+ vd
+ ad
=0
Req + 2vd
2
2
dt
dt
dx
CSW
dx
dx
dx
(5.36)
Table 5.1 shows the influence of a particular term with respect to its physical effects
Table 5. 1 The coupling terms and their physical effects.
2vd
vd
dReq
dx
dLeq
dx
d Leq
2
+ vd
dx
+ ad
dLeq
dx
this term increases the damping of the current

waveform during the disks motion
these terms decrease the frequency of the current
waveform during the disks motion
The mechanical force balance according to Newtons second law can be obtained by summing the
forces acting on the disk as shown in Figure 5.8.
b
FF
FS
m
FED FG
FM
Figure 5. 8 Forces acting on the disk.
The disk impulse force is written as :
F 1t 6 = m
d2x
.
(5.37)
d
dt 2
The net force moves the disk of a mass md with an acceleration ad . The disk will be affected by
d ad = md
forces from six different sources. The forces taken into consideration may include the following :
106
Chapter 5
(1) the electrodynamic exchange force FED due to the current in the actuating coil which is
dL
dLeq
1
given by : iC 2 t
, the term eq is known as the inductance gradient;
dx
dx
2
(2) the spring force FS which is proportional to the displacement of the spring x written as k x ,
16
where k is the spring constant (modulus of the spring). When the contacts open, the spring
is compressed but when the contacts closed, the spring is relaxed;
(3) the frictional force FF which consists of two parts, mechanical and air friction. The
mechanical friction is known as dry friction and it occurs when a body moves across a dry
surface, its value is proportional to the normal force and the roughness of the surfaces in
contact. Air friction is considered to be the same as the friction in a liquid, it is proportional
dx
to the speed of the disk moving in a fluid (b ), this is the so-called viscous damping
dt
force, where : b is the coefficient of viscous damping;
(4) the gravitational force is FG ( FG = md g ), where : will be the effective contribution of
this force depending on the direction of motion. An upward direction is denoted as a
negative force ( = 1), while, and a downward direction is a positive force ( = +1) and
for horizontal direction is 0;
(5) the air compression and decompression forces in the chambers of the system are produced
by under- and over-pressures which act as damping forces;
(6) the magnetic force is FM and it is produced by the permanent magnet.
The natural directions of FS and FF always oppose the excitation force and will be negative in the
force equation. A vertical position of the system shows that the FG will have the same direction as
FED . The same goes for FM , but initially its contribution will be negligible when an impulse current
flows, because the maximum displacement will reach only about 2mm from a total moving path of
10mm. Hereby, the net total force on the disk becomes : Fd = FED FS FF + FG .
Substituting the individual forces gives the following differential equation of the disks motion :
1 2 dLeq
d2x
dx
md 2 + b + kx iC
(5.38)
md g = 0
2
dt
dt
dx
The equations (5.36) and (5.38) are coupled and they are non-linear; therefore, explicit solutions
cannot be obtained from them, but a numerical method will give a satisfactory solution. The initial
values that are required are :
05
iC 0 = 0 ,
diC
dt
t =0
16
VCO
dx
, and x 0 = 0 ,
Leq x t = 0
dt
16
t =0
= 0.
The two-second order differential equations (5.36) and (5.38) can be split into four non-linear firstorder differential equations and that decomposition will be achieved by introducing the following
new state variables :
107
i = y1
x = y3
&
& &
i& = y1 = y2 and x = y3 = y4 .
&& = y2
&& = y4
x &
i &
Hence, the state equations will have the following form :

&
y1 = y2
y
y
&
y2 = 2 A1 1 A2
Leq
Leq
(5.39)
&
y3 = y4
&
y4 =
k
b
1 dLeq 2
y4
y3 + g +
y1
md
md
2md dx
where :
16
A1 x = Req + 2 y4
dLeq
dx

dReq
dLeq b
d 2 Leq 2
1
k
1 dLeq 2
A2 x =
+
y3 +
y4
y3 + g +
y1 +
y4
CSW
dx
dx md
md
2md dx
dx 2
with the initial conditions :
y1 0 = 0
16
05
V
y 005 =
L 005 .
y 005 = 0
y 005 = 0
CO
eq
3
4
5.4. Comparison between simulation and measurement results

At each incremental time step, new lumped parameter values ( Leq and Req ) can be determined and
then, the associated electrical and mechanical variables can be calculated. New parameters for the
effective inductance and resistance will arise indicating that there will be variations in those circuit
parameters when the disk is moving away. This process lasts successively until reaching the final
simulation time. The accuracy of this method will depend on the size of the time step and the
numerical integration method which can be chosen from the Simulink library. The fourth order
Runge-Kutta algorithm [5.24,31] was chosen for solving these equations numerically, giving : iC t
16
05
and x t simultaneously. Moreover, at each time increment of the integration process, the systems
energy balance had been calculated. That was very useful for verifying the numerical solutions of
the differential equations. The energy balance can be calculated as follows:
108
Chapter 5
Electric energy stored in the capacitor :
1
EC t = CSW vC 2 t
2
Magnetic energy stored in the coil :
1
E L t = Leq iC 2 t
2
Dissipated energy as heat in the circuit resistance :
16
16
16
16
(5.41)
16
(5.42)
16
I
t
(5.40)
2
E R t = Req iC d
0
Kinetic energy of the disk :

1
E k t = md vd 2 t
2
Potential energy in the spring :
1
E sp t = k x 2 t
2
16
16
16
(5.43)
16
(5.44)
16
A small part of the energy E x t will be lost as sound waves and mechanical friction against the
wall as well as air turbulence in the system; however, they are considered to be negligible. When the
current is being discharged, the potential energy in the spring can be neglected too, because the
displacement is still too small in comparison to the impulse force. Since the law of energy
conservation must be valid, the computation can be verified by using the following expression :
EC t t = 0 = EC t + E L t + E R t + E k t + E sp t + E x t .
(5.45)
16
16
16
16
16
16
16
The difference between the original charging voltage to the capacitor and the final voltage has been
called the backswing ratio. It represents the dissipated energy in the circuit resistance as heat lost,
kinetic energy of the moving disk and the potential energy in the spring. Any unused energy will
return to the storage capacitor where it can be used again during the next operation. The mechanical
efficiency of the system can be defined by the ratio between the kinetic energy of the disk and the
initial energy stored in the capacitor:
E
(5.46)
= k max
E CO
Static measurements were made at different distances of the disk with respect to the excitation coil
in order to obtain the required equivalent (effective) inductance and resistance. Then, the data could
be interpolated using third order polynomials in order to determine the Req x and Leq x functions
16
as shown in Figure 5.9.
16
Equivalent resistance Req [m]
240
Equivalent inductance Leq [H]
190
180
230
170
160
measured
curve-fitted
220
150
140
210
130
measured
curve-fitted
120
200
110
190
100
90
109
10
15
20
25
180
displacement x [mm]
10
15
20
25
displacement x [mm]
(a)
(b)
Figure 5. 9 (a) The measured equivalent inductance and
(b) The equivalent resistance, as functions of the disk displacement.
Curve fitting based on polynomial approximation gave the following relationships:

Leq x = a3 x 3 + a2 x 2 + a1 x + a0 and Req x = b3 x 3 + b2 x 2 + b1 x + b0 , where the coefficient values were
16
16
a3 = 6.334 , a2 = -0.3883, a1 = 9.17e - 3 , a0 = 9.55e - 5 , b3 = 5.90e3 , b2 = 326.6 , b1 = 6.76 and

bo = 0.236 . Obviously, these relationships could provide the first and second derivatives with
respect to x for use with the simulation; however, they would only be valid in the measured
distance interval.
The circuit parameters were: capacitor drive CSW = 120F , initial voltage of the capacitor
VCO = 1800 V , mass of the disk md = 1kg , gravitational constant g = 10 ms2 , spring constant
k = 5270 N/m and friction coefficient 0 b 3000 N.s/m.

It will be proved later that the generated impulse force was so high (up to 20kN) that any restraining
forces lower than 200N could be considered insignificant in relation to the total moving force. In
addition, the working principle of an air damping mechanism in the lower chamber could not be
verified experimentally due to possible leakage in the system. This was confirmed by making a hole
in the lower chamber, but regardless of whether the hole was closed or not, there was no difference
between several initial capacitor voltages for a successful operation. The set-capacitor CSW had a
capacitance of 120:F with an initial voltage of 1800V and the reset-capacitor was 100:F with an
initial voltage of 200V. The axial separation of the VCB contacts after the disk had become attached
to the magnet, was approximately 10mm.
Obviously, for a reliable operation of the hybrid breaker system, reclosing the contact due to
excessive high or low initial voltages had to be avoided in all cases. Experiments showed that the
disk did not rebound when the initial capacitor voltages were in the range of 1700V to 2200V.
Below 1700V, the disk had insufficient velocity, whilst when it was higher than 2200V, the velocity
was too great which resulted in the contacts reclosing. The result of the measurement is presented in
Table 5.2.
110
Chapter 5
Table 5. 2 Contact separation time as function of the initial voltages.
Initial voltage of the CSW [V]

<1700
1700
1800
1900
2000
2100
>2200
Switch state
spring bouncing
open
open
open
open
open
magnet bouncing
Contact separation time [:s]

314
290
262
282
300
-
The following Simulink block diagram [5.31] is depicted in Figure 5.10 and it shows the
interconnections for the differential equations (5.36) and (5.38) when solving them numerically.
f(u)
?
simdccb2.m
t
displacement
f(u)
f(u)
k/2
xdisk
WS4
const9
Wsp
f(u)
d2L/dx2
1
adisk
Int
f(u)
dL/dx
Int1
WS5
.
vdisk
-k/m
1/(2*m)
WS3
velocity
WS11
Prod15
x*x
WS1
Prod
const2
Prod3
const3
Prod4
+
.
-b/m
f(u)
acceleration
Sum
Prod1
const5
0.5*m
Prod16
WS8
.
Prod11
Prod17
Prod9
0.5
Gain4
f(u)
WS6
Int5
1/C const8
WS7
v*v
WR
wkdisk
Prod13
Force
fdisk
Ekinetic
const7
f(u)
const6 Prod12
.
.
m
dR/dx
Prod8
+ + + +
i*i
f(u)
inv
Sum3
WL WS10
.
Int2
Prod10
Int3
.
.
1
1/C
Ic(t)
ic
Prod5
const4
Vc(t)
Int4
WS2
vc
WS
.
+
+
Sum1
.
2
Gain1
Prod7
Prod14
Prod6
WC
WS9
f(u)
+
+
Sum2
vc*vc
0.5*C
Gain3
Figure 5. 10 Block diagram of the electrodynamic drive simulation.
Results of the simulations are presented in Figure 5.11 where both the electrical parameters
(voltage and current of the capacitor ) and mechanical parameters (displacement, velocity,
acceleration and force of the disk) are included. Verification of the results was done by calculating
the energy balance during the simulation runtime.

4.5
m
Displacement [mm], Velocity [ __ ]
s
Voltage [V], Current [A]
2000
111
vC
iC
1500
1000
x
vd
3.5
3
500
2.5
-500
1.5
-1000
-1500
-2000
0.5
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.1
0.2
time [ms]
(a)
0.5
0.6
0.7
(b)
200
180
160
ad
Fd
140
Energy [J]
1.5
0.5
ER
EL
EC
Ek
120
100
80
60
40
-0.5
0.4
m
Acceleration [ __ ], Force [N]
s2
2.5
x 10
0.3
time [ms]
20
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.1
0.2
time [ms]
0.3
0.4
0.5
0.6
0.7
time [ms]
(c)
(d)
Figure 5. 11 Simulation results; (a) Capacitor voltage and current, (b) Disk displacement and velocity,
(c) disk acceleration and force, (d) Energy balance of the system.
Looking at Figure 5.11 (d) and equation (5.46), it can be seen that the efficiency of this drive was
about 5%. Unfortunately, the construction of the experimental setup had made measurement of the
mechanical parameters impossible and only the electrical parameters were measured. Figure 5.12
compares the measured and the simulated results of the electrical parts.
1000
1000
500
Voltage [V]
1500
1500
Current [A]
2000
500
Measured
500
Simulated
500
1000
Simulated
1000
1500
0
Measured
0.1
0.2
0.3
1500
0.4
time [ms]
0.5
0.6
0.7
2000
0
0.1
0.2
0.3
0.4
time [ms]
(a)
(b)
Figure 5. 12 Comparison of the measurement and the simulation:
(a) Capacitor current (b) Capacitor voltage.
0.5
0.6
0.7
112
Chapter 5
After the second current-zero occurred, switch Thy was in the reversed blocking state, so that the
electrodynamic drive ceased to function. At that instant, the disk had reached an axial opening of
about 2mm, from then onwards, only mechanical equations were involved with calculations for the
system. The next 8mm movement was expressed by the following relationship :
(5.47)
Fd = ma = 0
There could be no disk acceleration because there was no current change. The law of energy
conservation says that finally the kinetic energy of the disk would be partly stored in the spring and
lost in the air moving in the chamber and through mechanical friction at the chamber wall :
E k t1 + E sp t1 = E sp t 2 + Eloss
(5.48)
16
16
16
1
1
1t 6 + 2 k x 1t 6 = 2 k x 1t 6 + E
1
2
2
mvd 2 1
(5.49)
1
2
air
2
where : t1 is the time when the second current-zero occurs (the disk has its maximum velocity) and
t1 is the time when the disk is attached and kept by the magnet.
The electrical parameters of the model developed in the previous sections were validated by
measuring the coil current and the capacitor voltage, but unfortunately, neither the measurement of
the displacement nor the velocity of the moving part (disk) in the case of the vacuum circuit breaker
shown in Figure 5.1 could be made without making extensive alterations. Consequently, the
mechanical part of the model developed has not been validated. Therefore, to validate the
mechanical part of the model, another drive had to be used having the same principles for its
opening-mode. So, an experimental setup for a twin-drive breaker was developed and it could
validate both the electrical and mechanical parameters of the opening-mode model by measuring the
capacitor voltage, the coil current and the displacement of the moving part.
Table 5. 3 The relevant parts of the twin-drive.
Part name
1
2
3
4
Part Material
Part Numbers
Moving-plate Holder
Moving plate
Coil
Coil insulation
Copper
Copper
Various
Celeron
4
2
1
1
A diagram of the twin-drive is shown in Figure 5.13, where two moving plates 2 and 2 can be seen
on either sides of the coil 3. These plates moved within the path of the plate holder of each; since
the edge of the moving plate holder was elastic, the moving plate could go through under the high
produced electrodynamic force. When thyristor Thy was triggered, a current would flow and
discharge the precharged capacitor. The electrodynamic force generated could separate the two
moving plates. The original design of the drive was suitable for making purposes but redesigning it
for opening purposes is conceivable.
113
1
2
Figure 5. 13 The twin-drive construction (coil and moving plates).
As the drive of the twin-drive was based on the same principle as the vacuum circuit-breaker drive,
the model that was developed could be adapted from it easily. Therefore, all the parameters required
should be determined for that new drive, such as : the mass of the moving plates, the equivalent
inductance and the resistance of the drive circuit.
The equivalent inductance Leq and resistance Req were measured when some parts of the twin-drive
were removed whilst the two plates were moving symmetrically with respect to the coil. In order to
fix the moving plates 2 and 2 symmetrically with respect to the excitation coil, the plates were
clamped through the coil hole. In practice, the motion of the two moving plates with respect to the
coil would not be exactly symmetrical due to the tolerance needed for manufacturing the plates. The
results are shown in Figure 5.14.
900
Equivalent resistance Req [m]
Equivalent inductance L eq [H]
1000
900
850
800
800
700
750
600
700
500
400
650
10
15
20
25
displacement [mm]
30
35
40
600
10
15
20
25
30
displacement [mm]
(a)
(b)
Figure 5. 14 (a) The measured equivalent inductance and
(b) The equivalent resistance, as functions of the plate displacement.
35
40
114
Chapter 5
An experimental setup was made for measuring: the capacitor voltage, the coil current and the
displacement of the moving plate. The mass of the plates was 1kg.
Plate2
Plate2
Le
Contact
x
Ub
Re
Thy
CT
Df
Uc
C, Uc(0)
MVD
Oscilloscope
Computer
Figure 5. 15 The experimental setup for the drive circuit of the twin-drive;
CT: current transformer and Ub: battery.
Measuring the capacitor voltage was done by using a mixed voltage divider MVD. A current
transformer CT of the Person type were used to measure the coil current as shown in Figure 5.15.
To measure the displacement, a copper contact were made and located in the path of the movingplate. This copper contact was free to be adjusted at certain distances measured from the coil. By
adjusting the copper contact at a distance x from the moving plate, a circuit consisting of a battery
Ub and a resistance R was closed when the moving plate touched the copper contact. At that
moment, the moving plate covered the distance x. The time of the first contact between the moving
plate and the copper contact was recorded by an oscilloscope. Repeating this experiment with
different values of the distance x resulted in a number of points, which represented the displacement
x as a function of time. As shown in Figure 5.15, the terminals of R, CT and MVD were connected
to the oscilloscope in order to get the capacitor voltage and coil current wave forms and also to
measure the system operating time. During the experiments, the initial capacitor voltage Uc(0) was
kept constant. The experimental setup parameters are given in Table 5.4.
Table 5. 4 The experimental set-up parameters for the twin-drive.
Parameter
C
Uc(0)
Re(0)
Le(0)
Value
120 F
2.1 kV
0.8
485 H
115
A comparison of the measured and simulated capacitor voltages is shown in Figure 5.16 (a) and for
the coil currents is shown Figure 5.16 (b).
1
3
measured
simulated
2.5
2
0.6
1.5
0.4
C urre nt, kA
V o ltag e , kV
measured
simulated
0.8
1
0.5
0
0.2
-0.5
-0.2
-1
-0.4
-1.5
-0.6
0
0.2
0.4
0.6
0.8
1.2
1.4
1.6
1.8
0.2
0.4
0.6
Time, ms
0.8
1.2
1.4
1.6
1.8
Time, ms
(a)
(b)
Figure 5. 16 The measurement and simulation results of the twin drive;
(a) The capacitor voltages (b) The coil currents
The measured and simulated displacements of the moving part are depicted in Figure 5.17, where
the time delay was about 0.3 ms after triggering the thyristor Thy.
30
D isplacem ent,m m
25
20
15
10
S im u la t e d
M e a s u re d -1
M e a s u re d -2
M e a s u re d -3
0
0
10
T im e , m s
Figure 5. 17 The measured and simulated displacement of twin-drive.
At the end of the discharging process, see Figure 5.16 (a), the capacitor voltage was not yet zero,
which meant that not all the initial energy stored in the capacitor had been used to actuate the
system. The rest of that energy could be used during the next operation. The measured displacement
116
Chapter 5
is shown in Figure 5.17. The frequency decreased with increasing time and displacement. The coil
current flowed through the thyristor Thy during the first positive half cycle and through the diode Df
in the first negative half cycle, after that, the coil current became zero because the thyristor Thy was
triggered only once. The differences between the measured and the simulated capacitor voltages and
coil currents (see Figure 5.16) were due to the fact that the equivalent inductance and resistance
could not be measured under the same operational conditions, because some metallic parts had to be
removed in order to fit and fix the moving plates at a particular distance. The differences made the
measured values of the equivalent inductance smaller than the actual values; consequently, the
simulated coil current and capacitor voltage were different from the measured values of the
frequencies and amplitudes: the frequency of the simulation being higher. The maximum difference
between the measured and simulated displacements was almost 10%. In addition to the above
explanation concerning the equivalent inductance and resistance measurements, the differences
between the measured and simulated displacements could also be due to the inaccurate times
corresponding to the measuring points. With this procedure of measuring the time, two time
durations were ignored: the time for the free contact to start moving after the first collision with the
moving plate and the time for the subsequent electrical signal to appear on the oscilloscope. The
efficiency of this twin-drive system was about 3% according to equation (5.46) and Figure 5.17. As
the maximum difference between the measured and simulated displacements was about 8%, the
model developed was able to give very good results for both the electrical and mechanical
parameters.
5.5. Conclusions
In this chapter, the role of the moving disk as part of the hybrid breakers opening mechanism was
discussed. The drive mechanism was constructed and it operated at peak currents of 2kA in order to
provide a total charge of 0.25 Coulomb. The opening times for the drive were measured within an
order of 300:s at speeds up to 4m/s. Two different approaches were shown to analyze the transient
behavior of the drive mechanism; the first included analysis and simulation using two coupled coils
as outlined in the linear circuit theory for the general solution. After that the non-linear circuit
theory was applied where the equivalent inductance and resistance parameters were introduced to
calculate particular electrical and mechanical parameters. The results showed that the model gave an
excellent conformity with the measured values. Despite the effort of constructing a twin-drive
system, comparing the efficiencies of the two drive systems showed that the first drive had higher
values than the twin-drive and that could have been due to the higher resistance of the twin-drive
coil. Developing of fast contact systems for high nominal current ratings still remains a challenge.

[5.1]
Kolm, K., and Mongeau, P., An alternative launching medium, IEEE Spectrum, April
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[5.2]
[5.3]
[5.4]
[5.5]
[5.6]
[5.7]
[5.8]
[5.9]
[5.10]
[5.11]
[5.12]
[5.13]
[5.14]
[5.15]
[5.16]
[5.17]
[5.18]
[5.19]
[5.20]
[5.21]
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Co., 1966.
De Hoog, F.R., et.al., An improved method for numerical inversion of Laplace
Transforms, SIAM Journal of Scientific and Statistical Computing, Vol. 3, No. 3,
September 1982, p. 357-66.
Mathworks, Computer Software: Matlab ver. 4.2.c1, 1994 and Simulink ver. 1.3c, 1994.
Bowley, R.M., et.al., Production of short mechanical impulses by means of eddy
currents, IEE Proc., Vol. 130, Pt. B, No. 6, November 1983, p. 415-23.
Tegopoulos, J.A., and Kriezis, E.E., Eddy currents in linear conducting media, Elsevier
Science Publishers, 1985.
Salama, H.E.A, Kerkenaar, R.W.P., Atmadji, A.M.S., Modelling the opening mode of a
fast acting electrodynamic circuit-breaker drive, 34th Universities Power Engineering
Conf., Sept. 1999, Leicester, p. 539-42.
Schieber, D., Electromagnetic induction phenomena, Springer - Berlin : 1986.
Damstra, G.C., Synthetic testing techniques for three phase making tests, Holec
Techniek, Vol. 3, No. 3, 1973, p. 140-44.
Damstra, G.C., Extension of the Hazemeyer Short-Circuit Laboratory, Holec Techniek,
Vol. 4, No. 2, 1974, p. 51-7.
Chapter 6
Test circuit for DC breakers
Abstract
One of the devices for protecting a system against faults is the circuit breaker. All circuit breakers
have to be tested intensively before being installed into real networks and then the test results must
meet all the relevant requirements. Proper sources for delivering short-circuit power need to be
built to match the ratings of breakers under test. This chapter presents the characteristics of a
direct current short-circuit source for testing the breakers rated at 750V found in traction systems.
This source was built from two 3-phase Graetz-rectifiers connected in series where each rectifier
was fed by a 10kV/380V transformer directly from the public electricity grid. Special measures were
taken for the protection of the semiconductor components which were embedded in this source
against overvoltages and overcurrents. That source was capable of producing short-circuit currents
up to 7kA representing real fault currents. A short-circuit test could be carried out safely for 20ms
and the validity of the simulations was confirmed by the experimental results obtained.
6.1. Introduction
Testing a circuit breaker is necessary in order to learn its interruption capability, but the tests require
a power supply that is strong enough to deliver energy corresponding to realistic faults. There are
two types of short-circuit testing: the field type test and the laboratory type test.
In a field type test, the experiments have to be carried out with power taken directly from the grid.
While that test provides the most convincing method of testing circuit breakers, the main drawback
is that flexibility is limited. That is not suitable for research and development work, because it is not
always possible to repeat the test again and again without disturbing public supplies. A field type
test will use existing networks and a precise (decisive) operational time to limit the released fault
energy which is taken from the public network. Clearly, the network must be strong enough to
supply the short-circuit current and tests must be completed within a predetermined time. This time
must be short in order to avoid damage to components and to prevent other protection devices in the
network from interrupting the test accidentally. Generally speaking, this method allows only one
voltage rating. Some reference publications [6.1,2] describe circuit breakers being tested directly on
public networks.
A laboratory type test consists of two methods which are using a short-circuit generator and
synthetic tests. Both methods store the fault energy in a special storage system. When using a shortcircuit generator, the short-circuit power has to be supplied by specially designed generators driven
by induction machines [6.3]. On the other hand, indirect testing is a practical and economical
120
Chapter 6
solution for testing circuit breakers without actually employing the corresponding short-circuit
capacity of the network. The synthetic circuit is designed to simulate as accurately as possible the
electrical stresses on the circuit breaker during the interruption of fault current under operating
conditions. The indirect test method can be sub-divided into: capacitive [6.4], inductive [6.5] and
synthetic [6.6] methods. The short-circuit generator provides both the voltages and currents
involved during the interruption, but the indirect test method requires two separate sources: one for
a current rise associated with the fault current and the other one for voltage recovery. Voltage
recovery always takes place across the breaker after a successful current interruption. The laboratory
test type offers advantages such as: safety because the overall energy is limited in the system, and
opportunities for adjusting voltages and currents to comply with test requirements. Nevertheless,
these tests would need both large energy storage capacity and considerable physical space. Most
tests of circuit breakers have been done in the laboratory.
This chapter presents the development of a test procedure for DC breakers directly in an AC-system
using properly designed rectifiers. There were two important requirements to be taken into account
when developing a test procedure: safety and reliability.; these requirements are :
maximum testing time : a strict time limit during which the entire short-circuit test must take
place;
maximum current : a prospective current produced by the source., must not be excessive.
Both requirements should be met to permit breaker tests without damaging the system caused by
excessive overcurrents. The short-circuit source had to be designed, built and simulated, in
accordance with those requirements. Computer simulation programs should support the design and
analysis of source characteristics. Both the simulation and measurement results are also presented in
this chapter.
6.2. Analysis of rectifier circuits for a direct current short-circuit source

A Direct Current Short-Circuit Source (DCSCS) contained rectifiers fed by a 3-phase AC system
and the rectification was completed by a 3-phase Graetz diode bridge in order to give a 6-pulse
rectification every cycle [6.7]. The demands of such a DCSCS were as follows :
the source must be able to supply 1kV DC voltage at its rated load,
the source must be capable of producing a maximum current of 7kA for 20ms without
suffering either transients associated with the operation itself, or an interruption of the
current by some other means.
The first requirement could be fulfilled by connecting two 3-phase Graetz bridges in series: while,
the second requirement meant that sufficient power must be available for delivering the equivalent
power of a short-circuit. Then, load limiting and protective devices for meeting the demands had to
be chosen.
121
6.2.1 One 3-phase rectifier

The best known basic form of a 3-phase rectifier consists of six diodes to form the so-called Graetz
bridge. Since the AC system is in balance, each phase voltage offers at each interval a homogenous
line-to-line voltage to conduct at least two of the diodes at the same time, so that, the crest value of
the line-to line voltage would be
voltage source.
3 E , where E is the effective value of the line to neutral
A 3-phase Graetz bridge comprises six-pulse rectifier diodes as shown in Figure 6.1. The diodes of
the bridge are numbered according to their commutation sequence.
V1
V2
V3
D5
D3
D
Lc D1
Lc
Vd
Lc
D6
D4
D2
Rc
+
Vd0
Vd
Load
Figure 6. 1 A diagram of the 3-phase Graetz bridge and its equivalent circuit.
In order to understand the rectifying behavior of this bridge, the following assumptions have to be
made:
the diodes must be considered to form an ideal switch (valve) which conducts when the
anode voltage is higher than the cathode voltage, but it is isolated instantaneously after
the current ceases or becomes negative; there is no voltage fall and current limitation.
there must be only a resistive load and no inductance or capacitance in the system, so
that there is no transient behavior and the system is considered to have a steady-state.
the voltage system sources must be in balance and ideally strong with a frequency of
50Hz.
Table 6.1 and Table 6.2 summarize the ideal switching behavior of a diode.
Table 6. 1 Ideal diode behavior.
Previous state,
H
0
0
1
1
Sign of current
Sign of voltage
no current
no current
+
-
1
0
no voltage
no voltage
Next state,
h
1
0
1
0
122
Chapter 6
If a diode is turned off, the next time to turn it on will occur when the forward bias is applied. If the
diode is on, it will remain so until a current-zero crossing occurs. An ideal diode can be
implemented by using logic gates [6.8] in order to control the switching state. A Boolean function
representing this behavior can be written as :
h = H. AND. u[ i AK ] . OR. NOT. H. AND. u[ v AK ]
(6.1)
where :
H is the previous state of the switch
h is the next state of the switch
u is the Heaviside step function defined as u(x) =
%
&
'
1, x > 0
0, x 0
iAK is the current flowing from the Anode to the Cathode

vAK is the voltage from the Anode to the Cathode
Table 6. 2 Logic table for ideal diode behavior.
H
0
0
1
1
u[iAK]
X
X
1
0
u[vAK]
1
0
X
X
h
1
0
1
0
Logic state "1" means that the device is turned on; logic state "0 signifies that the device is turned
off and logic state "X" refers to a dont care condition. Figure 6.2 shows the equivalent circuit of
an ideal diode.
Anode
Ron
Comp1
u[i]
%
&
u[v]
Anode
h
%
&
Comp2
Roff
Cathode
Figure 6. 2 Diode emulating block diagram developed from equation (6.1).
Comparator Comp1 can sense the current when a current-zero occurs and comparator Comp2
observes the different voltage between the Anode and the Cathode. Two output signals u[i] and u[v]
which are the logical operators for on state "1" when the variable is positive and the off-state "0
elsewhere. Those signals will determine the next state (h) of the diode by completing the operation
with OR, INV and AND gates. This diode block diagram is known have to been used in EMTP
(ElectroMagnetic Transient Program) for simulating power electronics circuits [6.9]. Modifying that
circuit, makes simulation of an ideal thyristor, triac, IGBT, etc. feasible.
123
The 3-phase voltage balance system will be given by the next relationship with regard to its own
neutral star connection at the transformer.
V1 = 2 E sin t
0 5
sin t +

sin t +

2
(6.2)
3
4
V3 =
2E
3
The voltages V1, V2 and V3 represent the line to neutral voltages of a 3-phase balance system.
Every phase voltage over a certain interval provides a homogenous line voltage causing at least two
diodes to conduct at the same time. An analysis of such a bridge appears in [6.7,21]. An ideal DC
output voltage from the bridge is expressed by equation (6.3).
3Xc
Vd = Vdo cos
Id
(6.3)
Where : Vdo is the average value of the direct voltage when there is no load defined as
V2 =
2E
Vdo = 3 6 E . Lc is the inductance of the source. X c represents the transformer commutating

reactance ( Lc ) per phase, it will be referred to the secondary, plus any AC system inductance. The
term 3X c can be substituted by Rc , which does represent an ohmic resistance however without
heat loss associated with it. The term I d Rc represents the voltage drop due to commutation; is the
delay angle (for an uncontrolled switch (diode), this is 0). Equation (6.3) will help to set up an
equivalent circuit representing the steady-state behavior of the rectifier on the DC side, as shown in
Figure 6.1. For low voltage systems, the total rectified voltage will be Vd =514V.
6.2.2 Two 3-phase rectifiers in series

By connecting two 3-phase rectifiers in series, as shown in Figure 6.3, a 1kV DC systems can be
made.
D
D1
D3
D5
D4
D6
D2
D7
D9
D11
D10
D12
D8
V1
V2
V3
Rload
V1
V2
V3
Figure 6. 3 A double 3-phase Graetz bridge arrangement.
124
Chapter 6
The middle of the rectifier has been chosen to have a ground potential that provides symmetrical
voltages between the upper and lower terminals; therefore, both neutral points of the transformer
can float.
In general, rectifiers operate between two or three conducting valves at the same time, but more than
three conducting valves may cause failure or overloading situations. Two conducting valves occur
when the system load is purely resistive or unloaded. The last condition is listed and illustrated in
Table 6.3 and Figure 6.4 where it occurs within one period.
Table 6. 3 Conduction order in one period.
Interval
Conducting valve
Tt0 ! Tt1
Commutation order
D1, D2 & D7, D8

D2 ! D6 & D8 ! D12
Tt1 ! Tt2
D1, D6 & D7, D12

D1 ! D5 & D7 ! D11
Tt2 ! Tt3
D5, D6 & D11, D12

D6 ! D4 & D12 ! D10
Tt3 ! Tt4
D5, D4 & D11, D10

D5 ! D3 & D11 ! D9
Tt4 ! Tt5
D3, D4 & D9, D10

D4 ! D2 & D10 ! D8
Tt5 ! Tt6
D3, D2 & D9, D8

D3 ! D1 & D9 ! D7
Tt6 ! Tt7
D1, D2 & D7, D8
Figure 6.4 shows a systematic conducting order visually where, at every angle interval, the cycle is
depicted sequential.
D1
D
D3
125
D5
D1
D
D5
D6
D2
D7
D9
D11
D10
D12
D8
V1
V2
D3
D4
V1
V2
V3
V3
D4
D6
D2
D7
D9
D11
Rload
V1
Rload
V1
V2
V2
V3
V3
D10
D12
D8
D1
D
D3
D5
D1
D
D5
D6
D2
D7
D9
D11
D10
D12
D8
V1
V2
D3
D4
V1
V2
V3
V3
D4
D6
D2
D7
D9
D11
Rload
V1
Rload
V1
V2
V2
V3
V3
D10
D12
D8
D1
D
D3
D5
D1
D
D5
D6
D2
D7
D9
D11
D10
D12
D8
V1
V2
D3
D4
V1
V2
V3
V3
D4
D6
D2
D7
D9
D11
Rload
V1
V1
V2
V2
V3
V3
D10
D12
D8
D1
D
D3
D5
D4
D6
D2
D7
D9
D11
D10
D12
D8
V1
V2
V3
Rload
V1
V2
V3
Figure 6. 4 The sequence of two conducting valves in one period.
Rload
126
Chapter 6
Therefore, rectification of the symmetrical double 3-phase balance systems will produce the
terminal waveforms shown in Figure 6.5 where the upper and lower traces represent the positive
and negative counterparts, respectively.
600
600

400
400
200
Amplitude [V]
200
-200
-200
-400
-400
-600
-600
0
6
8
phi [rad]
10
12
10
15
14
20
t [ms]
25
30
35
40
Figure 6. 5 Waveforms of the rectified voltages for two 3-phase systems in balance;
(a) in radians and (b)in time.
Where :
at interval , V13 becomes positive and V31 negative; at Interval , V12 becomes positive and V21 negative
at interval , V32 becomes positive and V23 negative; at interval , V31 becomes positive and V13 negative
at interval , V21 becomes positive and V12 negative; at interval , V23 becomes positive and V32 negative.
The two bridges in series were analyzed using Kirchhoffs voltage law to obtain a set of equations
from the diagram in Figure 6.6.
i1+i3+i5
V1
4
V2
V3
i1
Z1
i1+i4
Za
Za i +i
3 6
Z5
Z3
1
i3
i4
i6
Za
-i1-i3-i4-i6
Z4
Z6
Z2
10
V2
i1+i3+i5-i9+i10 -i11 Z7
Zb
Z11
Z9
7
i9
Zb i9+i12
i11
Zb
V3
-i1-i3-i4-i5-i6
Zl
i1+i3+i5-i9-i11
V1
i5
-i1-i3-i5-i10 +i11 -i12

Z10
i10
i12
Z8
Z12
-i1-i3-i5-i10 -i12
11
Figure 6. 6
The network for two 3-phase rectifiers connected in series; Z a and Zb represent the inner impedance of the
sources while the diodes are represented by the impedance Z 1...Z12 and Zl stands for the load impedance.
127
Assuming that all the diodes are in conducting to describe a general topology for the network; the
two 3-phase bridges connected in series have 17 nodes (N) and 25 branches (B); the number of
independent currents is 9 which conforms to the relationship B-N+1 [6.10]. These nine equations
describe the minimum matrix network equation. A generalized impedance matrix for that circuit can
be calculated after determining the freely chosen independent currents and using the network tree in
Figure 6.7. The dashed lines represent the independent currents and with the help of a dashed line,
fundamental loop can be made from which the network equations can be determined. The network
equation for this particular tree can be expressed with Kirchhoffs voltage law as vi = Zij ii ;
where : Zij is the loop impedance matrix or the generalized impedance matrix for the network and
ii is the vector of the independent currents from equation (6.5). The relationships are only valid in
that instance when all diodes are in their conducting states. However, the sinusoidal sources will
prevent that situation and the topology of the network will alter when any of the diodes in the
bridges change state. It is clearly necessary to allow for a big impedance when replacing the nonconducting diodes and a small impedance for the conducting diodes. The basic principle of the
dynamic simulation method is modification of the matrix Zij . A new topology for the network
must be created whenever switching occurs [6.11]. Now, a new matrix Cij will be introduced for
the primitive transformation tensor in order to obtain the current in each branch ik
using the
relationship ik = Cij ii ; where: vector ik has a dimension of 25x1 and matrix Cij has 25x9.
The new topology network can be represented by a new matrix Zkij which is simply expressed by
Zkij = Cij
Zij Cij .
Since: Zkij = Rij + sLij , the differential equations of the system can be expressed as follows:
sii = Lij
where: s =
Vi Rij ii
(6.4)
1 6
y
= f x, y .
t
Solving these equations will give the voltages and the currents [6.12]. Then, the diode voltages and
This expression shows the standard form of a N one-order differential equation:
currents can be computed. A new tensor matrix Cij must be recalculated and new differential will
be computed in order to account for the new network topology. This process has to be repeated until
the final simulation time is attained.
2 (V1 V3 )
V2 +V1 2V3
V1 V3
V1 V3
V2 V3
V2 V1
V1 V3
V3 V1
V2 V3
"#
##
##
##
##
##
#$ !
=
2 Za + 2 Zb + Z1 + Z2 + Z7 + Z8 + Zl
2 Zb + Zl + Z8 + Z7 + Z2 + Za
2 Za + Z2
Zl + 2 Zb + Z7 + Z8 + Z2
Z2 + Za
Zb Z7
2 Zb + Z8
2 Zb Z7
Zb + Z8
2 Zb + Zl + Z8 + Z7 + Z2 + Za
2 Za + 2 Zb + Z3 + Z2 + Z7 + Z8 + Zl
Z2 + Za
2 Zb + Zl + Z8 + Z7 + Z2
2 Za + Z2
Zb Z7
2 Zb + Z8
2 Zb Z7
Zb + Z8
2 Za + Z2
Za + Z2
2 Za + Z2 + Z4
Z2
Za + Z2
2 Zb + Zl + Z8 + Z7 + Z2
2 Zb + Zl + Z8 + Z7 + Z2
Z2
2 Zb + Z5 + Z2 + Z7 + Z8 + Zl
Z2
Zb Z7
2 Zb + Z8
2 Zb Z7
Zb + Z8
Z2 + Za
2 Za + Z2
Z2 + Za
Z2
2 Za + Z2 + Z6
Zb Z7
Zb Z7
Zb Z7
2 Zb + Z7 + Z9
Zb
Zb + Z7
Zb
2 Zb + Z8
2 Zb + Z8
2 Zb + Z8
Zb
2 Zb + Z8 + Z10
2 Zb
Zb + Z8
2 Zb Z7
2 Zb Z7
2 Zb Z7
Zb + Z7
2 Zb
2 Zb + Z7 + Z11
Zb
Zb + Z8
Zb + Z8
Zb + Z8
Zb
Zb + Z8
Zb
2 Zb + Z8 + Z12
i1
i5
i3
2
4
i2
i9
i4
i11
7
8
10
i12
i10
11
Figure 6. 7 The graph network of two 3-phase rectifiers connected in series showing their tree and the fundamental loops.
"#
##
##
##
##
##
#$ !
i1
i3
i4
i5
i6
i9
i10
i11
i12
"#
##
##
## (6.5)
##
##
#$
129
6.3. Realization of the direct current short-circuit source (DCSCS)

The practical realization for the DCSCS is shown in Figure 6.8.
Timer
Tr1
DB1
F1
S2
DUT
Dy5
S1
Control
10kV Feeder
Load
Dy5
F2
Tr2
DB2
Figure 6. 8 Layout of the DCSCS and other circuit components;

Where :
S1
: SF6 AC contactor (12kV/400A)
S2
: make-switch
Tr1, Tr2
: transformers (10kV/380V, 600kVA and 400kVA)
F1, F2
: slow fuses (400A/500V)
DB1, DB2
: 3N Graetz-diode bridges (2kV/2kA)
DUT
: Device Under Test
Control
: Control circuit unit of DUT
Load
: Inductive limiting load (Idc=7kA,=3-6ms).
The 3-phase AC supply came from a 10kV feeder taken directly from the public electrical grid. The
feeder supplied the DCSCS with a maximum power of 250MVA and it was connected to two 3phase transformers Tr1 and Tr2 in parallel with a contactor S1, both transformers being rated at
10kV/380 and Dy5 connected. Tr1 had a rated power of 600kVA with a short-circuit voltage of
k=3.56% and Tr2 was 400kVA and k=3.37%. Then, each transformers voltage was separately
rectified. Rectifying a 3-phase low voltage system produced a DC voltage of 514V and with two
bridges in series, a 1kV DC power supply system could be obtained. Earthing the middle of the two
bridges produced a pair of DC voltages: +514V and -514V with regard to the earth potential. The
contactor S1 acted as a total backup in every test cycle. Furthermore, if the contactor S1 failed
during a test, overcurrent protection would be provided by fuses F1 and F2 on each phase. The fuses
were mounted between the secondary side of the transformers and the diode bridges DB1 and DB2.
Beyond the bridges, a make switch S2 was installed, which allowed currents to be interrupted by the
Device Under Test (DUT). A DUT would be categorized as a successful fault current interrupter, if
the interruption process was completed, before the backup switch S1 disconnected the DCSCS from
130
Chapter 6
the feeder. Furthermore, a suitable inductive load had to be installed to limit the current increase up
to 6-7kA.
With respect to the 1kV voltage rating, a peak rating of 2kV reverse voltage was adequate for the
diode in the bridges giving a voltage safety factor of two. The diode that was used had a disc form
(capsule) in which water cooling bodies could be mounted on either side (anode and cathode). The
diodes were assembled with a specially designed clamper between the pairs of heat sinks in copper
bars regarding the firmness as given by the manufacturer.
6.3.1 Sequential timing operation

The sequence of operations for the DCSCS are summarized in Table 6.4.
Table 6. 4 Switched timing regulations
time
S1
S2
DUT
Note
t0 -
Open
Open
Close
initial condition
t0+
Close
Open
Close
damped out inrush current
t1
Close
Close
Close
begin test
t2
Close
Close
Open/Close
test time duration
t3
Open
Close
Open/Close
end test
t4
Open
Open
Open
preparation for next test
Where:
t0 t0+
t1
t2
t3
t4
: initial time
: closing time of contactor S1 (energizing the circuit)
: closing time of make switch S2 (fault current arises in the circuit)
: interruption time by the DUT
: opening time of contactor S1 (de-energizing the circuit)
: opening (resetting) time of the make switch S2 and DUT
During the few seconds between t0+ and t1, the transient behavior of the transformers could be
damped out; consequently, testing could go ahead without any disturbance signals. Then, the make
switch S2 would close at time t1, which initiated a current flow. At time t3, the contactor S1
disconnected the DCSCS from the feeder and the time difference between t3 and t1 will be the test
time. The DUT had to prove its function within this time interval, at an arbitrary time t2, (t1<t2<t3).
A pre-programmed timer would determine the precise test time t=t3-t1=20ms. This test time is the
difference between the opening time for contactor S1 at t3 and the closing time for the make switch
S2 at t1. Finally, after every test, the make switch S2 and the DUT had to be opened (reset) at t4. In
order to anticipate an unintentional faulty test, a test condition was applied; if the make switch S2
was still in the closed position, then it would not be possible to switch on contactor S1. The timing
diagram for the switches is depicted in Figure 6.9.
131
20ms
S1
t
t3
t o+
S2
t1
t4
DUT
t o-
t2
Figure 6. 9 The timing diagram;

Contactor S1 closes first followed by the make switch S2, a delayed opening of contactor S1 has to be taken
into account in such a way that allows the test to occur within a maximum time of 20ms. The device under
test must prove its function within this interval at an instant t 2.
This DCSCS should be very suitable for testing DC breakers which are designed to interrupt a fault
current in less than 20ms. Those breakers could have current limiting functions.
6.3.2 Overvoltage suppression

During a test, the diodes might be affected by surge currents. Even with a normal 50Hz power
system, the diode switching-off could lead to dangerous transient overvoltages. For producing a
viable design, considerations had to be taken into account, particularly the forward surge currents,
reverse voltage duty, the on-state current duty and the two transitional states of turn-on and turn-off.
The stresses on the diodes arose from the operating conditions in the rectifier as a result of the
transients which originated on the AC and DC sides. Unanticipated voltage transients exceeding the
rated blocking voltage of solid-state power devices, probably would be the most frequent single
cause of unreliability. Depending on the severity of the overvoltage, the energy which it represented
and its repetitive frequency, the device might fail immediately or it might progressively deteriorate.
Since any voltage breakdown would tend to occur on the surface of the device rather than within the
silicon, the energy required to cause permanent damage could be relatively small.
Most voltage transients could be traced to an inductor, either internal or external to the system, in
which a current had been initiated or interrupted abruptly. Obvious cases included removing the
load to a rectifier having a large smoothing inductor in the DC circuit, for example, by blowing a
fuse. Other cases, would be more subtle, because they involve hidden inductance such as the
leakage inductance reactance from a transformer or unintentional currents such as the rapid
cessation of reversed current (sweep-out) in a diode or thyristor (which could occur each cycle).
132
Chapter 6
Other transient overvoltages might be caused by the capacitive coupling of a high voltage circuit to
a low voltage circuit (transformer networks) and the energizing of an RLC-circuit when the
capacitor would charge up to twice the peak line voltage. Protecting against destructive overvoltage
transients could be provided by one of four general procedures [6.25]:
redesigning a circuit operation or physical location in order to remove or minimize the

cause of a transient.
suppressing a transient by absorbing its energy in an appropriately designed RC-circuit

located across the source of the transient.
shunting power devices by non-linear resistive elements (selenium transient suppressor,

zener diode, ceramic suppressors, Metal Oxide Varistors etc.), they could reduce (clip)
the transient voltage to a safe level.
restricting the occasional severe transients by using a solid-state crow-bar circuit

which shorts out the line and absorbs its transient energy.
A sudden interruption of the primary side of a transformer could lead to a current chopping when
any magnetic energy remaining in the transformer changed from nature into overvoltages to
surrounding stray (parasitic) capacitors. Owing to the capacitive coupling between the primary and
secondary windings of a transformer, a sudden steep-fronted rise or fall in the primary voltage could
cause a surge in the potentials to earth of rectifier circuits on the secondary side. Sudden rises in the
primary voltage could occur every time the transformer was energized or de-energized. Such
transient overvoltages had to be kept below the maximum permitted value for the components
connected. A simple way of keeping transients down was by inserting a continuous small capacitive
load on the secondary side of the transformer. It would prevent the magnetizing energy from
changing abruptly because it offered a continuous path where the energy could be dissipated into the
load or downstream lines. Furthermore, power semiconductor devices were not able to change their
states abruptly from a forward conduction to a reversed blocking or vice versa. Overvoltages that
were generated at the end of a conducting period might have been one of the normal features that
had to be taken into account. A charge-storage condition could occur before the reversed blocking
state was maintained [6.18]. Diodes in the rectifier bridge could function as current-switching
devices that were inherently capable of producing overvoltages, particularly, when the circuit
contained high inductive elements or dealt with high currents. High current tests could increase
steep current slopes leading to voltage spikes at the time when the current commutated from one
diode to another. Without any precautionary measures, the voltage spikes could damage the
equipment connected in the circuit; hence, overvoltage suppression was indispensable.
Current and voltage surges however had to be limited to values below the safe level of the diodes
used and the following measures could be taken on the low voltage side of the DCSCS :
(1) On the AC side, a continuous resistive load accompanied by Resistance- Capacitance
networks in parallel could be put on each phase to the neutral of the transformers. In
addition, a non-linear resistor ZnO could be also inserted between the phases.
(2) The neutral of each transformer could be earthed through a capacitive impedance.
133
(3)
On the DC terminal side, a small continuous resistive load and ZnO could be connected
in parallel.
(4) If needed, a free-wheeling path could be placed in parallel with the load on the DC load
side, to provide a commutation path for the current from the main circuit during an
interruption.
Measures (1) and (2) had been experimentally conducted and they were suitable for minimizing
transient overvoltages when the primary side was switched on or off. During the experiments, the
diode bridges obviously had to be disconnected from the transformers. After overvoltages had been
minimized, the bridges could be reconnected and tested. Measure (3) allowed a small continuous
current in the bridge before a short-circuit test could be started. At the same time it would provide
sufficient electrical charges in those diodes to deliver a high current during the test. Finally, measure
(4) would provide a continuous current path on the downstream side after the current had been
interrupted on the upstream side by the DUT, by contactor S1, or in the worst case, by protection
fuses which were commonly found in DC circuits.
The basic consideration for determining the size of a snubber capacitor was that it had to be capable
of absorbing the magnetic energy from the inductive circuit elements, without exceeding a
maximum voltage of the solid-state power devices. The Resistance-Capacitance networks on the
AC side could be adapted for that purpose while another method was to mount an RLC-network on
each of the solid-state power devices as suggested in [6.13]. The higher the current to be tested, the
more protection measures that had to be taken into account. The DCSCS was designed to produce a
maximum test current of 7kA. The overvoltage circuit is shown in Figure 6.11 as part of the entire
circuit.
When the neutral of the transformer floated and contactor S1 opened, high transient overvoltages up
to 3000V could occur on the secondary side of the transformer. The measurement of such
overvoltages is shown in Figure 6.10 (a). Considering a trial and error method and evaluating the
overvoltages, they could be reduced below 500V. The measurement graphs are presented in Figure
6.10 (b).
4000
400
3000
300
200
Voltage [V]
Voltage [V]
2000
1000
0
-1000
0
-100
-200
-2000
-3000
100
-300
10
20
30
40
time [ms]
50
60
70
80
-400
10
15
20
time [ms]
Figure 6. 10 Secondary phase voltages (a) before (b) after application of overvoltage suppressors.
A prospective short-circuit current of 7kA was expected by inserting a limiting resistor of 130m in
134
Chapter 6
the circuit. The rate of rise of the current was determined by the inductance value of the source and
the load. Therefore, a toroidal coil was made with a value of 460H. With those resistance and
inductance values, short-circuit currents with a time constant of 3ms could be generated. Finally,
copper connections were made to link the bridges together with the DUT, the make switch and the
load, respectively. Figure 6.11 shows the final DCSCS starting from the secondary side of the
transformer.
D1
Ri
Li
Ri
Li
F2
Ri
Li
D3
D5
F1
VR
ZnO
ZnO
VS
Rf
F3
VT
D4
R1
Tr1
C2
Cn
C1
CCC
D6
D2
Test Objects:
- Backup switch
- Make Switch
- Device Under Test
- Freewheeling circuit
- Limiting load
- Control & current sensing
- Voltage and current probes
CCC
R3 R2
Rn
D1
Ri
Li
Ri
Li
F2
Ri
Li
D3
D5
F1
VR
ZnO
ZnO
VS
Rf
F3
VT
D4
R1
Tr2
Cn
Rn
C2
CCC
D6
D2
CCC
C1
R3 R2
Tr1: 600kVA
Tr2: 400kVA
F1..3: 400A/500V
Cn: 0.5 F, Rn:12kS

C1: 6 F, R1:22S
R2: 10kS
R3: 50 S
C2: 100F
Rf: 500 S
Figure 6. 11
The full diagram of the DCSCS. The AC side contains the two transformers (Tr1 and Tr2) of a 3-phase
balance system and their neutrals are earthed with a high capacitive impedance (Rn and Cn). Overvoltage
suppressors (R1,R2,R3,C1 and C2) are mounted between every phase to the neutrals providing continuous
loads and followed by arresters (ZnO) among the phases. A continuous load Rf and arrester ZnO are
connected on each DC side. Then, it is completed by the necessary devices and equipment for tests.
6.3.3 Surge phase-currents in the transformer secondary when switching on

The incorporation of overvoltage suppressors caused new transients to occur as surge currents in all
the phases when the transformer was energized. Obviously, that depended on the phase angle
switching on. Calculations could show how surge currents could be found for each phase assuming
that all the AC poles would close at the same time. From Figure 6.11, the continuous impedance
(AC load) on each phase could be determined and written in the s-domain as a transfer function :
135
1 6 11 66
Zt s =
Vi s
a s 3 + a2 s 2 + a1s + a0
= 3
I s
b2 s 2 + b1s + b0
(6.6)
where :
a3 = R1 R2 R3 Li C1C2
a2 = R2 R3 Li C1 + R1 R2 Li C1 + R2 R3 Li C2 + R1 R3 Li C2 + R1 R2 R3 Ri C1C2
a1 = R1 Li + R2 Li + R3 Li + Ri R1 R2 C1 + Ri R2 R3C2 + R1 R2 R3C1 + Ri R1 R3C2 + Ri R2 R3C1
a0 = Ri R2 + Ri R3 + R2 R3 + R1 R3 + Ri R1
b2 = R1 R2 R3C1C2
b1 = R1 R2 C1 + R1 R3C2 + R2 R3C2 + R2 R3C1
b0 = R1 + R2 + R3
At the frequency f o = 50Hz , the continuous AC impedance is Zt = 13.3 219 j or Zt = 25.7 58

.
representing a capacitive load. The term admittance Yt = 1 Zt can be used conveniently, because the
order of the numerator is higher than the denominator when analyzing its frequency characteristic.
The frequency characteristic and the root loci of this AC load admittance are shown in Figure 6.12.
4
-50 1
10
10
10
10
10
10
Frequency [Hz]
Phase [degree]
x 10
100
Imag Axis
Gain [dB]
50
1
0
-1
-2
0
-3
-100 1
10
10
10
10
10
10
-4
-4
-3
-2
-1
0
Real Axis
Frequency [Hz]
4
x 10
(b)
(a)
Figure 6. 12 The frequency characteristic of the AC load admittance;
(a) the diagram bode; (b) the root loci.
The 3-phase AC voltage sources in balance are represented in the time-domain as :

V R t = 2 E sin t +
05
V 0t 5
V 0t 5
S
0
5
2
2 E sin t +
+

3
4
2 E sin t +
+

3
(6.7)
A standard way of calculating transients is with the Laplace transformations method and these
voltages. From the standard Laplace transformation [6.27] and after algebraic manipulation these
voltages in the s-domain could be expressed as :
136
Chapter 6
0s sin + cos 5
s +
s cos + sin +
6
6
2E
VR s
05
05
05
VS s
VT s
2E
(6.8)
s2 + 2
s sin + + cos +
3
3
2E
s2 + 2
where: E is the effective phase voltage value of the source, = 2 f o is the angular frequency with
f o = 50Hz and is the closing phase angle with respect to the R-phase.
The fact that the transformer was energized arbitrarily regardless of the phase angle at that time and
because the continuous AC load was capacitive, the initial phase currents would contain surges;
however, the inner transformer impedance would limit them. Therefore, the phase currents in the sdomain are written as: I i s = Yt s .Vi s ; where: the index i means the i -th phase voltages (R, S and
16 16 16
T), which are :
0s sin + cos 5 2b s + b s + b 7
I 0 s5 = 2 E
2s + 7 2 a s + a s + a s + a 7
s cos + sin +
6 2b s + b s + b 7
6
I 0 s5 = 2 E
2s + 7
2a s + a s + a s + a 7
s sin + + cos +
3 2b s + b s + b 7
3
I 0s5 = 2 E
2s + 7
2a s + a s + a s + a 7
2
(6.9)
Since the AC system is in balance, the phase currents can be calculated individually in the timedomain using Matlab [6.20] for solving the Numerical Inverse Laplace Method (NILM) of the
equations (6.9) as described in Chapter 5.
Figure 6.13 presents the surge currents at each phase when energizing (switching on) occurred at
different closure phase angles; = 0 , = 30 , = 60 and = 90 with respect to the R-phase. In
the left-hand column, the maximum surges of the phase currents are given with the superposition of
the fundamental frequency of 50Hz. The capacitor C2 had the ability to operate despite those current
surges. After 15ms, the system damping reduced the high frequency components so that their
steady-state values were reached. In the right-hand column of Figure 6.13, the transients are shown
at the window enlargement during the first 1ms only. By neglecting resistance, the frequency of the
1
surge current was about : f =
= 2.9 kHz.
2 Li C2
137
400
300
300
200
200
Current [A]
500
400
Current [A]
500
100
0
100
100
0
100
200
200
300
300
400
400
500
0
10
12
14
16
18
20
500
0
0.1
0.2
time [ms]
0.4
0.5
0.6
0.7
0.8
0.9
0.7
0.8
0.9
0.7
0.8
0.9
0.7
0.8
0.9
time [ms]
(a) = 0
(b) = 0
600
400
400
200
200
Current [A]
600
Current [A]
0.3
200
200
400
400
600
0
10
12
14
16
18
20
600
0
0.1
0.2
0.3
time [ms]
(c) =
0.5
0.6
time [ms]
(d) =
400
300
300
200
500
400
200
Current [A]
500
Current [A]
0.4
100
0
100
100
0
100
200
200
300
300
400
400
500
0
10
12
14
16
18
20
500
0
0.1
0.2
0.3
time [ms]
(e) =
0.5
0.6
time [ms]
(f) =
400
400
200
600
200
Current [A]
600
Current [A]
0.4
200
200
400
400
600
0
10
12
time [ms]
(g) =
14
16
18
20
600
0
0.1
0.2
0.3
0.4
0.5
0.6
time [ms]
(h) =
Figure 6. 13 Surge currents in the phases depending on the closing angle ;

on the left-hand side in one period and on the right-hand side up to 1ms.
Then, Figure 6.14 shows the phase currents after one period following the steady-state condition.
138
Chapter 6
15
10
Current [A]
10
15
20
22
24
26
28
30
32
34
36
38
40
time [ms]
Figure 6. 14 The steady-state phase currents.
6.3.4 Overcurrent protection by I2t fusing

During this test, the DCSCS suffered from surge currents. The worst case estimation of the
increased DC short-circuit value could be found from the relationship as used in a one-phase shortcircuits near the transformers secondary. This is expressed by :
ip
(6.10)
isc t =
sin t + e t / sin
1
1+ 2
16
where : i p =
2U l
LT
and =
= tan .
RT
3XT
Ul is the line voltage, X T is the short-circuit impedance of the transformer consisting of resistance
RT and inductance LT . The current was limited only by the inner impedance of the transformer;
however, the rate of rise of current for the experiment was limited by the inner impedance of the
transformer and the inductive load. It helped to reduce the surge current stress. Overcurrent
protection of the power diodes was provided by fuses installed on each phase of the secondary side
of the transformer. Since the experiments used a limiting load, the I 2 t fusing could not be
determined by using equation (6.10).
An experiment with a maximum duration of 20ms allowed tests to be conducted safely in order to
avoid excessive overcurrents as well as in the diodes as in the fuses, and to minimize the operational
disturbances in the network. The Joule-integral ( I 2 dt ) for the fuse was chosen lower than that of
the diode during short-circuit tests. According to the manufacturers data, the I 2 t value of the fuse
was about 2106 A2s and of the power diode it was about 4.88H106 A2s (tested for a half sine wave).
The power diode had a rated current of 2000A.
The
139
I 2 dt values shown in Table 6.5 were obtained from the simulation described in the next
I
t1
section using the equivalent numerical expression :
I dt = I 2 .t ; where : I k denotes the

k
2
t0
k=1
instantaneous current through the diode, t 0 is the time when the diode starts conducting, t1 is the
time when the diode ceases conducting, t is the simulation time step, k is the k -th step, and N is
the total number of steps obtained from the simulation. Obviously, the linear relationship is
t1 t 0 = Nt . The Joule-integral for each diode depends upon the current through during the interval
t1 t 0 . The values listed in Table 6.5 were obtained with a discretizing time step of t = 10s .
Table 6. 5 The calculation of I2t values for 20ms testing.
I2t of line phases [A2s]

Tr1 phase R
773 103
Tr1 phase S
678 103
Tr1 phase T
581 103
Tr2 phase R
Tr2 phase S
Tr2 phase T
764 103
651 103
579 103
I2t of diodes [A2s]

DB1 diode 1
276 103
DB1 diode 2
117 103
DB1 diode 3
279 103
DB1 diode 4
497 103
DB1 diode 5
466 103
DB1 diode 6
398 103
DB2 diode 1
DB2 diode 2
DB2 diode 3
DB2 diode 4
DB2 diode 5
DB2 diode 6
285 103
119 103
252 103
478 103
462 103
399 103
A diode failure short-circuits the transformer so that the fuses in the branch will melt indicating
which diode had failed in the circuit. An incorrect fusing may cause the diode to explode if it cannot
carry the high fault current before it is cleared by the backup contactor on the 10kV side. Another
way of protecting the diode from overcurrents is reported in [6.14] where each diode arm is fused
individually. The very fast types of fuses were chosen because they had been specially designed for
the protection of power semiconductors. Fusing of every diode arm was obviously convenient to
find which diode had failed.
6.3.5 Protection from overheating

Another problem with power semiconductor devices is that of heat production during current
conduction. The high current rating (several kA) involved then made it necessary to provide forced
cooling on both sides of the disk diode. A normal feature of similar silicon devices is the presence a
voltage drop of about 2V when conducting rated currents which in a high power rectifier system, the
power losses can be as high as a few thousand Watts. Based on past experience, the temperature rise
should be negligible because the short-circuit tests were limited to short times of less than
140
Chapter 6
20ms;thus water cooling was not required. Nevertheless, for future research with direct current
systems, every diode should be equipped with a water-cooled heat sink on both sides, so that each
diode would be clamped between two heat sinks. The water as cooling medium should have
adequate dielectric properties to withstand capability with respect to the operational voltage.
6.4. Simulation results

Analysis of rectifier bridges can be very difficult when exact solutions are required; particularly,
when various secondary effects, such as non-perfect switching behavior and non-linear
characteristics of model devices, must be included in the analysis. Moreover, additional protective
components would increase the complexity of a network. Hence, the evaluation of the transient
behavior of rectifying bridges required computer simulation programs. A technique for solving
differential equations, such as those governing this circuit configuration involved a numerical
method based on a time stepping basis, was suitable for understanding the behavior of a bridge
short-circuit. The currents through and voltages across each device were tested at each time
increment during the simulation in order to determine whether switching had occurred in the diodes
or not. When switching did occur, a new circuit configuration (topology) was generated; the initial
inputs to branches and nodes being obtained from the previous currents and voltages, at each time
step. A method based on tensor analysis for reformulating the circuit equations automatically after
each switching, was proposed in the previous section. Modern computer simulation programs are
capable of changing matrix circuit equations automatically. One of them is ElectroMagnetic
Transient Program (EMTP) [6.9,19], but it considers the diode to be an ideal switch. Another one is
Simulation Program with Integrated Circuit Emphasis (SPICE) [6.15,22,23,24] which is intended
for simulating electronic circuits, although it does seem to be suitable for the simulation described
here. It has a built-in model for electronic diodes and by extending it to include power diode models
have been developed and published in [6.16,17,18]. They include reports of transient behavior with
a real diode during turn-on and turn-off times. Typical turn-on and turn-off times for power diodes
are measured in tens of microseconds. Using that model for the bridge circuit, which had a long
time constant, would lead to an unnecessarily long simulation time and the transient effects might
not be observed. Apparently, that model had been used for designing snubber and damping circuits
for power diodes.
Here, the purpose of the simulation was to improve the understanding of a bridges behavior during
the short-circuit tests. Actually, this simulation made use of the features provided by the SPICE
computer program with an electronic diode model added to it and this allowed the measurement
results to be explained. Nevertheless, details of the behavior of diodes had to be known when
dealing with designs at high frequencies. However, instability problems could occur during the
simulations, but they could be overcome by changing the internal accuracy of the simulation, and
placing small capacitors across the secondary side of the AC system and the bridge output. In fact,
having those capacitors present in the simulation not only helped to solve the convergence problems
but also made it more representative of a real system. Non-convergence problems might occur when
141
a switching device such a diode changed its state instantaneously (a diode had an infinite off-state
resistance and zero on-state resistance) which could result in a large di dt for an inductor creating a
large voltage, or in a large dv dt across a capacitor creating a large current. For that reason, an RC
snubber circuit should have been put parallel with the diode or in the AC side.
All 3-phase sources can be represented by an ideal balanced sinusoidal source with a short-circuit
impedance defined by Ri and Li. There will be no limitation to current flowing through each diode;
however, the necessary breakdown voltage and its associated current can be obtained from the
manufacturers.
6.4.1 Simulation of a 10kA prospective short-circuit current

A 10kA prospective short-circuit current could be created by using a resistance value of 80mS and
in series with the resistance, an inductance of 460:H had been chosen. The short-circuit was
initiated at time t=10ms. Figure 6.15 presents the results from the simulation of the circuit depicted
in Figure 6.11.
1200
10000
1000
9000
800
8000
Current [A]
Voltage [V]
600
400
200
VP N
VP O
VNO
0
-200
6000
5000
4000
3000
2000
-400
-600
ID1
ID3
ID5
7000
1000
0
10
15
20
25
30
35
40
10
15
20
25
30
35
time [ms]
(a) DC voltages; two poles: VPO and VNO

and total voltage VPN.
40
time [ms]
(b) Diode currents ID1, ID3 and ID5,

respectively.
x 10
2000
0.8
0
0.4
Current [A]
Current [A]
0.6
0.2
0
-0.2
IDCS
IR
IS
IT
-0.4
-0.6
-0.8
-1
10
-2000
-4000
ID2
ID4
ID6
-6000
-8000
15
20
time [ms]
25
30
35
40
-10000
10
15
20
25
30
35
40
time [ms]
(c) Circuit currents; rectified current I DCS,

(d) Diode currents ID2, ID4 and ID6,
phase currents IR, IS and IT, respectively.
respectively.
Figure 6. 15 Simulation of a 10kA inductive load where a short-circuit at t=10ms is initiated.
Figure 6.15 (a) shows the rectified voltages of the two 3-phase Graetz bridge (VPO and VNO are the
positive and negative poles with respect to the ground potential and VPN is the voltage between the
142
Chapter 6
poles), Figure 6.15 (b) and Figure 6.15 (d) present the diode currents in the upper diodes (1,3,5)
and lower diodes (2,4,6) of the bridge and Figure 6.15 (c) shows the short circuit direct current IDCS
and the associated phase currents (IR, IS and IT).
6.4.2 A short-circuit current directly after the bridge

Figure 6.16 shows the results for a simulated short-circuit between two poles after the bridge poles.
5
x 10
4.5
ID1
ID3
ID5
3.5
Current [A]
Current [A]
x 10
IR
IS
IT
IDCS
0
-1
-2
3
2.5
2
1.5
1
0.5
-3
-4
-0.5
10
15
20
25
30
35
40
10
15
20
25
30
35
time [ms]
(a) Circuit currents; the rectified current I DCS,

phase currents IR, IS and IT, respectively
40
time [ms]
(b) Diode currents ID1, ID3 and ID5,

respectively.
12
0.5
-0.5
Current [A]
Current slope [A/s]
10
x 10
4
2
0
-2
-1
-1.5
-2
-2.5
-4
-6
ID2
ID4
ID6
-3
-3.5
-8
10
15
20
25
30
35
40
time [ms]
-4
10
15
20
25
30
35
40
time [ms]
(c) Rate of the rectified current rise.
(d) Diode currents ID2, ID4 and ID6,

respectively.
Figure 6. 16 Simulation of a short-circuit directly after the bridge poles.
Figure 6.16 (a) shows the short circuit direct current IDCS and the associated phase currents (IR, IS
and IT), Figure 6.16 (b) and Figure 6.16 (d) present the diode currents in the upper diodes (1,3,5)
and lower diodes (2,4,6) of the bridge and Figure 6.16 (c) shows the current slope of the direct
current IDCS.
143
6.5. Measured and simulated results

The complete diagram for the two 3-phase Graetz-bridges as described earlier in this chapter can
now be simplified by using two DC sources VDC1 and VDC2 as shown in Figure 6.17. Photos of the
setup are shown in Appendix A.1 and A.3.
MS
Vpo
+
VD1
DCCB
Scope
VDC1
RT
LT
+
VDC2
-
VD2
Scope
Rogowski-coil
Vno
Scope
Figure 6. 17 Measurement setup; VDC1 and VDC2 are the output voltages of six-pulse rectifiers,
DCCB is a backup DC circuit breaker, MS is a make switch, RT and LT are limiting loads.
In Figure 6.17, a Direct Current Circuit Breaker (DCCB) with a nominal rated current of 800A
represents the device under test. The DCCB is a conventional breaker having the ability to create an
arc voltage in its arc chute chambers. The load, consisting of RT and LT, provides current limitation
in the circuit. An electrodynamic make switch MS [6.29] connects the source-side with the loadside and closing the make-switch will initiate the high current which has to be interrupted by the
DCCB. The current will cause the electromagnetic drive of the DCCB to open the electrodes and
move the arc to the extinguishing chamber where the arc will be cooled down by blowing in air at a
pressure of 6 atm. In the arc chutes, the arc voltage will increase, thereby suppressing the circuit
current. This process continues until the arc voltage becomes higher than the supply voltage which
then forces the current down to zero. Finally, the current is interrupted. The circuit current is
measured with a Rogowski-coil [6.26]. Subsequently, the two voltages are recorded; at the positive
and negative poles of the two bridges in series, using resistive voltage dividers 50kS/50S with a
rise time of 600ns. In the event that the make switch MS should close, its cathode voltage will jump
from negative to positive and that voltage jumping is used as a trigger signal for measurement
recording.
144
Chapter 6
6.5.1 An open circuit test

Open-circuit tests are performed in order to observe the continuous rectified voltages in the
unloaded state. All voltages are measured with respect to a ground potential. Theoretically rectified
3-phase waveforms as described in the previous section, are shown below. The lower trace is for the
negative pole voltage (VNO), the middle trace is for the positive pole voltage (VPO), and the upper
trace is for the voltage difference (VPN) between the other two voltages, see Figure 6.18.
1000
800
800
600
600
Voltage [V]
1200
1000
Voltage [V]
1200
400
VPN
VPO
VNO
200
0
200
VPN
VPO
VNO
0
-200
-200
-400
-400
-600
400
-600
10
15
20
25
30
35
10
40
15
20
25
30
35
40
time [ms]
time [ms]
(b)
(a)
Figure 6. 18 Rectified voltages for the unloaded test circuit; (a) measured and (b) simulated.
6.5.2 Short-circuit test

Figure 6.19 depicts the test with a limiting load of RT=130mS and LT=460:H when the make
switch MS was closed at t=10ms. The air breaker interrupted at t=26ms followed by the AC
contactor disconnecting at t=40ms.
1500
7000
6000
1000
Current [A]
Voltage [V]
5000
500
VPN
VPO
VNO
4000
3000
2000
1000
-500
0
-1000
10
20
30
40
50
-1000
10
20
30
time [ms]
(a) DC voltages; 2 poles: VPO and VNO
40
50
time [ms]
(b)
and total voltage VPN.

Figure 6. 19 Current interruption with air breaker DCCB; (a) voltages and (b) current.
Figure 6.19 (a) shows the rectified voltages of the two 3-phase Graetz bridge (VPO and VNO are the
positive and negative poles with respect to the ground potential and VPN is the voltage between the
poles) and Figure 6.19 (b) is the maximum short circuit direct current ever tested in the DCSCS.
145
Figure 6.20 compares the measured and the simulated results at the current growth.
Measured
Simulated
1000
800
800
600
600
Voltage [V]
1200
1000
Voltage [V]
1200
400
VPN
VPO
VNO
200
0
400
200
VPN
VPO
VNO
-200
-200
-400
-400
-600
10
15
-600
20
10
time [ms]
(a)
20
15
20
(c)
7000
6000
6000
5000
5000
Current [A]
7000
Current [A]
15
time [ms]
4000
3000
2000
1000
4000
3000
2000
1000
-1000
-1000
10
15
20
10
time [ms]
time [ms]
(b)
(d)
Figure 6. 20 The maximum direct current short-circuit test; the rectified voltages and current.
Measured results in the left-hand column and simulated results in the right-hand column.
Part of this chapter has been published in [6.28].
6.6. Conclusions
A test facility comprising two 3-phase rectifiers has been described already and it was constructed in
order to examine the characteristics of fast acting DC interrupters. The setup could deliver currents
up to 7000A at 900V. The system could recover from any transient that occurred during a test
without damaging itself. Stress on the upstream AC supply system was considerable small due to
the short testing time. The operating characteristics were illustrated by the experimental and
computer generated results and they verified the success of the test. High power direct currents of
both the transient and steady-state supplies were then feasible so that they could be investigated in
order to learn about the interaction between the AC and DC sides.
146
Chapter 6

[6.1]
[6.2]
[6.3]
[6.4]
[6.5]
[6.6]
[6.7]
[6.8]
[6.9]
[6.10]
[6.11]
[6.12]
[6.13]
[6.14]
[6.15]
[6.16]
[6.17]
[6.18]
[6.19]
[6.20]
[6.21]
[6.22]
[6.23]
[6.24]
[6.25]
Hofmann, G. A., et.al., Field Test of HVDC Circuit Breaker: Load Break and Fault
Clearing on the Pacific Intertie, IEEE Trans. on Power Apparatus and Systems, Vol. PAS95, No. 3, May/June 1976, p. 829-38.
Gallagher, H.E., et. al., 145-kV Current limiting device- field tests, IEEE Trans. on
Power Apparatus and Systems, Vol. PAS-99, No. 1, Jan./Feb. 1980, p. 69-77.
Kriechbaum, K., A half cycle air blast generator breaker for high power testing fields,
IEEE Trans. on Power Apparatus and Systems, Vol. PAS-91, 1972, p. 747-53.
Voshall, R. E. and Lee, A., Capacitor Energy Storage Synthetic testing of HVDC Circuit
Breaker, IEEE Trans. on Power Delivery, Vol. PWRD-1, No. 1, January 1986, p. 185-90.
Hofmann, G. A., Long, W.F. and Knauer, W., Inductive test circuit for a fast acting
HVDC Interrupter, IEEE Trans. on Power Apparatus and Systems, Vol. PAS-92,
Sept./Oct. 1973, p. 1605-14.
Mukutmoni, T., Parsons, W.M. and Woodson, H.H., A new synthetic test installation for
testing vacuum interrupter, IEEE Trans. on Power Apparatus and Systems, Vol. PAS-95,
July/August 1976, p. 1311-7.
Schaefer, J., Rectifier circuits theory and design, Wiley, London, 1965.
Krein, P.T. and Bass, R.M., Autonomous control technique for high-performance
switches, IEEE Trans. on Industrial Electronics, Vol. 39, No. 3, June 1992, p. 215-22.
Dommel, H.W., Electromagnetic Transients Program Reference Manual, Bonneville
Power Administration, Portland, USA, August 1986.
Jensen, R.W. and Watkins, B.O., Network analysis: Theory and computer methods,
Prentice-Hall, 1974.
Williams, S., and Smiths, I.R, Fast Digital Computation of 3-phase thyristor bridge
circuits, Proc. IEE, Vol. 120, No. 7, July 1973, p. 791-5.
Kremer, H., Numerical analysis of liner networks and systems, Artech House 1987.
Beausejour, Y., and Karady, G., Valve damping circuit design for HVDC systems, IEEE
Trans. on Power Apparatus and Systems, Vol. PAS-92, No. 2, Sept./Oct. 1973, p. 1615-21.
Howe, A.F., et. al., DC fusing in semiconductor circuits, IEEE Trans. on Industry
Applications, Vol. IA-22, No. 3, May/June 1986, p. 483-9.
Nagel, L.W., SPICE2: A computer program to simulate semiconductor circuits,
Electronics Research Laboratory, Univ. California of Berkeley, Memorandum, ERL-M
520, May 1975.
Tatakis, E., Modelling power diodes for power electronic circuits simulation with
SPICE2, EPE Journal, Vol. 2, No. 4, December 1992, p. 259-68.
Strollo, A.G.M., A New SPICE Subcircuit Model of Power P-I-N Diode, IEEE Trans. on
Power Electronics, Vol. 9, No. 6, November 1994, p. 553-9.
Berz, F., Ramp recovery in p-i-n diodes, Solid-state Electronics, Vol. 23, 1980, p. 78392.
Dommel, H.W.and Meyer, W. S., Computation of electromagnetic transients, Proc. of
the IEEE, Vol. 62, No. 7, July 1974, p. 983-93.
Mathworks, Computer software: Matlab ver. 4.2c, 1994
Microsim, Computer software: PSPICE ver. 5.0, 1992
Ramshaw, R. and Schuurman, D., Pspice simulation of power electronics circuits, 1995.
Sakshaug, E.C., et.al., A new concept in station arrester design, IEEE Trans. on Power
[6.26]
[6.27]
[6.28]
[6.29]
147
Apparatus and Systems, Vol. PAS-96, No.2, March/April 1977, p. 647-56.

Pettinga, J.A.J. and Siersema, J., A polyphase 500kA current measuring system with
Abramowitz, M., and Stegun, I.A., Handbook of Mathematical Functions, Dover
Atmadji, A.M.S., et.al., Building a 750V direct current short-circuit source, 8th Int.
Symp. on Short-Circuit Currents on Power Syst., Oct. 1998, Brussels, p. 249-54.
Damstra, G.C., Synthetic testing techniques for three phase making tests, Holec
Techniek, Vol. 3, No. 3, 1973, p. 140-44.
148
Chapter 6
Chapter 7
Experimental and modelling results
Abstract
Three different experimental circuits were studied in order to compare the interruption behavior of
air breakers, hybrid breakers and solid-state breakers. A commercial air breaker was tested in the
laboratory built direct current short-circuit source which was later used as a backup breaker for
other tests. The design aspects of hybrid switching techniques were demonstrated by applying the
one-stage current commutation technique. In this technique, the main breaker was a vacuum type
and the control switch in the commutating path was a solid-state type. The latter test concerned a
solid-state breaker IGCT as a new invention in power switching technology. Finally, complete
systems were simulated and they confirmed the experimental transient behaviors that had been
observed.
7.1. The air breaker experiment

The interruption capacity of a conventional air breaker was investigated first. The breaker had a
nominal voltage of 900V, nominal continuous current of 800A and short-circuit current of 20kA
and it was able to lengthen the arc between the contacts as can be seen in Figure 7.1. As soon as the
contacts opened, an arc initially struck across the shortest distance between the electrodes. Then, it
was driven steadily upwards by heating the air during arcing and the Lorentz force which was
related to its own current. When the arc moved to the arc chambers, it was split into a number of
smaller arcs, thereby creating a total arc voltage greater than the supply voltage.
Steel splitter plates
Series arcs
Arc shields
Arc runners
Current
Moving arc contact
to open position
Figure 7. 1 Arc chutes of a conventional air breaker.
150
Chapter 7
Figure 7.2 shows the experimental setup for the air breaker test. The Direct Current Circuit Breaker
(DCCB) represents the device under test in which the trip level was set to 1.8kA. Two 6-pulse
rectifiers (VDC1 and VDC2) as described in Chapter 6 were used to feed the test circuit [7.1] where
two DC poles were connected symmetrically with respect to the ground potential and they delivered
a system voltage of 1kV. Subsequently, the make switch MS connected the DCCB to the limiting
load composed of inductance LT=460:H and resistance RT=153mS. That load limited the current in
the circuit. Then, a copper bar linked the load to the source and a Rogowski-coil [7.2] measured the
current in the circuit. A differential attenuator measured the voltage across the DCCB.
MS
VPO
+
DCCB
VD1
Scope
)V
VDC1
RT
LT
+
VDC2
-
VD2
Rogowski-coil
Scope
VPO
Scope
Figure 7. 2 The air breaker measuring setup;

VDC1 and VDC2 are 6-pulse rectifiers, DCCB is DC the circuit breaker under test and MS is a make switch.
Figure 7.3 shows some typical measurement graphs.

2000
6000
5000
1500
Current [A]
Voltage [V]
4000
1000
500
3000
2000
1000
0
0
-500
10
20
30
time [ms]
40
50
-1000
10
20
30
40
50
time [ms]
(a)
(b)
Figure 7. 3 The voltage across (a) the conventional DC air breaker and (b) the limited current.
151
Figure 7.3 (a) shows the voltage across the air breaker and Figure 7.3 (b) depicts the current in the
circuit. The make switch closed at 10ms. At t=20ms, the contacts of the breaker opened after which
the arc voltage began to increase gradually at first. For about 3ms, the arc voltage remained higher
than the supply voltage which resulted in a successful current interruption at t=28ms. Due to a
current-zero, the voltage across the breaker fell back to the open voltage of the source. After 45ms,
the contactor in the 10kV side switched off the power supply. The sequence of operations was
described in Chapter 6. The rather slow operation of a conventional air breaker has been shown
clearly. An effective current limitation process only started when the fault current had almost
reached a prospective value of 5kA. In fact, the short-circuit current was only limited by time and
not by amplitude.
7.2. The hybrid breaker experiment

After the test with the air breaker, as described in Section 7.1, the air breaker was then used as a
backup breaker in the setup to investigate a hybrid breaker. The hybrid breaker was tested in two
different situations, namely, with and without an anti-parallel diode across the vacuum breaker. The
reason for using an anti-parallel diode was to provide an arcless interruption.
7.2.1 Hybrid breaker test without anti-parallel diode across the vacuum breaker
In this experiment, the elementary setup reported in [7.3] was used without an anti-parallel diode.
Figure 7.4 shows the circuit diagram. Photos of the setup are shown in Appendix A.2 and A.3.
VPO DCCB
+
VD1
MS
LT
RT
Scope
Scope
ZnO RA
CC
RC1
VDC1
V
CVCB CVCB VCB
Scope
RC2
VCO +
RTRV
DA
LVCB
LC
CTRV
Thy
VDC2
-
LA
VD2
Scope
Shunt
Rsn
Direct triggering
Csn
VNO
LEM
ZnO
Comparator
Threshold
Figure 7. 4 The hybrid breaker measuring setup without anti-parallel diode;

VDC1 and VDC2 are 6-pulse rectifiers, DCCB is the backup DC circuit breaker, MS is a make switch,
VCB is a vacuum circuit breaker, RC1,2 are Rogowski-coils.
152
Chapter 7
Two 6-pulse rectifiers (VDC1 and VDC2) like those described in Chapter 6 were used to feed the test
circuit [7.1] in which two DC poles were connected symmetrically with respect to the ground
potential in order to deliver a system voltage of 1kV. The system included the backup DC breaker
DCCB and the limiting load (LT=460:H and RT=153mS). Finally, the make switch MS connected
the limiting load to the hybrid breaker under test. The hybrid breaker was a combination of a
vacuum circuit breaker VCB and a commutating path connected in parallel across the VCB. For the
VCB, a fast electrodynamic drive mechanism was constructed in order to fulfill its rapid opening
requirement. The drive was energized by a pre-charged capacitor CVCB with an initial voltage VCVCB
and an actuating coil LVCB. The special opening mechanism has been described in Chapter 5,
Section 5.2. The commutating path comprised: the capacitor CC, coil LC and thyristor Thy. The
absorbing circuit (RA=10S, LA=10mH) was connected across the capacitor CC. A diode DA was
placed in series with the absorbing circuit. In normal continuous situation (idling states), the
capacitor CC was charged at VCO with the diode DA in its reverse state so that the voltage of the
capacitor CC could be maintained. Moreover, a snubber circuit (Rsn=10S, Csn=2.4:F) protected the
thyristor Thy which assisted the turn-off process. As an additional protection, some ZnO elements
were put across the capacitor CC and thyristor Thy. If the capacitor polarity changed, the absorbing
circuit would provide a dissipation path for the excess energy stored in the capacitor CC in order to
avoid a continuous stress on the thyristor Thy when it was in a reversed blocking state. The transient
recovery voltage (TRV) after creation of the current-zero in the main breaker VCB was determined
by the components RTRV=1S and CTRV=1:F. Those components were used to lower the recovery
frequency although, in principle, it was unnecessary for a vacuum breaker.
The current transducers were completely galvanicly separated from the live conducting paths.
Rogowski-coils RC1 and RC2 and their associated integrators could measure the current in the
vacuum breaker and in the commutating path, respectively; while a LEM current transducer could
be used to measure part of the total current. The transducer gave an output signal that could be used
in a detection circuit; unfortunately, the LEM that was available had a limitation when measuring
currents higher than 1.5kA. Therefore, this transducer had to be used on one branch of the parallel
copper bars that were placed in the main current path. Resistive voltage dividers VD1 and VD2
could determine the voltages of rectifier bridges (over the positive and negative poles) and
differential attenuators could measure the voltage across the capacitor CC and across the vacuum
breaker VCB.
The circuit shown in Figure 7.4 contains several solid-state devices which were only suitable for
limited repetitive operations. Table 7.1 summarizes the maximum parameters permitted.
153
Table 7. 1 Maximum solid-state key parameters permitted.
Parameters
Symbol
Fast thyristor
Forward blocking voltage

Reverse blocking voltage
Rated current
Forward surge current
Forward current slope
Reverse voltage slope
Joule-Integral
VFRM [kV]
VRRM [kV]
IF [kA]
IFSM [kA]
di dt max [A/:s]
dv dt max [V/:s]
I 2 t [A2s}
3.5
3.5
1.35
13
500
500
-
Phase
diode
2
3.4
31.5
4.8 106
Freewheeling
diode
2.5
2
24
100
2.8 106
Measurements were recorded with two LeCroy 300Mhz scopes each having four channels, so that
the system in total could be studied with eight measurement inputs simultaneously. When the make
switch MS closed, the voltage jumped from a positive to negative potential which was used to
trigger the scopes externally.
A successful interruption could only be obtained if the current-zero forced by the counter-current
injection, occurred at the instant when the contacts in the continuous current conducting path had
opened. Since the reaction time of the solid-state switch was much shorter than that of the
mechanically operated vacuum breaker VCB, the trigger signals had to be arranged in such a way
that they could coordinate successively. To ensure that the VCB opened before the solid-state
switch Thy was triggered, insertion of a delay circuit to the thyristor triggering was required. The
higher the frequency of the counter-current, the faster the current-zero could be realized; however,
an instantaneous value of the circuit current should be measured after the delay. During the delay,
the fault current would increase further which meant a heavier task for the commutation circuit
(when compared with a commutation without delay). The forced current-zero in the VCB could be
retarded by choosing a slower counter-current growth which could be realized by decreasing the
initial voltage of the capacitor CC or increasing the commutating inductance LC. In either case, a
delay circuit was not needed, due to a mechanical dead-time of around of 300:s; a counter-current
with frequency of 500Hz was sufficient since a quarter of its period was 500:s. Therefore, the LC
commutating components (CC=960:F and LC=110:H) were chosen in order to produce a frequency
of 500Hz, by increasing the capacitance and inductance values. The fault current had an initial rate
of change of 2A/:s and a prospective fault current of 5kA. The trip level was set at Itrip=1.8kA.
Figure 7.5 shows the measurement results for the hybrid interruption process.
Figure 7.5 (a) includes the voltages across the vacuum breaker VVCB and the capacitor VCc; whilst
Figure 7.5 (b) displays the associated currents in the vacuum breaker IVCB and commutating paths
ICom, respectively. Figure 7.5 (c) shows the recovery voltage across VCB (like Figure 7.5 (a)) on a
shorter time scale. Initially, the capacitor voltage was charged up to -1kV and the thyristor was in
the forward blocking state. At the instant when t=2ms, the make switch MS closed and the circuit
current IVCB increased. As soon as the current reached the trip level of 1800A, the switch Thy was
triggered in order to discharge the stored capacitor energy and that initiated the main current
154
Chapter 7
commutation. When a current-zero occurred in the VCB, the commutation process ended, but the
commutated circuit current ICom continued charging the capacitor by reversing its polarity until the
circuit current became zero at t=5.3ms and the capacitor voltage reached a final value of
VCE=+2.7kV. At that time, the switch Thy changed into the reversed blocking state and completed
2
the current interruption. Finally, the capacitor completely discharged the stored energy (1 2 CCVCE )
gradually into the absorbing circuit. The transient recovery voltage in Figure 7.5 (c) shows a
damped oscillation with a frequency of 17kHz in superposition with the capacitor voltage. In this
experiment, the main current was interrupted at the first current-zero, whereupon reignition in the
VCB, there was a second chance when the next current-zero occurred. In both cases, interruption by
the main switch VCB was not free of arcing.
3000
3000
2500
VVCB
VCc
2000
2500
IVCB
ICom
Current [A]
Voltage [V]
2000
1500
1000
500
0
1500
1000
500
-500
0
-1000
-1500
-500
10
time [ms]
(a)
10
time [ms]
(b)
2000
Voltage [V]
1500
1000
500
-500
-1000
2.5
3.5
4.5
time [ms]
(c)
Figure 7. 5 Measurement results;
(a) The voltages across vacuum breaker VVCB and the capacitor VCc, (b) The currents in the main breaker
IVCB and the commutating path ICom (c) The transient recovery voltage across the vacuum breaker.
Verification of the experimental results and a further analysis of the commutation behavior, were
carried out with the simulation model in PSPICE [7.5] as described in Chapter 2 and using the setup
depicted in Figure 7.6.
155
10
XDIO11
1
XD IO 13
VZERO1
XSCLOA D
40 SW5 41
XD IO15
XRATE
XF1
VT
XR113
3
4
XTRV
XD IO12
Tr1
XVCB
XABS
Lc
XD IO14
XDIO 16
23
XSUP11 XSUP12
VZERO2
Rtrv
XD IO21
Rc
Ctrv
XD IO23 XD IO25
22
XZTR21
20
XSUP13
XCN1
11
DA
Cc
XR123
RA
Uco
XZTR13
VS
VR
LA
XFWHEEL
XZTR12
XR112
VR
2
14
SW3
SW2
XZTR11
30 SW1
XTHY
Rsn
7
12
XZTR22
VS
8
13
XSNUB
VZERO5
VZERO3
XR212
5
15
Csn
XF2
XZTR23
VT
XR213
XR223
VZCOMM1
Tr2
XD IO24
21
XDIO 26
XDIO 22
50
VZERO4
16
XCOMM
XCN2
Figure 7. 6 Diagram of the hybrid breaker simulation without anti-parallel diode.
A comparison of the measured and simulated results is shown in Figure 7.7. The most interesting
electrical parameters are the voltages across the main breaker VVCB and the commutating capacitor
VCc and the currents in the main breaker IVCB and the commutating path ICom. Figure 7.7 (a) and (b)
show the measured results while Figure 7.7 (c) and (d) show the simulated results.
156
Chapter 7
Measurement
Simulation
3000
3000
2500
VVCB
VCc
2000
Voltage [V]
2000
Voltage [V]
2500
VVCB
VCc
1500
1000
500
1500
1000
500
-500
-500
-1000
2.5
3.5
4.5
5.5
-1000
2.5
3.5
4.5
time [ms]
(a) Voltages
5.5
(c) Voltages
3000
3000
2500
IVCB
ICom
2500
IVCB
ICom
2000
Current [A]
2000
Current [A]
time [ms]
1500
1000
1500
1000
500
500
-500
2.5
3.5
4.5
time [ms]
5.5
-500
2.5
3.5
4.5
5.5
time [ms]
(b) Currents
(d) Currents
Figure 7. 7 Comparison between the measured results for (a) voltages and (b) currents and
the simulation results for (c) voltages and (d) currents.
Differences between the measured and the simulated situations were less than 5%.
7.2.2 Hybrid breaker test with anti-parallel diode across the vacuum breaker
In the experiment described in Section 7.2.1, the vacuum breaker contacts eroded unavoidably due
to the arcing. The arcing could be eliminated completely by adding of an anti-parallel reversed diode
DVCB across the breaker VCB, see Figure 7.8. As soon as a counter-current was generated by
discharging the capacitor CC and the commutating inductance LC, most of that current flowed
through the main breaker, because it had a lower resistance than the diode. The diode provided an
alternative path after the contacts opened but only under the condition that the contacts opened after
the first current-zero. Therefore, when the diode was in the conducting state, the current in the main
path became negative for a while until the current in the main path measured by RC1 became zero.
From that time, the diode changed to the reversed state, while no current flowed the main path;
subsequently, the transient recovery voltage appeared across the VCB contacts. The main current
was then commutated to flow along the parallel path and the final interruption was achieved when
the capacitor became fully charged allowing a current-zero event. This current-zero changed the
thyristor state from a forward conducting state to a forward blocking state.
VPO
+
VD1
DCCB
LT
157
MS
RT
ZnO RA
Scope
Scope
VCO +
RC1
VDC1
CC
CVCB VCVCB
VD2
Scope
Shunt
DA
LC
VCB
VDC2
LA
RTRV
LVCB
Scope
RC2
DVCB
CTRV
Thy
Rsn
Direct triggering
Csn
VNO
LEM
ZnO
Comparator
Threshold
Figure 7. 8 The hybrid breaker measurement setup with anti-parallel diode;

VDC1 and VDC2 are 6-pulse rectifiers, DCCB is backup DC circuit breaker, MS is make switch,
VCB is vacuum circuit breaker, RC1,2 are Rogowski-coils and DVCB: reverse diode.
Figure 7.9 (a) presents the measured voltages VVCB and VCc across the vacuum breaker and the
capacitor. Figure 7.9 (b) displays the associated currents Imain and ICom in the main path and in the
commutation path, respectively. Initially, the capacitor voltage was charged up to -1kV. At t=2ms,
the make switch MS closed and the circuit current Imain increased. When the current reached the trip
level, the switch Thy was triggered discharging the stored capacitor energy to initiate commutation
of the main current. As soon as the main path current Imain equalled ICom, the current in the VCB was
interrupted at the current-zero. Subsequently, a counter-current flowed through the reverse diode
DVCB. The current in the main path Imain then became negative and it ceased to flow when the
current became zero in the diode DVCB. At that instant, transition from the main path to the
commutation path was complete. The commutated current ICom then charged the capacitor CC until
the current ICom reached a current-zero. At that instant t=5.6ms, the thyristor Thy finally interrupted
the current while the capacitor voltage reached VCE=+2.8kV. Eventually, the capacitor discharged
2
all the stored energy (1 2 CCVCE ) into the absorbing circuit. In Figure 7.9 (c) when the current-zero
in the DVCB occurs, the transient recovery voltage across the main breaker VCB jumps with a
damped oscillation at a frequency of 17kHz in superposition with the capacitor voltage.
158
Chapter 7
3000
3000
2500
1500
1000
500
0
1500
1000
500
0
-500
-500
-1000
-1500
Imain
ICom
2000
Current [A]
Voltage [V]
2500
VVCB
VCc
2000
-1000
10
time [ms]
(a)
10
time [ms]
(b)
1800
1600
Voltage [V]
1400
1200
1000
800
600
400
200
0
-200
2.5
3.5
4.5
time [ms]
(c)
Figure 7. 9 Measured results;
(a) The voltages across vacuum breaker VVCB and the capacitor VCc, (b) The currents in the main path Imain
and the commutating path ICom, (c) The transient recovery voltage across the vacuum breaker.
For verification of the experimental results and further analysis of the commutation behavior, a
simulation model in PSPICE was setup as shown in Figure 7.10.
10
XD IO11
1
VZERO1
40
XDIO15
SW5 41 XSCLOAD
XZTR12
14
XRATE
Uco
XF1
5
XZTR13
VT
DA
6
XR113
RA
Cc
XFWHEEL
VS
XR123
XVCB
XTRV
XDIO 12
Tr1
XABS
Lc
XD IO14
XDIO16
23
XSUP11 XSUP12
Rtrv
VZERO2
XDIO21
Rc
Ctrv
XD IO23 XDIO25
22
XZTR21
DVCB
XTHY
15
Rsn
7
12
XZTR22
VS
17
8
13
XSNUB
VZERO5
VZERO3
XR212
VR
20
XSUP13
XCN1
11
LA
XR112
VR
30 SW1
SW3
SW2
XZTR11
XD IO13
XF2
XZTR23
Csn
VZERO6
VT
XR213
XR223
VZCOMM1
Tr2
XDIO24
21
XDIO26
XDIO 22
50
VZERO4
16
XCOMM
XCN2
Figure 7. 10 Diagram of the hybrid breaker simulation with an anti-parallel diode.
A comparison between measured and simulated results is shown in Figure 7.11. The most
important electrical parameters are the voltages across the main breaker VVCB and the commutating
159
capacitor VCc and the currents in the main path Imain and in the commutating path ICom. Figures 7.11
(a) and (b) show the measured results while Figure 7.11 (c) and (d) show the simulated results.
Measurement
Simulation
3000
3000
2500
2000
Voltage [V]
Voltage [V]
2000
VVCB
VCc
2500
VVCB
VCc
1500
1000
500
1500
1000
500
-500
-500
-1000
2.5
3.5
4.5
5.5
-1000
2.5
3.5
4.5
time [ms]
(a) Voltages
5.5
(c) Voltages
3000
3000
Imain
ICom
2500
Imain
ICom
2500
2000
Current [A]
2000
Current [A]
time [ms]
1500
1000
500
1500
1000
500
-500
-500
-1000
2.5
3.5
4.5
5.5
time [ms]
-1000
2.5
3.5
4.5
5.5
time [ms]
(b) Currents
(d) Currents
Figure 7. 11 Comparison between the measured results for (a) voltages and (b) currents and
the simulation results for (c) voltages and (d) currents.
The difference between the measured current and the simulated current was less than 8%.
7.3. The solid-state breaker experiment

For a reasonable comparison of the different concepts of current limitation, a purely solid-state
device was investigated with the experimental setup. An IGCT was chosen as a representation of the
latest technology. The introduction of IGCT opens an opportunity for many different applications
such as in medium voltage networks for static compensators, active filters, converter stations and
static breakers.
160
Chapter 7
7.3.1 A brief description of the Integrated Gate Commutated Thyristor (IGCT)

Since their introduction in the late 1950s, the use of power silicon switches has increased steadily
to give greater capacity with more complexity. Research into finding ideal switches led to the
development of new power semiconductor switches. The IGCT combined the high nominal current
rating of GTO (Gate Turn-Off) Thyristors and the fast switching behavior of Insulated Gate Bipolar
Transistors (IGBT). It could switch more quickly and had lower losses than either GTO thyristors or
IGBTs [7.4]. However, GTO thyristors do require to turn off high gate-current pulses of 20-30% of
the main current [7.6]. When the main current reached a fault trip level, much more gate-current
would be needed; consequently, a special gating circuitry would be needed. The fundamental
difference between a conventional GTO and the IGCT was the very low inductance gate driver
system inherent to an IGCT which could be as low as 2.7 to 3.5nH [7.7]. An important feature of the
IGCT development was focusing on direct triggering using a light trigger circuit for on and off
switching. Light triggering was preferred to the more conventional triggering with electrical signals,
primarily, because it improved immunity to electromagnetic interference, at the same time it
simplified the triggering circuits. Table 7.2 lists the operational characteristics of an IGCT. Because
the IGCT had no reversed voltage capacity, an external series diode had to be included; however
that introduced thermal losses.
Table 7. 2 IGCT characteristics.
state
conduction
turn-off
turn-on
blocking
device
thyristor
pnp-transistor
npn- transistor
pnp-transistor
A turn-off snubber can be specified to limit the dv dt of the recovery voltage to the device. The
maximum turn-off current of an IGCT depends a great deal on the snubber network [7.4]. At the
instant when the current in an IGCT ceases to flow, the circuit current will commutate to the dv dt
limiting circuit of the IGCT and the voltage across the IGCT will start to increase. Snubberless
switching can only be used if any unclamped stray inductance remains below 300nH [7.7,8].
However, the circuit under study had an inductance of 460:H so that a supplementary network for
limiting of di dt and dv dt had to be incorporated.
A commercial IGCT device was chosen to demonstrate the current limitation behavior of purely
solid-state breakers; its nominal rating current was 1.5kA, its maximum switching ability was 4kA.
Other specifications can be found in Table 7.3.
161
Table 7. 3 Maximum IGCT key parameters permitted.
Parameters
Forward blocking voltage
Peak off-state voltage
Rated breaking current
Forward surge current
Turn-on time
Turn-off time
Forward current slope
Recovery voltage slope
Joule-Integral
Symbol
VDC [kV]
VDRM [kV]
IF [kA]
IFSM [kA]
tdon [:s]
tdoff [:s]
di dt max [A/:s]
dv dt max [V/:s]
I 2 t [A2s]
Value
2.8
4.5
4
25
<3
<3
500
1000
3q106
7.3.2 Experimental and simulated results using IGCT

The designed of the experimental setup is shown in Figure 7.12 and photos of the setup are shown
in Appendix A.1 and A.4.
DCCB
LT
RT
MS
+
VD1
VDC1
Rir
IGCT
Scope
VD2
Lir
Dir
LEM2
VDC2
DR
Cp
ZnO
LEM1
Optical signal
Electrical signal
Comparator
Signal conversion
and Logic circuit
Control circuit
Threshold
Figure 7. 12 The hybrid breaker measuring setup with anti-parallel diode;

VDC1 and VDC2 are 6-pulse rectifiers, DCCB is a backup DC circuit breaker, MS is a make switch and
IGCT is the solid-state breaker under test.
Two rectifier bridges (VDC1 and VDC2) as described in Chapter 6 fed the test circuit giving a total
supply voltage of VDC=1kV. The test circuit comprised a backup DC breaker (DCCB), a limiting
load (LT=460:H, RT=550mS), a make switch MS and a combination of IGCT and a fast switching
diode DR. The limiting load ensured a prospective current of 2kA. The diode DR was required
because the IGCT did not have the ability to withstand the recovery voltage. Therefore, the diode
162
Chapter 7
DR was connected in series with the IGCT. In, parallel with the IGCT and DR, a protection circuit
(Rir=47S, Lir=4:H, Cp=10:F, Dir and ZnO) was added in order to aid the IGCT switching process.
The protection circuit functioned in both transient states (switching on and off). Rir limited the
discharge current from the parallel capacitor Cp when the IGCT was turned on, thus preventing the
formation of hot-spots which would damage the device. The parallel capacitor Cp had to be
discharged within the minimum turn-on time determined by the application in hand.
The trip level was set at Itrip=700A. The experiment started when the make switch MS was closed
and that resulted in the capacitor Cp charging up to VCpo. When the IGCT was switched on, the
parallel network limited the current increase to di dt 200 A/:s from the parallel capacitor Cp. The
energy stored in Cp was E Cp = 1 2 C pVCpo 2 ; it was dissipated mainly to the inrush resistor Rir. The
limiting inductance LT, in series with the IGCT, limited di dt to approximately VDC LT .
In the IGCT turned off mode, the anode current Io fell usually at a rate of a few hundred amps per
microsecond; since the inductive current remained constant, it commutated into the parallel circuit
with the same high di dt . The inductive energy stored in the system was E L = 1 2 LT I o which at
2
turning-off of current I o would cause an overvoltage V = I o LT C p . The parallel circuit had to

have a very low impedance in order to satisfy its role of limiting the rate of voltage rise. In the
forward direction, the inrush resistor Rir was short-circuited by the diode Dir so that, in principal,
only the capacitor Cp was present across the IGCT in order to provide a dv dt of approximately
I o C p . Capacitor Cp limited the voltage rise to dv dt 100 V/:s. Of course, an objective was to
minimize the capacitor Cp for economic reasons; however if Cp became too small, an excessive
dv dt could arise across the IGCT damaging the wafer. A larger parallel capacitor, however, was
very undesirable, because it would increase the turn-on losses and thus limit the performance of the
whole breaker.
When the make switch MS closed, it charged up the parallel capacitor Cp. Two LEM current
transducers were used to sense currents at the source and in the IGCT. Furthermore, an autodetection mechanism was constructed and installed in order to start interrupting the circuit current
on time. An electronic comparator processed the output voltage from the LEM and then it decided
whether to send a trigger signal or not, but the IGCT would switch off only if the circuit current
exceeded a pre-determined trip value. The IGCT itself was provided with optical control
connections, so that practically, the whole device could float in the circuit providing a potential-free
control. In order to turn on the IGCT and keep it in the conducting state, an optical signal was given
continuously. When the optical signal stopped, the IGCT immediately suppressed the current to
zero. A control circuit provided an electrical trigger signal to the IGCT after the make switch MS
closed. That trigger signal was converted to an optical signal in order to switch on the IGCT.
Together with the signal converter, another logic circuit could overrule the continuous trigger
signal, by stopping the optical signal after the overcurrent had been detected. Therefore, the IGCT
could be turned off by the auto-detection circuit. A simulation model was used to verify the
163
experimental results and to enable further study of the IGCTs performance with the PSPICE
simulation and it is shown in Figure 7.13.
10
XD IO 11
1
XD IO13
VZERO1
XD IO 15
40
SW5
41
XLOAD
14
XZTR11
XR112
VR
4
XFWHEEL
2
SW6
XZTR12
VS
XF1
5
3
30 SW1
XRATE
XZTR13
VT
XSNUB
6
XR113
XR123
17
XDIO12
Tr1
XIGCT
XD IO14
XDIO 16
23
XSUP11 XSUP12
20
XSUP13
XCN1
16
XD IO 21 XDIO 23 XDIO 25
22
11
VR
XZTR21
Lsn
Csn
VZERO3
XR212
15
XZTR22
VS
VZERO5
8
13
Dsn
VZERO4
7
12
Rsn
VZERO2
XF2
XZTR23
VT
XR213
XR223
Tr2
XD IO 24
XD IO 26
XD IO 22
50
21
XCN2
Figure 7. 13 Simulation diagram for the IGCT test.
The simulation network above is seen from the secondary side of the transformers. Two 3-phase
systems in balance are the supply voltages represented by VR, VS and VT. Each phase of the
secondary side is subsequently connected to an impedance XZTRxx representing the inner
impedance of the transformer. The transformers neutral points are earthed by the high capacitive
impedance XCN1 and XCN2. Next, the continuous loads XSUPxx function as overvoltage
suppressors being installed between each phase and the neutral of the transformer. Subsequently, a
small capacitor and resistor in series to represent the arresters XRxxx completes the AC side of the
circuit simulation. Then, two Graetz 3-phase rectifiers (XDIO11...XDIO16 and XDIO21...XDIO26)
connect to each AC side for delivering two rectified voltages. Small continuous loads (XF1 and
XF2) link the two DC poles to the earth. Both of the rectified voltages are connected in series and
the middle of them is earthed with VZERO2 to make a symmetrical source. Finally, the timecontrolled switches SW1 and SW5 join the DC source to the load side. The load side, depending on
the simulation being performed, can be arranged in such a way that only essential devices are
connected and disconnected. The load side consists of the freewheeling circuit XFWHEEL, the
limiting inductive load XLOAD, the rated load XRATE, the make switches SW1 and SW5 and the
interrupter circuit containing the IGCT subcircuit, XIGCT and the snubber network, XSNUB. The
switch SW6 controls the connection for freewheeling simulation. VZEROxs represent the current
sensors. The switch SW5 provides the unloading and short-circuiting simulations. Closing switch
SW1 simulates the circuit described in the previous section. Figure 7.14 compares the simulation
results without the arrester with the experimental results using a protective arrester for the IGCT.
This simulation illustrates that without the appropriate arrester, the IGCT can be destroyed, since
164
Chapter 7
the expected recovery voltage is as high as 5.5kV. From Table 7.3, it can be seen that the maximum
peak voltage is 4.5kV.
Simulation without arrester
Measurement with arrester
2000
4000
1500
Voltage [V]
2500
5000
Voltage [V]
6000
3000
2000
1000
1000
500
4.5
5.5
6.5
-500
4.5
5.5
time [ms]
(a) Voltage.
6.5
6.5
(c) Voltage.
800
700
700
600
600
500
500
Current [A]
800
Current [A]
time [ms]
400
300
200
400
300
200
100
100
-100
4.5
5.5
time [ms]
6.5
-100
4.5
5.5
time [ms]
(b) Current.
(d) Current.
Figure 7. 14 Comparison between simulated (a,b) and measured (c,d) results for the voltage across an IGCT
and current in the source.
Further experiments with a prospective current of 5kA and a trip level of 2kA are under preparation
now. This is still in the specification of the IGCT.
7.4. Conclusions
In this chapter, three different test circuits for direct current interruption have been experimentally
investigated. The air breaker provided current interruption without introducing high overvoltages in
the circuit; however, its reaction time was rather slow, because the peak current was reached before
a considerable high arc voltage could be generated. The air breaker released the stored inductive
energy through an arcing process, while it limited the fault time but not the peak current. Although
the air breaker had a long interruption time, a fault detection monitor was built into the drive. Its
opening mechanism could be improved with a special drive. After operation, the breaker could be
reclosed easily; moreover, during operation, the breaker did not produce excessive overvoltages and
it was robust.
165
The hybrid breaker on the other hand, provided a short interrupting time, but it introduced high
overvoltages because the stored inductive energy had to be transferred to the commutating
capacitor. The overvoltages could endanger the rectifier and the circuit. Unfortunately, in order to
reduce the overvoltage stresses after a fault interruption, a higher commutation capacitor and a
passive dissipation path had to be introduced. Therefore, well-designed overvoltage prevention
measures had to be considered carefully, in particular, when testing with high currents. The
mechanical dead-time of the main breaker had to be as short as possible to ensure that the
interruption occurred at the first or second current-zero. At the instance of a current-zero in the
vacuum breaker, both of its contacts had to have opened to a sufficient distance to withstand any
overvoltages between them afterwards. Obviously, sufficient counter-current had to be produced by
increasing the value of the commutating capacitor. The higher the current to be forced to zero, the
larger the capacitor or the higher the initial voltage that was required. Accordingly, this needs more
space and higher rating of components. An arcless interruption can be achieved by mounting a
reversed diode across the main breaker. The interruption behavior was successfully predicted and
the simulation results agreed with the experimental ones. The hybrid breaker had the nominal rating
of 1kV/1kA and it was tested by interrupting a prospective short-circuit current of 5kA, with a time
constant of 3ms and a detection level of 1.8kA, with a sensing time of less than 5:s and a total
interruption time of less than 3ms. The hybrid breaker sharply reduced the peak current as well as
the fault time. However, excessive overvoltages could occur unless special measures were taken. A
ready capacitor bank would be both expensive and space consuming. After a fault interruption, the
hybrid breaker required a considerable time in order to recharge the capacitor for the next operation.
The solid-state breaker IGCT was tested in a 1kV DC circuit having a prospective current of 2kA
and a detection level of the current at 700A. The interrupting time was less than 500:s and the
protection network limited the overvoltage to only 2.1kV. Contrary with the air breaker and hybrid
breaker, the IGCT was very compact, it operated very fast and it caused no noise nuisance, but it
was very vulnerable to transient surges. The necessary protective circuits had to be well-designed in
order to improve their reliability. Furthermore, thermal problems could occur under normal
conditions; therefore, an efficient cooling system for many kilowatts would be needed to protect the
IGCT from overheating.

[7.1]
[7.2]
[7.3]
[7.4]
[7.5]
Atmadji, A.M.S., et.al., Building a 750V direct current short-circuit source, 8th Int.
Symp. on Short-Circuit Currents on Power Syst., Oct. 1998, Brussels, p. 249-54.
Pettinga, J.A.J. and Siersema, J., A polyphase 500kA current measuring system with
Atmadji, A.M.S., et.al., Interruption of 4kA DC with current commutation principles,
34th Universities Power Engineering Conf., Sept. 1999, Leicester, p. 517-20.
166
[7.6]
[7.7]
[7.8]
Chapter 7
Carroll, E., et.al., Integrated Gate-Commutated Thyristors: A new approach to high power
electronics, ABB Semiconductors AG. Press Conference, IEMDC Milwaukee, May 20
1997.
Linder, S., et.al., A new range of reverse conducting gate-commutated thyristors for high
voltage medium power applications, Conf. Proc. EPE, Trondheim, Sept. 1997.
Carroll, E., et.al., IGBT or IGCT: Considerations for very high power applications,
Forum Europeen des Semiconducteurs de Puissance, Clamart, October 22, 1997.
Chapter 8
General conclusions and future developments
This thesis has described how to analyze and implement direct current breakers based on hybrid
switching techniques.
8.1. General conclusions

In Chapter 2, hybrid interruption techniques were analyzed and simulated. The interruption of high
fault currents requires solving overvoltage problems and taking protective measures. Hence, when
coordinating a number of protection devices, well-matched network parameters and breakers
capabilities have to be considered carefully. Unfortunately, reducing overvoltage stresses after a
fault interruption, needs the use of a higher commutation capacitor and the introduction of a passive
dissipation path. Obviously, limiting the fault current successfully requires a minimal value for the
commutation capacitor. Simulation models were developed in order to provide the dimensions for
the circuit components.
In Chapter 3, two variants of two-stage interruption were described, analyzed, simulated and
compared with one-stage interruption. For the two-stage variants, as McEwan had suggested, the
percentage of residual capacitor voltage was limited to 50%; however that was at the expense of
more circuit components, longer interruption time and increased resistor heating. An attempt to
limit the interruption time and thus the Joule energy in the resistance, however, was at the expense
of a higher end value for the capacitor voltage.
In Chapter 4, the function of circuit breakers was described saying that the method of Ampere-turn
compensation had been chosen for sensing the current. Rogowski-coils were chosen for measuring
the currents in different branches, while the signal from a current sensor was used as the input for an
electronic detection circuit. The latter had electrical as well as optical outputs; the electrical output
being used directly in order to trip the main breaker and the thyristor for the hybrid setup, and the
optical output being used for triggering solid-state devices. In order to achieve an improved
protection and to prevent faulty tripping during operation, the setting values for the detection level
had to be carefully determined, which necessitated tests, statistic counts of the breaking operations
and so on. Different current transducers were investigated in order to verify their response to direct
currents. Furthermore, it was shown that the Rogowski-coil and the electronic integrator were quite
suitable for measuring pulsed direct currents as applied in the hybrid breaker experiments.
In Chapter 5, the significance of a moving disk as part of the hybrid breakers opening drive was
discussed. The drive had been built and it operated at peak currents of 2kA in order to pass a total
charge of 0.25 Coulomb. The opening time of the drive was measured and found to be 300:s with a
168
Chapter 8
velocity of up to 4m/s. Two different approaches were considered for analyzing the transient
behavior of the drive system; the first approach included analysis and simulation using the two
coupled coils described in the linear circuit theory, in order to outline a general solution. Then,
followed the non-linear circuit theory in which equivalent inductance and resistance parameters
were introduced to calculate particular electrical and mechanical parameters. The results showed
that the model developed gave an excellent agreement with the measured results. Despite the effort
of constructing a twin-drive system, comparing efficiencies of the two drive systems showed that
the first drive had a higher value than the twin-drive. That could be explained by the higher
resistance of the twin-drive coil.
As described in Chapter 6, a test facility was built up from two 3-phase rectifiers in order to
examine the characteristics of fast-acting DC interrupters. That facility could deliver currents up to
7000A at 900V and the system could recover from the transient produced during the test without
causing any damage to itself. The stress on the primary AC supply system caused by the brief test
time was very small. The operating characteristics of the facility were illustrated by the
experimental and calculated results which verified that the test facility operated satisfactorily.
Investigations involving high power direct currents for both transient and steady-state would be
feasible, including interactions between both AC to DC and vice versa.
In Chapter 7, three different circuit breakers for direct current interruption were compared
experimentally. A conventional air breaker could interrupt the current without introducing high
overvoltages, however, its reaction time was rather slow, because the peak current was allowed to
occur before a considerable high arc voltage had been generated. The air breaker released the stored
inductive energy through an arcing process.
The hybrid breaker on the other hand, provided fast interruptions, but it introduced high
overvoltages because the stored inductive energy was transferred to the commutating capacitor.
Those overvoltages would endanger the rectifier and the circuit. Unfortunately, in order to reduce
the overvoltage stresses after a fault interruption, high commutation capacitance was required and a
passive dissipation path had to be introduced. Therefore, well-designed overvoltage prevention
measures (resistor and metal oxide arrester) had to be considered carefully when testing particularly
high currents. The mechanical dead-time of the main breaker had to be reduced as much as possible
to ensure an interruption at the first current-zero in the main breaker. At the current-zero event in
the vacuum breaker, both contacts had to be opened sufficiently to withstand any overvoltages
afterwards. Obviously, any limitation of the counter-current had to be solved by increasing the value
of the commutating capacitor. The higher the current to be forced to zero, the larger the capacitor or
the higher the initial voltage would be needed. Accordingly, that would need a greater space and
higher rated components. Interruption behavior had been successfully predicted and the simulation
results fitted the experimental ones. The hybrid breaker that was designed, had nominal continuous
ratings of 1kV/1kA. It was tested by interrupting a prospective short-circuit current of 5kA with a
time constant of 3ms and a detection level of 1.8kA; it required a sensing time less than 5:s while a
total interruption time was less than 3ms.
General conclusions and future developments
169
As a representative of solid state switching, the IGCT was tested in a 1kV DC circuit having a
prospective current of 2kA and a detection current level of 700A. The interrupting time was less
than 500:s and the protective network limited the overvoltage to just 2.1kV. Clearly, for
coordinating the protection devices, some well-matched network parameters and the breaker
capacity had to be determined for all three breakers.
8.2. Future developments

Until now, the ideal switch has been a figment of the imagination. Switching devices can be
developed and constructed having features that approach the ideal switch; however, they can fulfill
all practical network requirements and current levels up to the highest voltages. Searching for the
ideal breaker must continue. In the last decade, some new power semiconductors have been
invented that satisfy the requirements of power electronic applications and that has stimulated them
being used as solid-state breakers too. The fact that they are vulnerable, means that additional
circuits will still be needed. Meanwhile, hybrid switching devices are also in great demand,
especially for DC traction systems, but that will have to be accompanied also by the availability of
high power rated semiconductors having turn-on and turn-off times of microseconds.
One objective of investigating hybrid breaker concepts was to reduce the costs of the whole breaker
and its associated hardware like triggering and control circuits. Reducing the number of parts in a
system was also likely to improve its reliability. There are trade-off, however, in achieving this
objective, because increasing the trip level in high-rated nominal current systems, would mean that
the commutation capacitance would have to be increased too. The greater the capacitor, the lower
the initial voltages that would be needed, and that could reduce the residual voltage and prevent
overvoltage problems. However, large capacitance values may be unacceptable economically.
Furthermore, in two-stage commutation circuits, EMC and EMI problems will appear that must be
solved since auxiliary switches must be operated in the right order. Using them in medium voltage
DC networks will need utmost care and it is a challenge to breaker designers. Higher voltage and
current systems may require multi-stage interrupters. All the time that there is slow progress in
applying hybrid breakers for high-rated systems, conventional breakers will continue to be
unchallenged for network protection. Even conventional breakers can be improved and updated but
the number of research project is on the decrease.
A tendency exists to change DC traction systems to AC systems switched by non current limiting
AC vacuum interrupters both in the substation and in the train. DC systems are still in operation
have three nominal operating ranges: 750V/6kA, 1500V/6kA and 3000V/3kA with the maximum
short-circuit current as much as 50kA and a rate of current rise up to 15A/:s. Therefore developing
breakers for those ranges is required. However, a bottleneck to designing high current systems is the
short contact breaker opening times needed, their mechanical contact problems will have to be
solved first. Since no vacuum breaker has yet been produced for 6kA nominal currents, parallel
vacuum breakers each for 3kA with a low jitter time still have to be used and, consequently, the
170
Chapter 8
contacts mass will increase. A rapid opening mechanism (less than 500:s) for the heavy contacts
mass for 6kA will be rather problematic. This implies that the only solution will be to use an
electrodynamic drive, but the fact that the impulse forces generated by such a drive can be
excessive, future investigations will have to include the improvement of the adequate mass damping
system to counteract such high impulse forces in a very short time. Therefore, hybrid breakers using
vacuum interrupters will be suitable for protecting the medium voltage DC systems. The need to
solve the contact mass problem may push solid-state technology to fulfill the requirements for high
current systems. Solid-state breakers have not been applied to replace breakers in Dutch traction
vehicles, however, about 3% of the DC breakers are of the hybrid types in railway substations with
high current contacts for 6kA in air.
Both hybrid breakers and IGCTs need supervision of protection function which will complicate the
related safety measures and make them sensitive for malfunctioning. Before being applied in the
system, the complexity, failure rate, number of components and overload capacities of the breaker
must be considered carefully.
Further research is still required in order to develop a fast and intelligent monitoring system, to
optimize capacitor banks (either for the counter-current or a fast switch drive), and to model the best
energy absorbers. Then, research on superconducting materials will help to motivate the
development of fault current limiters, particularly, for high voltage systems. Until they are
industrially economic, they will be available only in the laboratory. Last but not least, PTC resistors
will be frequently used in low-rated industrial AC systems. Therefore, searching for suitable
materials will have to continue and further investigations will be necessary.
171
Appendix A Photos of the measurement setup

A.1 The Direct current short-circuit source
A.2 The vacuum circuit breaker as the main breaker
172
A.3 Measurement setup of the hybrid breaker.
A.4 Measurement setup of the IGCT
173
List of Symbols
Symbol
r
D
, o
FW
t
V
ad
f
fCom
g
i
iB
iC
iCmax
iSC
iS
k
l
md
r
t
tint
ttrip
tz, TZ
tzmax
x
v,V
vC
vd
A
C
Cij
Cp
Csn
Quantity
phase control angle
damping constant
damped natural frequency
permittivity
dielectric constant
permeability
relative permeability
resistivity
commutating (overlap) angle
magnetic flux
angular frequency
conductivity
time constant
freewheeling time constant
time step
differential attenuator
disk acceleration
frequency
commutating frequency
gravity constant
electric current
breaker current
capacitor current
maximum capacitor current
short-circuit current
source current
magnetic coupling factor
length
mass
radius
time
interrupting time
trip time
current-zero time
maximum current-zero time
displacement
voltage
capacitor voltage
disk velocity
cross-sectional area
capacitance
tensor matrix
parallel capacitance
snubber capacitance
Unit
degree
1/s
1/s
Farad/meter
Henry/meter
/meter
degree
Weber
1/s
mho/meter
second
second
second
meter/second2
Hertz
Hertz
meter/second2
Ampere
Ampere
Ampere
Ampere
Ampere
Ampere
meter
kg
meter
second
second
second
second
second
m
Volt
Volt
meter/second
meter2
Farad
Farad
Farad
174
CC
CCo
CSW, CVCB
Dir
EC
ECO
EL
ER
Ek
Ekmax
Esp
Es,ES
Ein
Eout
F
Fd
FED
FF
FG
FM
FS
I
ICc
ICom
IVCB
IDCS
IDS1
Ilim
Imain
Imax
I , Ipros
IR,IS,IT
IR
IRA
IS1
Itrip
Itr
L
Leq
Li
Lir
LLo
LLoad
Lsn
Lsn
LA
LC
LFW
commutating capacitance
normalized commutating capacitance
switch capacitor, actuating capacitor
inrush diode
electrical energy in the capacitor
initial electrical energy in the capacitor
magnetic energy in the coil
dissipated energy in the resistance
kinetic energy in the disk
maximum kinetic energy in the disk
potential energy in the spring
supply voltage
input energy
output energy
force
force in the disk
electrodynamic force
frictional force
gravitational force
magnetic force
spring force
electrical current
commutation capacitor current
commutated current
current in the VCB
main source current
reversed diode current
limited current
main path current
maximum main current
prospective current
phase currents (AC side)
rated current
absorbing circuit current
main breaker current
trip current
transient current
self-inductance
equivalent (effective) inductance
inner inductance of the transformer
inrush coil
normalized commutating inductance
load inductance
snubber inductance
snubber coil
absorbing reactor
commutating inductance
freewheeling inductance
Farad
Farad
Farad
Joule
Joule
Joule
Joule
Joule
Joule
Joule
Volt
Joule
Joule
Newton
Newton
Newton
Newton
Newton
Newton
Newton
Ampere
Ampere
Ampere
Ampere
Ampere
Ampere
Ampere
Ampere
Ampere
Ampere
Ampere
Ampere
Ampere
Ampere
Ampere
Ampere
Henry
Henry
Henry
Henry
Henry
Henry
Henry
Henry
Henry
Henry
Henry
175
LS, LT
LVCB
M
MB
MOV
MS
N
P
R, RS, RT
Req
Rir
Rlim
Rload
Rsn
RA
RC
RFW
Ri
S
S, SW
T
T
Thy,Th
V1, V2, V3
VCB
VD1, VD2
VCB
VCc
VCE
VCl
VCO
VCVCB
Vd
Vdo
VMS
VNO
VPO
VPN
VR, VS, VT
VS1
VThy
VVCB
W
Wm
Wtr
WCO
WR
WCB
line inductance
excitation coil of the VCB
mutual-inductance
main breaker
Metal Oxide Varistor
make switch
number of turns
power
resistance
equivalent (effective) resistance
inrush resistor
limiting resistance
load resistance
snubber resistance
absorbing resistor
commutating resistor
freewheeling resistance
inner resistance of the transformer
the rate of rise of the switching arc voltage
switch
temperature
temperature difference
thyristor
phase voltages
vacuum circuit breaker
resistive voltage divider
switching arc voltage
capacitor voltage
capacitor final voltage
clamping voltage
capacitor initial voltage
initial voltage of the CVCB
rectified voltage
unloaded rectified voltage
make switch voltage
negative pole voltage
positive pole voltage
the difference pole voltage
phase voltages
main breaker voltage
thyristor voltage (Anode-Cathode)
voltage across the VCB
energy
magnetic energy
transient energy
capacitor initial energy
dissipated energy in the resistance
dissipated energy in the breaker
Henry
Henry
Henry
Watt
Volt/second
Kelvin
Kelvin
Volt
Volt
Volt
Volt
Volt
Volt
Volt
Volt
Volt
Volt
Volt
Volt
Volt
Volt
Volt
Volt
Volt
Joule
Joule
Joule
Joule
Joule
Joule
176
WTot
XT
Yt
Zij
Zin
Zt
total dissipated energy

inner reactance of the transformer
total AC load admittance
impedance matrix
input impedance
total AC load impedance
Joule
Siemens
177
Acknowledgements
It is a great pleasure for me to have the opportunity to participate in the activities of the Electrical
Energy System Group (EVT), Department of Electrical Engineering, Eindhoven University of
Technology. My truly thanks are due to the following persons from whom I got much help for the
completion of this thesis work.
I especially like to thank my promoter and coach Prof. G.C. Damstra for his enthusiastic support
and expertise in switchgears. I have benefited a great deal from you not only on the specific subject
but also on the rigorous way of doing scientific research. Further to my second promoter for his
review, comments and discussion.
I am very indebted to Mr. J.G.J. Sloot for the constant supports, fruitful discussions and promptly
critical comments which often stimulated new ideas.
I express my thanks for skillful and excellent technical assistance from Hans Vossen, Rob
Kerkenaar, Ton Wilmes, Arie van Staalduinen who all of them contributed to the technical
realization from well-thought ideas.
I would like to thank students Frans van Erp, Harald Prins and Hilmy El-Sayed Awad Salama for
their contribution. Our gratitude goes to HMA Power Systems B.V. (Ridderkerk, The Netherlands)
for their courtesy in providing the conventional DC overhead-line breaker and Holec B.V. (Hengelo,
The Netherlands) for providing the capacitor bank.
Mr. Masttop (FOM) for lending fast thyristors. Discussions of device characteristics were very
useful with Mr. Wessels (GEC-Plessey), Mr. B. Tabak and Mr. W. van Dijk (ABB), Mr. K.
Bouwknegt (HITEC), Mr. K. Hartung (Calor-Emag), Mr. H. Meinarends (Hogeschool Rotterdam),
Mr. W. Kolkert (TNO), Mr. J. Hellinghuizer (Holland Railconsult) and Mr. H. Geitenbeek
(Semikron).
Furthermore, I like to thank all my colleagues and other people who made working at Eindhoven
University of Technology an enjoyable experience.
178
179
Biography
Ali Atmadji was born on April 19, 1968 in Semarang, Indonesia. In June 1987 he finished
secondary school in Makassar, Indonesia. In September 1989 he started studying Electrical
Engineering at Eindhoven University of Technology and in December 1995 received his M.Sc.degree on a Fault voltages and currents in low voltage networks with coupled neutral conductors.
From March 1996 to May 2000 he worked on a Ph.D. research project in the field of Hybrid
switching techniques at the Electrical Energy System Group (EVT), Department of Electrical
Engineering, Eindhoven University of Technology. During this project he attended several
conferences and published papers on this subject. This research project has led to this dissertation.
180
Statements
accompanying the dissertation

by
Ali Mahfudz Surya Atmadji

Eindhoven, 4 May 2000.
1.
A reverse diode parallel across the main breaker can provide arcless direct
current interruption in the hybrid switching technique.
(This thesis Chapter 2 and Chapter 7)
2.
Multi stage commutation circuits mitigate the direct current interruption

hardness, although they require more components.
(This thesis Chapter 3)
3.
There is nothing so useless as doing efficiently that which should not be done at
all. (Parts of Chapter 3 and Chapter 5 in this thesis)
4.
The zinc-oxide arrester is an effective means for overvoltage suppression,

energy absorption and residual current interruption.
(This thesis Chapter 7)
5.
Mixed marriage does not reduce ethnical conflicts since children from such a
marriage generally choose a certain ethnic group or they form a new minority
excluded from their parents ethnic groups.
6.
Obtaining a PhD degree harms the health, the social life and everything
concerning dreams of childhood.
7.
Lower flight fares increase the noise nuisance and do not contribute to a better
environment.
8.
The introduction of a democratic system in a country where a certain ethnic

group dominates the population, decreases the opportunity of a leader from a
non dominant ethnic group.
9.
As PC hardware and software become more complex, it is inevitable that once

their use will result in digitally chaos and work as unpredictable as the weather.
10. In order to limit the search results internet search engines should be obliged
using an intended choice button for excluding sex indexes.
11. ... it is more important to have beauty in ones equations than to have them fit
experiment. [Since further developments may clear up the discrepancy]
Paul Adrien Maurice Dirac, Scientific American, May 1963
12. For every complex problem there is a solution that is concise, clear, simple, and
wrong.
L.H. Mencken

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DIRECT CURRENT HYBRID BREAKERS:

A DESIGN AND ITS REALIZATION

Cover: The Hindu temple in Lake Bratan, Bali, Indonesia.

DIRECT CURRENT HYBRID BREAKERS:

Ali Mahfudz Surya Atmadji

Dit proefschrift is goedgekeurd door de promotoren:

prof. ir G.C. Damstra

CIP-DATA LIBRARY TECHNISCHE UNIVERSITEIT EINDHOVEN

1 Concepts of direct current limitation and interruption ........................

1.1 Introduction .............................................................................................................

2 Analysis of commutating circuits for hybrid breakers ..........................

2.1 Introduction ...............................................................................................................

3 Two-stage commutation circuits for direct current interrupters .........

3.1 Introduction ..............................................................................................................

3.4.2 The one-stage DC interruption of 10kA with Itrip=5kA ................................

4 Fault identification and direct current measurement ...........................

4.1 Introduction ..............................................................................................................

5 Fast electrodynamic drives for the hybrid breaker ...............................

5.1 Introduction ..............................................................................................................

6 Test circuit for DC breakers .....................................................................

6.1 Introduction ...............................................................................................................

7 Experimental and modelling results ........................................................

7.1 The air breaker experiment .......................................................................................

7.2.1 A brief description of the Integrated Gate Commutated Thyristor (IGCT) ..

8 General conclusions and future developments .......................................

8.1 General conclusions ..................................................................................................

List of symbols .................................................................................................

Inverse voltage method

Current commutation method

Figure 1. 1 Classification of DC interrupting methods; where PTC: Positive Temperature Coefficient,

Concepts of direct current limitation and interruption

1.2 Current limiting and interrupting techniques

1.2.1 Conventional direct current air breakers

Figure 1. 2 A typical DC system with a conventional breaker.

And the arcing energy is given by the relationship:

Concepts of direct current limitation and interruption

Current [A], Voltage [V]

Current [A], Voltage [V]

Current and voltage

Current and voltage

Case A with S=250V/ms

1.2.2 Current limiting fuses

Concepts of direct current limitation and interruption

Figure 1. 4 Schematic of the Pyrotechnique

1.2.4 Positive Temperature Coefficient Resistors (PTCR)

Spec. Resistivity [cm]

Figure 1. 5 Specific resistivity as a function of temperature TiB 2.

1.2.5 Superconducting Current Limiters (SCCL)

Concepts of direct current limitation and interruption

1.2.6 Solid-State Breakers (SSB)

Current maximum [A]

Figure 1. 7 Application ranges of power semiconductor devices

Voltage Limiting Element

Figure 1. 8 Schematic of the Solid-state breaker (SSB).

1.3 Hybrid switching techniques

Concepts of direct current limitation and interruption

Table 1. 3 Comparison of mechanical and semiconductor breakers.

metallic contact and arc

Voltage drop at rated current

less than 10mV

limited (sensitive for overvoltage)

limited by I2t value

limited by contact erosion

Frequent switching ability