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CAS 2014 - Regulation Theory

F. Bouvet
1

Regulation Theory

F. BOUVET
Power Converters 2014
7-14th May 2014, Baden, Switzerland
CAS 2014 - Regulation Theory

F. Bouvet
2
Introduction
Power converters:
Convert electric energy from one form to another that is optimally suited
for user loads
Regulation is an important part of the design and construction of
any power converter

Course objective:
Recall common continuous-time control techniques
Present digital control: Associated tools and more specifically the
Z-transform, concept of discrete-time model, main methods to
synthesize digital controllers, choice of the sampling frequency
This course does not aim to describe control theory in a systematic
and exhaustive way
It will be limited to the control of single-input single-output linear time-
invariant systems
Non-linear control theory will not be presented here


CAS 2014 - Regulation Theory

F. Bouvet
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Bibliography

K. Astrm ; B. Wittenmark, Computer Controlled Systems: Theory and
Design, Prentice Hall, Englewood Cliffs, 1984, 1990

E. Godoy ; E. Ostertag, Commande numrique des systmes,
Ellipses, Collection Technosup, Paris, 2003

P. De Larminat, Automatique: Commande des systmes linaires,
2me dition, Herms, Paris, 1996

A. Besanon-Voda ; S. Gentil, Rgulateurs PID analogiques et
numriques, Techniques de lIngnieur, R7416, Trait Informatique
industrielle, 1999

G. Alengrin, Mthodes de synthse de correcteurs numriques,
Techniques de lIngnieur, R7420, Trait Informatique industrielle, 1996

F. Bordry, Regulation theory: Review and digital regulation, CERN
Accelerator School and CLRC Daresbury Laboratory: Specialized CAS
Course on Power Converters, Warrington, UK, 2004, pp. 275-298

CAS 2014 - Regulation Theory

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Control theory

- Interdisciplinary branch of engineering and mathematics that deals with the behavior of
dynamical systems with inputs
- Usual objective: Provide the input(s) to a system to obtain the desired effect on its
output(s)






If the system is a single-input single-output linear and time-invariant system, then its
input and output are related by a differential equation with constant coefficients:
n = system order

= Time domain representation

Basic recalls
Perturbations
Y Uc U
System Calculator Actuator Transducer
Ymeas
u
dt
d
b u b y a y
dt
d
a
m
m
m
n
n
n
+ + = + +
0 0
n m
CAS 2014 - Regulation Theory

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Taking the Laplace transform of both sides and assuming zero initial conditions:


where s is the Laplace operator

=> H(s) = system transfer function

= Frequency domain representation

NB :
- poles = roots of the polynomial
zeros = roots of the polynomial

- Stability condition:
determined by the location of the poles of H(s)

- if H(s) behaves like for : = system class
K = H(0) = static gain

- System with delay:
u(t) => u(t t0) Reflects the fact that the input will act with a delay of t0
H(s) => H(s).e
-s.t0
= Laplace time shifting property
Basic recalls
U s b U b Y a Y s a
m
m
n
n
+ + = + +
0 0
) (
) (
) (
) (
) (
0
0
s H
s Den
s Num
s a
s b
s U
s Y
n
j
j
i
m
i
i
i
= =

=
=
Im(s)
Re(s)
STABLE
0 s

s K
) (s Num
) (s Den
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Why use feedback control ?

What if we design a controller that equals the plant inverse:
C = H
-1
(Feedforward correction)
Then in theory Y = U
Impossible in practice because of:
- Uncertainty or variation of the model parameters
- Random disturbances

A feedback correction is needed

Advantages:
- Guaranteed performance even with model uncertainties
- Reduced sensitivity to parameter variations
- Disturbance rejection
- Stabilization of unstable open-loop systems

Drawback (contrary to feedforward correction):
Reaction after the error has arisen Slowness

Basic recalls
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Typical control structure

= Combination of feedback and feedforward control









Closed control loop performance criteria:
- Static & dynamic behavior
- Stability & robustness

Translate into constraints on the frequency response of the compensated system
in open-loop (= Controller + Plant)

Basic recalls
) (s C ) (s H
Perturbations
Yref
Y

U
Controller
Plant
+
_
State variables
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Typical control structure for current-regulated power supplies

= Cascade structure: Nested connection of a fast inner voltage loop and a slower outer
current loop











- Fast inner voltage loop: Acts as an active filter to reject the output voltage ripple and the
output voltage fluctuations due to float of input mains + simplifies the design of the current
loop
- Outer current loop: Ensures the overall stability of the power supply + provides an
inherent over-voltage limitation
Basic recalls
) (s C
I
Iref
I
Current
controller
) (s C
V
Voltage
controller
+
-
V
Vref
Perturbations
Limiter
(input ac line variations, rectification harmonics,
temperature, load variations, noise, etc)
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Open-loop / Closed-loop transfer functions






Open-loop:

Open-loop bandwidth: Interval of pulsatances for which

Closed-loop:

Error vs. input & perturbation:



Analysis of closed-loop systems
) ( ) ( ) ( s s s
P Yref
+ =
) ( ) ( ) (
) (
) (
) ( s G s H s C
s
s Ymeas
s OL = =

) ( ) ( ) ( 1
) ( ) (
) (
) (
) (
s G s H s C
s H s C
s Yref
s Y
s CL
+

= =
) (s C ) (s H
Yref
Y
Controller Plant
+
_
) (s G

Transducer
Ymeas
P
perturbations
+
+
1 ) ( ) ( ) ( > jw G jw H jw C
) ( ) ( ) ( 1
) (
) (
) (
) ( ) ( ) ( 1
1
) (
) (
s G s H s C
s G
s P
s
s G s H s C s Yref
s
P
Yref
+
=
+
=

NB: Defining transfer functions in Matlab Function tf


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Precision of closed-loop systems

Static error

- Precision versus the input

Final value theorem:

=> To achieve zero steady-state error, we require
- at least 1 integrator (pole @ s =0) in the open-loop TF for a step input ( )
- at least 2 integrators in the open-loop TF for a ramp input ( )
-
- Sinusoidal input:

At steady state, is a harmonic signal which module is such that

=> if w
0
is inside the OL bandwidth:


Error amplitude inversely proportional to OL gain @ w
0

- Perturbation rejection



To reject disturbances of class N at least N integrators in

Analysis of closed-loop systems
) (
) ( ) ( ) ( 1
lim ) ( lim ) ( lim
0 0
s Yref
s G s H s C
s
s s t
s
Yref
s
Yref
t

+
= =


) (
) ( ) ( ) ( 1
) (
lim ) ( lim ) ( lim
0 0
s P
s G s H s C
s G s
s s t
s
P
s
P
t

+

= =


) ( ) ( s H s C
s K s Yref = ) (
2
) ( s K s Yref =
) sin(
0
t w K
0
) ( ) ( ) ( 1
1
jw s
Yref
s G s H s C K
=
+
=

Yref
Yref

0
) ( ) ( ) (
1
jw s
Yref
s G s H s C K
=

CAS 2014 - Regulation Theory



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Precision of closed-loop systems

Dynamic error





Pb: Limit to

Assumption: Velocity and acceleration of the input are limited
The input signal is then defined by the following constraints:

It can be demonstrated that






Analysis of closed-loop systems
max
d d
<
d

v
y
ref
(t)
y(t)
) (t
d

max
d

max
<
max
v v <
max max
max
max
2
max
) (
d v
j s
v
s OL

>
=

CAS 2014 - Regulation Theory



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Stability & robustness of closed-loop systems



Closed-loop stability



Phase Margin
M
:



where is such that

Gain margin G
M
:

where is such that


Typically:

Analysis of closed-loop systems
) ( ) ( ) ( 1
) ( ) (
) (
) (
) (
s G s H s C
s H s C
s Yref
s Y
s CL
+

= =
Real part of the closed-loop TF poles (= Roots of the
characteristic equation ) < 0 0 ) ( ) ( ) ( 1 = + s G s H s C
Im(s)
Re(s)
STABLE
s-plane stable pole location
| | OL Im
| | OL Re
cr
w w =
0
-1

M
w
0 w
w
1/G
M
( ) | |
cr
w j OL + = arg 180
M
( ) 1 =
cr
w j OL
cr
w
( )

w j OL
=
1
G
M

w
( ) | | = 180 arg

w j OL
dB 6 G , 60 30
M M
> < <
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Summary













Contradiction between precision and stability


Analysis of closed-loop systems
cr
w
Static errors
Dynamic errors
Speed
0
w
M

Stability
w
min
OL
1
2
Bandwidth
Open-loop TF
OL
Roll-off
Tradeoff
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Influence of the poles on the transient behavior














NB: Poles farther to the left Faster transient regime
=> The poles closest to the imaginary axis are the ones that tend to dominate the response
since their contribution takes a longer time to die out: Called dominant poles if the ratio of
their real part to the one of any other poles < typically 1/5
Enables to simplify the TF by keeping the dominant pole(s) (and the static gain unchanged)
14
Analysis of closed-loop systems
0 0.5 1
0
10
20
Impulse Response

0 0.5 1
0
5
10
Impulse Response

0 0.5 1
-20
0
20
Impulse Response

Contribution of real poles
) (s Im
) (s Re
0

0 0.5 1
0
0.5
1
1.5
Impulse Response

0 0.5 1
0
500
1000
1500
Impulse Response

0 0.5 1
0
1
2
3
Impulse Response

) (s Im
) (s Re

Contribution of complex poles



0 0.5 1
0
200
400
600
Impulse Response

p
0 0.5 1
-2000
0
2000
4000
Impulse Response







0
0 0.5 1
-40
-20
0
20
40
Impulse Response

0 0.5 1
0
5
10
Impulse Response

0 0.5 1
0
2000
4000
6000
8000
Impulse Response

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Particular case: 2nd order systems with complex conjugate poles

A common strategy for controller design consists to derive its parameters from a pole
placement such that the closed-loop behaves like a 1rst order or a 2nd order system
2
nd
order : The design specifications imply constraints on
the dominant poles => on the cut-off frequency
and the damping ratio of the TF








Analysis of closed-loop systems
2 2
2
2
) (
n n
n
des
w s w s
w
s CL
+ +
=

n
w
Rise time (10% 90%):
n r
w t ) 2 . 1 45 . 0 6 . 2 (
2
+
Settling time (to 1%):
n s
w t 6 . 4
Peak overshoot:
2
1
= e M
p
n s p r
w t M t , , ,
des
CL
1 1
, p p
0 0.5 1 1.5
0
0.2
0.4
0.6
0.8
1
1.2
1.4
Step Response
Time (sec)
A
m
p
lit
u
d
e
r
t
s
t
p
M
Step input response
-80
-60
-40
-20
0
M
a
g
n
it
u
d
e

(
d
B
)
0

Bode Diagram


10
-1
10
0
10
1
10
2
10
3


Frequency (rad/sec)
n
w
peak gain
- 40dB/dec
M
p
in %
M
in degrees
0,1 73 11
0,3 37 33
0,5 16 52
0,7 4,6 65
0,9 0,15 73
NB: For 2
nd
order systems, a good phase margin
guarantees a good gain margin
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Particular case: 2nd order systems

Influence of a zero
where z
0
_* and ( unit static gain)

The unit step response of the above TF can be written as:



=>

The additional zero makes the system faster and more oscillatory
= more prominent effect as z
0
decreases




Analysis of closed-loop systems
( ) ( )
1 1
0
) (
p s p s
z s
K s CL

+
=
0 1 1
z p p K =
Im
Re


10 =
n
w
1
p
1
p
7 . 0 =
0
z
( ) ( ) ( ) ( ) ( ) ( )
1 1 1 1
0
1 1
0
) (
p s p s s
s K
p s p s s
z K
p s p s
z s
s
K
s Y


+


=

+
=
) (
1
) ( ) (
2
0
2
t y
dt
d
z
t y t y
order order
nd nd
+ =
0 0.2 0.4 0.6 0.8 1
0
0.5
1
1.5
2
2.5
3


Step Response
Time (sec)
A
m
p
l
i
t
u
d
e
without zero
z0=10
z0=5
z0=2
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Controller design process:

1. Specification of the desired closed control loop performance => Tradeoff (cf. above)
= Linked to plant dynamics & power availability of the actuator
during transients (Prevent actuator saturation Loss of controllability)
2. Choice of the controller type and its design method
3. Modelling of the plant to be controlled => Transfer function, state-space equations

To get the plant dynamic model:
1. Use physic laws to derive the differential equations used to represent it mathematically
Power converters:
- Construct equivalent averaged circuit model
- Determine large-signal averaged model
- Perturb and linearize about quiescent operating point to obtain small-signal averaged model
- Simplify the transfer function (by keeping the dominant poles)

If hysteretic control is to be used rather than PWM: Model this non-linear element using the 1rst
order harmonic approximation method Complex equivalent gain

2. Other method: Given generic model structure, estimate parameters from experimental data
(= plant model identification)
Continuous-time controller synthesis
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Proportional-integral-derivative (PID) controller

- By far the most widely used control algorithm
- Involves only 3 separate constant parameters to tune the control loop
Simple and intuitive (many controllers do not even use derivative action = PI)
Well-suited for systems exhibiting dominant 1rst or 2
nd
order behavior, for which the desired
performance of the CL compared to the OL response of the is not too demanding
For systems with higher order dominant dynamics, or systems including high delay or several
oscillation modes, the PID is no longer adequate and a more complex regulator (with more
parameters) has to be used

PID algorithm: Controller TF standard form:




NB: Pure derivative amplifies noise => LP filter

Continuous-time controller synthesis
) ( ) ( ) ( ) (
0
t
dt
d
K t K t K t u
d
t
i p
+ + =

20 10
1
) (
.

+

+ + =
typ
p
d
d i
p PID
N
s
K N
K
s K
s
K
K s C
Effects of PID tuning on closed control loop
Param. change Rise time Overshoot Settling time Steady-state
error
System stability
Increase Kp Decrease Increase Small change Decrease Degrade
Increase Ki Decrease Increase Increase Eliminate Degrade
Increase Kd Small change Decrease Decrease No effect Improve if Kd
small
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PID synthesis methods

A number of alternative approaches for PID tuning are available:
- Heuristic PID tuning procedures: Ziegler-Nichols, Cohen-Coon,
- Graphical methods: Loop shaping, root locus,
- Pole placement
- Minimization of integral type criterion
-

Putting it into practice: Control of a Buck converter

Continuous-time controller synthesis
) (s C
I
Iref
Current
controller
) (s C
V
Voltage
controller
Vref

PWM
signal
PWM
V
I
Load
+
_
+
_
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Design of the voltage loop controller using the loop shaping method

Loop shaping is one of the primary methodologies used for designing classical controllers
such as PIDs => The controller structure and gains are selected such that the magnitude of
the frequency response of the OL TF has particular characteristics - or a particular shape
Continuous-time controller synthesis
0 0.2 0.4 0.6 0.8 1 1.2
x 10
-3
0
0.2
0.4
0.6
0.8
1
1.2
1.4
Step Response
Time (sec)
A
m
p
lit
u
d
e
Assume the following specs:
1/ Zero static error
2/ Dynamic precision:
|OL| > 40dB @ w0
3/ Bandwidth: {0, wc}
4/ M 60

A PI controller is first tried for
Cv(s) but it leads to
insufficient phase margin
A lead compensator is
then added to correct M
-60
-40
-20
0
20
40
60
80
M
a
g
n
i
t
u
d
e

(
d
B
)
10
0
10
1
10
2
10
3
10
4
10
5
-180
-135
-90
-45
0
45
90
P
h
a
s
e

(
d
e
g
)


Bode Diagram
Frequency (Hz)
system
OL with PI
OL with PID
PI
Lead compensator
w0 wc wc
M = 25
M = 75
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Design of the current loop controller using pole placement

Open current loop transfer function:

where

With a PI controller for Ci(s) and after simplification by keeping the dominant pole:



Setting (pole cancellation) the closed loop can be written as



Then choosing with , the CL behaves like a 1
st
order system with
a rise time equal to
This pole cancelation method requires a good knowledge of the process. If is likely to
vary ( ) and especially when the pole is close to the origin, the following pole
placement gives better results (Cf. next slide):

The CL then behaves like a 2
nd
order system which characteristic eq. =

Pb: This controller setting gives rise to a zero in the CL TF which affects the transient
response => Solution to cancel this zero = filter the reference
Continuous-time controller synthesis
s a
b
s CL s C s OL
V I I
+
=
1
0
1
) ( ) ( ) (
load load load
R L a R b = =
1 0
1
s a
b
s
k
k s OL
i
p I
+

|
.
|

\
|
+
1
0
1
1 ) (
1
1 a k
I
=
s b k a
s CL
p
I
+
=
) ( 1
1
) (
0 1
) (
0 1 n p
w b a k =
r n
t w = 2 . 2
r
t
0 1
) 1 2 ( b w a k
n p
= ) (
0
2
1
b k w a k
p n i
=
1 ) 2 (
2 2
+ + s w w s
n n

1
a
1
1 a
i
k
) (I f L
load
=
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Design of the current loop controller using pole placement

Solution to cancel the zero of the CL TF:





IP controller
Results after zero cancellation, for ,
(aperiodic behavior), and
Continuous-time controller synthesis
0 1 2 3 4 5
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1


Step Response
Time (sec)
A
m
p
l
i
t
u
d
e
pole cancelation method ; a1=a1
theor.
pole placement method ; a1=a1
theor.
pole cancelation method ; a1=0.5*a1
theor.
pole placement method ; a1=0.5*a1
theor.
( ) s k s k
i p
+
) (s H
Iref
Controller Plant
+
_
I
( )
i
k s / 1 1 +
Ref. filtering
s k
i
) (s H
Iref
Plant
+
_
I
p
k
+
_
1 =
r
t
2 1 1
1
= a
Integral windup issue:
When the output of the current or voltage controller
reaches its saturation value, the integral part of the
controller gets overcharged
At the end of the saturated mode of operation, a
negative error will be needed to remove the
accumulated positive error => generates an overshoot
A good solution to this pb (among others)
= Anti-windup algorithm
1 =
s k
i
) (s H
Iref
Plant
+
_
I
p
k
+
_
f
k
_
_
+
CAS 2014 - Regulation Theory

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Benefits and consequences of using digital control over analog

- Development of digital technology over the past 2 decades
=> Improvement in performance, cost and usability
- Increasing demands for higher performance
and monitoring capabilities

Benefits of using digital control:
- Performance enhancement, as digital control allows more complex regulation
schemes (Ex: Non linear, predictive, adaptive control strategies, )
- Improved flexibility
- Better reliability and reproducibility (no ageing effects, thermal drifts, )
- Better noise immunity
- Provides system monitoring and archiving capability
- More compact and lightweight
- Implementation of human-machine interface & external communication requires some
kind of embedded processor
-
One major issue: Time delays introduced to do computations of control algorithm in the
processor
Other drawbacks = Aliasing, quantization errors, limit cycling, software bugs,

NB: Interesting alternative = Mix of analog and digital
Digital Control
Growing use of
digital control in
power converters
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Z transform = Major mathematical tool for analysis in such topics as digital control
and digital signal processing

Reminder: The Laplace transform X(s) of a continuous-time causal signal x(t) is given by



Case of discrete-time causal signals:


{x(k)}, k: Sequence of sampled values (= 0 k<0)
Ts: Sampling period (assumed constant)
: Dirac delta function

=> The Laplace transform X*(s) of a discrete-time signal x*(t) is given by
(1)

Not a polynomial form
Introducing the Z-transform
dt e t x s X
st
=

+

0
) ( ) (

+
=
=
0
) ( ) ( ) ( *
k
Ts k t k x t x
Ts k t
t x k x
=
= ) ( ) (
w j s + =
Ts 2Ts 3Ts nTs
t
x*(t)
x(t)
0
1

+
=

=
0
) ( ) ( *
k
Ts k s
e k x s X
such that X(s) converges
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With the change of variable in eq. (1), we derive the following expression
= definition of the Z-transform:

z for which X(z) converges

=> Takes the form of a polynomial of the complex variable z


The Z-transform is the discrete-time counter-part of the Laplace transform
Essential tool for the analysis and design of discrete-time systems


Interpretation of the variable z
-1
From Laplace time shifting property, we know that is time delay by Ts second
Therefore corresponds to unit sample period delay

Introducing the Z-transform
Ts s
e z

=

+
=

=
0
) ( ) (
k
k
z k x z X
Ts s
e

Ts s
e z

=
1
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Properties of Z-transforms

- Linearity


- Shifting property


- Convolution


- Multiply by k property


- Final value
Introducing the Z-transform
| | ) ( ) ( ) ( ) ( z Y z X k y k x + = +
| | ) ( ) ( z X z n k x
n
=

| | ) ( ) ( ) ( ) ( ) ( ) ( z Y z X n k y n x k y k x
n
n
=
(

=

+ =
=
| | ( ) ) ( ) ( z X
dz
d
z k x k =
) ( ) 1 ( lim ) ( lim
1
z X z k x
z k
=

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27
Examples of Z-transforms

- Discrete impulse





- Discrete step






- Discrete ramp

Introducing the Z-transform

=
= =
0 0
0 1
) ( ) (
k
k
k k x
) 0 ( ... ) 2 ( ) 1 ( ) 0 ( ) ( ) (
0
2 1
x z x z x x z k x z X
k
k
= + + + = =

=

1 ) ( = z X
*
* * * * *
1
k
1
1
1
) (
1
>

=

z
z
z X
* * * *
* *
1
k

<

=
0 0
0 1
) (
k
k
k x
... 1 ... ) 2 ( ) 1 ( ) 0 ( ) (
2 1 2 1
+ + + = + + + =

z z z x z x x z X
*
*
*
*
* *
k

<

=
0 0
0
) (
k
k k
k x
|
.
|

\
|

=
1
1
1
) (
z
dz
d
z z X
( )
1
1
) (
2
1
1
>

z
z
z
z X
CAS 2014 - Regulation Theory

F. Bouvet
28
Z-transform Table

Introducing the Z-transform
CAS 2014 - Regulation Theory

F. Bouvet
29
X(s) X(z) ?

Case of signals having only simple poles



By sampling x(t), we obtain the following discrete sequence


From line 5 of the Z-transform table:


(2)



=> A pole in X(s) yields a pole in X(z)

Relation between Laplace and Z-transforms

=

=
N
i i
i
s s
A
s X
1
) ( 0 ) (
1
=

=

t e A t x
N
i
t s
i
i
0 ) (
1
=

=

k e A k x
N
i
Ts k s
i
i


=
N
i
Ts si
i
e z
z A
z X
1
) (
Ts s
i i
i
e z s

=
i
s
Ts s
i
i
e z

=

=

=

=

=
N
i
Ts si
i
N
i i
i
z e
A
z X
s s
A
s X
1
1
1
1
) ( ) (
CAS 2014 - Regulation Theory

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30
Relation between Laplace and Z-transforms
General case

(3)



Calculation of the residue at the pole of multiplicity m:




For a simple pole (m = 1):




An example of calculation will be given further on in this document
(

=
)
`

=
1 1
1
1
- 1
1
X(s) ) ( lim
)! 1 (
1
1
1
) ( Residue
z e
s s
ds
d
m
z e
s X
Ts s
m
j
m
m
s s
s s
Ts s
j
j
1 1
- 1
1
X(s) ) ( lim
1
1
) ( Residue

=


=
)
`

z e
s s
z e
s X
Ts s
j
s s
s s
Ts s
j
j
j
s

=
=

)
`


=
) (
1
1
1
) ( ) ( Residues
s X of poles s
s s
Ts s
i
i
z e
s X z X
CAS 2014 - Regulation Theory

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31
Relation between Laplace and Z-transforms
Mapping from s-plane to z-plane

Since we can map the s-plane to the z-plane as below:













NB: 2 poles in the s-plane which imaginary part differ by map to the same pole in the z-plane
Bijective mapping between both planes =>
Ts w j Ts Ts s
i
i i i
e e e z

= =

( ) | | Ts Ts s X Im + ; ) (
{ } ) ( max
i
i
s Im
Ts
>




s
Ts
2
2
w
1
w
1
w
Ts
Ts
Ts 3
Ts 3
z
2 1
; w w
1
w
jw

Im(z)
Re(z)
1
1

1
0 = w
0 =
2
=
1
=
Ts 2
CAS 2014 - Regulation Theory

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32
Mapping from s-plane to z-plane












Legend:
Relation between Laplace and Z-transforms
jw s =
0 = s
0 = s

=
=
varies w Constant,
1
n
2

n n
jw w s
Ts j s =
1 = z
1 , = r r z
spiral c Logarithmi
r z =
1 0 , = r r z
s
jw

Ts
Ts
2 = wTs
z
Im(z)
Re(z)
0 = wTs
2 = wTs
= wTs
CAS 2014 - Regulation Theory

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33
Modelling of the plant to be controlled









Model of the DAC = Zero-order hold (ZOH)
Converts u(k) to u(t) by holding each sample value for one sample interval


The Laplace transform transfer function of the ZOH is




If H(s) has poles , then H(z) has poles . But the zeros are unrelated
Digitally controlled continuous-time systems
Ts k t Ts k k u t u + = ) 1 ( ), ( ) (
( )
(

=

s
s H
z z H
) (
1 ) (
1
s
e
s H
Ts s
ZOH

=
1
) (
i
s s =
Ts s
i
e z

=
) (z C ) (s H
Perturbations
Ts Ts
) (k Yref ) (k y ) (k ) (k u ) (t u
) (z H
DAC ADC
Digital
Controller
Discretised Plant
Plant
+
_
=> Delay introduced by the ZOH = Ts/2
CAS 2014 - Regulation Theory

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34
Calculation of :

- Partial fraction decomposition + use z-transform table

- If has only simple poles, use Eq. (2):



- Use Eq. (3):


- Ask Matlab: Function c2d

Syntax
sysd = c2d(sys,Ts)

Description
sysd = c2d(sys,Ts) discretizes the continuous-time LTI model sys using zero-order hold on the
inputs and a sample time of Ts seconds.
Digitally controlled continuous-time systems
(

s
s H ) (

)
`

=

=
=
s s H of poles s
Ts s
s s i
i
z e s
H(s)
z H
) (
1
1
1
Residues ) (
s
s H ) (

=

=

+

+ =
N
i
Ts si
i 1
N
i i
i 1
z e
A
z
A
z X
s s
A
s
A
s
s H
2
1 1
2
1 1
) (
) (
) (z H
CAS 2014 - Regulation Theory

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35
Let

Open-loop transfer function:

Closed-loop transfer function:


Controller algorithm:
Transfer function of the digital controller




Hence


= Difference equation, where present output is dependent on present input and past
inputs and outputs
Digitally controlled continuous-time systems
n
n
p
p
z a z a
z b z b b
z E
z U
z C


+ + +
+ + +
= =
... 1
...
) (
) (
) (
1
1
1
1 0
( ) ( ) ) ( ... ) ( ... 1
1
1 0
1
1
z E z b z b b z U z a z a
p
p
n
n
+ + + = + + +

) ( ... ) 1 ( ) ( ) ( ... ) 1 ( ) (
1 0 1
p k b k b k b n k u a k u a k u
p n
+ + + = + + +
) ( ... ) 1 ( ) ( ... ) 1 ( ) ( ) (
1 1 0
n k u a k u a p k b k b k b k u
n p
+ + + =
) ( ) (
) (
) (
z H z C
z E
z Y
=
| | | | | | | | ) ( ) ( ; ) ( ) ( ; ) ( ) ( ; ) ( ) ( k u z U k z E k Yref z Yref k y z Y = = = =
) ( ) ( 1
) ( ) (
) (
) (
z H z C
z H z C
z Yref
z Y
+

=
| | ( ) ) ( ) ( z X z n k x
n
=

CAS 2014 - Regulation Theory

F. Bouvet
36
Example:
Half bridge PWM converter












H(z) ?

Digitally controlled continuous-time systems
Update of PWM signal duty
cycle resulting from m(k)
Sampling
PWM clock
Output m(k)
ADC + Computation
time delay
Control delay = tc
kTs (k+1)Ts
t
Controller output =
modulation index (-1 < m < 1)
) (z C
Ts
) (k ref i
L
) (k i
L
) (k ) (k m
ADC
Digital
Controller
) (t i meas
L
PWM
signals
L
i
Load
i
2 Vdc
L
C
2 Vdc
+
_
PWM
CAS 2014 - Regulation Theory

F. Bouvet
37
Modelling of the PWM converter

The PWM can be modelled by a DAC







with

Using Eq. (3), with a double pole:
Digitally controlled continuous-time systems
( ) ( ) ( )
(

=
(

=
(

=




2
1
2
1 1
2
1
2
1
) (
1 ) (
s
e
L
Vdc
z z
s
e
L
Vdc
z
s
s H
z z H
s
n
s tc
Ts
) (k i
L
) (t m
ADC
Ts
DAC
) (k m
2
Vdc
Ls
1 ) (t i
L
) (t i
Load
+
_
_
+
s tc
e

Cs
1
( )
( )
2
1
1 1
1
0
1 2
2
1 2
1 2
0
2
1
1
- 1
1
lim
- 1
1
) 0 ( lim
)! 1 2 (
1

+
=
(

=
(

=
(

z
z Ts z
z e
e
ds
d
z e s
e
s
ds
d
s
e
Ts s
s
s
Ts s
s
s
s


Ts
Ts n tc
<
=


0
In this example and 1 = n 0 =
1
2
1
2
) (

=
z
z
L
Ts Vdc
z H
s L
Vdc
s m
s I
s H
L

= =
1
2 ) (
) (
) (
CAS 2014 - Regulation Theory

F. Bouvet
38
System behavior & stability
= determined by the roots of the closed-loop TF polynomials

Stability of digital closed-loops





Mapping s-plane to z-plane





Closed-loop stability

z-plane stable pole location
Analysis of digital closed-loops
Im(z)
Re(z)
Unit
Circle
STABLE
) ( ) ( 1
) ( ) (
) (
) (
) (
z H z C
z H z C
z Yref
z Y
z CL
+

= =
Closed-loop transfer function:
Modulus of the closed-loop TF poles (= Roots of
the characteristic equation ) < 1 0 ) ( ) ( 1 = + z H z C
) (z C ) (z H
) (z Yref ) (z Y
Digital
Controller
Discretised
Plant
+
_
CAS 2014 - Regulation Theory

F. Bouvet
39
Robustness

Open-loop transfer function:


Phase margin
M
:

where is such that



Gain margin G
M
:

where is such that



Analysis of digital closed-loops
) ( ) ( ) ( z H z C z OL =
| | ) ( arg 180
M
Ts w j
cr
e OL

+ =
1 ) ( =
Ts w j
cr
e OL
cr
w
) (
1
G
M
Ts w j
e OL

=

w
| | =

180 ) ( arg
Ts w j
e OL

Ts w Ts
| | OL Im
| | OL Re
1
cr
w w =
0
-1
1/G
M

M
w
NB: Matlab plots & margins Functions nyquist , bode , margin
CAS 2014 - Regulation Theory

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40
Influence of the poles on the transient behavior

Illustration with the step response analysis of a system CL(z) having only simple poles:




- Steady-state:


- Contribution of real poles

Sum of
exponential terms

- Contribution of complex conjugate poles

Oscillating
regime

Analysis of digital closed-loops
( )

= =
+ + + =
m
poles
conjugate
complex
j
j j
k
j j
n
poles
real
i
k
i i
k z c z c CL k y
1 1
cos ) 1 ( ) (
) 1 ( ) ( lim CL k y
k
=

>
<


1
1 0
i
k
i
k
z if
z if
i
z

>
<


1
1 0
j
k
j
k
z if
z if
j
z
=> Damped oscillations
=> Undamped oscillations
CAS 2014 - Regulation Theory

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41
Influence of the poles on the transient behavior
















NB: Poles closer to origin Faster transient regime
Analysis of digital closed-loops
Contribution of real poles
) (z Im
) (z Re
1
1



Contribution of complex poles



) (z Im
) (z Re
1
1



CAS 2014 - Regulation Theory

F. Bouvet
42
Particular case: 2nd order systems
As seen previously, a common controller design method consists to derive the controller
parameters from a pole placement such that the dominant closed-loop dynamics is of
second order

Reminder: Continuous-time theory
The design specifications imply
constraints on the cut-off frequency
and the damping ratio

Discrete closed-loops:
Pole mapping from s-plane to z-plane:








Analysis of digital closed-loops
( ) ) ( 2 ) (
2 2
s P w s w s s Den
aux n n CL
des
+ + =
( )
|
.
|

\
|

= =
2
1
1
2
1
1


j Ts w
n
n
e z j w s
n
w

s
Im
Re


n
w
1
s
1
s
2
1
n
w j
2
1
n
w j
z
Im
Re


2
1 = Ts w
n
Ts s
e z

=
1
1
1
z
Ts w
n
e

Rise time (10% 90%):
Settling time (to 1%):
Peak overshoot:
1 1
, , , z z w M t
n p r

s s
t Ts t Ts
n s
e z
w t
01 . 0
6 . 4
6 . 4
1
<
=

=> condition for Ts


n s
w t 6 . 4
2
1
= e M
p
n r
w t ) 2 . 1 45 . 0 6 . 2 (
2
+
Dominant poles Auxiliary poles, faster
CAS 2014 - Regulation Theory

F. Bouvet
43
Particular case: 2nd order systems

Influence of a zero

where z
0
and
( unit static gain)










- Increasing overshoot when the zero is moving towards +1 Take care
- The reference tracking performance can be improved by designing appropriate zeros in
the closed-loop transfer function
Analysis of digital closed-loops
( ) ( )
0 0
0
) (
p z p z
z z
K z CL


=
( ) ( ) ( )
0 0 0
1 1 1 z p p K =
Im
Re


= 25
0
p
0
p
7 . 0 =
0
z
Discrete step response
0 5 10 15 20
0
0.5
1
1.5
k
y
(
k
)


z0=0
z0=0.3
z0=0.5
z0=0.7
CAS 2014 - Regulation Theory

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44
Precision of digital closed-loops








Same conclusions as for continuous-time closed-loops

- Precision versus the input
To achieve zero steady-state error, we require
at least 1 integrator (pole @ z =1) in the open-loop TF for a step input
at least 2 integrators in the open-loop TF for a ramp input


- Perturbation rejection
To reject disturbances of class N at least N integrators in
Analysis of digital closed-loops
) ( ) ( z H z C
) ( ) ( z H z C
) (z C ) (s H
Perturbations
Ts Ts
) (k Yref ) (k y ) (k ) (k u ) (t u
) (z H
DAC ADC
Digital
Controller
Plant
) (t P
+
_
+
+
CAS 2014 - Regulation Theory

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45
2 main ways to synthesize discrete-time controllers:


1. Emulation design






2. Direct discrete-time design


Discrete-time controller synthesis
Continuous-
time design
Digital
implemen-
tation
Controller
discretization
Plant
discretization
Digital
implemen-
tation
Controller
design
CAS 2014 - Regulation Theory

F. Bouvet
46
Emulation design

1rst step: Continuous-time controller design. At this stage the sampling is ignored. But the
control + ZOH delays & anti-aliasing filter should preferably be taken into account
( preserve phase margin)
2nd step: Discretization of the continuous-time controller (Followed by simulations to check
Methods: performances)
- Approximate , i.e.
- Pole-zero matching
3rd step: Derivation of the controller algorithm (difference equation)

Approximation methods:

- Euler

- Tustins or bilinear approximation

Example: Discretization of a PI controller using Tustins approximation
Discrete-time controller synthesis
) ( ) ( z C s C s
( )
1
1
1

z
Ts
s
1
1
1
1 2


z
z
Ts
s
|
.
|

\
|

+ =
s Ti
Kp s C
1
1 ) (
( )
|
|
.
|

\
|

+ + +
= =

1
1
1
1 2
1
) 2 ( 1 ) 2 ( 1
) ( ) (
1
1
z
z Ti Ts Ti Ts
Kp Kc s C Kc z C
z
z
Ts
s
( ) Ts Kc s C s z C z
s z
1 ) ( lim ) ( 1 lim
0 1
= =

Matlab: sysd = c2d(sys,Ts,tustin)
CAS 2014 - Regulation Theory

F. Bouvet
47
Comparison between Euler and Tustins approx.

- Stability
= preserved








- Mapping of the poles
Euler: =>
Tustin:
=>

To be compared to poles
Discrete-time controller synthesis
| | 0 < s Re
Half-
plane
Im(z)
Re(z)
1
Im(z)
Re(z)
1
Euler Tustin
An unstable continuous-time
system can be mapped to a
stable discrete system
Perfect correspondence
( ) ( ) z Ts Ts s z s s 1 1
0 0
( ) ( ) ( ) ... 1 1 1
3
0
2
0 0 0 0
+ + + + = = Ts s Ts s Ts s Ts s z
( ) ( ) ( ) ( ) 1 2 2
0 0 0
+ + z Ts Ts s Ts s z s s
( ) ( ) ( ) ( ) ( ) ...
4
1
2
1
1 2 / 1 2 / 1
3
0
2
0 0 0 0 0
+ + + + = + = Ts s Ts s Ts s Ts s Ts s z
( ) ( ) ( ) ...
6
1
2
1
1
3
0
2
0 0 0
0
+ + + + = =

Ts s Ts s Ts s e z
Ts s
CAS 2014 - Regulation Theory

F. Bouvet
48
Comparison between Euler and Tustins approx.

- Pole and zero locations not preserved Frequency response is changed
- Increasing the sampling frequency Smaller approximation errors

Example 1: TF with resonance @ w
0
= 1rad/s



Discrete-time controller synthesis
-50
0
50
100
150
M
a
g
n
i
t
u
d
e

(
d
B
)


10
0
-90
0
90
P
h
a
s
e

(
d
e
g
)
Bode Diagram
Frequency (rad/sec)
continuous
euler
tustin
-50
0
50
100
150
M
a
g
n
i
t
u
d
e

(
d
B
)


10
0
-90
-45
0
45
90
P
h
a
s
e

(
d
e
g
)
Bode Diagram
Frequency (rad/sec)
continuous
euler
tustin
2
1
) (
s
s
s C
+
=
Ts = 0.6 Ts = 0.06
=> Better result with Tustin
CAS 2014 - Regulation Theory

F. Bouvet
49
Comparison between Euler and Tustins approx.

Example 2: Ideal derivative










Other discretization method = Matched transform
Discrete-time controller synthesis
0
10
20
30
40
M
a
g
n
i
t
u
d
e

(
d
B
)


10
0
10
1
0
45
90
P
h
a
s
e

(
d
e
g
)
Bode Diagram
Frequency (rad/sec)
ideal derivative
euler
tustin
Euler: Filtering effect @ high frequencies

Tustin:
Magnitude when w /Ts
Noise amplification @ high frequencies
=> Euler more appropriate for discretization of
high-pass filters

=> Tustin more appropriate for discretization of
low-pass filters

=
j
Ts
j
Ts r
j
j
j
j
j
j
e z
e z
Kc z C
s
r s
K s C
) (
) (
) (
) (
) (
) (

Kc is set so to obtain
the same static gain
No frequency distortion => Well-adapted for the discretization of transfer functions including
resonances (ex: notch filter, )
Matlab:
sysd = c2d(sys,Ts,matched)
CAS 2014 - Regulation Theory

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50
Direct discrete-time design

- A system controlled using an emulation controller always suffer the degradation of
performance compared with its continuous-time counter-part
- To reduce the degree of degradation, very fast sampling can be needed, as
{ADC Digital controller DAC} should behave the same as the analogue controller
(generally PID type = very simple control algorithm)
Bad use of the potentialities of the digital controller


In this case, direct discrete-time design offers an alternative solution, since in this design
the sampling is considered from the beginning of the design process

1
st
step: Discretization of the continuous-time plant
2
rd
step: Choice of controller type and synthesis methodology
3
rd
step: Derivation of the controller algorithm (difference equation)

Discrete-time controller synthesis
CAS 2014 - Regulation Theory

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51
Choice of the sampling period
- Ts too small => Fast and expensive control hardware
=> Numerical issues: Recall the relation between poles in s-domain
and z-domain: => For we have
Makes trouble when working in finite precision
=> Plant discretization may give birth to poles having negative real part: Not
desirable as the step response caused by such poles cycles back and forth
between positive and negative deviations from the steady-state value
To prevent this: =>
=> Systems with time delays that are not multiples of the sampling period:
Plant discretization may bring about unstable zeros
Limitation on the possible method to compute the regulator
=> If the sampling frequency of the outer current loop is small enough in
comparison with the inner voltage loop bandwidth: No need to include the
digital model of the voltage source Lower order controller, less complexity
- Ts too large => Loss of information (violation of the sampling theorem)
=> Regulation may not react enough readily to disturbances affecting the
Rule of thumb:
Choice of Ts based on the closed-loop bandwidth

Discrete-time controller synthesis
Ts s
i
i
e z

= 0 Ts
i i
z z 1
| | 0 Re >
i
z | |
i
s Ts Im 2 1 >
B
CL
F to
Ts
= ) 25 6 (
1
B
CL
F
CAS 2014 - Regulation Theory

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52
RST controller structure
Digital control Enables implementation of new controller structures
A generic structure = RST







R, S and T are 3 polynomials to be determined (usually by pole placement)
The control signal is calculated as

=> Combination of Feedforward and Feedback that can be tuned separately
General approach with RST: Decouple the regulation pb from the tracking pb


Discrete-time controller synthesis
) (
1
1
z S
) (
) (
1
1

z A
z B
Yref
Y
Plant
+
_
) (
1
z R

P
perturbations
+
+
) (
1
z T
U
) (
) (
) (
) (
) (
) (
) (
1
1
1
1
z Y
z S
z R
z Yref
z S
z T
z U =

Regulation
Tracking
Polynomials
R and S
Polynomial T
CAS 2014 - Regulation Theory

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53
RST controller structure

Closed-loop system equation:

Synthesis of the RST control law (among other possible strategies):
1
st
step: Choose arbitrarily a desired closed-loop transfer function or model

2
nd
step: The order of the closed-loop system is generally > order of the model
=> Interesting to cancel poles and zeros of the plant TF:
=>
=>
: non-compensable poles = unstable & poorly damped poles + poles with
negative real part
: non-compensable zeros = unstable & poorly damped zeros + plant pure
delay (d 1) + zeros having negative real part
Cannot be a factor of (=> CL unstable), thus:
3
rd
step: Perturbation rejection in steady-state
The controller must contain the classes of perturbation => Introduce an appropriate nb of
integral terms into the loop by means of the S polynomial
: perturbation class : plant class
Discrete-time controller synthesis
P
R B S A
S A
Yref
R B S A
T B
Y
+

+
+

=
) ( ) ( ) (
1 1 1
= z A z B z CL
m m des
) ( ) ( ) (
1 1 1 +
= z B z B z B
) ( ) ( ) (
1 1 1 +
= z A z A z A
) (
1
z A
) (
1
z B
d
z

n l
) ( ) ( ) (
1
1
1 1 +
= z R z A z R
) ( ) ( ) (
1
1
1 1 +
= z S z B z S
R B S A +
1
m m
B B B =

) ( ) 1 ( ) (
1
2
1 1
1

= z S z z S
l n
CAS 2014 - Regulation Theory

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54
RST controller structure

Synthesis of the RST control law (contd)
4
th
step: Compute R and S = Solve the following Diophantine equation such that the poles
of the CL regulated system are in the required position


5
th
step: Compute T


NB: To ensure unity gain to the CL TF, we must have

Particular case: System with stable zeros (apart from the pure delay systematically
present = consequence of the ZOH) =>
Then the tracking TF is

Choosing , thus

=> NB: Requires an accurate modelling of the system Identification may
be necessary. Moreover, if the parameters are likely to vary (ex:
magnet saturation ), adaptive control may be required
Discrete-time controller synthesis
) ( ) ( ) ( ) ( ) 1 ( ) (
1 1
1
1 1
2
1 1
= + z A z R z B z S z z A
m
l n
) ( ) ( ) (
1 1 1
1
+
= z B z A z T
m
1
= z B
m
m
m
m
m
A
B
A
B z
R A B z S B A A
B A B z
R B S A
T B
Yref
Y
=

=
+

=
+

=

+ + + +
+ +
1
1
1
1
1
1
1
) ( ) ( ) (
1 1 1 +
= z A z A z T
m
1
= z
Yref
Y
) 1 ( ) 1 ( R T =
) ( ) (
1 1
1

= z A z B
m m
1
z
) (I f L
load
=
CAS 2014 - Regulation Theory

F. Bouvet
55
RST controller structure

Synthesis of the RST control law (contd)

Choice of
Degree( ) degree of the first member of the Diophantine eq.
If CL desired behavior = 2
nd
order :


where


PID = Special case of RST controller



IP controller


Polynomial T = simple gain chosen to ensure unity gain to the closed-loop TF
Discrete-time controller synthesis
m
A
m
A
) ( ) 1 ( ) 1 ( ) (
1 1
_
1
1
1
1
= z P z z z z z A
aux m
2
1
_
1 1
,

=
Ts w j Ts w
n n
e e z z
= dominant poles
) (
1
z P
aux
contains the {degree( ) 2} remaining poles ,
chosen for example such that (=> fast transient
response as compared to the one due to )
_
1 1
, z z
i
z
1 . 0
i
z
2
2
1
1 0
1 1
) ( ) (

+ + = = z r z r r z R z Num
PID
) 1 ( ) 1 ( ) ( ) (
1
1
1 1 1
+ = = z s z z S z Den
PID
) ( ) (
1 1
= z R z T
1
1 0
1 1
) ( ) (

+ = = z r r z R z Num
PI
1 1 1
1 ) ( ) (

= = z z S z Den
PI
1 0
1
) 1 ( ) ( r r R z T + = =

m
A
CAS 2014 - Regulation Theory

F. Bouvet
56
RST controller structure
Example: Design a RST for the current loop of the previously presented Buck converter
System model:



Assume 1/Ts << voltage CL bandwidth, Ts << 1/a, tc << Ts

=>

Diophantine equation:


=>

Choice for T:
- If no tracking requirement:
=> No undesirable zero in the CL TF = no overshoot
- Fast tracking required:
Discrete-time controller synthesis
Ts a
a Ts a a
load
n
V
e z
e z e e
R
z
z CL
z A
z B


+
=
1
1
1
1
1
1
1 ) (
) (
) (
) (

) (
1
z CL
V
= Ts n tc
load load
L R a =
= Voltage
closed-loop TF
= Control
load
L
Ts
b
z
z b
z A
z B
=

0
1
1
0
1
1
1 ) (
) (
Analog signals often sampled @ a rate > 1/Ts:
If cut-off freq. of anti-aliasing filter >> ,
no need to take it into account in the model
) 1 ( ) 1 ( ) ( ) 1 (
1
_
1
1
1
1
1 0
1
0
2 1
= + + z z z z z r r z b z
0
_
1 1
1
0
_
1 1
0
1 ) ( 2
b
z z
r
b
z z
r

=
+
=
Bode Diagram
Frequency (Hz)
-50
0
50
100
System: sysbo
Gain Margin (dB): 11.9
At f requency (Hz): 12
Closed Loop Stable? Yes
M
a
g
n
it
u
d
e

(
d
B
)
10
-3
10
-2
10
-1
10
0
10
1
10
2
-720
-540
-360
-180
0
System: sysbo
Phase Margin (deg): 54.4
Delay Margin (samples): 6.09
At f requency (Hz): 3.1
Closed Loop Stable? Yes
P
h
a
s
e

(
d
e
g
)
1 0
1
) ( r r z T + =

0
1
_
1
1
1
1
/ ) 1 ( ) 1 ( ) ( b z z z z z T

=
B
CL
F
delay
OL TF =
S A
R B

CAS 2014 - Regulation Theory



F. Bouvet
57
Questions
A lot more But time is over

Thank you for your attention

Questions?

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