Sata Compliance

An ISO/IEC 17025
Qualified Test Laboratory

www.allion.com
2009 Allion Test Labs, Inc. All Rights Reserved
SATA Compliance Test I ntroduction
2009/06/16 @ Allion
2
Agenda
Q&A 4:00~4:20
SATA SSD Testing (Richard Shen) 3:40~4:00
SATA Certified Logo Process (Jina Chen) 3:20~3:40
Break 3:00~3:20
SATA UTD V1.4 Information (Robert Liu) 2:45~3:00
SATA Certified Logo V1.3 Update (Robert Liu) 2:30~2:45
SATA Compliance Test Introduction (Sam Chen) 2:00~2:30
Agenda Time
An ISO/IEC 17025
www.allion.com
SATA Compliance I ntroduction
Sam Chen
4
Agenda
Basic Introduction
Building Block List
Test Coverage in Compliance
5
Basic I ntroduction
Serial ATA 3.0 Serial ATA
2.5/2.6
Serial ATA 2.5 Reference Spec. Version
Compatible with
Gen1 and Gen2
Compatible
with Gen1
Gen1 signal Compatibility
6.0Gb/s 3.0Gb/s 1.5Gb/s Signal Speed
3 2 1 Generation
UTD ! Unified Test Document
" Current UTD v1.3
UTD 1.4 is under development
MOI ! Method of Implementation
ECN ! Engineering Change Notice
6
Basic I ntroduction
Device
" hard disk drive, half-height ATAPI device, or slimline ATAPI device
Digital/Protocol
PHY/Electrical
Device Mechanical
System Interoperability
" Except 1.8 Inch micro-SATA Drive
Host
" HBA, chipset, add-in controller
Digital/Protocol
PHY/Electrical
Interoperability
Building Block (member only)
" Silicon SolutionIP Silicon Solution
7
Building Block
" Only for Silicon SolutionIP Silicon Solution Vendor
" Partial Test is acceptable.
" Also can do the submission
" The test requirement is the same with complete end products.
Tested Area:
" Phy Electrical (PHY/TSG/OOB)
" Electrical Path (RX/TX)
" Receiver Jitter Test (RSG)
" Digital/Protocol (GTR, SSP, ASR, IPM, NCQ)
" Mechanical (MDI, MDP)
" System Interoperability
Building Block List
8
Building Block List
9
SATA Compliance Overview
PHY/Electrical :
PHY, TX, RX, TSG, OOB and RSG
Digital/Protocol :
GTR, NCQ, ASR, SSP and IPM
Device Mechanical :
MDI, MDP
10
PHY/Electrical :
Digital/Protocol :
Device Mechanical :
MDI, MDP
11
Test Concept (1)
Test Concept
" Generate specific signal (Test Pattern) for testing
How to generate test pattern?
" ULink DriveMaster 2008
Quick to issue BIST (FIS Type 58) command
BIST T+A+S
BIST L
Easy to switch between Gen1 and Gen2 mode
" Generator feature of protocol analyzer
Same concept with Driver Master
" Vendor Specified Method
Provide special tool, registry, associate with other device#
12
Test Concept (2)
0011 0110 1111 0100 0010
0011 0110 1111 0100 0011
D12.0 D11.4
D12.0 D11.3
0x0C8B0C6B
LBP ECN18 (Lone Bit Pattern)
0111100011 1000011100 D30.2 D30.2 E 7E
LFTP (Low Frequency Test
Pattern)
1100110011 0011001100 D24.3 D24.3 78 78
MFTP (Mid Frequency Test
Pattern)
0101010101 0101010101 D10.2D 10.2 4A 4A
HFTP (High Frequency Test
Pattern)
PHY Layer
8B/10B
Encode
HEX before
Decode
13
PHY / TSG
PHY ! Phy General Requirements
" Unit Interval
" Frequency Long Term Stability
" Spread-Spectrum Modulation Frequency
" Spread-Spectrum Modulation Deviation
TSG ! Transmit Signal Requirements
" Differential Output Voltage
" Rise/Fall Time
" Differential Skew
" AC Common Mode Voltage (Gen 2 product only)
" Rise/Fall Imbalance (Gen 2 product only)
" Amplitude Imbalance (Gen 2 product only)
" Total Jitter / Deterministic Jitter
14
OOB (1)
OOB ! Out-of-Band Signaling
" COMRESET/COMINIT
" COMWAKE
15
OOB (2)
T1 : 160UI=106.7ns nominal
T2 : 480UI=320ns nominal
16
RSG
RSG ! Receiver Signal Requirements
" Receiver Jitter Test
" No more than zero frame errors for all four frequencies below.
5MHz
10MHz
33MHz
62MHz
17
TX / RX
TX / RX ! Transmit / Receiver Requirements
" Pair Differential Impedance (Gen 1 product only)
" Single-Ended Impedance (Informative)
" Differential Mode Return Loss
" Common Mode Return Loss (Gen 2 product only)
" Impedance Balance (Gen 2 product only)
18
PHY/Electrical :
Digital/Protocol :
Device Mechanical :
MDI, MDP
19
GTR
GTR - General Test Requirements
" All Serial ATA devices shall meet the test requirement within this
section to confirm Serial ATA interoperability.
Software Reset
3GB/s Backwards Compatibility
DMA Protocol Support
General SATA Support
Unrecognized FIS receipt
20
NCQ
NCQ - Native Command Queuing
" The Native Command Queuing (NCQ) test requirements are
determined by the requirements of the feature as defined in Serial
ATA Revision 2.6.
" Only for Hard Disk Drive
21
ASR
ASR - Asynchronous Signal Recovery
COMINIT response interval
COMINIT OOB interval
22
SSP
SSP - Software Settings Preservation
" For device support this optional feature, the software settings that
shall be preserved across COMRESET, to avoid software settings
lost without knowledge in the case of a synchronous loss of signal.
! ! SSP-10: Set Features-Service Interrupt
! SSP-01: Initialize Device Parameters
! ! SSP-03: Security Mode State
! ! SSP-06: Set Features-Set Transfer Mode
! ! SSP-05: Set Features-Write Cache Enable/Disable
! SSP-07: Set Features-Advanced Power Management Enable/Disable
! ! SSP-08: Set Features-Read Look-Ahead
! ! SSP-09: Set Features-Release Interrupt
! SSP-11: Set Multiple Mode
! SSP-04: Set Address Max
! SSP-02: Read/Write Stream Error Log
ODD HDD Test Item
23
I PM
IPM - Interface Power Management
" HIPM - Host Initiated Interface Power management
" DIPM - Device Initiated Interface Power management
Partial
Slumber
24
PHY/Electrical :
Digital/Protocol :
Device Mechanical :
MDI, MDP
25
Mechanical
Test Area
" Location
" Dimension
26
PHY/Electrical :
Digital/Protocol :
Device Mechanical :
MDI, MDP
27
System I nteroperability
The purpose of the System Interoperability test is to ensure
a product actually operate.
" The Interoperability test will be performed under DOS mode.
" Long Framed COMP Pattern
8KB, 64KB, 256KB, 1MB, 16MB
" MD5 checksum
28
Reference documents
http://www.sata-io.org/developers/interop_13.asp
29
Thank you
Coming Up:
" SATA Certified Logo V1.3 Update
" SATA UTD V1.4 Information
Robert Liu
An ISO/IEC 17025
www.allion.com
SATA Certified Logo V1.3 Update
Robert Liu
31
Agenda
" Submission Type
" SPEC & MOI update
" Electronic Tests update
" Digital Test update
" Test Failure Statistics
" Test Solution
32
Submission Type
" Product Class
! Device
" 2.5$ HDD or SSD
" 3.5$ HDD
" Half-height ATAPI device
" Slimline ATAPI device
! Host
" Desktop
" Motherboard
33
Submission Type
" Building Block Listing
! Target
" Silicon or IP Vendor
! Product Type
" Bridge
" Port Multiplier
34
UTD 1.3 Update
" SPEC & MOI
! Change Reference SPEC from SATA 2.5 to 2.6
! UTD 1.3
" Add OOB-01 Level Calibration as normative
" Add 5MHz into RSG test as normative
" Add Host Digital as normative
" Add uSATA as informative but may become normative
" Add eSATA as informative
35
Electronic Tests
" PHY General Requirements
! PHY-02: Frequency Long Term Stability
" V1.2: For both SSC and Non-SSC product
" V1.3: Only for Non-SSC product
! PHY-04: Spread-Spectrum Modulation
" V1.2: 0ppm to -5000ppm
" V1.3: 350ppm to -5350ppm
36
Electronic Tests
" PHY Transmit Signal Requirements
! TSG-07: TJ at Connector, Clock to Data, fbaud/10
" V1.2: Informative
" V1.3: No longer required
! TSG-08: DJ at Connector, Clock to Data, fbaud/10
" V1.2: Informative
" V1.3: No longer required
! TSG-09/11: TJ at Connector , Clock to Data
" V1.2: Fbaud/500
" V1.3: Apply Jitter Transfer Function setting
! TSG-10/12: DJ at Connector , Clock to Data
" V1.2: Fbaud/500
" V1.3: Apply Jitter Transfer Function setting
37
Electronic Tests
" Jitter Transfer Function Calibration
! Introduction
" Standard jitter transfer function requirement
" Get better correlation between different jitter measurement systems
! Effect
" ECN-008
" Must be done once prior to measure TSG-09 ~ TSG-12
38
Electronic Tests
" PHY OOB Requirements
! OOB-01: Level Calibration
" V1.2: Not required
" V1.3: Required before doing the testing
! OOB-03: COMINIT/RESET and COMWAKE Transmit Burst Length
" ECN17: OOB Burst/Gap Duration Clarification
39
Electronic Tests
! OOB Burst/Gap Duration Clarification
" SATA Rev 2.6 ECN017
40
Electronic Tests
" PHY Transmitter/Receiver Requirements
! TX/RX-02: Single Ended Impedance
" V1.2: Informative
" V1.3: Obsolete
! Differential Mode Return Loss
" V1.2: No define for eSATA
" V1.3: Informative for eSATA
! Common Mode Return Loss
! Impedance Balance
41
Electronic Tests
" PHY Receive Signal Requirements
! Amplitude Calibration
" V1.2: No define for eSATA.
" V1.3: Informative (240mV) for eSATA
! Sine jitter source frequencies
" V1.2: 10MHz, 33MHz, 62MHz
" V1.3: 5MHz, 10MHz, 33MHz, 62MHz
! Framed COMP pattern
" V1.2: 4 ALIGN (Old LBP)
" V1.3: 2ALIGN (SATA Rev 2.5 ECN18 LBP)
4 ALIGN need waiver request
42
Digital Test
" Digital
! Test Software Version
" V1.2: DriveMaster 2006
" V1.3: DriveMaster 2008
! Device Test Script
" V1.2: Digital Test Script v1.6 for UTD1.2
" V1.3: Digital Test Script v1.7 for UTD1.3
! Host Test Script
" V1.2: Not a requirement
" V1.3: Digital Host V1.3
43
Test Failure Statistics (Physical)
Test PASS FAIL PASS FAIL PASS FAIL % Pass
PHY-01a : Unit Interval - Gen 1 59 0 47 0 106 0 100%
PHY-01b : Unit Interval - Gen 2 50 0 39 0 89 0 100%
PHY-02 : Frequency Long Term Stability 47 0 38 0 85 0 100%
PHY-03 : Spread-Spectrum Modulation Frequency 15 0 9 1 24 1 96%
PHY-04a : Spread-Spectrum Modulation Max Deviation 15 0 10 0 25 0 100%
TSG-01a : Min Differential Output Voltage - Gen 1 LBP 57 0 46 2 103 2 98%
TSG-02a : Rise/Fall Time - Gen 1 rise 59 0 48 0 107 0 100%
TSG-03a : Differential Skew - Gen 1 HFTP 12 0 8 0 20 0 100%
TSG-04 : AC Common Mode Voltage 49 1 39 0 88 1 99%
TSG-05a : Rise/Fall Imbalance - HFTP TX+ r -> TX- f 48 2 30 8 78 10 89%
TSG-06a: Amplitude Imbalance - HFTP 49 1 38 1 87 2 98%
TSG-09a : Gen 1 TJ @ Connector, Clock, f
BAUD
/500 - HFTP 59 0 47 0 106 0 100%
TSG-10a : Gen 1 DJ at Connector, Clock, f
BAUD
/500 - HFTP 59 0 46 1 105 1 99%
TSG-11a : Gen 2 TJ at Connector, Clock, f
BAUD
/500 - HFTP 45 5 37 2 82 7 92%
TSG-12a : Gen 2 DJ at Connector, Clock, f
BAUD
/500 - HFTP 49 1 39 0 88 1 99%
RSG-01a: Gen1 Receive Jitter Test - 10 MHz 9 0 4 0 13 0 100%
01b: 33 MHz 9 0 4 0 13 0 100%
01c: 62 MHz 8 1 4 0 12 1 92%
01d: 5 MHz 8 1 4 0 12 1 92%
RSG-02a : Gen2 Receive Jitter Test 31 7 15 6 46 13 78%
02b: 33 MHz 32 6 16 5 48 11 81%
02c: 62 MHz 33 5 15 6 48 11 81%
02d: 5 MHz 33 5 16 5 49 10 83%
OOB-01a : OOB Signal Detection Threshold - Gen 1 ndet 24 0 12 1 36 1 97%
OOB-02 : UI During OOB Signaling 55 2 37 0 92 2 98%
OOB-03 : COMINIT/RESET and COMWAKE Transmit Burst Length 56 1 34 3 90 4 96%
OOB-04 : COMINIT/RESET Transmit Gap Length 57 0 34 3 91 3 97%
OOB-05 : COMWAKE Transmit Gap Length 54 3 34 3 88 6 94%
OOB-06a : COMWAKE Gap Detection Windows 103 det 55 3 35 1 90 4 96%
OOB-07a : COMINIT/RESET Gap Detection Windows - 306ns detect 58 0 36 1 94 1 99%
IW#5 IW#6 Total
44
Test Failure Statistics (Digital)
Test Pass Fail Pass Fail Pass Fail %Pass
GTR-01 : Software Reset 16 2 19 0 35 2 95%
GTR-02 : 3Gb/s Backwards Compatibility 11 0 15 0 26 0 100%
GTR-03 : DMA Protocol Support 16 2 18 1 34 3 92%
GTR-04 : Word 93 contents 18 0 17 2 35 2 95%
GTR-05 : Unrecognized FIS receipt 7 1.5 8.5 0.5 15.5 2 89%
NCQ-01 : Forced Unit Access 9 2 10 0 19 2 90%
NCQ-02 : Read Log Ext log page 10h support 12 0 9 0 21 0 100%
NCQ-03 : Intermix of Legacy and NCQ commands 8 3 9 0 17 3 85%
NCQ-04 : Device response to malformed NCQ command 7 4 9 0 16 4 80%
NCQ-05 : DMA Setup Auto-Activate 9 1 9 0 18 1 95%
ASR-01 : COMINIT response interval 9 0 10 0 19 0 100%
ASR-02 : COMINIT OOB interval 7 2 10 0 17 2 89%
ASR-03 : COMRESET OOB interval 4 2 6 3 10 5 67%
SSP-01 : Initialize Device Parameters 12 0 10 0 22 0 100%
SSP-02 : Read/Write Stream Error Log 2 0 0 0 2 0 100%
SSP-03 : Security Mode State 6 0 11 0 17 0 100%
SSP-04 : Set Address Max 8 0 11 0 19 0 100%
SSP-05 : Set Features ! Write Cache Enable/Disable 10 0 10 0 20 0 100%
SSP-06 : Set Features ! Set Transfer Mode 13 1 17 1 30 2 94%
SSP-07 : Set Features ! Advanced Power Management 4 0 5 0 9 0 100%
SSP-08 : Set Features ! Read Look-Ahead 10 0 10 0 20 0 100%
SSP-11 : Set Multiple Mode 12 0 12 0 24 0 100%
IPM-01 : Partial State exit latency (host-initiated) 15 1 17 1 32 2 94%
IPM-02 : Slumber State exit latency (host-initiated) 15 1 19 0 34 1 97%
IPM-03 : Speed matching upon resume (host-initiated) 15 1 19 1 34 2 94%
IPM-04 : Lack of IPM support 6 1 6 0 12 1 92%
IPM-05 : Response to PMREQ_P 12 7 14 5 26 12 68%
IPM-06 : Response to PMREQ_S 12 7 15 6 27 13 68%
IPM-07 : Device default setting for device initiated requests 9 1 8 2 17 3 85%
IPM-08 : Device Initiated Power Management Enable 8 1 12 6 20 7 74%
IPM-09 : Partial State exit latency (device-initiated) 9 4 14 1 23 5 82%
IPM-10 : Slumber State exit latency (device-initiated) 11 2 6 0 17 2 89%
IPM-11 : Speed matching upon resume (device-initiated) 12 1 14 0 26 1 96%
IW#5 IW#6 Total
45
Test Solution
" Interoperability Independent Test Lab
" Approved MOI on Allion
! Tektronix
! Agilent
46
UTD V1.3 Reference Document
An ISO/IEC 17025
www.allion.com
SATA UTD V1.4 I nformation
Robert Liu
48
Agenda
" Naming Guidelines
" UTD 1.4 Overview
" Electronic Test Update
" Digital Test Update
" System Interoperability Test Update
" Equipment Renew
49
SATA Naming Guidelines
" Naming Guidelines
! Please call this new specification by its proper name : Serial ATA
International Organization: Serial ATA Revision 3.0
" %SATA Revision 3.0" or "SATA 6Gb/s."
! SATA 6Gb/s [product name]
" Do not use the terms "SATA III" or "SATA 3.0,"
" Do not use either "Third Generation" or "Gen3"
50
SATA Naming Guidelines
51
Overview of UTD 1.4 (Physical)
Phy Transmit Signal Requirements SI General Requirements
TSG-01 : Differential Output Voltage SI-1:8 : Cable Characterization
TSG-02 : Rise/Fall Time SI-09 : Inter-Symbol Interference
TSG-03 : Differential Skew Phy General Requirements
TSG-04 : AC Common Mode Voltage PHY-01 : Unit Interval
TSG-05 : Rise/Fall Imbalance PHY-02 : Frequency Long Term Stability
TSG-06 : Amplitude Imbalance PHY-03 : Spread-Spectrum Modulation Frequency
TSG-07 : Gen1 (1.5Gb/s) TJ at Connector, Clock to Data, fBAUD/10 PHY-04 : Spread-Spectrum Modulation Deviation
TSG-08: Gen1 (1.5Gb/s) DJ at Connector, Clock to Data, fBAUD/10 Phy OOB Requirements
TSG-09 : Gen1 (1.5Gb/s) TJ at Connector, Clock to Data, fBAUD/500 OOB-01 : OOB Signal Detection Threshold
TSG-10 : Gen1 (1.5Gb/s) DJ at Connector, Clock to Data, fBAUD/500 OOB-02 : UI During OOB Signaling
TSG-11 : Gen2 (3Gb/s) TJ at Connector, Clock to Data, fBAUD/500 OOB-03 : COMINIT/RESET and COMWAKE Transmit Burst Length
TSG-12 : Gen2 (3Gb/s) DJ at Connector, Clock to Data, fBAUD/500 OOB-04 : COMINIT/RESET Transmit Gap Length
TSG-13: Gen3 (6Gb/s) Transmit Jitter w/wo CIC OOB-05 : COMWAKE Transmit Gap Length
TSG-14 : Gen3 (6Gb/s)TX Maximum Differential Voltage Amplitude Phy Receiver/Transmitter Channel Reqs
TSG-15 : Gen3 (6Gb/s) TX Minimum Differential Voltage Amplitude RX/TX-01 : Pair Differential Impedance
TSG-16 : Gen3 (6Gb/s) Tx AC Common Mode Voltage RX/TX-02 : Single-Ended Impedance (Obsolete)
Phy Receive Signal Requirement RX/TX-03 : Gen2 (3Gb/s) Differential Mode Return Loss
RSG-01 : Gen1 (1.5Gb/s) Receiver Jitter Tolerance Test (Normative) RX/TX-04 : Gen2 (3Gb/s) Common Mode Return Loss
RSG-02 : Gen2 (3Gb/s) Receiver Jitter Tolerance Test (Normative) RX/TX-05 : Gen2 (3Gb/s) Impedance Balance
RSG-03 : Gen3 (6Gb/s) Receiver Jitter Tolerance Test RX/TX-06 : Gen1 (1.5Gb/s) Differential Mode Return Loss
RSG-05 : Gen1 Asynchronous Receiver Stress Test at +350ppm RX/TX-07 : Gen3 (6Gb/s) Differential Mode Return Loss
RSG-06 : Gen1 Asynchronous Receiver Stress Test With SSC RX/TX-08 : Gen3 (6Gb/s) Impedance Balance
SATA Measurement Legends:
No change from previous UTD 1.3 spec version
Revised methodology from UTD1.3 to UTD 1.4
New test definitions in UTD 1.4
Obsolete
52
Overview of UTD 1.4 (Digital)
General Test Requirements Software Settings Preservation
GTR-01 : Software Reset SSP-01 : Initialize Device Parameters
GTR-02 : SATA Gen-2 or above Signaling Speed Backwards Compatibility SSP-02 : Read/Write Stream Error Log
GTR-03 : DMA Protocol Support SSP-03 : Security Mode State
GTR-04 : General SATA Support SSP-04 : Set Address Max
GTR-05 : Unrecognized FIS receipt (Informative) SSP-05 : Set Features ! Write Cache Enable/Disable
Native Command Queuing SSP-06 : Set Features ! Set Transfer Mode
NCQ-01 : Forced Unit Access SSP-07 : Set Features ! Advanced Power Management Enable/Disable
NCQ-02 : Read Log Ext log page 10h support SSP-08 : Set Features ! Read Look-Ahead
NCQ-03 : Intermix of Legacy and NCQ commands SSP-09 : Set Features ! Release Interrupt
NCQ-04 : Device response to malformed NCQ command SSP-10 : Set Features ! Service Interrupt
NCQ-05 : DMA Setup Auto-Activate SSP-11 : Set Multiple Mode
Digital Optional Features SSP-12 : Set Features ! Write-Read-Verify
DOF-01 : Asynchronous notification Interface Power Management
DOF-02 : Phy speed indicator IPM-01 : Partial State exit latency (host-initiated)
IPM-02 : Slumber State exit latency (host-initiated)
Software Settings Preservation IPM-03 : Speed matching upon resume (host-initiated)
SSP-01 : Initialize Device Parameters IPM-04 : NAK of requests when support not indicated
SSP-02 : Read/Write Stream Error Log IPM-05 : Response to PMREQ_P
SSP-03 : Security Mode State IPM-06 : Response to PMREQ_S
SSP-04 : Set Address Max IPM-07 : Device default setting for device initiated requests
SSP-05 : Set Features ! Write Cache Enable/Disable IPM-08 : Device Initiated Power Management enable / disable
SSP-06 : Set Features ! Set Transfer Mode IPM-09 : Partial State exit latency (device-initiated)
SSP-07 : Set Features ! Advanced Power Management Enable/Disable IPM-10 : Slumber State exit latency (device-initiated)
SSP-08 : Set Features ! Read Look-Ahead IPM-11 : Speed matching upon resume (device-initiated)
SSP-09 : Set Features ! Release Interrupt Asynchronous Signal Recovery
SSP-10 : Set Features ! Service Interrupt ASR-01 : COMINIT response interval
SSP-11 : Set Multiple Mode ASR-02 : COMINIT OOB Interval
SSP-12 : Set Features ! Write-Read-Verify ASR-03 : COMRESET OOB Interval
Legends:
No change from previous UTD 1.3 spec version
Revised methodology from UTD1.3 to UTD 1.4
New test definitions in UTD 1.4
53
Electronic Tests Update
" Electronic Test
! Receiver Jitter Tolerance Test
" The device need to run the applicable RSG tests.
! Ex: SATA 6.0Gb/s: RSG-01, RSG-02 and RSG-03
54
" Electronic Test
! Receiver Jitter Tolerance Test
" Receiver Stress Test at +350ppm (Informative)
! Data Rate of the pattern generator: 1.5Gb/s + 350ppm
! No more than 0 frame errors over minimum of 18 successive
iterations framed COMP pattern
" Receiver Stress with SSC (Informative)
! Data Rate range is between 1.5Gb/s ! 5350ppm and 1.5Gb/s -
350ppm
! No more than 0 frame errors over minimum of 18 successive
iterations framed COMP pattern
55
" General RSG Calibration
! TP1: Rise/Fall time, Rj, Sj,
! TP2: Tj, Amplitude
56
Digital Tests Update
" Digital Test
! Multiple Signaling Speed establish
" DUT need to verify compatible speed
! New Test
" Asynchronous Notification
! A mechanism for a device to send a notification to the host the device requires
attention
" PHY Speed Indicator
! Check the interface rate is equal to IDENTIFY DEVICE or IDENTIFY PACKET
DEVICE info.
57
System I nteroperability Tests Update
! Test OS
" May upgrade from Dos to Windows
! Test Tool
" Dos: HP Dos tool
" Windows: Ulink DriveMaster
58
System I nteroperability Tests Update
! for Device
" 5 Gold systems
" At least 3 different SATA chipset
" At least 2 6Gb/s system
" At least 1 6Gb/s system support SSC on
! for Host
" 5 Gold devices
" At least 2 6Gb/s devices
" At least 1 6Gb/s device support SSC on
" 2 ODD Devices
" At least 1 ODD support SSC on
59
Equipment Renew
" Electronic
! RSG / Frame Error Counter
" SATA 1.5Gb/s & SATA 3Gb/s "Crescent Heart Frame Error Counter
" SATA 6Gb/s"Finisar Xgig or SerialTek BusXpert Micro Analyzer
! RSG / CIC Channel
" Tektronix: AWG
" Agilent: ISI Board
" Digital
! Bus Analyzer
" SATA 1.5Gb/s & SATA 3Gb/s "LeCroy CATC
" SATA 6Gb/s "Finisar Xgig, SerialTek BusXpert Micro Analyzer, LeCroy Sierra
M6 or STX-460
! Test Software
" DriveMaster 2010
60
Thank You
Session Break
3:00~3:20
Coming Up:
SATA Certified Logo Process
Jina Chen
SATA Certified Logo Process
An ISO/IEC 17025
www.allion.com
Jina Chen
Agenda
" SATA certified logo Introduction
" SATA Certified Logo Overall Process
" Retest Policy
" Who is eligible to use the SATA certified logos?
Only devices that are passed the SATA Interoperability test
and shown on the Integrators List (IL) are eligible to use
the SATA Certified Logo.
SATA certified logo I ntroduction
SATA Certified Program
Become a SATA Member
" The first step is to become a SATA member.
http://www.serialata.org/membership/join_sataio.asp
" US$1,700 annual membership
" For non SATA-IO member, US$1,000 fee would be
charged per IL listing of product/family
" In addition to the $1,000 fee per IL listing, non SATA-IO
members will need to pay US$750 per product for the right
to use the Certified Logos.
US $750/ per
product
US$1,000/per
product
NA Non
SATA-IO
Members
Free Free US$1,700/per
year
SATA-IO
Members
The right to use
the Certified
Logos
IL listing Annual Fee
Become a SATA Member
The difference between SATA Logos
" SATA-IO Logos to Indicate SATA-IO Membership (Member Only)
" Certified Logo
SATA Certified Logo Overall Process
Vendor Contact
Allion to Request
the test
Vendor Prepare
the Samples
and Documents
Testing at Allion
Allion Send
the Report
to the Vendor
Allion Request TID
and Submit
Result to SATA-IO
for Review
SATA-IO Review
The result then
put device on the
Integrator List
Allion send the
pass notification
to vender
Vender request
SATA-IO if the
product need to
carry certified logo
SATA-IO review
the request and
will send the logo
to the vender
If PASS
Vendor Contact
Allion to Request
the test
Vendor Prepare
the Samples
and Documents
Testing at Allion
Allion Send
the Report
to the Vendor
Allion Request TID
and Submit
Result to SATA-IO
for Review
SATA-IO Review
The result then
put device on the
Integrator List
Allion send the
pass notification
to vender
Vender request
SATA-IO if the
product need to
SATA-IO review
the request and
will send the logo
to the vender
If PASS
Select Allion as your SATA Test Lab
Vendor Contact
Allion to Request
the test
Vendor Prepare
the Samples
and Documents
Testing at Allion
Allion Send
the Report
to the Vendor
Allion Request TID
and Submit
Result to SATA-IO
for Review
SATA-IO Review
The result then
put device on the
Integrator List
Allion send the
pass notification
to vender
Vender request
SATA-IO if the
product need to
SATA-IO review
the request and
will send the logo
to the vender
If PASS
Prepare the Samples and Documents
" Test Requirement
! Prepare 2 samples for testing
! Fill out the information form
! Fill out the submission form
I nformation Form
Submission Form (1/3)
Select Allion, Taiwan!
Leave Blank if not
retest submission
Required fields
Must answer Y!
If the product would
like to use the
certified logo
General Family Submission
Specific Family Submission
If more than 10 specific
Family models
then request single
family Listing
(general family listing)
wildcard characters such
as X or * or # can be used
General Family Listing
Specific Family Listing
Vendor Contact
Allion to Request
the test
Vendor Prepare
the Samples
and Documents
Testing at Allion
Allion Send
the Report
to the Vendor
Allion Request TID
and Submit
Result to SATA-IO
for Review
SATA-IO Review
The result then
put device on the
Integrator List
Allion send the
pass notification
to vender
Vender request
SATA-IO if the
product need to
SATA-IO review
the request and
will send the logo
to the vender
If PASS
" Test Schedule
! 3 working days with 2 samples are provided
" Testing Sample Keep
! The product sample which was used in the testing will
be kept for at least 6 months.
Testing at Allion
Testing at
Allion
(3 working days)
Prepare two
samples
for testing
Keep sample for
at least 6 months
Vendor Contact
Allion to Request
the test
Vendor Prepare
the Samples
and Documents
Testing at Allion
Allion Send
the Report
to the Vendor
Allion Request TID
and Submit
Result to SATA-IO
for Review
SATA-IO Review
The result then
put device on the
Integrator List
Allion send the
pass notification
to vender
Vender request
SATA-IO if the
product need to
SATA-IO review
the request and
will send the logo
to the vender
If PASS
Vendor Contact
Allion to Request
the test
Vendor Prepare
the Samples
and Documents
Testing at Allion
Allion Send
the Report
to the Vendor
Allion Request TID
and Submit
Result to SATA-IO
for Review
SATA-IO Review
The result then
put device on the
Integrator List
Allion send the
pass notification
to vender
Vender request
SATA-IO if the
product need to
SATA-IO review
the request and
will send the logo
to the vender
If PASS
Vendor Contact
Allion to Request
the test
Vendor Prepare
the Samples
and Documents
Testing at Allion
Allion Send
the Report
to the Vendor
Allion Request TID
and Submit
Result to SATA-IO
for Review
SATA-IO Review
The result then
put device on the
Integrator List
Allion send the
pass notification
to vender
Vender request
SATA-IO if the
product need to
SATA-IO review
the request and
will send the logo
to the vender
If PASS
Example of I ntegrators List
" The Integrators List (IL) is a database on the SATA-IO website which includes
information about the components that have passed the Serial ATA
Interoperability testing. http://www.serialata.org/developers/integrators_list.asp
Vendor Contact
Allion to Request
the test
Vendor Prepare
the Samples
and Documents
Testing at Allion
Allion Send
the Report
to the Vendor
Allion Request TID
and Submit
Result to SATA-IO
for Review
SATA-IO Review
The result then
put device on the
Integrator List
Allion send the
pass notification
to vender
Vender request
SATA-IO if the
product need to
SATA-IO review
the request and
will send the logo
to the vender
If PASS
Example of Pass Notification Mail
" Once your product has passed Interoperability Testing and is listed on the
Integrators List, you will receive an email from Allion announcing that your
product has passed.
" Your company must sign the Certified Logo License Agreement, which will be
provided by SATA-IO.
" Once the signed agreement has been received by SATA-IO, and SATA-IO has
verified that your products are on the Integrators List, the certified logos will be
sent to you.
Only devices that are shown on the Integrators List are
eligible for the Certified Logo program.
How to receive the certified logos
Vendor Contact
Allion to Request
the test
Vendor Prepare
the Samples
and Documents
Testing at Allion
Allion Send
the Report
to the Vendor
Allion Request TID
and Submit
Result to SATA-IO
for Review
SATA-IO Review
The result then
put device on the
Integrator List
Allion send the
pass notification
to vender
Vender request
SATA-IO if the
product need to
SATA-IO review
the request and
will send the logo
to the vender
If PASS
Vendor Contact
Allion to Request
the test
Vendor Prepare
the Samples
and Documents
Testing at Allion
Allion Send
the Report
to the Vendor
Allion Request TID
and Submit
Result to SATA-IO
for Review
SATA-IO Review
The result then
put device on the
Integrator List
Allion send the
pass notification
to vender
Vender request
SATA-IO if the
product need to
SATA-IO review
the request and
will send the logo
to the vender
If PASS
Retest Policy
" Link: http://www.sata-io.org/developers/interop_13.asp
Retest Policy
" See Section 4.4 of the policy document
Retest Policy
" Requirement depends on the changed level
" If the change impacts SATA function:
(1) Contact Allion to perform the partial test
(2) Fill out the submission document (especially retest part)
(3) After the test is finished, Allion will submit the result to SATA-
IO for reviewing.
(4) After the review process is done, the Integrator List will be
updated by SATA-IO.
Retest Policy
Must explain why test
results from the previous
product can be used
Reference Link
" SATA-IO Website
http://www.serialata.org/
" How to join SATA-IO member
http://www.serialata.org/membership/join_sataio.asp
" SATA-IO Interoperability Testing Information
http://www.serialata.org/developers/interoperability.asp
" Certified Logo Program Information
http://www.serialata.org/developers/certified_logo_program
.asp
Thank You
Coming Up:
SATA SSD Testing
Richard Shen
SATA SSD Testing
An ISO/IEC 17025
www.allion.com
Richard Shen
Agenda
" Interoperability Test
" OS Independent Test
I nteroperability Test
System compatibility Test
" BIOS Enumeration
AHCI Mode
IDE Mode
System compatibility Test
" System Installation
Different File Format (FAT32,NTFS,Ext and Apple HFS
Plus)
Device Enumeration
File IO and File Compare
Power Management Test
Hot Plug/ Unplug Test
RAID Controller Compatibility Test
(On Board Chipset and Add on Card)
" RAID 0
" RAID 1
" RAID 5
" RAID 0+1
" Other
Enclosure Test
" Enclosure Type (USB , E-SATA, 1394 and Ethernet)
" Capability with variety Operation system
(Windows , Apple Mac and Linux)
Device Enumeration
File IO and File Compare
Power Management Test
Hot Plug/ Unplug Test
Performance Test
" HD Tune
" FDBENCH
" PCMark
" HDTachRW
" Iometer
HD Tune 2.55
HD Tune 2.55(Higher is better)
81.5
74.6
113.0
49.0
64.5
97.1
49.5
65.4
31.6
44.1
58.7
54.6
0 30 60 90 120
MEMORIGHT MR25.1-016s
RiDATA NSSD-S25-16-C02T
16GB
MTRON_MSD-SATA3025 16GB
MyDigitalSSD MDSSD32MLC-S
32GB MLC
SAMSUNG_MCBQE64GBMPP-
03A 64GB
SanDisk SDS5C-032G-102500
A-3.13
MB/sec Burst Rate:(MB/sec)
Average:(MB/sec)
Performance Test
" Windows Boot Time
Vista Boot time(Lower is better)
0:45
0:43
1:36
0:44
0:46
0:47
0 25 50 75 100
MEMORIGHT MR25.1-016s
RiDATA NSSD-S25-16-C02T 16GB
MTRON_MSD-SATA3025 16GB
MyDigitalSSD MDSSD32MLC-S 32GB
MLC
SAMSUNG_MCBQE64GBMPP-03A
64GB
SanDisk SDS5C-032G-102500 A-3.13
Seconds
Boot time
Performance Test
" Windows 7 SSD Performance Requirement
Please report SSD ad non-rotation media base on ATA8- ACS1
Disk Sequential 64K Byte Read > 25 MB/s
Disk Random 16K Byte Read > 0.5MB/s
Disk Sequential 64K Byte Write > 20 MB/s
Average Read Time with Sequential Writes < 25 ms
Latency: 95th Percentile < 120 ms
Latency: Maximum < 700 ms
Average Read Time with Random Writes < 40 ms
OS I ndependent Test
Mechanical Test
" Mechanical Test
For Signal and Power Connector: (SATA CabCon MOI
for Calipers, Page 30~33, Page 35~37)
Example: From the centerline of the side mounting holes to the top of
the tongue of the SATA plug should be 0.50 +- 0.38 mm.
Electrical test
" SATA OOB Test (PHY out of Band)
10GHz Tektronix Arbitrary Waveform Generator AWG 7102
15GHz Band Width /
40Gs Sample rate
Tektronix Digital Storage Oscilloscope TDS6154C
Comment Manufacture Type Model Name
Reliability Test
" Disk Stress for 7 days
Allion Disk Stress Utility
More than 3GB test Data Files (Large size files and
Large number small size files)
File transfer and data compare
Without any system error and data lost
Failure rate about 70 %
Reliability Test
" Temperature Extreme Test
Equipment
u !"#!$%&'$! )%*+!, -./ #&0 12// #3$/45#6
u 7'"898&: )%*+!, /; = >?;)7 33$54@;)76
u !"#!$%&'$! AB%*+! C#!!9,
u 5@ #&0 2// #, D/ E8*'&!F
u 5@ #&0 -./ #, @/ E8*'&!F
u !F& C#%G! C8H!, @/G" 3I6 J K@G" 376 J L/G" 3M6
u E%&!$8%N, COCD/. C&%8*N!FF C&!!N
Reliability Test
" Endurance Test
Depend on the method in JEDEC 64.8 that recommend
from Intel
Long term Endurance with vendor define workload
Retention Test
Depend on the method in JESD47F from JEDEC
u The extrapolated mean Data retention lifetime at
25%C is about 3 year while operating the DUT under
75%C over 96 hrs
Long term Data Retention
u Follow the Customer request or Allion suggestion to
setting the Temperature and Humidity
Reliability Test
" Power Cycling Test
Power Off/On the SSD then make sure the SSD can report
correctly data in 1.5 seconds. (Repeat the testing for 1000
times)
Tool: DriverMaster Version
DriverMaster Power Supply
Thank You
Coming Up:
Q&A
111
Q & A
1. SATA Compliance Test Introduction
2. SATA Certified Logo V1.3 Update
3. SATA UTD V1.4 Information
4. SATA Certified Logo Process
5. SATA SSD Testing
Thank you for your attention! J

Sata Compliance

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Sata Compliance

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An ISO/IEC 17025

Qualified Test Laboratory

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