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EPE 442 Advanced Semiconductor

Manufacturing Engineering
Assignment 2

Title: Level 1 & Level 2 of Pin Grid Array (PGA) of
microprocessor in computer motherboard
Name: Ng Yeong Wei
Matric No.: 108486
Date of Submission: 7
th
May 2014
Lecturer: Dr. Khairudin Mohamed





School of Mechanical Engineering
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Introduction
The motherboard, also referred as system board, is the underlying circuit board of a
computer that connects all devices attached to the computer. The main electronic components on
the motherboard are the CPU (Central Processing Unit), CPU chipset, expansion bus, I/O (Input/
Output) interface, disk drive controller and Random Access Memory (RAM). In this paper, one
of the major component packages of motherboard microprocessor is being discussed in terms
of the processes involved in Package Level (Level 1) and System Level (Level 2). Since there
are many types of microprocessor packaging used in the motherboard, Pin Grid Array (PGA)
package type of microprocessor will be concentrated on this paper.

Figure 1: Front side of Pin Grid Array (PGA) package type microprocessor

Level 1 Package Level
Package Level is the level 1 in the manufacturing process of semiconductor (back-end
process). Packaging provides the interconnection from the electronic components to the circuit
board. Besides, it also provides the desired mechanical and environmental protection to ensure
reliability and performance. At the package level, it consists of assembly process, test and
finishing process. The main purposes of carried out packaging are: heat management, safety
enclosure and I/O compact technology.
*PGA is the through-hole hermetic-ceramic package with full surface (as shown in Figure 1).
(a) Assembly Process




Figure 2: Assembly flow processes for PGA
Die attach Wire bond Lid seal Reflow Burn in
Testing Marking Visual inspection Packing
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The assembly process starts with the die preparation. Figure below shows the process flow for
die preparation.

Figure 3: Die preparation
(a) Wafers are sorted and stored in a die bank. Second optical visual inspection is conducted to
inspect for defects before the wafers are released for production.
(b) Wafers are mounted on a mounting tape that adheres to the back of the wafer. The mounting
tape provides support for handling during wafer saw and the die attach process.
(c) The wafer saw process cuts the individual die from the wafer leaving the die on the mounting
tape. The wafer saw equipment consists of automated handling equipment, saw blade and an
image recognition system.
(d) The die is stored in casette before proceed to the next step.
The assembly processes are explained in the table below:
Table 1: Assembly process for the PGA
Assembly process Description
(1) Die attach Provides mechanical support between silicon die and the substrate
by bonding the die onto package
High temperature materials such as golden-silicon eutectic or
silver filled glass are used to attach the die to the substrate

(2) Wire bond Provides an electrical connection from the package to the
substrate
Use ultrasonic welding connects wire to the package and die pad
Bond wires can be aluminium or gold
Wafer sorting Wafer mounting Wafer saw Die storage in casette
Figure 4: Die attach
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Figure 5: Wire bonding process
(a) The wire is fed through a ceramic capillary. The first bond involved
the formation of a ball with an electric flame off (EFO) process. The ball
is placed in direct contact within the bond pad opening on the die.
(b) A combination of temperature and ultrasonic energy forms the
metallic wire bond.
(c) 2 wire bonds are formed for each interconnection, one at the die and
another at the substrate.
(d) The wire is lifted to form a loop and then placed in contact with the
desired bond area of the substrate to form a wedge bond.
(e) A tail bond is formed under high temperature. Voids within the ball
bond are formed which caused the ball is lifted and the connections are
opened.
(3) Lid seal Mechanical sealing technique is used
Eutectic soldering is used for the seals
(4) Reflow Carry out under high temperature to bring the materials being
joined to a temperature which is sufficiently consistent for the
solder to flow evenly onto all the surfaces
(5) Burn in The products are placed in autoclaves at specific temperatures and
humidity for hundreds of hours for endurance tests
(6) Testing Leakage testing
To determine the seal integrity of the package devices
Defects on the package construction and lid seal are revealed by
applying different pressure between the cavity and the exterior of
the package and detecting a resultant leak
(7) Marking Used to corporate and product identification on a packaged device
Laser marking are used to mark packages for product
differentiation due to its higher throughput and better resolution

Figure 6: Marking
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(8) Visual inspection Assembled PGAs are inspected to measure the co-planarity of the
substrate/package
(9) Packing There are few ways of packing the products, which are tube,
JEDEC tray, carrier tape or tape and reel

(b) Test & Finishing Process
Tests are performed before the products are shipped to the costumers. There are various tests,
such as open/short test, final test (functional test, parametric test and test during burn-in),
reliability test and hermetic tests. For the finishing process, visual inspection is carried out. The
packages are packed in the form of tube, JEDEC tray and carrier tape.
Table 2: Tests & finishing process for PGA packages
Testing Description
Open/short test First test in a typical test program to test for open or shorted pins.
Simple but effective test in determining if the pins are properly
aligned misalignment or mis-orientation of the pins is detected.
Testing process will no longer proceed to the succeeding tests
once the misalignment is detected.
Final testing
Functional
Parametric
Burn in
Functional testing
Check if the device is able to perform its basic operation
Parametric testing
Check if the device exhibits the correct voltage, current or power
characteristics, regardless whether the unit is functional or not
Consists of forcing a constant voltage at a node and measuring
the current response (force-voltage-measure-current FVMC) at
that node, or forcing a constant current at a node and measuring
the voltage response (force-current-measure-voltage FCMV)
Burn in
An electrical stress test that employ voltage and temperature to
accelerate the electrical failure of a device
Simulate the operating life of the device and eliminate units with
marginal defects that can result in early life failure
Conducted at 125C, with electrical excitation applied to the
samples
The process is facilitated by using burn-in board before inserted
into the oven
Finishing
Package visual
inspection
Package warpage
Maximum distance between the contact plane and the bottom
package surface within the measurement area


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Figure 7: Package warpage convention

Level 2 System Level
System level level 2, is the stage after package level. Surface Mount Technology (SMT) is
being applied at this level. Surface mount technology is a way of attaching electronic
components to a printed circuit board, where the solder joints form the mechanical and electrical
connection. The connection does not use through holes or terminals.
Surface Mount Technology
The major process steps involved in PGA assembly are: solder paste printing, component
placement and reflow. Figure below shows the SMT assembly flow for the PGA packages.







Table below shows detail description of SMT assembly process for PGA packages, with the
major process steps such as solder paste printing, components placement and reflow.
Table 3: SMT assembly process for PGA packages
SMT assembly process Description
Solder paste printing First step in the surface mount assembly process
The paste which consists of flux, solvent, suspending agent
and thixotropic materials acts as an adhesive before reflow
and help align skewed parts during soldering
Solder paste is applied by stenciling on the solder pads
before component placement
Solder paste printing
Components placement
Reflow
Inspection
Rework
Cleaning
Figure 7: SMT assembly process for PGA packages
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Figure 8: Solder paste (left) and solder paste printing (right)
Components placement Auto-placement machines are used to place the components
on the board accurately
Type of parts to be placed and its volume dictate the
selection of appropriate auto-placement machine
There are 4 types of auto-placement machine: inline,
simultaneous, sequential and sequential/simultaneous
Reflow Critical step in the mounting process
The solder paste is heated sufficiently so that the solder
particles melts to form a high quality mechanical and
electrical joint between the component leads and the circuit
lands on the board
The desired end result is a uniform solder structure strongly
bonded to the board and the package with no voids and a
smooth, even fillet at both ends
Cleaning (depanel) Wash to remove flux residue after the components have been
connected to the board
Inspection/testing Look for wrong/misplaced components and poor solder
joints
Circuit testing
Rework Fix problems and add parts that cant survive the high
temperature of the reflow oven
Special tools such as small-bit soldering irons, magnifying
devices and instruments for grasping is required
Rework includes: remove the components, remove old
solder, re-tin and level pads and install new components

Reference
1. http://www.siliconfareast.com/forum-archives/test-528.htm
2. http://www.siliconfareast.com/wl_test_bi.htm
3. http://6004.csail.mit.edu/6.371/handouts/L17.pdf
4. Semiconductor lecturer notes, Advance Manufacturing process lecturer notes, Dr. Khairudin
5. http://www.ece.msstate.edu/~reese/senior_design/pcb/Intro_to_SMT.pdf
6.http://wwwpersonal.engin.umd.umich.edu/~jwvm/ece539/W99Presentations/SurfaceMount/Su
rfaceMount.PDF
7. http://www.siliconfareast.com/burnin.htm
8. http://www.siliconfareast.com/etest.htm