Silicon FINFET Device

in 3D




Avinash N
Application engineer
avinash@cognitivetech.co.in



This documentation demonstrates
1) Silicon FinFET device in 3D with BQP model coupled with energy balance to a
complex 3D device.
2) Application of BQP in case of 2D quantisation.
3) Effect of quantum confinement on carrier density in FinFET.

The image below illustrates the modelling of FinFET device using Bohm
quantum potential(BQP) & Energy balance in 3D.



The total device length is 100 nm, device depth is 50nm, device width 30nm &
gate length 30nm.

The quantisation inside the channel is almost 2 dimensional and since there is
no principal direction of quantisation we cannot be sure that the model is
calibrated until we do a calibration against a 2D Schrodinger-Poisson model. So
we perform isotropic effective masses in silicon of 0.7 with BQP.NALPHA &
BQP.NGAMMA parameter allows you to set the alpha & gamma parameter for
electrons & holes respectively.

Initially we set out Gate Voltage as 0.4 Volts, the drain bias is applied and the
Gate voltage is ramped to turn on the device.




This plot shows the ID (Drain Current) V/s Vgs (Gate Voltage).

Next we plot 2 Id/Vds curve at different gate voltages. In first part of solve
sequence sets up initial point of 2 curves. For each of 2 gate voltages a solution
with Vds=0 is simulated and the result is save in the solution file.

Each of these 2 solution files is loaded in Atlas. A log file is opened and we
ramp the Vds for each solution file.


Ac analysis

Transient analysis

In this example there are 2 contact statements, first contact statement
defining the Gate contact. The second contact statement is used to set the
external resistance and capacitance on the drain electrode. Resistance of
10kohm is used to correspond to a load resistor in memory cell. A capacitance
of 0.5pF/um is specified to emulate the gates and interconnect the drain must
drive. These external elements emulate the formation of an NMOS inverter.


Transient analysis without any external elements

Negligible Intrinsic Components


Due to external capacitance

Inductance Based Parameters




All the extracted parameter during Small AC signal analysis.


To extract the Capacitance with Respect to Gate and Source use following set
of Extract Statement

extract name=max. gate-source cap. Vgs=0 max(curve(frequency,C.GateSource))