EX.

NO: 6
Date: / /2008

ASCENDING AND DESCENDING ORDER (8085)

i) ASCENDING ORDER

Aim: To arrange the numbers in ascending order.

Apparatus Required:

Microprocessor 8085 kit, Power Supply

Algorithm:

1. Start the program.

2. Get the numbers in an array.
3. Compare the successive two numbers.
4. Store the smaller number in a register.
5. Now again compare the successive number stored in the register.
6. Repeat the process until the numbers get arranged in ascending order.
7. End the program.
PROGRAM: ASCENDING ORDER

HEX
ADDRESS LABEL MNEMONICS COMMENTS
CODE
4100 1E,05   MVI E,05  Move the data 05 to E register
4102 16,05 LOOP 1 MVI D,05  Move the data 05 to D register
4104 21,00,42   LXI H,4200  Get the input through H register
4107 7E   MOV A,M  Move the data from M to A register
4108 23 LOOP2  INX H  Increment H register.
4109 46 MOV B,M Move the data from M to B register
410A B8   CMP B Compare B with A
410B D2,14,41 JNC LOOP 4 If carry=0,jump to loop 4
410E 2B   DCX H  Decrement H register.
410F 77   MOV M,A  Move the data from A to M register
4110 78   MOV A,B Move the data from B to A register
4111 C3,16,41 JMP LOOP 3 Jump to loop 3
4114 2B LOOP4 DCX H Decrement H register.
4115 70 MOV M,B Move the data from B to M register
4116 23 LOOP 3 INX H Increment H register.
4117 15 DCR D Decrement D register.
4118 C2,08,41 JNZ LOOP2 If carry=0,jump to loop 2
411B 77 MOV M,A Move the data from A to M register
411C 1D DCR E Decrement E register.
411D C2,02,41 JNZ LOOP1 If carry=0,jump to loop 1
4120 76 HLT end
 FLOW CHART: ASCENDING ORDER

START

Set the count value

D
Set the no. of comparisons

Get the input data from pointer

& send into A register
B
Increment the pointer
& send into B register

Compare the B register

& A register

NO YES
If

CY= 0

Decrement the HL pair Decrement the HL pair

Move the data from B to M

Move the data from A to M
and from A reg to B reg

Increment the HL pair

Decrement the D register

A
 A

NO
If
B
ZF =
1
YES

Move the data from A to M

Decrement the E register

NO
If
D
ZF = 1

YES

STOP
Sample input:
4200 :
4201 :
4202 :
4203 :
4204 :

Sample Output:
4200 :
4201 :
4202 :
4203 :
4204 :
ii) DECENDING ORDER

Aim: To arrange the numbers in descending order.

Apparatus Required:

Microprocessor 8085 kit, Power Supply

Algorithm:

1) Start the program.

2) Get the numbers in an array.
3) Compare the successive two numbers.
4) Store the greater number in a register.
5) Now again compare the successive number stored in the register.
6) Repeat the process until the numbers get arranged in descending order.
7) End the program.
PROGRAM: DECENDING ORDER

HEX
ADDRESS LABEL MNEMONICS COMMENTS
CODE
4100 1E,05   MVI E,05  Set the no. of count value
4102 16,05 LOOP 1 MVI D,05  Set the no. of comparisons
21,00,42  Get the input through H
4104   LXI H,4200 register
7E  Move the data from M to A
4107   MOV A,M register
4108 23 LOOP2  INX H  Increment H register.
4109 46 MOV B,M Move the data from M to B
register
410A B8   CMP B Compare B with A
410B D2,14,41 JC LOOP 4 If carry=1, jump to loop 4
410E 2B   DCX H  Decrement H register.
77  Move the data from A to M
410F   MOV M,A register
78 Move the data from B to A
4110   MOV A,B register
4111 C3,16,41 JMP LOOP 3 Jump to loop 3
4114 2B LOOP4 DCX H Decrement H register.
70 Move the data from B to M
4115 MOV M,B register
4116 23 LOOP 3 INX H Increment H register.
4117 15 DCR D Decrement D register.
4118 C2,O8,41 JNZ LOOP 2 If carry=0,jump to loop 2
77 Move the data from A to M
411B MOV M,A register
411C 1D DCR E Decrement E register.
411D C2,02,41 JNZ LOOP1 If carry=0,jump to loop 1
4120 76 HLT End the program
 FLOW CHART: DECENDING ORDER

START

Set the count value

D
Set the no. of comparisons

Get the input data from pointer

& send into A register
B
Increment the pointer
& send into B register

Compare the B register

& A register

NO YES
If

CY= 1

Decrement the HL pair Decrement the HL pair

Move the data from B to M

Move the data from A to M
and from A reg to B reg

Increment the HL pair

Decrement the D register

A
 A

NO
If
B
ZF =
1
YES

Move the data from A to M

Decrement the E register

NO
If
D
ZF = 1

YES

STOP
Sample input:

4200 :
4201 :
4202 :
4203 :
4204 :

Sample output:
4200 :
4201 :
4202 :
4203 :
4204 :
RESULT:

Thus the programs for ascending and descending operations have been performed
successfully using the microprocessor 8085.

Submission in time [10]

Neatness [10]
Total [20]
 EX.NO: 7
Date: / /2008
INTERFACING 8255 WITH 8085

i) DIP switch & LED interface

Aim:
To read the condition of the switch & display the same on LED through 8255 with
8085 in mode 0 configurations.

Apparatus Required:

(i) Microprocessor 8085 Kit

(ii) DIP & LED switch interfacing Board
(iii) Power supply

Algorithm:

1. Mode 0 is configured by setting the appropriate field in the control register

2. It is then transferred to the desired address location of control word register
3. The port are selected such that PA act as input and PB act as output
4. The data is transferred by selecting the respective address of the ports
 Control Word Register (C6H)

D7 D6 D5GROUP AD4 D3 D2 GROUP

D1B D0

Mode Mode
Selection Port A Port CU Selection
Port B Port CL

D7- 1 I/O
D6 -00- M0 D4-1- 1P D3-1-IP D2 – 0 M0 D1-1 IP D0 – 1 IP
0 BSR
D5 -01- M1 -0- OP 0-OP 1 M1 0 OP 0 OP
-1X-M2

IP – input
OP – output

Port Selection Address

A C0
B C2
C C4
CW REGISTER C6
PROGRAM:

HEX
ADDRESS LABEL MNEMONICS COMMENTS
CODE
 Move the control word 90 to A
4100 3E,80   MVI A,90 reg
4102 D3,C6   OUT C6 Send the control word to CWR
4104 DB,C0   IN C0 Get the input details from Port A
Send the output values to PORT
4106 D3,C2   OUT C2 B
4108 76   HLT Stop the program

ii) Stepper Motor interface

Aim:
To interface stepper motor through 8255 with 8085 in mode 0 configuration.
Apparatus Required:

(i) Microprocessor 8085 Kit

(ii) Stepper motor interfacing Board
(iii) Stepper motor
(iv) Power supply

Algorithm:

1. Mode 0 is configured by setting the appropriate field in the control register

2. It is then transferred to the desired address location of control word register
3. The port are selected such that Port A act as output
4. Starting address of switching sequence to HL pair
5. Initialize the number of steps using C reg
6. Move content from memory to A reg& send to PORT A
7. Set the time delay
8. Decrement Count register C, If sequence is not complete go to next step
else go to step 6
9. Repeat Sequence, Go to step 4

Stepping sequence Table:

PA7 PA6 PA5 PA4 PA3 PA2 PA1 PA0

 X X X X SW4 SW3 SW2 SW1 CW ACW
0 0 0 0 0 0 1 1 03 06
0 0 0 0 1 0 0 1 09 0C
0 0 0 0 1 1 0 0 0C 09
0 0 0 0 0 1 1 0 06 03

CW – Clock wise
ACW – Anti clock wise

PA 0 Steppe
8 PA 1 r
2 PA 2
Data PA 3
MOTOR
8085 Bus 5 PA 4
MP 5 PA 5
PA 6
PA 7
PPI

PROGRAM:
 HEX
ADDRESS LABEL MNEMONICS COMMENTS
CODE
4100 3E,80 MVI A,80  Control word to Reg A
4102 D3,C6 OUT C6  Initialize all ports of 8255 as output
Starting address of switching
4104 21,00,42 REPEAT LXI H,4200 sequence to HL pair
4107 0E,04 MVI C,04  Counter for 4 steps in a sequence
4109 7E STEP MOV A,M  Move content from memory to A reg
410A D3,C0 OUT C0  Send the byte to port A
410C CD,17,41 CALL DELAY  Time delay
410F 23 INX H  Increment HL pair points to next byte
4110 0D DCR C  Decrement C reg
 If sequence is not complete go to next
4111 C2,09,41 JNZ STEP step
4114 C3,04,41 JMP REPEAT  Repeat Sequence
4117 16,20 DELAY MVI D,20 Time delay using two reg
4119 1E,FF LOOP 1 MVI E,FF Set delay
411B 1D LOOP 2 DCR E Decrement E reg
411C C2,1B,41 JNZ LOOP2
411F 15 DCR D Decrement D reg
4120 C2,19,41 JNZ LOOP1
4123 C9 RET Return to main program

Output :

Clock wise direction:

4200 : 03
4201 : 09
4202 : 0C
4203 : 06

Anti - Clock wise direction:

4200 : 06
4201 : 0C
4202 : 09
4203 : 03

Flow chart: (Stepper motor interface)

 START

Mode 0 is configured by setting the

appropriate field in the control register

Initialize PORT A as output

Starting address of switching

Sequence to HL pair

Initialize the number of steps using C reg

Move content from memory to

A reg & send to PORT A

CALL delay

Decrement Count Value (C – register)

NO YES
If
ZF= 1

* When decrement reg will occur zero, Zero flag will be one (set)

Delay Subroutine:

DELAY
 Set the count delay value to D reg

Set the count delay value to E reg

Decrement E register

NO
If
ZF= 1

YES

Decrement D register

NO
If
ZF= 1

YES

Return to main program

Result:

Thus the programs for interfacing 8255 with 8085 have been written and the output
verified by using 8085 trainer kit and the 8255 interface board

Submission in time [10]

Neatness [10]
Total [20]

EX.NO: 8
Date: / /2008
 INTERFACING 8253 WITH 8085

Aim:
To interface 8253 with 8085 in mode 3 (Square waveform generation)

Apparatus Required:

(i) Microprocessor 8085 kit

(ii) 8253 Interfacing board
(iii) Power supply
Algorithm:

1. Set the control word to the desired mode of operation.

2. Select timer1 to operate at a frequency of 100Hz.
3. The desired frequency of operation is achieved by using the relation.
Count = operating frequency / frequency of square wave .
4. Select timer0 in order to generate the square wave.

Program: Square waveform generation

 HEX
ADDRESS LABEL MNEMONICS COMMENTS
CODE
as explained above,
E000 3E,76   MVI A,76H timer 1
CTL_8253 is used to
operate in
E002 D3,33   OUT 33H square wave mode
frequency of 100hz
which is
clock 0 input for the
E004 3E,00   MVI A,00H timer.
E006 D3,31   OUT 31H TMR1_8253
TMR1_8253;
initialise timer 0 in
E008 3E,3C   MVI A,3CH mode4.
E00A D3,31   OUT 31H  
E00C 3E,36   MVI A,38H  
E00E D3,33   OUT 33H  
E010 21,00,E1   LXI H,E100H  
E013 7E   MOV A,M  
E014 D3,30   OUT 30H  
E016 23   INX H  
E017 7E   MOV A,M  
E018 D3,30   OUT 30H  
E01A C3,1D,E0 LOOP JMP LOOP  
CONTROL WORD REGISTERS:

Control Word Address

TMR0_8253 30H 8253 TIMER 0 address
TMR1_8253 31H 8253 TIMER 1 address
TMR2_8253 32H 8253 TIMER 2 address
CTL_8253 33H 8253 control port address

Count = 1.5360MHz/ 100Hz

= 15360 (decimal)
= 3C00H (hexadecimal)

CONTROL WORD (33H) :

SC1 SC0 RW1 RW0 M2 M1 M0 BCD

SC-Select Counter M – Mode

M2 M1 M0 Mode
Select
SC1 SC0 0 0 0 Mode 0
Counter
0 0 1 Mode 1
0 0 Counter0 x 1 0 Mode 2
0 1 Counter1 x 1 1 Mode 3
1 0 Counter2 1 0 0 Mode 4
1 0 1 Mode 5
RW- Read/Write
BCD
RW1 RW0 Read/Write
0 Binary Counter
0 0 Counter latch command 1 BCD counter
0 1 Read/Write LSB
1 0 Read/Write MSB
Read/Write LSB first then
1 1
MSB
RESULT:

Thus the program for interface 8253 with 8085 in mode 3 has been written and the
output verified using 8085 trainer kit.

Submission in time [10]

Neatness [10]
Total [20]

EX.NO: 9
Date: / /2008
INTERFACING 8279 WITH 8085

Aim:
To interface 8279 with 8085 in decode mode

Apparatus Required:

(iv) Microprocessor 8085 kit

(v) 8279 Interfacing board
(vi) Power supply

Algorithm:

1. Select the desired mode by setting the bits in the control word register
2. Set the internal prescalar value by setting the bits in the program clock command
register
 3. Set the left entry mode/Right entry mode and auto increment mode
4. Get the content each time from time from the memory and send the data to display
5. Call delay
6. Repeat the step until the count is reduced to zero
7. Return to the main and start again

Program: (Decode mode: Left Entry)

HEX
ADDRESS LABEL MNEMONICS COMMENTS
CODE
E000  3E,09 START: MVI A,09H  LE 8 BIT CHAR. DISPLAY
E002  D3,31   OUT CTRL  
E004  3E,31   MVI A,31H  CLOCK DIVIDING FACTOR
E006  D3,31   OUT CTRL  
 COMMAND WORD TO CLEAR
E008  3E,D0 LE: MVI A,D0H DISPLAY
E00A  D3,31   OUT CTRL  
E00C  CD,2D,E0   CALL DELAY  
 CTRL WORD FOR LEFT ENTRY
E00F  3E,01   MVI A,01H MODE
E011  D3,31   OUT CTRL  
 EIGHT NUMBER OF
CHARACTERS WILL BE
E013  OE,08   MVI C,08H DISPLAYED
 CHARACTERS TO BE DISPLAYED
E015  21,00,E1 LXI H,E100H ARE STORED AT F000H
 CTRL WORD FOR WRITING TO
E018  3E,90   MVI A,90H DISPLAY,AUTO
E01A  D3,31   OUT CTRL  INCREMENT MODE
E01C  7E  L1: MOV A,M  
E01D  D3,30 OUT DAT  
E01F  CD,2D,E0   CALL DELAY  
E022  23   INX H  
 E023  0D   DCR C  
E024  C2,1C,E0   JNZ L1  
E027  CD,2D,E0   CALL DELAY  
E02A  C3,08,E0   JMP LE  
E02D  11,FF,FF DELAY: LXI D,FFFFH  
E030  1B  BLOOP: DCX D  
E031  7A   MOV A,D  
E032  B3 ORA E  
E033  C2,30,E0 JNZ BLOOP  
E036  C9   RET  
LOOK UP
TABLE      
 DISPLAY 0 TO 7 WHEN BOTH
E100 3F   3FH CTRL AND SHT
E101 06   06H  IS NOT PRESSED
 CODE USED TO DISPLAY 0 – 7
E102 5B   5BH FOR LE AND RE MODE
E103 4F   4FH  
E104 66   66H  
E105 6D   6DH  
E106 7D   7DH  
E107 07   07H  

Program: (Decode mode: Right Entry)

HEX
ADDRESS LABEL MNEMONICS COMMENTS
CODE
E000  3E,09 START: MVI A,09H  RE 8 BIT CHAR. DISPLAY
E002  D3,31   OUT CTRL  
E004  3E,31   MVI A,31H  CLOCK DIVIDING FACTOR
E006  D3,31   OUT CTRL  
 COMMAND WORD TO CLEAR
E008  3E,D0 LE: MVI A,D0H DISPLAY
E00A  D3,31   OUT CTRL  
E00C  CD,2D,E0   CALL DELAY  
CTRL WORD FOR RIGHT ENTRY
E00F  3E,11   MVI A,11H MODE
E011  D3,31   OUT CTRL  
 EIGHT NUMBER OF
CHARACTERS WILL BE
E013  OE,08   MVI C,08H DISPLAYED
 CHARACTERS TO BE
DISPLAYED ARE STORED AT
E015  21,00,E1 LXI H,E100H F000H
 CTRL WORD FOR WRITING TO
E018  3E,90   MVI A,90H DISPLAY,AUTO
E01A  D3,31   OUT CTRL  INCREMENT MODE
E01C  7E  L1: MOV A,M  
E01D  D3,30 OUT DAT  
E01F  CD,2D,E0   CALL DELAY  
E022  23   INX H  
 E023  0D   DCR C  
E024  C2,1C,E0   JNZ L1  
E027  CD,2D,E0   CALL DELAY  
E02A  C3,08,E0   JMP RE  
E02D  11,FF,FF DELAY: LXI D,FFFFH  
E030  1B  BLOOP: DCX D  
E031  7A   MOV A,D  
E032  B3 ORA E  
E033  C2,30,E0 JNZ BLOOP  
E036  C9   RET  
LOOK UP
TABLE      
 DISPLAY 0 TO 7 WHEN BOTH
E100 3F   3FH CTRL AND SHT
E101 06   06H  IS NOT PRESSED
 CODE USED TO DISPLAY 0 – 7
E102 5B   5BH FOR LE AND RE MODE
E103 4F   4FH  
E104 66   66H  
E105 6D   6DH  
E106 7D   7DH  
E107 07   07H  

KEYBOARD/DISPLAY MODE SET:

0 0 0 D D k k k

Display:

D D
0 0 8 X 8 CHAR DISP Left Entry
0 1 16 X 8 CHAR DISP Left Entry
1 0 8 X 8 CHAR DISP Right Entry
1 1 16 X 8 CHAR DISP Right Entry

Keyboard:

K K K
0 0 0 ENCODED SCAN KEYBOARD – 2 KEY LOCKOUT
0 0 1 DECODED SCAN KEYBOARD – 2 KEY LOCKOUT
0 1 0 ENCODED SCAN KEYBOARD – N KEY ROLLOVER
0 1 1 DECODED SCAN KEYBOARD – N KEY ROLLOVER
1 0 0 ENCODED SCAN SENSOR MATRIX
1 0 1 DECODED SCAN SENSOR MATRIX
1 1 0 STROBED INPUT,ENCODED DISPLAY SCAN
1 1 1 STROBED INPUT,DECODED DISPLAY SCAN
PROGRAM CLOCK:

0 0 1 P P P P P

Bits PPPPP determine the value of the integer which is used as internal prescalar.

READ DISPLAY RAM:

0 1 1 AI A A A A

AAAA – select one of the 16 rows of the display RAM

CLEAR REGISTER:

1 0 0 CD CD CD CF CA

CD CD CD
0 X
1 0 Enable Blanking Code
1 1

Enable Clear Display

Control registers address: 31

Data registers address: 30
RESULT:

Thus the program to interface 8279 with 8085 in decoded mode has been written and
the output verified using 8085 trainer kit.

Submission in time [10]

Neatness [10]
Total [20]
 MICRO CONTROLLER

EX.NO: 10
Date: / /2008

ARITHMETIC OPERATIONS OF TWO 8 BIT NUMBERS (8051)

i) 8 – BIT ADDITION

Aim: To Add two 8 bit numbers and store the result in memory

Apparatus Required:

Microcontroller 8051 kit, Power Supply

Algorithm:
1. Get first data in A register

2. Get second data in B register

3. Add A and B
 4. Store the LSB & MSB of the result in memory

5. Stop the program

PROGRAM:
8 bit Addition:
CLR C
MOV A, # DATA 1
ADDC A, # DATA 2
MOV DPTR, #4600
MOVX @DPTR, A
HLT : SJMP HLT

Sample output:
Data 1:
Data 2:
Output: (4600)

(ii) 8 – BIT SUBTRACTION:

Aim:
To subtract two 8 bit numbers and store the result in memory

Algorithm:
1. Get first data in A register

2. Get second data in B register

3. Subtract A and B

4. Store the LSB & MSB of the result in memory

5. Stop the program

Program:
 8 bit subtraction:
CLR C
MOV A, # DATA 1
SUBB A, # DATA 2
MOV DPTR, #4600
MOVX @DPTR, A
HLT : SJMP HLT

Sample output:
Data 1:
Data 2:
Output: (4600)

FLOW CHART:

8 Bit Addition:

START

Get the First data in A register

Get the second data in B register

Add A with B

Store LSB & MSB of the Result in Memory

STOP
8 bit Subtraction:

START

Get the First data in A register

Get the second data in B register

Subtract A with B

Store LSB & MSB of the Result in Memory

STOP

iii) 8 bit Multiplication:

Aim:
To multiply two 8 bit numbers and store the result in memory
Algorithm:
1. Get first data in A register

2. Get second data in B register

3. Multiply A and B

4. Store the LSB & MSB of the result in memory

5. Stop the program

Program:
CLR C
MOV A, #DATA 1
MOV B, #DATA 2
 MUL AB
MOV DPTR, #4600
MOVX @DPTR, A
INC DPTR
MOV A, B
MOVX @DPTR, A
HLT : SJMP HLT

Sample output:
Data 1:
Data 2:
Output: (4600):
(4601):

iv) 8 bit Division:

Aim:
To divide two 8 bit numbers and store the result in memory
Algorithm:
1. Get Dividend in A register

2. Get Divisor in B register

3. Divide A with B

4. Store the LSB & MSB of the result in memory

5. Stop the program

Program:
CLR C
MOV A, #DATA 1
MOV B, #DATA 2
 DIV AB
MOV DPTR, #4600
MOVX @DPTR, A
INC DPTR
MOV A, B
MOVX @DPTR, A
HLT : SJMP HLT

Sample output:
Data 1:
Data 2:
Output: (4600):
(4601):

FLOW CHART:

8 Bit Multiplication:

START

Get the First data in A register

Get the second data in B register

Multiply A with B

Store LSB & MSB of the Result in Memory

STOP
8 bit Division:

START

Get the First data in A register

Get the second data in B register

Divide A with B

Store LSB & MSB of the Result in Memory

STOP
RESULT:

Thus the program for 8 bit arithmetic operations have been performed successfully
using the microcontroller 8051 kit.

Submission in time [10]

Neatness [10]
Total [20]

EX.NO: 11
Date: / /2008

PROGRAMMING BASED ON LOGICAL AND BIT MANIPULATION

INSTRUCTIONS OF 8051 MICROCONTROLLER

PROGRAM TO SEPARATE A BYTE INTO ITS LOWER & UPPER NIBBLE (WORD
DISASSEMBLE):

Aim:
To separate a byte into its Lower & Upper nibble
Apparatus Required:

Microcontroller 8051 kit, Power Supply

Algorithm
1. Get the data.
 2. And it with ‘F0’.
3. Rotate the content of accumulator left 4 times.
4. Store the accumulator content.
5. Get the data.
6. And it with ‘0F’.
7. Store it in next memory location.
8. Stop the process.

PROGRAM: WORD DISASSEMBLE

CLR C
MOV DPTR,#4500H
MOVX A,@DPTR
MOV B,A
SWAP A
ANL A,#0FH
INC DPTR
MOVX @DPTR,A
MOV A,B
ANL A,#0FH
INC DPTR
MOVX @DPTR,A
HERE: SJMP HERE

Sample output:
4500: 67
4501: 06 (upper nibble)
4502: 07 (lower nibble)

FLOWCHART:
PROGRAM TO SEPARATE A BYTE INTO ITS LOWER & UPPER NIBBLE:
 START
Get the input data from memory
location to Data pointer

Move the data from pointer to Accumulator

& move data to B register

Swapping the accumulator contents

AND operation A with 0F

(Masking operation)

Increment Data pointer &

Get the second number

Move the data from Accumulator to

Pointer & move data to A register

AND operation A with 0F

Increment Data pointer

Move the data from Accumulator to pointer

STOP

II) PROGRAM TO ASSEMBLE DIFFERENT TWO BYTES:

Aim:
 To assemble two different bytes & save into a separate memory location
Apparatus Required:

Microcontroller 8051 kit, Power Supply

Algorithm
1. Get the data from memory to data pointer
2. Move the data from pointer to accumulator
3. Move the data from accumulator to register R0
4. Increment the data pointer & Get the another data
5. swapping the content in accumulator
6. Add the data in accumulator with register R0
7. move the result in accumulator to output location
8. Stop the process

PROGRAM: ASSEMBLE DIFFERENT TWO BYTES

 MOV DPTR, #4600H
MOVX A,@DPTR
MOV R0,A
INC DPTR
MOVX A,@DPTR
SWAP A
ADD A,R0
MOV DPTR, #4500H
MOVX @DPTR,A
HERE: SJMP HERE

Sample output:
4600: 08 (lower nibble)
4601: 06 (upper nibble)
4500: 68 output

FLOWCHART:

START
 Get the First data from
memory to data pointer

Move the data from pointer to

accumulator

Move the data from

accumulator to register R0

Get the another data by

increment the data pointer

Move the second data from

pointer to accumulator

Swapping the accumulator

contents

Add the accumulator content with

Register R0

Set the data pointer in

Memory location 4500

STOP
RESULT:

Thus the programs based on logical and bit manipulation instructions of 8051
microcontroller have been performed successfully.

Submission in time [10]

Neatness [10]
Total [20]
EX.NO: 12
DATE: / 2008

INTERFACING & PROGRAMMING OF STEPPER MOTOR

WITH 8051

Aim:
To write a program to interfacing the stepper motor with 8051
Apparatus Required:

Microcontroller 8051 kit

Power Supply,
Stepper motor interface card (DAC),
Stepper Motor
Algorithm:
1. Load the starting address of data sequence.
2. Load the count into register.
3. Get the data from memory to register.
4. Send data from register to DAC (stepper motor).
5. Call delay.
6. Increment DPTR & repeat the same till count become zero.
7. Jump to step 1.
PROGRAM: Stepper motor interfacing

START: MOV DPTR, #4500

MOV R0,#04 --------- > No. of steps
Loop4: MOVX A,@DPTR
PUSH DPH
PUSH DPL
MOV DPTR, #FFC0 ------ > port address
MOV R2, #04 ----------- > d1
Loop3: MOV R1, #0F ---------- > d2
Loop2: MOV R3, #FF ---------- > d3
Loop1: DJNZ R3, Loop1
DJNZ R1, Loop2
DJNZ R2, Loop3
MOVX @DPTR, A
POP DPL
POP DPH
INC DPTR
DJNZ R0, Loop4
SJMP START

Look up table:
4500 : 09
4501 : 05
4502 : 06
4503 : 0A

d1, d2, d3 - data for delay

FLOWCHART:
Interfacing stepper motor

START
E

DPTRAdd1

R004H

A[[DPTR]]

PUSH DPH, DPL

PUSH DPL

DPTRAdd2

R2d1

R1d2

B
R3d3

DECREMENT R3

NO IF
ZERO
=0
YES

A
 A

Decrement R1

NO
IF
B
ZERO
=0
YES

Decrement R2

NO
IF
C
ZERO
=0

YES
Move the data from ACC to DPTR

POP DPL

POP DPH

Increment DPTR

Decrement R0

NO
IF
D
ZERO
=0
YES
E
RESULT:

Thus the program to interface 8051 microcontroller with stepper motor has been
written in assembly language and output verified successfully using 8051.

Submission in time [10]

Neatness [10]
Total [20]
EX.NO: 13
Date: / /2008
STUDY OF FLASH MICROCONTROLLER

Aim:
To Study about the flash memory based microcontroller 89c51

Description:

The AT89C51 is a low-power, high-performance CMOS 8-bit microcomputer with

4K bytes of Flash programmable and erasable read only memory (PEROM). The device is
manufactured using Atmel’s high-density nonvolatile memory technology and is compatible
with the industry-standard MCS-51 instruction set and pinout. The on-chip flash allows the
program memory to be reprogrammed in-system or by a conventional nonvolatile memory
programmer. By combining a versatile 8-bit CPU with Flash on a monolithic chip, the Atmel
AT89C51 is a powerful microcomputer which provides a highly-flexible and cost-effective
solution to many embedded control applications.

Features:
• Compatible with MCS-51™ Products
• 4K Bytes of In-System Reprogrammable Flash Memory
(Endurance: 1,000 Write/Erase Cycles )
• Fully Static Operation: 0 Hz to 24 MHz
• Three-level Program Memory Lock
• 128 x 8-bit Internal RAM
• 32 Programmable I/O Lines
• Two 16-bit Timer/Counters
• Six Interrupt Sources
• Programmable Serial Channel
• Low-power Idle and Power-down Modes
BLOCK DIAGRAM OF 89C51
PIN DESCRIPTION:

VCC: Supply voltage.

GND: Ground

.Port 0:
Port 0 is an 8-bit open-drain bi-directional I/O port. As an output port, each pin can sink
eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as high impedance
inputs. Port 0 may also be configured to be the multiplexed low order address/data bus during
accesses to external program and data memory. In this mode P0 has internal pull ups. Port 0
also receives the code bytes during Flash programming, and outputs the code bytes during
program verification. External pull ups are required during program verification.

Port 1:
Port 1 is an 8-bit bi-directional I/O port with internal pull ups. The Port 1 output buffers
can sink/source four TTL inputs. When 1s are written to Port 1 pins they are pulled high by
the internal pull-ups and can be used as inputs. As inputs, Port 1 pins that are externally
being pulled low will source current (IIL) because of the internal pull-ups. Port 1 also
receives the low-order address bytes during Flash programming and verification.

Port 2:
Port 2 is an 8-bit bi-directional I/O port with internal pull ups. The Port 2 output buffers
can sink/source four TTL inputs. When 1s are written to Port 2 pins they are pulled high by
the internal pull-ups and can be used as inputs. As inputs, Port 2 pins that are externally
being pulled low will source current (IIL) because of the internal pull-ups. Port 2 emits the
high-order address byte during fetches from external program memory and during accesses to
external data memory that use 16-bit addresses (MOVX @ DPTR). In this application, it uses
strong internal pull-ups when emitting 1s. During accesses to external data memory that uses
8-bit addresses (MOVX @ RI), Port 2 emits the contents of the P2 Special Function Register.
Port 2 also receives the high-order address bits and some control signals during Flash
programming and verification.
Port 3:
Port 3 is an 8-bit bi-directional I/O port with internal pull-ups . The Port 3 output
buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins they are pulled
high by the internal pull-ups and can be used as inputs. As inputs, Port 3 pins that are
externally being pulled low will source current (IIL) because of the pull-ups .Port 3 also
serves the functions of various special features of the AT89C51 as listed below:

Port 3 also receives some control signals for Flash programming and verification.

RST:
Reset input. A high on this pin for two machine cycles while the oscillator is running
resets the device.

ALE/PROG:
Address Latch Enable output pulse for latching the low byte of the address during
accesses to external memory. This pin is also the program pulse input (PROG) during Flash
programming. In normal operation ALE is emitted at a constant rate of 1/6 the oscillator
frequency, and may be used for external timing or clocking purposes. Note, however, that
one ALE pulse is skipped during each access to external Data Memory. If desired, ALE
operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is
active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high.
Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode.
PSEN
Program Store Enable is the read strobe to external program memory. When the
AT89C51 is executing code from external program memory, PSEN is activated twice each
machine cycle, except that two PSEN activations are skipped during each access to external
data memory.

EA/VPP
External Access Enable. EA must be strapped to GND in order to enable the device to
fetch code from external program memory locations starting at 0000H up to FFFFH.
Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset. EA
should be strapped to VCC for internal program executions. This pin also receives the 12-
volt programming enable voltage (VPP) during Flash programming, for parts that require 12-
volt VPP.

XTAL1
Input to the inverting oscillator amplifier and input to the internal clock operating circuit.
XTAL2
Output from the inverting oscillator amplifier.

OSCILLATOR CHARACTERISTICS:
XTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier
which can be configured for use as an on-chip oscillator, as shown in Figure 1.

Figure 1. Oscillator Connections

Either a quartz crystal or ceramic resonator may be used. To drive the device from an
external clock source, XTAL2 should be left unconnected while XTAL1 is driven as shown
in Figure 2.

Figure 2 External Clocks Driven Configuration

There are no requirements on the duty cycle of the external clock signal, since the input to
the internal clocking circuitry is through a divide-by-two flip-flop, but minimum and
maximum voltage high and low time specifications must be observed.

Idle Mode:
In idle mode, the CPU puts itself to sleep while all the on chip peripherals remain
active. The mode is invoked by software. The content of the on-chip RAM and all the special
functions registers remain unchanged during this mode. The idle mode can be terminated by
any enabled interrupt or by a hardware reset. It should be noted that when idle is terminated
by a hard ware reset, the device normally resumes program execution, from where it left off,
up to two machine cycles before the internal reset algorithm takes control. On-chip hardware
inhibits access to internal RAM in this event, but access to the port pins is not inhibited. To
eliminate the possibility of an unexpected write to a port pin when Idle is terminated by reset,
the instruction following the one that invokes Idle should not be one that writes to a port pin
or to external memory.
Power-down Mode:

In the power-down mode, the oscillator is stopped, and the instruction that invokes
power-down is the last instruction executed. The on-chip RAM and Special Function
Registers retain their values until the power-down mode is terminated. The only exit from
power-down is a hardware reset. Reset redefines the SFRs but does not change the on-chip
RAM. The reset should not be activated before VCC is restored to its normal operating level
and must be held active long enough to allow the oscillator to restart and stabilize.

Program Memory Lock Bits:

On the chip are three lock bits which can be left unprogrammed (U) or can be
programmed (P) to obtain the additional features listed in the table below.

When lock bit 1 is programmed, the logic level at the EA pin is sampled and latched
during reset. If the device is powered up without a reset, the latch initializes to a random
value, and holds that value until reset is activated. It is necessary that the latched value of EA
be in agreement with the current logic level at that pin in order for the device to function
properly.
PROGRAMMING THE FLASH:
The AT89C51 is normally shipped with the on-chip Flash memory array in the erased
state (that is, contents = FFH) and ready to be programmed. The programming interface
accepts either a high-voltage (12-volt) or a low-voltage (VCC) program enable signal. The
low-voltage programming mode provides a convenient way to program the AT89C51 inside
the user’s system, while the high-voltage programming mode is compatible with
conventional third-party Flash or EPROM programmers.
The AT89C51 is shipped with either the high-voltage or low-voltage programming mode
enabled. The respective top-side marking and device signature codes are listed in the
following table.

The AT89C51 code memory array is programmed byte-by byte in either programming mode.
To program any nonblank byte in the on-chip Flash Memory, the entire memory must be
erased using the Chip Erase Mode.

PROGRAMMING ALGORITHM:
Before programming the AT89C51, the address, data and control signals should be
set up according to the Flash programming mode table and Figure 3 and Figure 4. To
program the AT89C51, take the Following steps:
1. Input the desired memory location on the address lines.
2. Input the appropriate data byte on the data lines.
3. Activate the correct combination of control signals.
4. Raise EA/VPP to 12V for the high-voltage programming mode.
5. Pulse ALE/PROG once to program a byte in the Flash array or the lock bits. The byte-
Write cycle is Self-timed and typically takes no more than 1.5 ms. Repeat steps 1 through
changing the address and data for the entire array or until the end of the object file is reached
Data Polling:
The AT89C51 features Data Polling to indicate the end of a write cycle. During a write
cycle, an attempted read of the last byte written will result in the complement of the written
datum on PO.7. Once the write cycle has been completed, true data are valid on all outputs,
and the next cycle may begin. Data Polling may begin any time after a write cycle has been
initiated. .

Ready/Busy:
The progress of byte programming can also be monitored by the RDY/BSY output
signal. P3.4 is pulled low after ALE goes high during programming to indicate BUSY. P3.4
is pulled high again when programming is done to indicate READY.

Program Verify:
If lock bits LB1 and LB2 have not been programmed, the programmed code data can
be read back via the address and data lines for verification. The lock bits cannot be verified
directly. Verification of the lock bits is achieved by observing that their features are enabled.

Chip Erase:
The entire Flash array is erased electrically by using the proper combination of control
signals and by holding ALE/PROG low for 10 ms. The code array is written with all “1”s.
The chip erase operation must be executed before the code memory can be re-programmed.

Reading the Signature Bytes:

The signature bytes are read by the same procedure as a normal verification of locations
030H, 031H, and 032H, except that P3.6 and P3.7 must be pulled to a logic low. The values
returned are as follows:
(030H) = 1EH indicates manufactured by Atmel
(031H) = 51H indicates 89C51
(032H) = FFH indicates 12V programming
(032H) = 05H indicates 5V programming
Programming Interface:
Every code byte in the Flash array can be written and the entire array can be erased by
using the appropriate combination of control signals. The write operation cycle is self timed
and once initiated, will automatically time itself to completion. All major programming
vendors offer worldwide support for the Atmel microcontroller series. Please contact your
local programming vendor for the appropriate software revision

..
RESULT:
Thus the details of flash type microcontroller 89c51 has been studied

Submission in time [10]

Neatness [10]
Total [20]
REFERENCE:

(i) R.S. Gaonkar, ‘Microprocessor Architecture Programming and Application’,

Wiley Eastern Ltd., New Delhi, 1995.

(ii) Muhammad Ali Mazidi & Janice Gilli Mazidi, ‘The 8051 Micro Controller and
Embedded Systems’, Pearson Education, 5th Indian reprint, 2003.

(iii) A.K. Ray & K.M.Bhurchandi, “Advanced Microprocessors and peripherals-

Architectures, Programming and Interfacing”, TMH, 2002 reprint.

(iv) VI micro system : Application manual for stepper motor interfacing

(v) VI micro system : user manual for 89c51 microcontroller
(vi) VI micro system : user manual for 8085 microprocessor
(vii) Computer India : user manual for 8085 microprocessor & its interfacing
(viii) Computer India : Application manual for 8279 Keyboard & display interfacing
(ix) Computer India : Application manual for 8253 Timer & counter interfacing
(x) 8085 simulator : Penram international
(xi) Flash memory ATMEL 89c51 data sheet
(Source: www.atmel.com)
--------------------------------------- COMPLETED ---------------------------------------

VERIFIED BY: