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2

2.0
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
2.10
2.11
2.12
2.13
2.14
2.15
2.16
2.17
2.18
2.18.1
2.18.2
2.18.3
2.18.4
2.19
2.20
2.21
2.22
2.23
2.24
2.25
2.26
2.27
2.28
2.29
2.30
2.31
2.32

...........................................................................................................1
FOREGROUND/BACKGROUND SYSTEM ............................................1
...............................................................................................................2
...............................................................................................................................2
.......................................................................................................................2
...........................................................................................................................2
...............................................................................................................................3
(CONTEXT SWITCH OR TASK SWITCH) ..................................................................4
KERNEL.............................................................................................................5
SCHEDULER ....................................................................................................5
NON-PREEMPTIVE KERNEL ......................................................5
...............................................................................................................6
REENTRANCY ..........................................................................................7
.......................................................................................................9
.................................................................................................................10
2.14 ........................................................................................................10
.................................................................................................................10
.................................................................................................................10
.........................................................................................................12
.....................................................................................................................13
.................................................................................................14
.........................................................................................................15
, ...................................................................................15
(Semaphores) .........................................................................................16
()DEADLOCK (OR DEADLY EMBRACE)......................................................21
.............................................................................................................................21
(EVENT FLAGS) ..............................................................................................23
(INTERTASK COMMUNICATION) ...................................................................24
(MESSAGE MAIL BOXES) ...................................................................................25
(MESSAGE QUEUE) ...........................................................................................26
.............................................................................................................................27
.....................................................................................................................27
.....................................................................................................................28
(INTERRUPT RECOVERY) ...........................................................................29
.............................................................................................29
.............................................................................................................30
(NMI).......................................................................................................31
(CLOCK TICK)................................................................................................33

2.33
2.34
2.35

.........................................................................................................35
.............................................................................................36
.............................................................................................................37

II

Switch Hurb

(ABS)

2.0

Foreground/Background System

2.1
(Super-Loops)
(background)
foreground
(Critical operation)

2-1

(halt)

2.1

( 2.03 )

2.2

2.3

mutual exclusion 2.18

2.4

CPU()CPU


CPU

2.5

CPU

CPU
( 2.2 )

2.2

5
5 () 2.3

CPU
WAITING I/O

CPU
2.3 C/OS-

2.3

2.6

(Context Switch or Task Switch)

Context Switch CPU



Context
CPU Tasks
Context Storage area
2.2
CPU
CPU
CPU

2.7

Kernel

CPU

ROM RAM

CPU 2 5
RAM
CPU

2.8

Scheduler

Scheduler, dispatcher

CPU
CPU

2.9

Non-Preemptive Kernel

CPU
CPU

CPU CPU

CPU
CPU

CPU
I/O
2.4 [L2.4(1)]

CPU [F2.4(2)]
[F2.4(3)]
[F2.4(4)], CPU [F2.4(5)]
CPU
[F2.4(6)]
[F2.4(7)]

2.4

CPU

CPU CPU
CPU
CPU

2.10
C/OS-
CPU
CPU
CPU

2.5

2.5
CPU

CPU
CPU

C/OS-

2.11 Reentrancy

CPU
2.1

2.1
void strcpy(char *dest, char *src)
{
while (*dest++ = *src++) {
;

}
*dest = NUL;
}

Strcpy() Strcpy()

2.2 Swap()
Temp

2.2

int Temp;

void swap(int *x, int *y)


{
Temp = *x;
*x

= *y;

*y

= Temp;

Swap()
Swap() 2.6 [F2.6(1)]
Temp 1[F2.6(2)]
C/OS-[F2.6(3)],
Swap() Temp 3
Z 4X 3
[F2.6(4)], CPU [F2.6(5)].
Temp 3Y 3
1

2.6

Swap()
Temp
Swap()

Swap() XY

2.12

quantum
CPU

C/OS-

2.13

2.14 2.14

2.15

2.16
, 2.7
1 2 2 3 1
2 3 [ 2.7(1)] 3
(Semaphore)( 2.
18.04 ) 3 [ 2.72]
1 3 CPU [ 2.7(3)] 1
[ 2.7(4)] 1 3
3 1 3 [ 2.7(5)]
3 [ 2.7(6)] 2 3 2
2 3 CPU [ 2.7(7)][
2.7(8)] CPU 3[ 2.7(9)]
3 [ 2.7(10)]
[ 27(11)],
1 [ 2.7(12)]
, 1 3 1 ,
3 2 3 CPU , 1
, 2 1 1 2
, 3 , 3
3 ,

3 1 CPU 2 CPU ,
3 , 3 ,
CPU ,,

10

,(Priority inheritance)C/OS-,

2.7
2.8 , 3
[ 2.8(1)], 3 [ 2.8(2)], 3
[ 2.8(3)] CPU 1 [ 2.8(4)], 1 [
2.8(5)], 1 [ 2.8(6)]
, 3 ,
3 1 , 3 1 ,,
3 ,[ 2.7(7)], 3 [ 28(8)]
, 3 1, 1 [
2.8(9)], 1 [ 2.8(10)] 1 3
2 CPU , [ 2.8(11)], 2 [ 2.8(3)][
2.8(10)], 1 3
, 2 3

11

2.8

2.17

RMS(Rate Monotonic Scheduling),


,
2.9
2.9
Hz
RMS

12


,
CPU

n
[2.1] RMS
[2.1]

Ei

Ti n(2

1/ n

1)

EiiTiiEi/Tii
1/n
CPU 2.1 n(2 - 1 )n

n( 2) 0.693RMS
iCPU 70%
CPU
100%CPU 100%
CPU 60% 70%
RMS
RMS
RMS

2.1 CPU .
n(21/n - 1)

1.000

0.828

0.779

0.756

0.743

0.693

2.18

13

2.18.1

2.3

2.3

Disable interrupts;

/**/

Access the resource (read/write from/to variables);

Reenable interrupts;

/*/*/

/**/

C/OS-
C/OS- C
OS_ENTER_CRITICAL() OS_EXIT_CRITICAL()[ 8.03.02 OS_ENTER_CRITICAL()
OS_EXIT_CRITICALL()], 2.4

2.4 C/OS_
void Function (void)
{
OS_ENTER_CRITICAL();
.

/**/

.
.

OS_EXIT_CRITICAL();
}

14

2.18.2

0
1(Test-And-Set), TASTAS
TAS
2.5

2.5
Disable interrupts;

if (Access Variable is 0) {

Set variable to 1;

Reenable interrupts;

Access the resource;

Disable interrupts;

Set the Access Variable back to 0;

Reenable interrupts;

} else {

Reenable interrupts;

/* You dont have access to the resource, try back later; */


/* ; */
}

TAS ( Motorola 68000 ,)

2.18.3 ,
,
( 3.06 ) 2.6 C/OS-

15

OSSchedUnlock (),

2.6 .
void Function (void)
{
OSSchedLock();
.
.

/* You can access shared data in here (interrupts are recognized) */

/*()*/

OSSchedUnlock();
}

2.18.4 (Semaphores)
60 Edgser Dijkstra
.
()

( Semaphore
(binary)(counting) 0 1

(
2.21))

0 1
0 255 0 65535 0 4294967295 8 16
32

(INITIALIZE)(CREATE)
(WAIT)(PEND)(SIGNAL)(POST)
(Waiting list)

16

(WAIT)( 0)
1 0

(
)
(SIGNAL)
1
1

(First In First Out FIFO)


C/OS(
)(
)
2.7 C/OS-
OSSemPend()
OSSemPost()
1

2.7

OS_EVENT *SharedDataSem;
void Function (void)
{
INT8U err;
OSSemPend(SharedDataSem, 0, &err);
.
.

/* You can access shared data in here (interrupts are recognized) */

/*()*/

OSSemPost(SharedDataSem);
}

1
I am Task! 2 I am Task2!I Ia amm
T Tasask k1!2!

17

1()
2.10

2.10

RS-232C
2.11
CommSendCmd()Cmd
ASCII Response timeout
2.8

2.8

INT8U CommSendCmd(char *cmd, char *response, INT16U timeout)


{
Acquire port's semaphore;
Send command to device;
Wait for response (with timeout);
if (timed out) {
Release semaphore;
return (error code);
} else {
Release semaphore;
return (no error);

18

}
}

1
CommSendCmd()

RS-232

2.11

(buffer pool) 2.12 10


BufReq()
BufRel() 2.9

2.9

BUF *BufReq(void)
{
BUF *ptr;

Acquire a semaphore;
Disable interrupts;
ptr

= BufFreeList;

BufFreeList = ptr->BufNext;
Enable interrupts;
return (ptr);

19

void BufRel(BUF *ptr)


{
Disable interrupts;
ptr->BufNext = BufFreeList;
BufFreeList

= ptr;

Enable interrupts;
Release semaphore;
}

2.12
10

()
BufRel()
(Linked list) 1
BufReq() BufRel()

20

( 2.18.0.1 )
32 1 0

2.19 ()Deadlock (or Deadly Embrace)


T1
R1 T2 T2 T1 R2T2 R1

2.20
(
) 2.13
()
0(unilateral rendezvous)
I/O I/O ()

21

2.13

2.14
(bilateral rendezvous)
2.10
[L22.10(1)][L2.10(2)]
[2.10(3)][L2.10(4)]

2.14

22

2.10
Task1()
{
for (;;) {
Perform operation;
Signal task #2;

(1)

Wait for signal from task #2;

(2)

Continue operation;
}
}

Task2()
{
for (;;) {
Perform operation;
Signal task #1;

(3)

Wait for signal from task #1;

(4)

Continue operation;
}
}

2.21 (Event Flags)

()(
) 2.15

23

2.15
2.16 8 16 32
(bit) 32

C/OS-.

2.22 (Intertask Communication)

()

24

2.16

2.23 (Message Mail boxes)

()

()()
2.17 I
(Clock Ticks)

(POST)
(PEND)

25


(ACCEPT)

2.17

2.24 (Message Queue)

()

(FIFO)C/OS-
(LIFO)

(Waiting List)

2.18 I
10 10 0

(Post)
(Pend)

(Accept)

26

2.18

2.25
CPU CPU
()(Context)
(ISR)

CPU
(Polling)(Disable interrupt)
(Enable interrupt)
( 2.26 )

2.19

2.26

[2.2]
[2.2]

= +

27

2.19

2.27

CPU
[2.3]
[2.3]

= + CPU

[2.4]
[2.4]

= + CPU

C/OS- OSIntEnter()
[2.5]
[2.5]

+ CPU +

28


100 99 50s
250s 250s

2.28 (Interrupt Recovery)

CPU
[2.6]
[2.6]

= CPU +

CPU
[2.7]
[2.7]

= CPU +

C/OS- OSIntExit()
(
) ISR

[2.8]
[2.8] = +
CPU +

2.29
2.20 2.22

[ 2.22A]

[ 2.22B]
C/OS-

29

33MHZ Intel 80186 (


9.3 33MHZ 80186 C/OS-).

2.30

100S500S 1mS

(
)

2.20 ()

30

2.31 (NMI)

[2.9] +
[2.10] = + CPU
[2.11] = CPU +
150S
80 125S 45S
20S

31

2.21 ()

2.22 ()
2.23

(Output Port) 0
(
)

2.23
40 150

32

S 6mS(40*150S)
2.24
(
)

()
6mS

2.24

2.32 (Clock Tick)

10mS 200mS

1
2.25 2.27

( if/else, switch, ? : )

2.25
20mS

2.26

5
6

33

2.25 ()

2.26 ()

34

2.27 ()
2.27

CPU

()

8086 80186
68000 68020

2.33

(ROM)
1K 100K 8 CPU
1K 3K
[2.12]

35

[2.12]

= +

(RAM)
(
) ()
()

(C/OSII )

RAM [2.13]
[2.13] RAM = RAM + ( + ) *

RAM [2.14]
[2.14]=RAM = RAM + RAM +
+
RAM
RAM

()

(ROM)(RAM)
RAM

2.34
RTOS
RTOS

36


RTOS

ROM/RAM 2 4 CPU

RTOS
80 RTOS 8 16 32 64
RTOS
()(Cross-Platform
compilers)RTOS 70 30,000 RTOS
RTOS RTOS
(Silicon Software) 5 250
100 5,000

2.35
2.2

2.2

Foreground/
Background

Non-Preemptive
Kernel

Preemptive Kernel

Interrupt
latency
(Time)

MAX(Longest
instruction,
User int. disable)
+ Vector to ISR

MAX(Longest
instruction,
User int. disable,
Kernel int.
disable)
+ Vector to ISR

MAX(Longest instruction,
User int. disable,
Kernel int. disable)
+ Vector to ISR

Interrupt
response
(Time)

Int. latency
+ Save CPUs context

Int. latency
+ Save CPUs context

Interrupt latency
+ Save CPUs context
+ Kernel ISR entry function

Interrupt
recovery
(Time)

Restore backgrounds
context
+ Return from int.

Restore tasks context


+ Return from int.

Find highest priority task


+ Restore highest priority
tasks context
+ Return from interrupt

Task
response
(Time)

Background

Longest task
+ Find highest priority
task

Find highest priority task


+ Context switch

37

+ Context switch

ROM size

Application code

Application code
+ Kernel code

Application code
+ Kernel code

RAM size

Application code

Application code
+ Kernel RAM
+ SUM(Task stacks
+ MAX(ISR stack))

Application code
+ Kernel RAM
+ SUM(Task stacks
+ MAX(ISR stack))

Services
available
?

Application code must


provide

Yes

Yes

38

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