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Group 13 | 09ECE

M.A.D 13 | 09ECE_ UNIVERSITY OF SCIENCE AND TECHNOLOGY_THE UNIVERSITY OF DANANG


Design an Amplifier
REPORT PROJECT EE332


Instructor: NguyenVanTuan LabAssitance: NguyenTrungKien
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REPORT PROJECT EE332
Design an Amplifier


Abstract: This report contains an explanation of the principles and techniques used in
implementing a three stages amplifier with differential input. Its followed by a section that
builds up a design principle and constructs a version of the circuit to amplify signal.






Danang, 17-Mar-2013


Instructor: NguyenVanTuan LabAssitance: NguyenTrungKien
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Group 13 - Class 09ECE
Nguyen Ngoc Minh
Ngo Tran Duc Thang
Nguyen Xuan Tien






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Table of Contents
I. Introduction ................................................................................................................. 5
II. Architecture Design: .................................................................................................... 6
1. Design Specifications ................................................................................................ 6
1.1. Input signal specifications ............................................................................... 6
1.2. Equipment available for testing ...................................................................... 6
1.3. Minimum Design Specification of the amplifier ............................................. 6
2. Block Diagram ....................................................................................................... 7
3. Discussion on the chosen architecture ................................................................. 7
4. Trade offs ................................................................................................................ 8
III. Circuit Design: ............................................................................................................. 9
1. Schematics................................................................................................................. 9
2. Explanation for working of each stages ............................................................... 9
2.1 The differential stage .......................................................................................... 9
2.2 The middle stage ............................................................................................... 10
2.3 The Darlington stage ......................................................................................... 10
3. Design equations and calculation ...................................................................... 11
3.1. For the Darlington stage ................................................................................ 11
3.2. For the middle stage ...................................................................................... 12
3.3. For the differential stage ............................................................................... 14
IV. Conclusion ................................................................................................................... 3
V. References ................................................................................................................... 4

Instructor: NguyenVanTuan LabAssitance: NguyenTrungKien
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I. Introduction
This design project aims to utilize every single skill we have learned in EE 332 this
quarter. We will use our newly acquired knowledge to build an audio amplifier that
can take the input from a CD player or portable music player and amplify the signal to
drive a loudspeaker. Our design could utilize passive electronic components, discrete
BJTs, and operational amplifiers.


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II. Architecture Design:
1. Design Specifications

1.1. Input signal specifications

Signal voltage: 0.5VAC.
Signal source resistance 50 .

1.2. Equipment available for testing
Hardware: Oscilloscope, DMM, Generator, power supply.
Software: PSPICE.

1.3. Minimum Design Specification of the amplifier
Output power: 0.5W (minimum).
Load Impedance (speaker): 8.
Unity Gain Bandwidth: 20Hz 20 kHz (-3dB).
Idling power: < 1W.
Distortion: No distortion.

Instructor: NguyenVanTuan LabAssitance: NguyenTrungKien
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2. Block Diagram


Figure 1: Block Diagram
3. Discussion on the chosen architecture
After some debates, we decided to choose Power amplifier OCL to be the
architecture for our design. The reason behind is the architecture has so many
advantages over other architectures; for example, high efficiency, bandwidth gain,
power using factor, amplitude of output,
Go deeply into the circuit:
- Choosing BJT bases on the maximum values that match between our
calculation and database. These values must be made sure that we would
have maximum current, voltage and power.
- Choosing diode bases on familiar ones that used in the previous lab and
pre-lab.
- Choosing resistors that must match between the calculation and available
resistors in the market. Moreover, the number of diodes and their connection
Instructor: NguyenVanTuan LabAssitance: NguyenTrungKien
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in the circuit must bring a guarantee that the transistors will work correctly as
our design in the circuit.
- At the first time, we chose class-AB output stage since it has low output
impedance, high efficiency, reducing distortion Then, we improve it into
Darlington Amplifier with protecting circuit to increase the safety of circuit in
case unwanted problems occurring.
4. Trade offs
- Using class AB and its improvement (Darlington circuit) instead of class B at
output. The trade off in this case is lower efficiency, but minimized distortion.
- Negative feedback using in this circuit leads the circuit to be more complicated,
but its must be safer.
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III. Circuit Design:
1. Schematics



Figure 2: Overall Circuit


2. Explanation for working of each stages

2.1 The differential stage

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o Q7 is polarized to make the current, which can be adjusted by R8, stable;
and adjusted power for the middle point to be equal 0.
o Q8 and Q9 severed for differential circuit, made circuit stable.
o Q10 and Q11 made minor current.
o C2 used for short circuit in AC mode.
o R9 and R10 polarized for Q8 and Q9, and removed high frequency
signals in AC mode.
o R11 and R12 polarized for Q10 and Q11, controlled Q6, and determined
current ratio for minor part Q10 and Q11.
o R13 and R14 determine gain. R13 polarized for Q8 in DC mode.
o R15 polarized for Q9 in DC mode.
2.2 The middle stage

o D4 and D5 create difference voltage 2

to polarize Q5 to create current


in E of Q5. This current can be adjusted thank to R6.
o R5 makes forward bias for D4 and D5
o D1, D2, D3, and R7 used to get bias voltage for Darlington circuit (work
in AB stage).
o Q6 created output that is changed 360

with input.
2.3 The Darlington stage

When input signal is in positive half:

of Q3 increases => Q3 is forward bias. Then, the current goes


into B of Q1=> Q1 is forward bias=> current goes through +

to
Speaker and to mass.
In this case, Q4 is inverse bias=> Q2 doesnt draw current.
When input signal is in negative half:
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of Q4 decreases => Q4 is forward bias. Then, the current


withdraw from B of Q2=> Q2 is forward bias=> current goes from
mass to Speaker to

.
In this case, Q3 is inverse bias=> Q1 doesnt work.


3. Design equations and calculation

3.1. For the Darlington stage

3 =

= (

2
)
2

2(
1
+

).
2

We choose R1

, which is R1 = 0.5 => because it should be received


this value to satisfy the requirement of Darlington circuit.
Unfortunately, in the market, we just find the minimum resistor, which is
0.68 . Hence, in our circuit, R1 = R2 = 0.68 .
Then,

= 2

+
1
) = 2 3 8.68 = 7.22

1
+

=
7.22
0.68 + 8
= 0.83
With =0.8,

=
7.22
0.8
= 9.025
We choose VCC = 10V, and VEE = -10V

=
2

2
(
1
+

)
= 7.33

1
= 0.05 ( )

1=
0.05 + 0.83 = 0.88

1
=
1
2
0.88
2
0.68 = 0.26

1
=


1
= 7.33 3 0.26 = 4.07
1 :
+) > 4.07
Instructor: NguyenVanTuan LabAssitance: NguyenTrungKien
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+)

> 2

= 20
+)

> 2

= 2 0.88 = 1.76
, , : 1 = 22073
2 = 2940
:

1
= 0.88 =>

1
=

2073
=
0.88
75
= 12

To protect Q1 and Q2, as well as make Q3 and Q4 stable, we add R3 and R4
into the circuit.
:
3,4
=

1
10
= 1.2
=>

3
= 12 + 1.2 = 13.2
3 = 4 = 220
,

,
3 = 22073
4 = 2940

3.2. For the middle stage

Since diode D1, D2, D3, D4, D5 work with small current, we choose
D1= D2=D3=D4=D5=D1N4007
Characteristics of D1N4007 is:
+)

= 1
+)

= 0.7

= 10
Choose R5:
5 =

= 860
, 5 = 1 (2)

5
=

= 8.6
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5
=
5
+

= 19.3

6
= 4 15
6

15
= 47 6

4
= 175
, 6 = 100


1
+
2
+
3
+
4
= 4 0.6 = 2.4

_
= 4 0.7 = 2.8

= 10

= 2.4 2.8, :
7

_
3

10
= 30 7

_
3

10
= 70
, 7 = 75
,
5
.
=

6

, 2

=
6
+
5
.
+ 3

+
7
+
6
.

=
2


5
.
3


6
.

6
+
7

5 :

5
=

5
=
_3_
=

3
75 + 1
=
13.2
75 + 1
= 0.17

= 0.7

= 10
,

5
= 10 + 0.17 = 10.17
5 (10, 10)

5
=

5
(

6
+
_
) = 19.3 (10 + 2.8) = 6.5

5
=

5
= (0.17)(6.5) = 1.105

6
=

6
= (0.17)(10) = 1.7
5 6 :
+) > 2 1.7 = 3.4
+)

> 2

= 20
+)

> 2

= 2 10 = 20
, , : 5 = 2940; 6 = 22073

Instructor: NguyenVanTuan LabAssitance: NguyenTrungKien
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3.3. For the differential stage

The differential stage has function of reduce noise in the changing noise.
Combining with negative feedback from Darlington circuit (third stage), this first
stage play a very important role in quality of amplifier.
, :

6
=

3
75
=
0.17
75
= 2.27,

6
0.7
,

11

6
, ,

6

,

11

11
= 75

6
= 0.17

9
=

11
+

6
0.17

11
+

11
12 =

10
+

10
11,

8
=

9
=

10
=

11
, 11 = 12
, : 9 = 10

7
=

8
+

9
= 2 0.17 = 0.34

7
0.1 10,
8

10
= 1 8

1
= 10
, 8 = 1.5

7, 8, 9, 10 11 :
+)
8
=
9
> 0.17 10 = 1.7
+)
7
> 2
8
= 3.4
+)

> 2

9
= 2 0.17 = 0.34
, 9 11; 8 10
, , : 7 = 8 = 9 = 21015
10 = 11 = 23904
Instructor: NguyenVanTuan LabAssitance: NguyenTrungKien
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The rest components are chosen based on the previous lab in this course.

4. Simulation Results

Testing with sinusoidal signal input (red)
We get the in-phase amplified output (green)



Figure 3: input and output waveform


Figure 4: bandwidth
Some snap shots of DC current and DC voltage.
Instructor: NguyenVanTuan LabAssitance: NguyenTrungKien
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Figure 5: DC current

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Figure 6: DC voltage


Figure 7: DC power
5. Results


Figure 8: input and output waveform


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Figure 9: waveform at 20Hz and 20kHz

Conclusion: in theory, our project worked very well. It nearly was successful
in the first time testing.

6. Printed Circuit Board


Figure 10: The printed board that we implemented into the real one.
Instructor: NguyenVanTuan LabAssitance: NguyenTrungKien

09ECE | Group13 | NguyenNgocMinh | NgoTranDucThang | NguyenXuanTien

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Figure 11: The revised version of PCB after remove some mirror components.
Comment:
- The first Board (figure 10) is the one that we took to make DEMO. When testing
in theory, we didnt receive any error. Unfortunately, when implementing
directly to the real Board, since were just amateur in the first time doing this,
this board didnt work. We did try to check error in weld beads and fixed them,
but it still didnt work. Its so shame if we blamed this for lacking of time, but its
our current situation.
- The second board is the one that we did try to eliminate some components in
the protecting part of Darlington circuit, since we did test and realized that this
Instructor: NguyenVanTuan LabAssitance: NguyenTrungKien

09ECE | Group13 | NguyenNgocMinh | NgoTranDucThang | NguyenXuanTien

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part is somehow unnecessary. We remove them to make the circuit simpler
when implementing. Since we dont have chance to make it real, I just attached
here for referencing, for letting you know that we did really try for this project.

7. Price
Components Quantity Price Total
2SA940 3 3500 10500
Q2SC2073 3 3500 10500
Q2N3904 2 1000 2000
Q2SA1015 3 500 1500
2200F 25V 1 4800 4800
10F 2 500 1000
0.1F 1 400 400
8nF 1 100 100
1N4007 5 400 2000
Resistors 13 85 1105
R 3W 0.68 2 1900 3800

37705

Instructor: NguyenVanTuan LabAssitance: NguyenTrungKien

09ECE | Group13 | NguyenNgocMinh | NgoTranDucThang | NguyenXuanTien

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IV. Conclusion
After this lab, we are able to design a three stages amplifier with differential input.
Besides, we also recognized the importance of the Darlington circuit and got some
experiences in building the real board circuit. Finally, in addition to the received
knowledge getting from the laboratory, we also studied some of soft skills such as
how to synthesis knowledge from many sources and team work skill.
Instructor: NguyenVanTuan LabAssitance: NguyenTrungKien

09ECE | Group13 | NguyenNgocMinh | NgoTranDucThang | NguyenXuanTien

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V. References
1. 47387319-K-thut-mch-in-t-Phm-minh-Ha-in-t-tng-t.pdf
2. Microelectronic Circuit Design 3rd edition by R. Jaeger.pdf
3. Lectures of instructor.
4. Transistor Nhat (nhung transistor thong dung o Danang).pdf

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