L M 1 1 8 - N , L M 2 1 8 - N , L M 3 1 8 - N

www.ti.com SNOSBS8C MARCH 1998REVISED MARCH 2013

L M 1 1 8 - N / l m2 1 8 - N / L M 3 1 8 - N O p e r a tion a l A mp l if ie r s
Che ck f or Sa mp l e s : L M 1 1 8 - N , L M 2 1 8 - N , L M 3 1 8 - N
1 FEA TURES DESCRIPTIO N
The LM118 series are precision high speed
2 1 5 M Hz Sma l l Sign a l Ba n dwidth
operational amplifiers designed for applications
En s ur e d 50V/ s Sl e w Ra te
requiring wide bandwidth and high slew rate. They
M a ximum Bia s Cur r e n t of 2 50 n A
feature a factor of ten increase in speed over general
purpose devices without sacrificing DC performance.
O p e r a te s f r om Sup p l ie s of 5V to 2 0V
In te r n a l Fr e que n cy Comp e n s a tion The LM118 series has internal unity gain frequency
compensation. This considerably simplifies its
In p ut a n d O utp ut O ve r l oa d Pr ote cte d
application since no external components are
Pin Comp a tibl e with Ge n e r a l Pur p os e O p
necessary for operation. However, unlike most
A mp s
internally compensated amplifiers, external frequency
compensation may be added for optimum
performance. For inverting applications, feedforward
compensation will boost the slew rate to over
150V/s and almost double the bandwidth.
Overcompensation can be used with the amplifier for
greater stability when maximum bandwidth is not
needed. Further, a single capacitor can be added to
reduce the 0.1% settling time to under 1 s.
The high speed and fast settling time of these op
amps make them useful in A/D converters, oscillators,
active filters, sample and hold circuits, or general
purpose amplifiers. These devices are easy to apply
and offer an order of magnitude better AC
performance than industry standards such as the
LM709.
The LM218-N is identical to the LM118 except that
the LM218-N has its performance specified over a
25C to +85C temperature range. The LM318-N is
specified from 0C to +70C.
Fa s t Vol ta ge Fol l owe r
Do not hard-wire as voltage follower (R1 5 k)
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Copyright 19982013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
L M 1 1 8 - N , L M 2 1 8 - N , L M 3 1 8 - N
SNOSBS8C MARCH 1998REVISED MARCH 2013 www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
A bs ol ute M a ximum Ra tin gs
(1 ) (2 )
Supply Voltage 20V
Power Dissipation
(3)
500 mW
Differential Input Current
(4)
10 mA
Input Voltage
(5)
15V
Output Short-Circuit Duration Continuous
Operating Temperature Range
lm118-n 55C to +125C
LM218-N 25C to +85C
LM318-N 0C to +70C
Storage Temperature Range 65C to +150C
Lead Temperature (Soldering, 10 sec.)
TO-99 Package 300C
PDIP Package 260C
Soldering Information
Dual-In-Line Package
Soldering (10 sec.) 260C
SOIC Package
Vapor Phase (60 sec.) 215C
Infrared (15 sec.) 220C
ESD Tolerance
(6)
2000V
(1) Refer to RETS118X for LM118H and LM118J military specifications.
(2) If Military/Aerospace specified devices are required, please contact the TI Sales Office/Distributors for availability and specifications.
(3) The maximum junction temperature of the lm118-n is 150C, the LM218-N is 110C, and the LM318-N is 110C. For operating at
elevated temperatures, devices in the LMC package must be derated based on a thermal resistance of 160C/W, junction to ambient, or
20C/W, junction to case. The thermal resistance of the dual-in-line package is 100C/W, junction to ambient.
(4) The inputs are shunted with back-to-back diodes for overvoltage protection. Therefore, excessive current will flow if a differential input
voltage in excess of 1V is applied between the inputs unless some limiting resistance is used.
(5) For supply voltages less than 15V, the absolute maximum input voltage is equal to the supply voltage.
(6) Human body model, 1.5 k in series with 100 pF.
El e ctr ica l Cha r a cte r is tics
(1 )
Pa r a me te r Con dition s L M 1 1 8 - N / L M 2 1 8 - N L M 3 1 8 - N Un its
M in Typ M a x M in Typ M a x
Input Offset Voltage T
A
= 25C 2 4 4 10 mV
Input Offset Current T
A
= 25C 6 50 30 200 nA
Input Bias Current T
A
= 25C 120 250 150 500 nA
Input Resistance T
A
= 25C 1 3 0.5 3 M
Supply Current T
A
= 25C 5 8 5 10 mA
Large Signal Voltage Gain T
A
= 25C, V
S
= 15V 50 200 25 200 V/mV
V
OUT
= 10V, R
L
2 k
Slew Rate T
A
= 25C, V
S
= 15V, A
V
= 1
50 70 50 70 V/s
(2)
Small Signal Bandwidth T
A
= 25C, V
S
= 15V 15 15 MHz
Input Offset Voltage 6 15 mV
Input Offset Current 100 300 nA
(1) These specifications apply for 5V V
S
20V and 55C T
A
+125C (lm118-n), 25C T
A
+85C (LM218-N), and 0C T
A

+70C (LM318-N). Also, power supplies must be bypassed with 0.1 F disc capacitors.
(2) Slew rate is tested with V
S
= 15V. The lm118-n is in a unity-gain non-inverting configuration. V
IN
is stepped from 7.5V to +7.5V and
vice versa. The slew rates between 5.0V and +5.0V and vice versa are tested and specified to exceed 50V/s.
2 Submit Documentation Feedback Copyright 19982013, Texas Instruments Incorporated
Product Folder Links: LM118-N LM218-N LM318-N
L M 1 1 8 - N , L M 2 1 8 - N , L M 3 1 8 - N
www.ti.com SNOSBS8C MARCH 1998REVISED MARCH 2013
El e ctr ica l Cha r a cte r is tics
(1 )
(con tin ue d)
Pa r a me te r Con dition s L M 1 1 8 - N / L M 2 1 8 - N L M 3 1 8 - N Un its
M in Typ M a x M in Typ M a x
Input Bias Current 500 750 nA
Supply Current T
A
= 125C 4.5 7 mA
Large Signal Voltage Gain V
S
= 15V, V
OUT
= 10V 25 20 V/mV
R
L
2 k
Output Voltage Swing V
S
= 15V, R
L
= 2 k 12 13 12 13 V
Input Voltage Range V
S
= 15V 11.5 11. V
5
Common-Mode Rejection Ratio 80 100 70 100 dB
Supply Voltage Rejection Ratio 70 80 65 80 dB
Copyright 19982013, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Links: LM118-N LM218-N LM318-N
L M 1 1 8 - N , L M 2 1 8 - N , L M 3 1 8 - N
SNOSBS8C MARCH 1998REVISED MARCH 2013 www.ti.com
TYPICA L PERFO RM A N CE CHA RA CTERISTICS
LM118-N, LM218-N
In p ut Cur r e n t Vol ta ge Ga in
Figur e 1 . Figur e 2 .
Powe r Sup p l y Re je ction In p ut N ois e Vol ta ge
Figur e 3 . Figur e 4.
Common M ode Re je ction Sup p l y Cur r e n t
Figur e 5. Figur e 6.
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Product Folder Links: LM118-N LM218-N LM318-N
L M 1 1 8 - N , L M 2 1 8 - N , L M 3 1 8 - N
www.ti.com SNOSBS8C MARCH 1998REVISED MARCH 2013
TYPICA L PERFO RM A N CE CHA RA CTERISTICS (con tin ue d)
LM118-N, LM218-N
Cl os e d L oop O utp ut
Imp e da n ce Cur r e n t L imitin g
Figur e 7. Figur e 8 .
In p ut Cur r e n t Un ity Ga in Ba n dwidth
Figur e 9. Figur e 1 0.
Vol ta ge Fol l owe r Sl e w Ra te In ve r te r Se ttl in g Time
Figur e 1 1 . Figur e 1 2 .
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Product Folder Links: LM118-N LM218-N LM318-N
L M 1 1 8 - N , L M 2 1 8 - N , L M 3 1 8 - N
SNOSBS8C MARCH 1998REVISED MARCH 2013 www.ti.com
TYPICA L PERFO RM A N CE CHA RA CTERISTICS (con tin ue d)
LM118-N, LM218-N
L a r ge Sign a l Fr e que n cy Re s p on s e O p e n L oop Fr e que n cy Re s p on s e
Figur e 1 3 . Figur e 1 4.
Vol ta ge Fol l owe r Pul s e Re s p on s e L a r ge Sign a l Fr e que n cy Re s p on s e
Figur e 1 5. Figur e 1 6.
O p e n L oop Fr e que n cy Re s p on s e In ve r te r Pul s e Re s p on s e
Figur e 1 7. Figur e 1 8 .
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Product Folder Links: LM118-N LM218-N LM318-N
L M 1 1 8 - N , L M 2 1 8 - N , L M 3 1 8 - N
www.ti.com SNOSBS8C MARCH 1998REVISED MARCH 2013
Typ ica l Pe r f or ma n ce Cha r a cte r is tics
LM318-N
In p ut Cur r e n t Vol ta ge Ga in
Figur e 1 9. Figur e 2 0.
Powe r Sup p l y Re je ction In p ut N ois e Vol ta ge
Figur e 2 1 . Figur e 2 2 .
Common M ode Re je ction Sup p l y Cur r e n t
Figur e 2 3 . Figur e 2 4.
Copyright 19982013, Texas Instruments Incorporated Submit Documentation Feedback 7
Product Folder Links: LM118-N LM218-N LM318-N
L M 1 1 8 - N , L M 2 1 8 - N , L M 3 1 8 - N
SNOSBS8C MARCH 1998REVISED MARCH 2013 www.ti.com
Typ ica l Pe r f or ma n ce Cha r a cte r is tics (con tin ue d)
LM318-N
Cl os e d L oop O utp ut Imp e da n ce Cur r e n t L imitin g
Figur e 2 5. Figur e 2 6.
In p ut Cur r e n t Un ity Ga in Ba n dwidth
Figur e 2 7. Figur e 2 8 .
Vol ta ge Fol l owe r Sl e w Ra te In ve r te r Se ttl in g Time
Figur e 2 9. Figur e 3 0.
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Product Folder Links: LM118-N LM218-N LM318-N
L M 1 1 8 - N , L M 2 1 8 - N , L M 3 1 8 - N
www.ti.com SNOSBS8C MARCH 1998REVISED MARCH 2013
Typ ica l Pe r f or ma n ce Cha r a cte r is tics (con tin ue d)
LM318-N
L a r ge Sign a l Fr e que n cy Re s p on s e O p e n L oop Fr e que n cy Re s p on s e
Figur e 3 1 . Figur e 3 2 .
Vol ta ge Fol l owe r Pul s e Re s p on s e L a r ge Sign a l Fr e que n cy Re s p on s e
Figur e 3 3 . Figur e 3 4.
O p e n L oop Fr e que n cy Re s p on s e In ve r te r Pul s e Re s p on s e
Figur e 3 5. Figur e 3 6.
Copyright 19982013, Texas Instruments Incorporated Submit Documentation Feedback 9
Product Folder Links: LM118-N LM218-N LM318-N
L M 1 1 8 - N , L M 2 1 8 - N , L M 3 1 8 - N
SNOSBS8C MARCH 1998REVISED MARCH 2013 www.ti.com
A UXIL IA RY CIRCUITS
Figur e 3 9. O f f s e t Ba l a n cin g
*Balance circuit necessary for increased
slew.
Slew rate typically 150V/s.
Figur e 3 7. Fe e df or wa r d Comp e n s a tion
f or Gr e a te r In ve r tin g Sl e w Ra te
Figur e 40. Is ol a tin g L a r ge Ca p a citive L oa ds
Figur e 41 . O ve r comp e n s a tion
Slew and settling time to 0.1% for a 10V
step change is 800 ns.
Figur e 3 8 . Comp e n s a tion f or M in imum Se ttl in g
Time
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Product Folder Links: LM118-N LM218-N LM318-N
L M 1 1 8 - N , L M 2 1 8 - N , L M 3 1 8 - N
www.ti.com SNOSBS8C MARCH 1998REVISED MARCH 2013
TYPICA L A PPL ICA TIO N S
Do not hard-wire as voltage follower (R1 5 k)
Figur e 42 . Fa s t Vol ta ge Fol l owe r
C
F
= Large
(C
F
50 pF)
*Do not hard-wire as integrator or slow inverter; insert a 10k-5 pF network in series with the input, to prevent
oscillation.
Do not hard-wire as voltage follower (R1 5 k)
Figur e 43 .
Figur e 45. Dif f e r e n tia l A mp l if ie
Figur e 44. Fa s t Summin g A mp l if ie r
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Product Folder Links: LM118-N LM218-N LM318-N
L M 1 1 8 - N , L M 2 1 8 - N , L M 3 1 8 - N
SNOSBS8C MARCH 1998REVISED MARCH 2013 www.ti.com
Figur e 46. Fa s t Sa mp l e a n d Hol d
*OptionalReduces settling time.
Figur e 47. D/ A Con ve r te r Us in g L a dde r N e twor k
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L M 1 1 8 - N , L M 2 1 8 - N , L M 3 1 8 - N
www.ti.com SNOSBS8C MARCH 1998REVISED MARCH 2013
Output zero.
*Y zero
+X zero
Full scale adjust.
Figur e 48 . Four Qua dr a n t M ul tip l ie r
*OptionalReduces settling time.
Figur e 49. D/ A Con ve r te r Us in g Bin a r y We ighte d N e twor k
Copyright 19982013, Texas Instruments Incorporated Submit Documentation Feedback 13
Product Folder Links: LM118-N LM218-N LM318-N
L M 1 1 8 - N , L M 2 1 8 - N , L M 3 1 8 - N
SNOSBS8C MARCH 1998REVISED MARCH 2013 www.ti.com
Figur e 50. Fa s t Summin g A mp l if ie r with L ow In p ut Cur r e n t
Figur e 51 . We in Br idge Sin e Wa ve O s cil l a tor
Figur e 52 . In s tr ume n ta tion A mp l if ie r
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L M 1 1 8 - N , L M 2 1 8 - N , L M 3 1 8 - N
www.ti.com SNOSBS8C MARCH 1998REVISED MARCH 2013
Sche ma tic Dia gr a m
Copyright 19982013, Texas Instruments Incorporated Submit Documentation Feedback 15
Product Folder Links: LM118-N LM218-N LM318-N
L M 1 1 8 - N , L M 2 1 8 - N , L M 3 1 8 - N
SNOSBS8C MARCH 1998REVISED MARCH 2013 www.ti.com
Pin Dia gr a m
Available per JM38510/10107.
Available per JM38510/10107.
Dua l - In - L in e Pa cka ge
(Top Vie w)
Dua l - In - L in e Pa cka ge
Se e Pa cka ge N umbe r J (R- GDIP- T1 4)
(Top Vie w)
Se e Pa cka ge N umbe r N A B008 A , D (R- PDSO - G8 ),
or P (R- PDIP- T8 )
Pin connections shown on schematic diagram and typical applications are for TO-99 package.
TO - 99 Pa cka ge
(Top Vie w)
Se e Pa cka ge N umbe r L M C (O - M BCY- W8 )
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L M 1 1 8 - N , L M 2 1 8 - N , L M 3 1 8 - N
www.ti.com SNOSBS8C MARCH 1998REVISED MARCH 2013
REVISIO N HISTO RY
Cha n ge s f r om Re vis ion B (M a r ch 2 01 3 ) to Re vis ion C Pa ge
Changed layout of National Data Sheet to TI format .......................................................................................................... 16
Copyright 19982013, Texas Instruments Incorporated Submit Documentation Feedback 17
Product Folder Links: LM118-N LM218-N LM318-N
PACKAGE OPTION ADDENDUM
www.ti.com 12-Jul-2014
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing
Pins Package
Qty
Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (C) Device Marking
(4/5)
Samples
LM118H ACTIVE TO-99 LMC 8 500 TBD Call TI Call TI -55 to 125 LM118H
LM118H/NOPB ACTIVE TO-99 LMC 8 500 Green (RoHS
& no Sb/Br)
POST-PLATE Level-1-NA-UNLIM -55 to 125 LM118H
LM318M NRND SOIC D 8 95 TBD Call TI Call TI 0 to 70 LM
318M
LM318M/NOPB ACTIVE SOIC D 8 95 Green (RoHS
& no Sb/Br)
CU SN Level-1-260C-UNLIM 0 to 70 LM
318M
LM318MX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br)
CU SN Level-1-260C-UNLIM 0 to 70 LM
318M
LM318N LIFEBUY PDIP P 8 40 TBD Call TI Call TI 0 to 70 LM
318N
LM318N/NOPB ACTIVE PDIP P 8 40 Green (RoHS
& no Sb/Br)
CU SN Level-1-NA-UNLIM 0 to 70 LM
318N

(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)

(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

PACKAGE OPTION ADDENDUM
www.ti.com 12-Jul-2014
Addendum-Page 2
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.

(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type
Package
Drawing
Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
(mm)
Pin1
Quadrant
LM318MX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 23-Sep-2013
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
LM318MX/NOPB SOIC D 8 2500 367.0 367.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 23-Sep-2013
Pack Materials-Page 2
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