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ECE-4430, Fall 2014, Maysam Ghovanloo, Ph.D.

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Instructor: Maysam Ghovanloo, PhD
(mghovan@ece.gate.edu)
Analog Integrated Circuits Analog Integrated Circuits
ECE - 4430
School of Electrical and Computer Engineering
Georgia Institute of Technology
Fall - 2014
GTA: N/A :-(
ECE-4430, Fall 2014, Maysam Ghovanloo, Ph.D.
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Overview
Introduction
Why is Analog IC important?
Example: WINeR-6 System-on-a-Chip (SoC)
Words of wisdom from Analog IC veterans
Course syllabus
ECE-4430, Fall 2014, Maysam Ghovanloo, Ph.D.
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Multichannel Neural Recording
Courtesy of
Prof. Gary
Duncan
Brain has 10
9
to 10
12
neurons
depending on the species.
Human brain is the most
complex living structure in
the universe (so far).
Human brain has as many as
10
14
synapses.
Neuroscientists are interested in
understand the relationship between
large populations of neurons.
For this purpose, they need to record
simultaneously from a large number
of recording channels.
ECE-4430, Fall 2014, Maysam Ghovanloo, Ph.D.
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Multichannel Wireless Neural Recording
In animal experiments:
1. Improve SNR.
2. Reduce motion artifacts.
3. Long term experiments.
4. Eliminate the tethering
effect, which can bias the
animal behavior.
In human applications:
1. Reduce the risk of infection.
2. Reduce the risk of damage.
3. Improve users comfort level.
4. Increase mobility.
5. More aesthetically acceptable.
MIT Technology Review May 2003
Hochberg et al. Nature 2006
Yin and Ghovanloo, EMBS 2008
ECE-4430, Fall 2014, Maysam Ghovanloo, Ph.D.
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WINeR-6 System-On-A-Chip
An Inductively Powered 32-Channel Wireless Neural Recording
System-on-a-Chip for Neuroscience Applications
Lee et al., ISSCC 2010, TBioCAS 2010
ECE-4430, Fall 2014, Maysam Ghovanloo, Ph.D.
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WINeR-6 System-On-A-Chip
WINeR-6 System Block Diagram
Lee et al., ISSCC 2010, TBioCAS 2010
ECE-4430, Fall 2014, Maysam Ghovanloo, Ph.D.
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WINeR-6 System-On-A-Chip
WINeR-6 ASIC
Lee et al., ISSCC 2010, TBioCAS 2010
ECE-4430, Fall 2014, Maysam Ghovanloo, Ph.D.
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WINeR-6 System Bench-top Testing Setup
Lee et al., ISSCC 2010, TBioCAS 2010
ECE-4430, Fall 2014, Maysam Ghovanloo, Ph.D.
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Recording with two WINeR receivers in parallel: 4 Rx antennas
Long-Evans rat completing 40 laps on a circular track (1m)
32 tetrodes (128 electrodes) in the hippocampus region
WINeR-6 System In Vivo Testing Setup
(Manns Lab, Emory University)
Lee et al., EMBC 2012, TBME 2013
ECE-4430, Fall 2014, Maysam Ghovanloo, Ph.D.
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Constructing Place-Specific Firing Fields
Brighter colors indicate higher firing rates of the classified unit.
Place field of WINeR-6 is similar to hardwired recording (gold
standard) in terms of place-cell concentration and firing rate.
WINeR-6 wireless place fields N-Spike hardwired place fields
Lee et al., EMBC 2012, TBME 2013
ECE-4430, Fall 2014, Maysam Ghovanloo, Ph.D.
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Words of Wisdom
Dr. Timothy Dennison, Director of Neuroengineering, Medtronic Inc.
1. Always keep a mind to the system engineering problem. Before
launching into a circuit's details, understand how it is used to solve the
overall system's needs. You will probably find new opportunities
and/or constraints with this understanding. For example, what load
must your circuit drive? I knew a student who inadvertently hooked up a
microcontroller to an electric water pump, not knowing his PWM driver
output" was going to be expected to directly power a pump that drew 10
amps at start up. Pow!
2. Understand the fundamentals. Simulators are usefuls tool, but should
not replace your design analysis and intuition. Remember, a human
designed the simulator too and it is based on approximations... Great
ideas come from intuition, which is gained by tough design experience
and pencil to paper.
3. Get your hands dirty. State of the art analog invariably involves bench
time for verification and debugging. Get comfortable designing
experiments to uncover issues.
ECE-4430, Fall 2014, Maysam Ghovanloo, Ph.D.
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Words of Wisdom
4. The design does not stop when the schematic simulator (aka SPICE)
shows acceptable operation. Make sure layout includes key
considerations for the physics of the design like parasitics and
matching... Run layout parasitic extractor and redo key simulations.
Choose packages wisely... Also design for how you might want to test
your circuit efficiently. In a nutshell, I call analog circuit design an
"applied physics" problem to keep the right perspective.
5. Try to break your circuit in simulation and think about what might go
wrong. Designers can be optimists and this can lead to trouble. Add
test resistors to the supplies and see what affect that has in the
simulation. If your circuit came back dead, what points would you
want to have access to on the test bus? Think as much about how
your circuit might fail as why it should work! The best designers I
know are a bit paranoid.
ECE-4430, Fall 2014, Maysam Ghovanloo, Ph.D.
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Course Syllabus
Course Syllabus:
http://www.ece.gatech.edu/academic/courses/ece4430/F14/
index_files/ECE4430_Syllabus.htm
Class Webpage:
http://www.ece.gatech.edu/academic/courses/ece4430/F14
Course Calendar:
http://www.ece.gatech.edu/academic/courses/ece4430/F14/
index_files/ECE4430_Calendar.htm
Textbook website:
http://cmosedu.com/cmos1/book.htm
ECE-4430, Fall 2014, Maysam Ghovanloo, Ph.D.
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Important Dates
Exam/Project Date Time
Project 1 TBD In class
Midterm Fri 10/24/14 In class
Project 2 TBD In class
Final Wed 12/10/14 11:30am - 2:20pm
Projects:
Based on a set of given specifications in a given CMOS process
Project 1 A complete voltage/current reference generator
Project 2 A complete OpAmp + reference generator
Exams:
Cumulative, everything covered in class and in the textbook from
the beginning to the lecture before the exam.

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