IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO.

6, JUNE 2013 3047

A High Step-Up Converter With a Voltage Multiplier
Module for a Photovoltaic System
Kuo-Ching Tseng, Chi-Chih Huang, and Wei-Yuan Shih
AbstractAnovel high step-up converter is proposed for a front-
end photovoltaic system. Through a voltage multiplier module, an
asymmetrical interleaved high step-up converter obtains high step-
up gain without operating at an extreme duty ratio. The voltage
multiplier module is composed of a conventional boost converter
and coupled inductors. An extra conventional boost converter is
integrated into the rst phase to achieve a considerably higher
voltage conversion ratio. The two-phase conguration not only
reduces the current stress through each power switch, but also
constrains the input current ripple, which decreases the conduc-
tion losses of metaloxidesemiconductor eld-effect transistors
(MOSFETs). In addition, the proposed converter functions as an
active clamp circuit, which alleviates large voltage spikes across
the power switches. Thus, the low-voltage-rated MOSFETs can be
adopted for reductions of conduction losses and cost. Efciency
improves because the energy stored in leakage inductances is re-
cycled to the output terminal. Finally, the prototype circuit with
a 40-V input voltage, 380-V output, and 1000- W output power is
operated to verify its performance. The highest efciency is 96.8%.
Index TermsBoostyback converter, high step-up, photo-
voltaic system, voltage multiplier module.
I. INTRODUCTION
R
ENEWABLE sources of energy are increasingly valued
worldwide because of energy shortage and environmental
contamination. Renewable energy systems generate low volt-
age output; thus, high step-up dc/dc converters are widely em-
ployed in many renewable energy applications, including fuel
cells, wind power, and photovoltaic systems [1][8]. Among
renewable energy systems, photovoltaic systems are expected
to play an important role in future energy production [9][17].
Such systems transform light energy into electrical energy, and
convert low voltage into high voltage via a step-up converter,
which can convert energy into electricity using a grid-by-grid
inverter or store energy into a battery set. Fig. 1 shows a typical
photovoltaic system that consists of a solar module, a high step-
up converter, a charge-discharge controller, a battery set, and
an inverter. The high step-up converter performs importantly
among the system because the system requires a sufciently
high step-up conversion.
Theoretically, conventional step-up converters, such as the
boost converter and yback converter, cannot achieve a high
Manuscript received May 14, 2012; revised July 30, 2012; accepted August
24, 2012. Date of current version December 7, 2012. Recommended for publi-
cation by Associate Editor R. Redl.
The authors are with the Department of Electronic Engineering, Na-
tional Kaohsiung First University of Science and Technology, Kaohsi-
ung 811, Taiwan (e-mail: jerry@nkfust.edu.tw; u0052809@nkfust.edu.tw;
bit1417@hotmail.com).
Digital Object Identier 10.1109/TPEL.2012.2217157
Fig. 1. Typical photovoltaic system.
Fig. 2. High step-up techniques based on a classical boost converter. (a) Inte-
grated ybackboost converter structure. (b) Interleaved boost converter with a
voltage-lift capacitor structure.
step-up conversion with high efciency because of the resis-
tances of elements or leakage inductance. Thus, a modied
boostyback converter was proposed [18][20], and many con-
verters that use the coupled inductor for a considerably high-
voltage conversion ratio were also proposed [21][25].
Despite these advances, conventional step-up converters with
a single switch are unsuitable for high-power applications given
an input large current ripple, which increases conduction losses.
Thus, numerous interleaved structures and some asymmetrical
interleaved structures are extensively used [26][33]. The cur-
rent study also presents an asymmetrical interleaved converter
for a high step-up and high-power application.
Modifying a boostyback converter, shown in Fig. 2(a), is
one of the simple approaches to achieving high step-up gain; this
gain is realized via a coupled inductor. The performance of the
converter is similar to an active-clamped yback converter; thus,
the leakage energy is recovered to the output terminal [20]. An
interleaved boost converter with a voltage-lift capacitor shown
in Fig. 2(b) is highly similar to the conventional interleaved type.
0885-8993/$31.00 2012 IEEE
3048 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 6, JUNE 2013
Fig. 3. (a) Proposed high step-up converter with a voltage multiplier module. (b) Equivalent circuit of the proposed converter.
It obtains extra voltage gain through the voltage-lift capacitor,
and reduces the input current ripple, which is suitable for power
factor correction (PFC) and high-power applications [34].
In this paper, an asymmetrical interleaved high step-up con-
verter that combines the advantages of the aforementioned con-
verters is proposed, which combined the advantages of both.
In the voltage multiplier module of the proposed converter, the
turns ratio of coupled inductors can be designed to extend volt-
age gain, and a voltage-lift capacitor offers an extra voltage
conversion ratio.
The advantages of the proposed converter are as follows:
1) the converter is characterized by a low input current ripple
and low conduction losses, making it suitable for high-
power applications;
2) the converter achieves the high step-up voltage gain that
renewable energy systems require;
3) leakage energy is recycled and sent to the output terminal,
and alleviates large voltage spikes on the main switch;
4) the main switch voltage stress of the converter is substan-
tially lower than that of the output voltage;
5) low cost and high efciency are achieved by the low
r
DS(on)
and low voltage rating of the power switching
device.
II. OPERATING PRINCIPLE DESCRIPTION
The proposed high step-up converter with voltage multiplier
module is shown in Fig. 3(a). A conventional boost converter
and two coupled inductors are located in the voltage multiplier
module, which is stacked on a boost converter to form an asym-
metrical interleaved structure.
Primary windings of the coupled inductors with N
p
turns
are employed to decrease input current ripple, and secondary
windings of the coupled inductors with N
s
turns are connected
in series to extend voltage gain. The turns ratios of the coupled
inductors are the same. The coupling references of the inductors
are denoted by
.
and

in Fig. 3.
The equivalent circuit of the proposed converter is shown in
Fig. 3(b), where L
m1
and L
m2
are the magnetizing inductors,
L
k1
and L
k2
represent the leakage inductors, S
1
and S
2
denote
the power switches, C
b
is the voltage-lift capacitor, and n is
dened as a turns ratio N
s
/N
p
.
The proposed converter operates in continuous conduction
mode (CCM), and the duty cycles of the power switches during
steady operation are interleaved with a 180

phase shift; the duty

cycles are greater than 0.5. The key steady waveforms in one
switching period of the proposed converter contain six modes,
which are depicted in Fig. 4, and Fig. 5 shows the topological
stages of the circuit.
Mode 1 [t
0
, t
1
]: At t=t
0
, the power switches S
1
and S
2
are
both turned ON. All of the diodes are reversed-biased. Mag-
netizing inductors L
m1
and L
m2
as well as leakage inductors
L
k1
and L
k2
are linearly charged by the input voltage source
V
in
.
Mode 2 [t
1
, t
2
]: At t=t
1
, the power switch S
2
is switched
OFF, thereby turning ON diodes D
2
and D
4
. The energy that
magnetizing inductor L
m2
has stored is transferred to the sec-
ondary side charging the output lter capacitor C
3
. The input
voltage source, magnetizing inductor L
m2
, leakage inductor
L
k2
, and voltage-lift capacitor C
b
release energy to the output
lter capacitor C
1
via diode D
2
, thereby extending the voltage
on C
1
.
Mode 3 [t
2
, t
3
]: At t=t
2
, diode D
2
automatically switches
OFF because the total energy of leakage inductor L
k2
has been
completely released to the output lter capacitor C
1
. Magnetiz-
ing inductor L
m2
transfers energy to the secondary side charging
the output lter capacitor C
3
via diode D
4
until t
3
.
Mode 4 [t
3
, t
4
]: At t=t
3
, the power switch S
2
is switched
ON and all the diodes are turned OFF. The operating states of
modes 1 and 4 are similar.
Mode 5 [t
4
, t
5
]: At t=t
4
, the power switch S
1
is switched
OFF, which turns ON diodes D
1
and D
3
. The energy stored in
magnetizing inductor L
m1
is transferred to the secondary side
charging the output lter capacitor C
2
. The input voltage source
TSENG et al.: HIGH STEP-UP CONVERTER WITH A VOLTAGE MULTIPLIER MODULE FOR A PHOTOVOLTAIC SYSTEM 3049
Fig. 4. Steady waveforms of the proposed converter at CCM.
and magnetizing inductor L
m1
release energy to voltage-lift
capacitor C
b
via diode D
1
, which stores extra energy in C
b
.
Mode 6 [t
5
, t
0
]: At t=t
5
, diode D
1
is automatically turned
OFF because the total energy of leakage inductor L
k1
has been
completely released to voltage-lift capacitor C
b
. Magnetizing
inductor L
m1
transfers energy to the secondary side charging
the output lter capacitor C
2
via diode D
3
until t
0
.
III. STEADY-STATE ANALYSIS
The transient characteristics of circuitry are disregarded
to simplify the circuit performance analysis of the proposed
converter in CCM, and some formulated assumptions are as
follows:
1) all of the components in the proposed converter are ideal;
2) leakage inductors L
k1
and L
k2
are neglected;
3) voltage V
Cb
, V
C1
, V
C2
, and V
C3
are considered to be con-
stant because of innitely large capacitance.
A. Voltage Gain
The rst-phase converter can be regarded as a conventional
boost converter; thus, voltage V
Cb
can be derived from
V
Cb
=
1
1 D
V
in
. (1)
When switch S
1
is turned ON and switch S
2
is turned OFF,
voltage V
C1
can be derived from
V
C1
=
1
1 D
V
in
+ V
Cb
=
2
1 D
V
in
. (2)
The output lter capacitors C
2
and C
3
are charged by energy
transformation from the primary side. When S
2
is in turn-on
state and S
1
is in turn-off state, V
C2
is equal to induced voltage
of N
s1
plus induced voltage of N
s2
, and when S
1
is in turn-on
state and S
2
is in turn-off state, V
C3
is also equal to induced
voltage of N
s1
plus induced voltage of N
s2
. Thus, voltages V
c2
and V
c3
can be derived from
V
C2
= V
C3
= n V
in

1 +
D
1 D

=
n
1 D
V
in
. (3)
The output voltage can be derived from
V
o
= V
C1
+ V
C2
+ V
C3
=
2n + 2
1 D
V
in
. (4)
The voltage gain of the proposed converter is
V
o
V
in
=
2n + 2
1 D
. (5)
Equation (5) conrms that the proposed converter has a high
step-up voltage gain without an extreme duty cycle. The curve
of the voltage gain related to turns ratio n and duty cycle is
shown in Fig. 6. When the duty cycle is merely 0.6, the voltage
gain reaches 10 at a turns ratio n of 1; the voltage gain reaches
30 at a turns ratio n of 5.
B. Voltage Stresses on Semiconductor Components
The voltage ripples on the capacitors are ignored to simplify
the voltage stress analyses of the components of the proposed
converter.
The voltage stresses on power switches S
1
and S
2
are derived
from
V
S1
= V
S2
=
1
1 D
V
in
. (6)
The voltage stresses on the power switches S
1
and S
2
related
to the output voltage V
o
and the turns ratio n can be expressed
as
V
S1
= V
S2
= V
o

2n + 1
1 D
V
in
. (7)
Equations (6) and (7) conrm that low-voltage-rated metal
oxidesemiconductor eld-effect transistors (MOSFETs) with
low R
DSON
can be adopted for the proposed converter to
reduce conduction losses and costs. This feature makes our
3050 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 6, JUNE 2013
Fig. 5. Operating modes of the proposed converter. (a) Mode 1 [t
0
, t
1
]. (b) Mode 2 [t
1
, t
2
]. (c) Mode 3 [t
2
, t
3
]. (d) Mode 4 [t
3
, t
4
]. (e) Mode 5 [t
4
, t
5
].
(f) Mode 6 [t
5
, t
0
].
converter suitable for high step-up and high-power applications.
The voltage stresses on the power switches account for half of
output voltage V
o
, even if turns ratio n is 0.
The voltage stress on diode D
1
is equal to V
C1
, and the
voltage stress on diode D
2
is voltage V
C1
minus voltage V
Cb
.
These voltage stresses can be derived from
V
D1
= V
C1
=
2
1 D
V
in
(8)
TSENG et al.: HIGH STEP-UP CONVERTER WITH A VOLTAGE MULTIPLIER MODULE FOR A PHOTOVOLTAIC SYSTEM 3051
Fig. 6. Voltage gain versus turns ratio n and duty cycle.
V
D2
= V
C1
V
Cb
=
1
1 D
V
in
. (9)
The voltage stresses on the diodes D
1
and D
2
related to the
output voltage V
o
and the turns ratio n can be expressed as
V
D1
= V
o

2n
1 D
V
in
(10)
V
D2
= V
o

2n + 1
1 D
V
in
. (11)
The voltage stresses on diodes D
1
and D
2
are close on power
switches S
1
and S
2
. Although the voltage stress on diode D
1
is larger, it accounts for only half of the output voltage V
o
at a
turns ratio n of 1. The voltage stresses on the diodes are lower
as the voltage gain is extended by increasing turns ratio n.
The voltage stresses on diodes D
3
and D
4
both equal the V
C2
plus V
C3
, which can be derived from
V
D3
= V
D4
=
2n
1 D
V
in
. (12)
The voltage stresses on the diodes D
3
and D
4
related to the
output voltage V
o
and the turns ratio n can be expressed as
V
D3
= V
D4
= V
o

2
1 D
V
in
. (13)
Although the voltage stresses on the diodes D
3
and D
4
in-
crease as the turns ratio n increases, the voltage stresses on the
diodes D
3
and D
4
are always lower than the output voltage.
The relationship between the voltage stresses on all the semi-
conductor components and the turns ratio n is illustrated in
Fig. 7.
C. Analysis of Conduction Losses
Some conduction losses are caused by resistances of semicon-
ductor components and coupled inductors. Thus, all the com-
ponents in the proposed converter are not assumed to be ideal,
except for all the capacitors. Diode reverse recovery problems,
core losses, switching losses, and the ESR of capacitors are not
discussed in this section. The characteristics of leakage induc-
tors are disregarded because of energy recycling. The equivalent
circuit, which includes the conduction losses of coupled induc-
tors and semiconductor components, is shown in Fig. 8, in which
Fig. 7. Voltage stresses on semiconductor components versus turns ratio n.
Fig. 8. Equivalent circuit including conduction losses of coupled inductors
and semiconductor components.
r
L11
and r
L21
are the copper resistances of primary windings of
the coupled inductor; r
L12
and r
L22
are the copper resistances
of secondary windings of the coupled inductor; r
DS1
and r
DS2
denote the on-resistance of power switches; V
D1
, V
D2
, V
D3
, and
V
D4
denote the forward biases of the diodes; and r
D1
, r
D2
, r
D3
,
and r
D4
are the resistances of the diodes.
Small-ripple approximation was used to calculate conduction
losses. Thus, all currents that pass through components were
approximated by the dc components. The magnetizing currents
and capacitor voltages are assumed constant because of the
innite values of magnetizing inductors and capacitors. Fig. 9
3052 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 6, JUNE 2013
Fig. 9. PWM signal of S
1
and S
2
.
shows the PWM signals of S
1
and S
2
. The equivalent operation
states, including the four modes, are shown in Fig. 10.
Mode 1 [0, (D0.5)]: In this mode, power switches S
1
and S
2
are turned ON, and diodes D
1
, D
2
, D
3
, and D
4
are turned OFF.
The equivalent circuit is shown in Fig. 10(a), and the following
equations can be derived:
V
in
= I
Lm1
(r
L11
+ r
DS1
) + V
Lm1
(14)
V
in
= I
Lm2
(r
L21
+ r
DS2
) + V
Lm2
. (15)
Mode 2 [(D0.5), 0.5]: In this mode, power switch S
2
is
turned OFF, and diodes D
2
and D
4
are turned ON. The equiva-
lent circuit is shown in Fig. 10(b), and the following equations
can be derived:
V
in
= (I
Lm1
+ nI
D4
) (r
L11
+ r
DS1
) + V
Lm1
(16)
V
in
= (I
Lm2
nI
D4
) (r
L21
+ r
D2
) + V
Lm2
+ V
D2
V
Cb
+ V
C1
(17)
V
C3
= n(V
Lm1
V
Lm2
) I
D4
(r
L21
+ r
L22
+ r
D4
) V
D4
. (18)
Mode 3 [0.5, D]: This mode is similar to mode 1. The equiv-
alent circuit is shown in Fig. 10(c), and the following equations
can be derived:
V
in
= I
Lm1
(r
L11
+ r
DS1
) + V
Lm1
(19)
V
in
= I
Lm2
(r
L21
+ r
DS2
) + V
Lm2
. (20)
Mode 4 [D, 1]: In this mode, power switch S
1
is turned OFF,
and diodes D
1
and D
3
are switched ON. The equivalent circuit is
shown in Fig. 10(d), and the following equations can be derived:
V
in
= (I
Lm2
+ nI
D3
) r
L21
+ V
Lm2
+ (I
Lm1
+ I
Lm2
) r
DS2
(21)
V
in
= (I
Lm1
nI
D3
) (r
L11
+ r
D1
) + V
Lm1
+ (I
Lm1
+ I
Lm2
) r
DS2
+ V
D1
+ V
Cb
(22)
V
C2
= n(V
Lm2
V
Lm1
) I
D3
(r
L21
+ r
L22
+ r
D3
) V
D3
. (23)
The average currents that pass through diodes D
1
, D
2
, D
3
,
and D
4
can be derived by the capacitor charge balance.
In modes 1 and 3, both switches are turned OFF, and the av-
erage currents that pass through output lter capacitors C
1
, C
2
,
and C
3
are
I
C1
= I
C2
= I
C3
=
V
o
R
o
. (24)
In mode 2, the average currents that pass through output lter
capacitors C
1
and C
3
are
I
C1
= I
D2

V
o
R
o
(25)
I
C3
= I
D4

V
o
R
o
. (26)
In mode 4, the average currents that pass through output lter
capacitor C
2
are as follows:
I
C2
= I
D3

V
o
R
o
. (27)
The average currents that pass through diodes D
2
, D
3
, and
D
4
can be derived from
I
D2
= I
D3
= I
D4
=
V
o
(1 D)R
o
. (28)
In mode 2, I
Cb
is equal to I
D2
; in mode 4, I
Cb
is equal to the
negative of I
D1
. Thus, the average current that passes through
diode D
1
can be derived as follows:
I
D1
=
V
o
(1 D)R
o
. (29)
In mode 4, the average value of I
Lm1
can be derived thus
I
Lm1
= I
D1
+ nI
D3
=
(n + 1)V
o
(1 D)R
o
. (30)
In mode 2, the average value of I
Lm2
can be derived by
I
Lm2
= I
D2
+ nI
D4
=
(n + 1)V
o
(1 D)R
o
. (31)
The voltage conversion ratio with conduction losses can be
derived from
V
o
V
in
=
2n+2
1D

1
V
i n
(V
D1
+ V
D2
+ V
D3
+ V
D4
)
1 +
(1+n)
2
(2D1)r
X
R
o
(1D)
2
+
[(1+2n)
2
r
X
]+r
Y
R
o
(1D)
(32)
where
r
X
= r
L11
+ r
L12
+ r
L21
+ r
L22
r
Y
= r
L11
+ r
L21
+ 2(r
L22
+ r
L12
) + r
DS1
+ r
DS2
+ r
D1
+ r
D2
+ r
D3
+ r
D4
.
Because the turns ratio and copper resistances of the sec-
ondary windings of the coupled inductors are directly propor-
tional, the copper resistances of the coupled inductors can be
expressed as
r
L12
= n r
L11
; r
L22
= n r
L21
.
Efciency is expressed as follows:
=
1
(1D)
V
i n
(2n+2)
(V
D1
+ V
D2
+ V
D3
+ V
D4
)
1 +
(1+n)
2
(2D1)r
X
R
o
(1D)
2
+
[(1+2n)
2
r
X
]+r
Y
R
o
(1D)
. (33)
TSENG et al.: HIGH STEP-UP CONVERTER WITH A VOLTAGE MULTIPLIER MODULE FOR A PHOTOVOLTAIC SYSTEM 3053
Fig. 10. Equivalent operating modes with conduction losses states. (a) Mode 1 [0, (D0.5)]. (b) Mode 2 [(D0.5), 0.5]. (c) Mode 3 [0.5, D]. (d) Mode 4 [D, 1].
On the basis of (33), we infer that the efciency will be higher
if the input voltage is considerably higher than the summation of
the forward bias of all the diodes, or if the load is substantially
larger than the resistances of coupled inductors and semicon-
ductor components.
The calculated voltage gain and efciency with different cop-
per resistances are shown in Fig. 11, and r
L11
and r
L21
are
dened as r
L
. The other parameters in (33) are set as follows:
1) input voltage V
in
: 40 V;
2) turns ratio n : 1;
3) load R
o
: 200
4) on-resistances of switches r
DS1
and r
DS2
: 0.021 ;
5) resistances of diodes r
D1
, r
D2
, r
D3
, and r
D4
: 0.01 ;
6) forward bias of diodes V
D1
, V
D2
, V
D3
, and V
D4
: 1 V;
7) copper resistances of secondary windings of coupled in-
ductors r
L12
and r
L22
=r
L
at a turns ratio n of 1.
Fig. 11 reveals that efciency and voltage gain are affected
by various coupled inductor winding resistors and duty cycle,
and that efciency is decreased by the extreme duty ratio.
This section provides important information on voltage gain,
voltage stresses on semiconductor components, and analysis of
conduction losses, which indicates the relationship among duty
cycle, turns ratio, and components. The proposed converter for
each application can be designed on the basis of selected turns
ratios, components, and other considerations.
D. Performance Comparison
For demonstrating the performance of the proposed converter,
the proposed converter is compared with other high step-up
interleaved converters introduced in [30] and [33] as shown
Table I.
The high step-up interleaved converter introduced in [30]
is also suitable as a candidate for high step-up, high-power
conversion of the PV system, and the other high step-up in-
terleaved converter introduced in [33], which is an asymmetri-
cal interleaved structure as proposed converter is favorable for
3054 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 6, JUNE 2013
Fig. 11. Calculated voltage gain and efciency with different copper
resistances.
TABLE I
PERFORMANCE COMPARISON OF INTERLEAVED HIGH STEP-UP CONVERTERS
dc-microgrid applications. Both of converters use coupled in-
ductor and voltage doubler to achieve high step-up conversion.
For the proposed converter, the step-up gain is highest and the
voltage stress on switch is the lowest, as converter introduced
in [30]. Under the turns ratio n designed as less than 2, the
highest voltage stress on diodes of the proposed converter is
the lowest among the compared converters. In addition, the
quantities of diodes are the least as converter introduced in [33].
Because the components of the proposed converter are the least
among the compared converters, the reliability is higher and the
cost is lower. Thus, the proposed converter is suitable for high
step-up, high-power applications such as PV system.
TABLE II
CONVERTER COMPONENTS AND PARAMETERS
Fig. 12. Control strategy for the proposed converter.
IV. DESIGN AND EXPERIMENT OF THE PROPOSED CONVERTER
A prototype of the proposed high step-up converter with a
40-Vinput voltage, 380-Voutput voltage, and maximumoutput
power of 1 kWis tested. The switching frequency is 40 kHz, and
the corresponding component parameters are listed in Table II
for reference.
The design consideration of the proposed converter includes
components selection and coupled inductors design, which are
based on the analysis presented in the previous section. In the
proposed converter, the values of the primary leakage inductors
of the coupled inductors are set as close as possible for current
sharing performance. Due to the performances of high step-up
TSENG et al.: HIGH STEP-UP CONVERTER WITH A VOLTAGE MULTIPLIER MODULE FOR A PHOTOVOLTAIC SYSTEM 3055
Fig. 13. Measured waveform at P
o
= 1 kW: (a) V
g s1
, V
g s2
, i
Lk 1
, and i
Lk 2
. (b) V
ds1
, V
ds2
, and i
Ls
. (c) V
g s1
, V
g s2
, i
D1
, and i
D2
. (d) V
g s1
, V
g s2
, i
D1
, and
i
D2
.
gain, the turns ratio n can be set 1 for the prototype circuit with
a 40- Vinput voltage, 380- Voutput to reduce cost, volume, and
conduction loss of winding. Thus, the copper resistances which
affect efciency much can be decreased.
The value of magnetizing inductors L
m1
and L
m2
can be
design based on the equation of boundary operating condition,
which is derived from
L
m(critical)
=
D(1 D)
2
R
o
2(n + 1)(2n + 2)f
s
(34)
where L
m(critical)
is the value of magnetizing inductors at the
boundary operating condition, f
s
is the switching frequency,
and R
o
is the load. How to suppress the voltage ripple on the
voltage-lift capacitor C
b
to an acceptable value is the main
consideration. The equation versus the voltage ripple and the
output power or output current can be derived by
C
b
=
P
o
V
o
f
s
V
Cb
=
I
o
f
s
V
Cb
(35)
where P
o
is the output power, V
o
is the output voltage, f
s
is
the switching frequency, and V
Cb
is the voltage ripple on the
voltage-lift capacitor C
b
.
In control strategy, the proposed converter is controlled by the
microchip dsPIC30F4011 as shown in Fig. 12. PV module and
battery set are the main input power sources, which can be seen
as an equivalent voltage source for the proposed converter, and
the MPPT algorithm is employed by referring [35]. The battery
management system (BMS) for the charge/discharge controller
is not the main priority in this paper; thus, the related designed
is not implemented in the paper.
The output voltage is changed as load shift and the detected
feedback signal is processed via proportional-integral controller,
and the internal comparator generates interleaved PWM with
a 180

phase shift. Due to the insufcient voltage of PWM,

the PWM is supported by TC4420 to control power switches,
and EL50P1 is a Hall sensor to detect the input current for
overcurrent protection (OCP). The input voltage V
i
supplied
by the PV module and battery set is very nearly 40 V even if
the load shift. Thus, the efciency of the proposed converter
under constant input voltage/constant output voltage can be
measured.
Fig. 13 illustrates the measured waveforms of
V
gs1
, V
gs2
, i
Lk1
, i
Lk2
, V
ds1
, V
ds2
and i
Ls
at P
o
= 1 kW.
In Fig. 13(b), the switch voltage is clamped at 90 V, which is
much smaller than the output voltage 380 V. Fig. 13(c) and (d)
illustrate the measured waveforms of V
gs1
, V
gs 2
, i
D 1
, i
D 2
, i
D 3
,
and i
D4
at P
o
= 1 kW. The measured waveforms are consistent
with the steady-state analysis.
Fig. 14 shows the simulation and experimental result of volt-
age on all capacitor to illustrate the high voltage storage and
theoretical analysis. V
C1
is equal to V
Cb
plus output voltage of
boost converter, and V
Cb
is equal to the output voltage of the
boost converter. Thus, V
C1
is twice of V
Cb
. V
C2
is equal to V
C3
;
both are nearly V
Cb
because turns ratio n is set 1.
Fig. 15(a) shows the input current ripple i
in
and the currents
i
LK1
and i
LK2
of the primary side of the coupled inductors at
P
o
= 1 kW. The peak-to-peak current ripple is about 2 A (6%),
which conrms that the input current ripple is very loweven if at
high-power operation. Fig. 15(b) shows the dynamic response
due to the step load variation between 100 and 500 W, and the
output voltage is 380 V.
Fig. 16 shows the measured efciency of the proposed con-
verter. The maximum efciency is 96.8% at P
o
= 400 W.
At maximum output power, the conversion efciency is about
96.1%. Fig. 17 shows the prototype photograph of the proposed
converter.
3056 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 6, JUNE 2013
Fig. 14. Simulation and experimental result of high-voltage storage of a capacitor: (a) simulation result (b) and experimental result.
Fig. 15. Performance of current sharing and dynamic response. (a) Input current ripple i
LK 1
and i
LK 2
at 1000 W. (b) Dynamic response under step load
variation between 100 and 500 W.
Fig. 16. Measured efciency of the proposed converter.
Fig. 17. Prototype photograph of the proposed converter.
V. CONCLUSION
This paper has presented the topological principles, steady-
state analysis, and experimental results for a proposed converter.
The proposed converter has been successfully implemented in
an efciently high step-up conversion without an extreme duty
ratio and a number of turns ratios through the voltage multi-
plier module and voltage clamp feature. The interleaved PWM
scheme reduces the currents that pass through each power switch
and constrained the input current ripple by approximately 6%.
The experimental results indicate that leakage energy is recy-
cled through capacitor C
b
to the output terminal. Meanwhile,
the voltage stresses over the power switches are restricted and
are much lower than the output voltage (380 V). These switches,
conducted to lowvoltage rated and lowon-state resistance MOS-
FET, can be selected. Furthermore, the full-load efciency is
96.1% at P
o
= 1000 W, and the highest efciency is 96.8% at
P
o
= 400 W. Thus, the proposed converter is suitable for PV
systems or other renewable energy applications that need high
step-up high-power energy conversion.
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Kuo-Ching Tseng was born in Tainan, Taiwan, in
1957. He received the M.S. degree from Da-Yeh
Polytechnic Institute, Chang Hua, Taiwan, and the
Ph.D. degree from National Cheng Kung University,
Tainan, Taiwan, in 1999 and 2004, respectively, both
in electrical engineering.
FromJuly 1988 to 1996, he was an R&DEngineer
with Lumen Co., Ltd., Taiwan, working on UPSs and
switching power supply design. In February 2003,
he joined the Department of Electrical Engineering,
Da-Yeh Institute of Technology, Chang Hua, Taiwan.
Since 2008, he has been with the Department of Electronic Engineering, Na-
tional Kaohsiung First University of Science and Technology, Kaohsiung, Tai-
wan, where he is currently an Assistant Professor. His current research interests
include dc/dc converters and power-factor correction techniques, power manage-
ment control system design, solar energy conversion system design, switching
power converter design, and renewable energy conversion system design.
Dr. Tseng was the recipient of the Electric Power Applications Premium
Award for the paper entitled Novel High-Efciency Step-Up Converter from
the Institution of Electrical Engineers during 20042005.
Chi-Chih Huang was born in Pingtung, Taiwan, in
1989. He received the B.S. degrees in electronics en-
gineering from the National Kaohsiung First Univer-
sity of Science and Technology, Kaohsiung, Taiwan,
in 2011, where he is currently working toward the
M.S. degree.
His research interests include power electronics
and energy conversion.
Wei-Yuan Shih was born in Kaohsiung, Taiwan,
in 1984. He received the B.S. degrees from Na-
tional Formosa University, Yunlin County, Taiwan,
and the M.S. degree in electronics engineering from
the National Kaohsiung First University of Sci-
ence and Technology, Kaohsiung, in 2006 and 2011,
respectively.
He is currently an Electronic Engineer and
working for Asiatree Technology Co., Ltd. His re-
search interests include power electronics and energy
conversion.