If

+ Vdc -
Cs
I0
X0 = Total reactance of
Tr + machine
Coupling Tr
Coupling Tr
Vs
Vs
I0
X0 =Reactance
of Tr
E (a,,c!
V00 (a,,c!
STATCOM
1. Operating Principle :
"T#TC$% is a s&itching con'erter t(pe static Var generator, &hich generates or asors
reacti'e po&er &ithout using capacitor and inductor an), ( 'arious s&itching pattern &ithin its
con'erter* +unctionall(, the operation of "T#"TC$% is similar to that of an ideal s(nchronous
condenser &hich can generates or asors the reacti'e po&er ( 'ar(ing the e,citation in the
field &inding*


+ig*-*-(a! "(nchronous condenser +ig*-*-(! "T#TC$%
+ig*-*-(a! sho&s a asic configuration of a s(nchronous condenser* If the dc e,citation current If
is increased, magnitude of E &ill increase and if .E. ecomes greater than the .Vs., then the
s(nchronous machine &ill dra& the leading current and supplies reacti'e po&er to the s(stem*
$n the other hand, if the dc e,citation current If is decreased, magnitude of E &ill decrease and
if .E. ecomes less than the .Vs., then the s(nchronous machine &ill dra& the lagging current
and consumes reacti'e po&er from the s(stem* In the similar manner, the "T#TC$% s(stem
sho&n in +ig*-*-(!, can generate or consume reacti'e po&er* +rom the dc 'oltage source across
the dc capacitor Cs, the con'erter of the "T#TC$% s(stem produces a set of controllale /-
phase output 'oltage (V0! &ith fre0uenc( e0ual to fre0uenc( of ac s(stem 'oltage* 1( 'ar(ing
the magnitude of the in'erter output 'oltage (V0!, the reacti'e po&er e,change et&een the
in'erter and the ac s(stem is achie'ed in a similar manner to that of the s(nchronous condenser*
i! If .V0. 2 . V". , then the in'erter generates the reacti'e po&er
ii! If .V0. 3 . V". , then the in'erter consumes the reacti'e po&er
iii! If .V0. = . V". , then there is no e,change of reacti'e po&er
The ao'e statement can e &ell illustrated &ith the help of follo&ing e0ui'alent circuit and
phasor diagram4
-
(5f!Ref
E,citer
6C 7#C
Con'erter
8oad
8oad
5f
"ensor
Controller
(gate signal 9en!
V"
i! Capaciti'e mode of operation 4
:ere the load is assumed to e inducti'e and the reacti'e po&er demanded ( the load has to e
supplied ( the "T#TC$% ranch as sho&n in +ig*-*;*
+ig*-*;(a! E0ui'alent circuit of the +ig*-*;(! 5hasor diagram for capaciti'e mode
"T#TC$% s(stem
&ith inducti'e load
:ere,
R8 = 8oad resistance per phase
X8 = 8oad reactance per phase
R0 = E0ui'alent resistance of coupling transformer and in'erter s&itches per phase
X0 = E0ui'alent lea)age reactance of the coupling transformer per phase
The reacti'e po&er dra&n ( the load = V" I8 "in8 <** (-*-!
The reacti'e po&er supplied ( the "T#TC$% ranch = V" I0 Cos0 << (-*;!
+or unit( po&er factor operation, V" I8 "in8 = V" I0 Cos0 << (-*/!
In ideal case (i*e if there is no po&er loss in the "T#TC$% ranch!, 0 should e e0ual to =ero*
i*e* I0 shall lead V" ( >0
0
*
1ut in real practice, there is some po&er loss in the "T#TC$% ranch* This po&er loss is gi'en
( 4
58$"" = I0
;
R0 = V" I0 "in0 <** (-*?!
The ac s(stem &ill suppl( this po&er loss*
:ence the asic operating principle of "T#TC$% s(stem is that the in'erter shall produce the
output 'oltage V0 &ith proper magnitude .V0. and phase (0 ! so that the reacti'e component of I0
(i*e* I0 Cos0 ! cancels the reacti'e component of load current (i*e* I8 "in8 ! resulting in unit(
po&er factor operation*

;
R8
R0
X0
X8
Io
+
.V0.0
-
I8
@
I = I8+I0
I
0
Cos
0
I
0

0
V
"
I
8

8
I
8
"in
8
I
0
R
0
I
0
X
0
I
ii! Inducti'e mode of operation 4
Case-A : :ere the load is assumed to e capaciti'e and the reacti'e po&er generated ( the load
has to e asored ( the "T#TC$% ranch as sho&n in +ig*-*/*
+ig*-*/(a! E0ui'alent circuit of the +ig*-*/(! 5hasor diagram for inducti'e mode
"T#TC$% s(stem
Aith capaciti'e laod
The reacti'e po&er generated ( the load = V" I8 "in8 <** (-*B!
The reacti'e po&er asored ( the "T#TC$% ranch = V" I0 Cos0 << (-*C!
+or unit( po&er factor operation, V" I8 "in8 = V" I0 Cos0
The in'erter shall produce the output 'oltage V0 &ith proper magnitude .V0. and phase (0 ! so
that the reacti'e component of I0 (i*e* I0 Cos0 ! cancels the reacti'e component of load current
(i*e* I8 "in8 ! resulting in unit( po&er factor operation*
Case-B : :ere the load is assumed to e inducti'e and the e,tra inducti'e effect has to e added
to the load ( dra&ing the lagging current through the "T#TC$% ranch as sho&n in +ig*-*?*
+ig*-*?(a! E0ui'alent circuit of the +ig*-*?(! 5hasor diagram for inducti'e mode
"T#TC$% s(stem
Aith inducti'e load
The reacti'e po&er consumed ( the load = V" I8 "in8 <** (-*D!
/
R8
V
"
R
0
X
0
X
C
I
o
+
.V
0
.
0
-
I
8
@
I = I
8
+I
0
I0X0
I0 Cos0
0
V"
V0
I8
0
8
0
I8"in8
I0R0
I
I0
R8
V"
R0
X0
X8
Io
+
.V0.0
-
I8
@
I = I8+I0
I0X0
I0 Cos0
0
V"
V0
I8
0
8
0
I8"in8
I0R0
I0
The e,tra reacti'e po&er consumed ( the "T#TC$% ranch = V" I0 Cos0 << (-*E!
The in'erter shall produce the output 'oltage V0 &ith proper magnitude .V0. and phase (0 ! so
that the reacti'e component of I0 (i*e* I0 Cos0 ! adds to the reacti'e component of load current
(i*e* I8 "in8 !*
2 Control Strategy :
The main function of the "T#TC$% ranch is to generate the reacti'e po&er demanded ( the
load* This ranch also dra&s some acti'e po&er from the s(stem suppl( to fulfill the po&er loss
in the internal resistance of the s&itching de'ices and the step do&n transformer* Referring the
phasor diagram sho&n in +ig*-*;(!, the acti'e po&er flo& through the "T#TC$% ranch is
gi'en (4
50 = Vs* I0 sin0 (;*-!
#t stead( state operation, the acti'e po&er through the "T#TC$% ranch (50! is e0ual to the
po&er loss in the ranch I0
;
R0*
8et stead( e the phase of the in'erter output 'oltage at stead( state operation*
Then Vs* I0 sinstead( = I0
;
R0*
$r

s
V
0
R
0
I
- - "in
stead(

=
(;*;!
Ahen 0 2 stead(, the acti'e po&er flo& through the "T#TC$% ranch ecomes more than the
po&er loss in R0* In such a case, the e,cess of acti'e po&er charges the dc capacitor causing
increase in Vdc* Ahen 0 3 stead(, the acti'e po&er flo& through the "T#TC$% ranch ecomes
less than the po&er loss in R0 and dc capacitor gets discharge to suppl( the po&er loss in R0
causing decrease in Vdc* :ence the Vdc is utili=ed as the feed ac) signal to control the phase of
the in'erter output 'oltage (0!*
The current through the in'erter ranch is gi'en (4
0 0
0
V -
s
V

0
I
jX R +
=

(;*/!
#nd the reacti'e po&er generated ( the "T#TC$% is gi'en (4
Fstat =V" I0 Cos0 (;*?!
?
Therefore the reacti'e po&er generated ( the "T#TC$% can e 'aried ( changing the
magnitude of the in'erter output 'oltage (V0!* Ahen the load reacti'e po&er increases, the
terminal 'oltage across the load decreases* :ence the change in load terminal 'oltage can e
utili=ed as the feed ac) signal to control the magnitude of the in'erter output 'oltage, &hich in
turn controls the amount of reacti'e po&er generated ( the "T#TC$% to )eep the load terminal
'oltage constant at 'ar(ing load condition* :ence the in'erter can e controlled to produced
desired 'alue of .V0.0 (fundamental Component! &ith the closed loop control s(stem sho&n in
+ig*;*-*
+ig*;*- Closed loop control s(stem of a "T#TC$%
The controller 5I-- generates the proper 'alue of modulation inde, (%I! and the controller 5I-;
generates the proper 'alue of the phase angle (0!* The gate signal generator generates the gate
signals for s&itch pair T- and T; of R-phase to turned $G and $++ se'eral times to produce
se'eral positi'e and negati'e s0uare &a'e of VR0 output in a c(cle* "imilarl( the s&itch pair T/
and T? of H-phase and s&itch pair TB and TC of 1-phase are also turned $G and $++ se'eral
times in a c(cle in the similar fashion of R-phase ut &ith -;0
0
phase difference &ith respect to
B
V
dc
5A%
in'erter
V
"
I
I
8
I
0
8oad
I
0
T
-
T
/
T
B
R H
1
Voltage
"ensor
T
;
T
?
T
C
9ate signal generator
+
V
Ref

0
+
-
V
dc
(Ref!
+
-


r
-
5I-;
r
;
-
V
00
5I--
each other* The s&itching pattern for a c(cle is determined ( comparing the high fre0uenc(
triangular carrier &a'e &ith the modulating sine-&a'e* The fre0uenc( of the modulating sine-
&a'e is made e0ual to the fundamental fre0uenc( of the in'erter output 'oltage* +ig*;*; sho&s
the modulating sine &a'e, the triangular carrier &a'e and the resulting &a'eform of VR0 for %I =
0*C and +R =C*
Ahere VR0 is the potential of point JRK &ith respect to the mid point of dc suppl( J0K*
%odulation inde, (%I! =
'e carrier &a r triangula of 5ea) 'alue
&a'e sine modulating of 5ea) 'alue
=
cp)
p)
V
H

+re0uenc( ratio (+R! = Ratio of fre0uenc( of triangular carrier &a'e to fre0uenc( of modulating
sine &a'e*

+ig*B*> %odulating sine &a'e and triangular carrier for %I = 0*C and +R = C and resulting
&a'eform of VR0
C
+V
dc
L;
-VdcL;

0

- ; /

-- -;
V
R0
+-
0
--
;

V
cp)
H
p)

The s&itching pattern follo&s the follo&ing logics4
If modulating signal 2 carrier signal, then VR$ =
;
dc
V
+
If modulating signal 3 carrier signal, then VR$ =
;
dc
V

The per phase 'alue of the in'erter output 'oltage is e'aluated as follo&4
VRG = VR0 - VG , Ahere, VG =
/
-
(VR0+VH0 +V10!
3. Modeling and Analysis of STATCOM:
In the e0ui'alent circuit sho&n in +ig*-*;, the "T#TC$% ranch had een represented ( a
s(nchronous 'oltage source (.V0.0 ! in series &ith impedance I0* The asic function of the
5A% in'erter in the "T#TC$% ranch is to produce an in'erter output 'oltage of .V0.0 so
that I0 through this ranch leads V0 ( >0
0
and the reacti'e component of I0 (i*e*I0 Cos0 ! cancels
the reacti'e component of the load current (I8"in8! resulting in unit( po&er factor operation*
:ence the 'oltage V0 is similar to the 'oltage drop across an idel capacitor* If it is required to
calculate the magnitude and phase (i.e.|V0|0 ) to be produced by the inerter at arious load
po!er factor to gie unity po!er factor operation" the calculation" !ith the help of equialent
circuit sho!n in #ig.$.$" !ould be ery comple%. In order to simplify this calculation" the
equialent circuit sho!n in #ig.&.$ can be further simplified to #ig.'.& sho!n belo!. :ere the
in'erter output 'oltage V0 had een replaced ( a fictitious capacitor so that the 'oltage across
the capacitor is same as the in'erter output 'oltage .V0. and current through the capacitor leads
the V0 ( >0
0
for capaciti'e mode* :ere it shall e noted that XC is not a fre0uenc( dependent
reactance* The 'oltage drop across it is Must simulating the fundamental component of the
in'erter output 'oltage*

+ig*/*- "implified E0ui'alent Circuit
Go&, if the 'alue of XC can e calculated in terms of R8, X8 , R0 and X0 for unit( po&er factor
operation, then the re0uired magnitude and phase of the in'erter out 'oltage (i*e* . V0 . 0 ! can
e estimated*
The total impedance of the circuit is gi'en ( 4
D
V"
Ro
X0
R8
X8
Io
+
.V0.0
-
I8
I = I8+I0
XC
ITotal =

8
I
0
I
0

+

(
) )
Ahere, I0 = R0 + M (X0 - XC! = R0 + M Xe0 , Xe0 = X0 - XC and I8 = R8 + MX8
$r ITotal =

! ( !
8
R
0
(R
! ( !
0
(

(
X
eq
X j
(
jX
(
R
eq
jX R
+ + +
+ +
+or unit( po&er factor operation 4
Imaginar( part of

! ( !
8
R
0
(R
! ( !
0
(

(
X
eq
X j
(
jX
(
R
eq
jX R
+ + +
+ +
= 0
"implification of this e0uation gi'es 4
#*Xe0
;
+ 1*Xe0 + C = 0 <<* (/*-!
Ahere, # = X8 , 1 = R8
;
+ X8
;
and C = X8*R0
;
The e0uation (/*- ! gi'es t&o 'alues of Xe0 and accordingl( t&o 'alues of XC* The 'alue of Xe0,
&hich gi'es positi'e 'alue of XC and &hich gi'es the magnitude of .V0. 2 .Vs., shall e ta)en into
account* $nce the 'alue of XC is calculated, then the I0 can e calculated as 4

C 0 MX - MX R
0 . V .
I
0
"
0
+

= =

<< (/*;!
Then the magnitude and phase of the in'erter output 'oltage can e e'aluated as 4
!
c
X *( I V 0 0 j

= .V0.0 << (/*/!

+or inducti'e mode of operation, &hen the load is capaciti'e, the "T#TC$% shall e modeled as
follo& 4
+ig*/*- "implified E0ui'alent Circuit for inducti'e mode of operation
:ere, XN is the fictitious inducti'e reactance and the 'oltage across it represents the fundamental
component of the in'erter output 'oltage*
:ere, ITotal =

! ( !
8
R
0
(R
! ( !
0
(

*
X
eq
X j
*
jX
(
R
eq
jX R
+ +
+
+or unit( po&er factor operation 4
E
V"
R0
X0
XC
Io
+
.V0.0
-
I8
I = I8+I0
XN
$
Imaginar( part of

! ( !
8
R
0
(R
! ( !
0
(

*
X
eq
X j
*
jX
(
R
eq
jX R
+ +
+
= 0
"implification of this e0uation again gi'es 4
#*Xe0
;
+ 1*Xe0 + C = 0 <<* (;*;C!
Ahere, # = XC , 1 = -(R8
;
+ XC
;
! and C = XC*R0
;
4 n!erter:
The in'erter used in the "T#TC$% is a 'oltage source in'erter &ith a dc capacitor &ith a
constant dc 'oltage across it in dc side of the in'erter* The 'arious t(pes of in'erter that could e
used in this "T#TC$% s(stem are4
Fuasi- s0uare &a'e si,-step in'erter
%ulti-stepped s0uare &a'e in'erter
"inusoidal 5A% in'erter
:(stersis 1and Current Control 5A% in'erter
4.1 "#asi- s$#are %a!e si&-step in!erter :
The asic circuit topolog( of a three phase 0uasi-s0uare &a'e si, step ridge in'erter is sho&n
in +ig*?*-* 1asicall( it is the comination of three sets of single phase in'erter* T- and T; s&itch
pair represents the R-phase, T/ and T? s&itch pair represents the H-phase and TB and TC s&itch
pair represents the 1-phase* The s&itch T- of R-phase is turn on for positi'e half c(cle &ith T;
off and T; is turn on for negati'e half c(cle &ith T- off* The resulting &a'eform of VR is sho&n
in +ig*?*;* "imilarl( the s&itch pair T/ and T? of H-phase and s&itch pair TB and TC of 1-phase
are also turned $G and $++ &ith -;0
0
phase displacement et&een VR , VH and V1*

>
+ Vdc L; o
T-
R
TB
H
T/
1
+
-
+
+ig*?*- 1asic circuit topolog( of /-phase 0uasi-s0uare &a'e si, step in'erter
The &a'eform of phase 'oltage of the in'erter output 'oltage is as follo&4
VRG

+;VdcL/
VRG
-;VdcL/
+ig*?*; Aa'eforms of 0uasi-s0uare &a'e three phase in'erter
The &a'eform of the in'erter output 'oltage VRG is not a sine-&a'e* It has fundamental as &ell
as other harmonics* #ccordingl( the load current also &ill not e a sine-&a'e*
4.2 M#lti-stepped s$#are %a!e in!erter :
The &a'eform of in'erter output 'oltage can e made more closer to sine &a'e ( using the
multi-stepped s0uare &a'e in'erter* #n in'erter &hich gi'e output 'oltage &a'eform &ith a
multiple of si, steps is called as the multi-stepped in'erter* +ig*?*/(a! sho&s the circuit diagram
of a -;-step in'erter &hich uses t&o sets of si, stepped three phase ridge in'erters*
-0
T;
TC T?
-
- Vdc L; o
G
Three phase 8oad
+
cK
K
aK

+ig*?*/ %ulti-stepped (-;-stepped! in'erter*
The upper ridge operates in C-stepped s0uare-&a'e mode, &here as the lo&er ridge is phase
shifted ( LC angle and each in'erter is connected to the primar( delta &inding of the respecti'e
transformers as sho&n in the figure* The upper transformer has one secondar( &inding for each
phase, &hereas the lo&er transformer has t&o secondar( &indings per phase and the &inding
ratios are indicated in the figure* The output 'oltage is otained ( the interconnection of three
secondar( &indings to satisf( the phasor diagram sho&n in +ig*?*/(! so that the total output
phase 'oltage is gi'en ( 4
Van = Va + Vde - Vef
The &a'eform of the output phase 'oltage is sho&n in +ig*?*/(c! &hich is a -;-stepped ac
&a'eform*
This t(pe of multi-stepped in'erter re0uires more numer of po&er electronics s&itches and
additional transformers* Therefore t(pe of in'erter is more e,pensi'e than the C-stepped 0uasi-
s0uare &a'e in'erter*
4.3 Sin#soidal P'M in!erter :
--
Vdc o
-
0
-LC
-4 n
a
fK
eK dK
d e d e
-4 nL/

V
an



V
a

+
V
de

-
V
ef


LC
(a! Circuit diagram
(! 5hasor diagram (c! Aa'eform
H5O
VC5O
The circuit topolog( of sinusoidal 5A% in'erter is same as that of the 0uasi-s0uare &a'e three
phase si, stepped in'erter sho&n in +ig*?*-* In this t(pe of in'erter the s&itch pair T- and T; of
R-phase are turned $G and $++ se'eral times to produce se'eral positi'e and negati'e s0uare
&a'e of VR output in a c(cle* "imilarl( the s&itch pair T/ and T? of H-phase and s&itch pair TB
and TC of 1-phase are also turned $G and $++ se'eral times in a c(cle in the similar fashion of
R-phase ut &ith -;0
0
phase difference &*r*t* each phase* The s&itching pattern for a c(cle is
determined ( comparing the high fre0uenc( triangular carrier &a'e &ith the modulating sine-
&a'e* The fre0uenc( of the modulating sine-&a'e is made e0ual to the fundamental fre0uenc( of
the in'erter output 'oltage*
+ig*?*? sho&s the modulating sine &a'e , the triangular carrier &a'e and the resulting &a'eform
of VR$ (5otential of point JRK &*r*t* mid point of dc suppl( J0K! for %I = 0*C and +R = C*
Ahere,
%I = %odulation inde, =
'e carrier &a r triangula of 5ea) 'alue
&a'e - sine modulating of 5ea) 'alue
=
C5O
5O
V
H

+R = +re0uenc( ratio = Ratio of fre0uenc( of triangular carrier &a'e to fre0uenc( of modulating
sine &a'e*
The s&itching pattern follo&s the follo&ing logics 4
If modulating signal 2 carrier signal, then VR$ = + Vdc L;
If modulating signal 3 carrier signal, then VR$ = - Vdc L;

-;
per
+-
0
--
n=-;
n=;
n=-
;

n=0

+VdcL;
0 - ; / -- -;
VR0
+ig*?*? %odulating sine &a'e and triangular carrier for %I = 0*C and +R = C and resulting
&a'eform of VR0
The s&itching instants (0 - * * * * -; ! can e determined ( sol'ing the e0uations of
modulating sine &a'e and the triangular carrier &a'es* The modulating sine &a'e and the
triangular carrier &a'e can e represented ( the follo&ing e0uations4
(-(! = %I Vcp) "in (modulating sine-&a'e! <**** (?*-!
(;(! = )(n!* + C(n! (Triangular carrier &a'e ! ******** (?*;!
Ahere,
;
Pper
Vp)
- n
(--! 'e carrier &a ar traiangul the of line
th
n the of slope O(n!
+
= =
C(n! = intercept made ( the n
th
carrier &a'e on (-a,is = - (--!
n+-
Vcp)* 7 )(n! st
;
Pper
- Pst and
;*+R
/C0
Pper = =
"ol'ing the e0ns (?*-! and (?*;! for n = 0 to n = -;, gi'es the s&itching instants 0, -, ;,
/ **********, --, -;* These e0uations can e sol'ed &ith the help of a suitale computer program
using an iterati'e methods li)e Ge&ton-Raphsion method* Then the +ourier coefficients of VR0
can e then calculated as follo&s4

=
;
-
-
0
P
P
t d t n Cos
;
dc
V

P
P
t d t n Cos
;
dc
V
Q
;
-
#(n!

+
<<<<<<<<<<<<<<<<<<<<*+

-;
--
P
P
t d t n Cos
;
dc
V

;
-

=
;
-
-
0
P
P
t d t n "in
;
dc
V

P
P
t d t n "in
;
dc
V
Q
;
-
1(n!

+ <<<<<<<<<<<<<<<*
<<<<+

-;
--
P
P
t d t n "in
;
dc
V

;
-

R
Then the +ourier coefficients of VR0 in polar form can e then calculated as follo&s4
1(n!
#(n!
S(n! and
;
! (
;
#(n! C(n! = + = n +
$nce the +ourier coefficients of VR0 are calculated, then the +ourier coefficients of VG and VRG
also can e calculated as follo&4
-/
-VdcL;
VR0
8oad
"ending end Recei'ing end
X- R-
VG =
/
-
(VR+VH +V1! and VRG = VR0 - VG
Ahere,
VG = 5otential of 8oad neutral point &*r*t* to potential of mid point of dc suppl( J0K*
VRG = 5hase 'oltage across the load*
If the 5A% in'erter is operated at higher +R, the lo&er order harmonics &ill get reduced and the
higher order harmonics &ill filtered out ( the reactance of the coupling transformer itself
resulting in nearl( sinusoidal &a'eform of I0 through the "T#TC$% ranch*
$nce the +ourier coefficients of V0 (i*e* VRG ! are e'aluated, then the fundamental and other
harmonics components of the current through the "T#TC$% ranch (I0! can e calculated as
follo&s 4

0
MX
0
R
S(-! (-!
0
V - 0
s
V
(-!
0
I
+

=
<<* (?*/!
#nd

0
n*X M
0
R
S(n! (n!
0
V - 0
s
V
(n!
0
I
+

=
, n = ;, /, ?<<<** <<** (?*?!
Then the &a'eform of the current I0 can e re-constructed ( using the follo&ing e0uation 4
I0 = I0(-! "in(t+(-! ! + I0(;! "in(t+(;! ! + I0(/! "in(t+(/! ! + <** <* (?*B!
The 5A% in'erter has the follo&ing ad'antages &ith compare to the other t&o t(pes of in'erter
descried ao'e*
- The lo&er order harmonics can e reduced lo& ( operating the in'erter at higher
fre0uenc( ration*
- The s&itching pattern can e programmed to eliminate particular harmonic*
- This t(pe of in'erter needs less numer of po&er electronic s&itches &ith compare to
multi-stepped in'erter*
(. Si)#lation of STATCOM as s*#nt co)pensator for trans)ission line :
+ig*B*- sho&s a t(pical installation of "T#TC$% as shunt compensator in a transmission s(stem
considered for simulation stud(*
-?
V"
Coupling Tr
Vo0
+ Vdc -
"T#TC$%
+ig* B*- T(pical installation of "T#TC$% as shunt compensator for transmission line*
The "T#TC$% s(stem sho&n in +ig*B*- is simulated in a computer program* The simulation
program first calculates the 'oltage regulation, po&er loss in the line, efficienc( of the line in the
asence of "T#TC$%* Then the program e'aluates the modulation inde, (%I! at &hich the
5A% in'erter of the "T#TC$% shall e operated to result in unit( po&er factor operation* Then
the program performs the +ourier anal(sis of the in'erter out put 'oltage to re-construct the
&a'eforms of in'erter output 'oltage and "T#TC$% ranch current at different +re0uenc( Ratio
(+R! to chec) at &hich 'alue of +R the "T#TC$% ranch current is nearl( sinusoidal*
+or the simulation purpose, the e0ui'alent circuit of the transmission line s(stem sho&n in
+ig*B*- is sho&n in +ig*B*;* The simplified e0ui'alent circuit model sho&n in +ig*/*- is used for
the simulation*
+ig*B*; E0ui'alent circuit of a transmission line &ith "T#TC$% at recei'ing end
The simulation is carried out &ith the follo&ing s(stem data 4
8oad4 ;0 %A, pf = 0*DB lagging
Transmission 8ine 4
R- = / ohm per phase (Refer to :*V* side!
X- = -; ohm per phase (Refer to :*V* side!
Coupling transformer4
Voltage ratio - //)VL-*- )V
-B
V"
R0
X0
X8
Io
+
.V0.0
-
I8
@
I = I8+I0
R8
R - X- VR
8oad
Go
R0 = 0*00/ ohm (refer to 8*V* side!
X0 = 0*0-;- ohm (refer to 8*V* side!
Vdc of "T#TC$% = ?000 Volts*
The flo& chart of the simulation program is sho&n in +ig*B*/ elo& 4
-C
Input 6ata 4 Vdc, +R, 8oad in O&, 5+, Ro, Xo
"ol'e 4 # Xce0
;
+ 1 Xce0 + C = 0
#nd Calculate Xc for Tnit( 5+ $peration, Vo(est!
Estimate the initial 9uess 'alues of 0 , -, ; * * * * n #nd %I
n = 0
G-R %ethod to calculate re0uired s&itching 'ectors 0 , -, ; * * * * n
f- = %IUVcp) "inn 7 O(n!* est (n! - C(n!
f; = dLd (f-!, err = f- L f;
If . err. 0*0-
Hes Go
n = est(n!
n = n + -
est(n! = est(n! - err
If n = ;* +R
Calculate the +ourier Coefficents of Vo
Hes
Go
"tart
Hes
+ig*B*/ +lo& chart of simulation program of transmission line &ith "T#TC$%
Tale- and Tale ; sho&s the simulation results of fourier coefficients V0 up to -? order for a
t(pical 'alues of Vdc = ?000 'olts, %I = 0*C for +R = C* and -; respecti'el(*
Tale -
+ourier coefficients of Vo for +R=C
%I = 0*C ,Vdc = ?000 V
Tale ;
+ourier coefficients of Vo for +R=-;
%I = 0*C ,Vdc = ?000 V
$rder #mplitude
(Volt!
5hase
(radian!
$rder #mplitude
(Volts!
5hase
(radian!
- -;00*0C> 0*0000 - -;00*C0? 0*0000
; ?*>-0 0*0/BB ; 0*/>; -;*0>/B
/ 0*000 0*0000 / 0*000 0*0000
? 2+2.(13 -0*00BE ? 0*-/- -/*0/0?
B 0*-// -*//D0- B 0*-?- 0*;E-;
C 0*000 0*0000 C 0*000 0*0000
D C*E>? -/*-;;C D 0*;C; -0*?;CE
E 2+2.++2 -0*000/; E ?*>0B -0*0/-C
> 0*000 0*00000 > 0*000 0*0000
-0 B*0?? 0*000-- -0 2+2.,12 0*00-/
-- D?0*/;; -/*-?-?? -- 0*;EE --*BB--
-; 0*0000 0*0000 -; 0*000 0*0000
-/ D?0*/;; 0*0000> -/ 0*;0B -0*B>;-
-? >/*>D/ -0*000>/ -? 2+2.23- -0*00;?
+rom the ao'e results it clear that the harmonics of multiples of / (triplines! are all =ero* Ahen
the +R is C, the most significant lo&er order harmonics are B
th
and E
th
* Ahen the +R is made -;,
the most significant lo&er order harmonics are shifted to -0
th
and -?
th
respecti'el(* Therefore it is
clear that lo&er order harmonics decreases &ith increase in +R* :ence ( operating the 5A%
in'erter at higher +R, the lo&er order harmonics can e reduced and the higher order harmonics
&ill get filtered out ( the reactance of the coupling transformer itself resulting in nearl(
sinusoidal &a'eform of I0 through the "T#TC$% ranch*
The summar( of the simulation results are 4
-D
If . Vo(-! 7 Vo(est! . 2 -
9enerate data for plotting the
&a'eforms of V0 and I0
%I = %I + 0*00B
"top
Aithout "T#TC$% compensation 4
Voltage regulation of the line = ;C*-; V
5o&er loss in the line = ->B> )A
Aith "T#TC$% compensation for unit( po&er factor operation 4
Re0uired 'alue of %odulation Inde, (%I! = 0*B;D
%agnitude of the In'erter $utput Voltage (Vo! = D?C*C/- Volts per phase
5hase of the In'erter $utput Voltage (0! = - ;*B deg
Voltage regulation of the line = D*DCV
5o&er loss in the line = -0>C *; )A
It is clear that the 'oltage regulation of the line has impro'ed and the po&er loss in the line has
decreased due to "T#TC$% compensation*
+ig*B*?, +ig*B*B and +ig*B*C sho&s the &a'eforms of V0 and I0 for fre0uenc( ratio of -;, ;? and
/0 respecti'el(* These are the &a'eforms reconstructed from the +ourier coefficients of V0 and I0
up to the /0
th
order*
Fig.5.4 Waveforms of Vo and Io for FR=12 , MI = 0.527 and
Vdc = 4000 Volts
-3000
-2000
-1000
0
1000
2000
3000
0 100 200 300 400
lect. degree
V
o

!
v
o
l
t
"
-20000
-15000
-10000
-5000
0
5000
10000
15000
20000
I
o

!
#
m
$
"
Vo (Volt) Io (amp)
-E
Fig. 5.5 Waveforms of Vo and Io for FR=24, MI = 0.527 and
Vdc = 4000 Volts
-2000
-1500
-1000
-500
0
500
1000
1500
2000
0 50 100 150 200 250 300 350 400
lect. degree
V
o

!
V
o
l
t
"
-20000
-15000
-10000
-5000
0
5000
10000
15000
20000
I
o

!
#
m
$
"
Vo (volt) Io (Amp)
The
&a'eforms of
V0 and I0 are
0uite distorted
for +R = -;*
+or +R=;?,
the &a'eform
of V0 and I0
are less
distorted* +or
+R=/0, the
&a'eform of I0
is 0uite close
to sine-&a'e
ut the
&a'eform of
V0 is has still
some
distortion* It is
o'ious that the &a'eform of V0 &ill not e filtered ( the series reactance of the coupling
transformer* 1ut at higher fre0uenc( ratio, the lo&er order harmonics of V0 are reduced in the
e,pense of increase in higher order harmonics as sho&n in Tale-- and Tale-;* The &a'eform
->
Fig.5.% Waveforms of Vo and Io for FR=&0, MI = 0.527 and
Vdc = 4000 Volts
-3000
-2000
-1000
0
1000
2000
3000
0 100 200 300 400
lect. degree
V
o

!
V
o
l
t
"
-20000
-15000
-10000
-5000
0
5000
10000
15000
20000
I
o

!
#
m
$
"
Vo (volt) Io (amp)
R0
80
of V0 at +R=/0 is seems to e less distorted &ith compare to that at +R=-; and +R=;?, ecause
the &a'eforms are reconstructed from the +ourier coefficients of V0 up to the /0
th
order onl(*
+ STATCOM 'T. ./ST010SS BA23 C41102T CO2T1O5
:(steresis and current control techni0ue is asicall( an instantaneous feedac) current control
method of 5A%, &here the actual current through the "T#TC$% ranch continuousl( trac)s
the reference current &ithin a limited h(steresis and* The controller generates the reference
current ( sensing the ac terminal 'oltage and dc 'oltage across the capacitor in the dc side of
the in'erter* +ig*C*- sho&s the h(steresis and current control 5A% in'erter used as reacti'e
po&er compensator*
;0
-
+ Vdc(ref!
i0 (actual)
I0
Id
I
I0
V"0
a

c
+VdcL;
;C
;C
In'erter
:(steresis
and controller
V00
T;
T/
T?
TB
TC
-VdcL;
T-
Voltage
"ensor
5I--
9ate "ignal
9enerator
d0 to ac
I8
iabc (ref!

-
+ Vref
Vac(err)
Vdc(err)
8oad
+ig*C*- "T#TC$% &ith h(steresis and current control 5A% in'erter
Ahen the reacti'e po&er of the load increases, the us terminal 'oltage decreases* The us
'oltage is sensed and compared &ith the reference 'alue* The error signal thus otained is passed
through a 5I controller to otain the magnitude of the 0-a,is component (I0! of the reference
current iac(ref!* The dc 'oltage across the capacitor is sensed and compared &ith the reference
'alue* The error signal thus otained is passed through a 5I controller to otain the magnitude of
the d-a,is component (Id! of the reference current iac(ref!* The d-0 a,es reference currents are
then transformed to stationar( ac reference frame to otain the three-phase reference current
iac(ref!* The h(steresis and current controller compares the actual currents through the
"T#TC$% ranch &ith the reference currents and generates the gate signals to turn on and off
the s&itch pairs T--T;, T/-T? and TB-TC se'eral times in a c(cle so that the actual in'erter current
i0 (actual! trac)s the reference current iac(ref! &ithin a limited h(steresis and* +ig*C*; sho&s the
s&itching instants and &a'eform of the current through the in'erter ranch along &ith the
reference current for a phase*
+ig*C*; "&itching instants and &a'eforms of h(steresis and current control 5A% in'erter*
The reference current generated ( the controller is descried (4
;-
Im
5I-;
ia(Ref! =Im "in (t+>0
0
-0!
Im "in (t+>0
0
-0! + :1
Im "in (t+>0
0
-0! - :1
0

+:1
-:1
#ctual Current (i0 !
V0 = +0*B Vdc
V0 = -0*B Vdc
V0
0 - ; / ?
t
ia(Ref! =Im "in (t+>0
0
-0! (C*-!
Ahere,
;
0
I
;
d
I
m
I + =
(>0
0
-0! = #ngle of lead of ia(Ref! &ith respect to V"
The upper and lo&er limit currents are gi'en (4
ia(upper! =Im "in (t+>0
0
-0! + :1 (C*;!
ia(lo&er! =Im "in (t+>0
0
-0! - :1 (C*/!
Ahen the s&itch T- of the ridge in'erter is turned on )eeping T; off, the in'erter output 'oltage
is +0*BVdc and the in'erter current (i0! rises up satisf(ing the follo&ing e0uation*
dt
di
0
0 0 0
8 * R
;
dc
V
+ = i
s

(C*?!
Ahen the actual current e,ceeds a prescried upper h(steresis and, the upper s&itch T- is turned
off and the lo&er s&itch T; is turned on* #s a result, the output 'oltage transits from +0*BVdc to 7
0*BVdc, and the current starts to deca( satisf(ing the follo&ing e0uation*
dt
di
0
0 0 0
8 * R
;
dc
V
+ = i
s

(C*B!
Ahen the current crosses the lo&er and limit, the lo&er s&itch T; is turned off and the upper
s&itch T- is turned on* The actual current &a'e is thus forced to trac) the sine reference &a'e
&ithin the h(steresis and ( se0uential s&itching of the upper and lo&er s&itches as sho&n in
+ig*C*-* The in'erter then essentiall( ecomes a current source &ith pea)-to pea) current ripple,
&hich is controlled &ithin the h(steresis and irrespecti'e of Vdc fluctuation* The similar
controllers are pro'ided in the other t&o phases &ith -;0
0
phase difference*
"olution of e0uation (C*?! gi'es the e,pression for the rising current and &hen it is e0uated to Im
"in (t+>0
0
-0! + :1 gi'es the solution of the s&itching instant -* "imilarl(, solution of
e0uation (C*B! gi'es the e,pression for the deca(ing current and &hen it is e0uated to Im"in
(t+>0
0
-0! + :1 gi'es the solution of the s&itching instant ; and so on*
;;
;/