GATE Analog Circuits by Kanodia

Eighth Edition
GATE
ELECTRONI CS & COMMUNI CATI ON
Analog Circuits
Vol 5 of 10
RK Kanodia
Ashish Murolia
NODI A & COMPANY
GATE Electronics & Communication Vol 5, 8e
Analog Circuits
RK Kanodia & Ashish Murolia
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Acknowledgements
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We wish you good luck !
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Ashish Murolia
SYLLABUS
GATE Electronics & Communications
Small Signal Equivalent circuits of diodes, BJTs, MOSFETs and analog CMOS. Simple diode circuits, clipping,
clamping, rectifier. Biasing and bias stability of transistor and FET amplifiers. Amplifiers: single-and multi-stage,
differential and operational, feedback, and power. Frequency response of amplifiers. Simple op-amp circuits. Filters.
Sinusoidal oscillators; criterion for oscillation; single-transistor and op-amp configurations. Function generators and
wave-shaping circuits, 555 Timers. Power supplies.
IES Electronics & Telecommunication
Transistor biasing and stabilization. Small signal analysis. Power amplifiers. Frequency response. Wide banding
techniques. Feedback amplifiers. Tuned amplifiers. Oscillators. Rectifiers and power supplies. Op Amp, PLL, other
linear integrated circuits and applications. Pulse shaping circuits and waveform generators.
**********
CONTENTS
CHAPTER 1 DI ODE CI RCUI TS
1.1 I NTRODUCTI ON 1
1.2 DI ODE 1
1.2.1 Operating Modes of a Diode 1
1.2.2 Current-Voltage Characteristics of a Diode 2
1.2.3 Current-Voltage Characteristics of an Ideal Diode 2
1.3 LOAD LI NE ANALYSI S 3
1.4 PI ECEWI SE LI NEAR MODEL 3
1.5 SMALL SI GNAL MODEL 4
1.5.1 Small Signal Resistance 4
1.5.2 AC and DC Equivalent Model 4
1.6 CLI PPER AND CLAMPER CI RCUI TS 6
1.6.1 Clippers 6
1.6.2 Clampers 8
1.7 VOLTAGE MULTI PLI ER CI RCUI T 9
1.7.1 Voltage Doubler 10
1.7.2 Voltage Tripler and Quadrupler 11
1.8 RECTI FI ER CI RCUI T 11
1.8.1 Parameters of Rectifier Circuit 12
1.8.2 Classification of Rectifiers 12
1.9 HALF WAVE RECTI FI ERS 12
1.10 FULL WAVE RECTI FI ERS 14
1.10.1 Centre Taped Full wave Rectifier 14
1.10.2 Bridge Rectifier 15
1.11 FI LTERS 15
1.12 ZENER DI ODE 16
1.13 VOLTAGE REGULATORS 16
EXERCI SE 1.1 18
EXERCI SE 1.2 36
EXERCI SE 1.3 42
SOLUTI ONS 1.1 47
SOLUTI ONS 1.2 90
SOLUTI ONS 1.3 111
CHAPTER 2 BJ T BI ASI NG
2.2 BASI C BI POLAR J UNCTI ON TRANSI STOR 117
2.2.1 Simplified Structure of BJT 117
2.2.2 Operating Modes of BJT 118
2.2.3 Circuit Symbol and Conventions for a BJT 118
2.3 BJ T CONFI GURATI ON 119
2.3.1 Common Base Configuration 119
2.3.2 Common Emitter configuration 120
2.3.3 Common-Collector Configuration 122
2.4 CURRENT RELATI ONSHI PS I N BJ T 122
2.4.1 Relation between Current Gain 122
2.4.2 Relation between Leakage Currents 123
2.5 LOAD LI NE ANALYSI S 123
2.6 BI ASI NG 125
2.6.1 Fixed Bias Circuit 125
2.6.2 Emitter Stabilized Bias Circuit 126
2.6.3 Voltage Divider Bias 128
2.7 BI AS STABI LI ZATI ON 129
2.7.1 Stability factor 129
2.7.2 Total Effect on the Collector Current 129
2.8 EARLY EFFECT 130
EXERCI SE 2.1 132
EXERCI SE 2.2 147
EXERCI SE 2.3 155
SOLUTI ONS 2.1 159
SOLUTI ONS 2.2 201
SOLUTI ONS 2.3 224
CHAPTER 3 BJ T AMPLI FI ERS
3.2 AC LOAD LI NE ANALYSI S 229
3.3 HYBRI D EQUI VALENT MODEL 230
3.3.1 Current Gain 230
3.3.2 Voltage Gain 230
3.3.3 Input Impedance 231
3.3.4 Output Impedance 231
3.4 SMALL SI GNAL PARAMETER 232
3.4.1 Collector Current and the Transconductance 232
3.4.2 Base Current and Input Resistance at the Base 233
3.4.3 Emitter Current and the Input Resistance at the Emitter 233
3.5 HYBRI D-p MODEL 233
3.5.1 Hybrid p-model Circuit Including the Early Effect 235
3.6 ANALYSI S OF STANDARD MODELS 235
3.6.1 Common Emitter Fixed Bias Configuration 235
3.6.2 Voltage Divider Bias 236
3.6.3 Common-Emitter Bias Configuration 237
3.7 FREQUENCY RESPONSE OF COMMON EMI TTER AMPLI FI ER 238
3.7.1 Cut-off Frequency 239
EXERCI SE 3.1 241
EXERCI SE 3.2 254
EXERCI SE 3.3 260
SOLUTI ONS 3.1 265
SOLUTI ONS 3.2 295
SOLUTI ONS 3.3 315
CHAPTER 4 FET BI ASI NG
4.2 J UNCTI ON FI ELD EFFECT TRANSI STOR (J FET) 321
4.2.1 Circuit Symbols of JFET 321
4.2.2 Characteristics of JFET 322
4.3 METAL-OXI DE SEMI CONDUCTOR FI ELD EFFECT TRANSI STOR (MOSFET) 323
4.3.1 n-channel Enhancement Type MOSFET 323
4.3.2 p-channel Enhancement Type MOSFET 325
4.3.3 n-channel Depletion Type MOSFET 326
4.3.4 p-channel Depletion Type MOSFET 326
4.4 SOME STANDARD CONFI GURATI ONS FOR J FET 328
4.4.1 Fixed Bias Configuration 328
4.4.2 Self Bias Configuration 329
4.4.3 Voltage Divider Biasing 330
4.5 BI ASI NG CONFI GURATI ON FOR DEPLETI ON TYPE MOSFETS 331
4.6 SOME STANDARD CONFI GURATI ONS FOR ENHANCEMENT TYPE MOSFET CI RCUI TS 331
4.6.1 Feedback Biasing Configuration 331
4.6.2 Voltage Divider Biasing Configuration 332
4.6.3 Enhancement Mode NMOS device with the Gate Connected to the Drain 333
EXERCI SE 4.1 334
EXERCI SE 4.2 347
EXERCI SE 4.3 354
SOLUTI ONS 4.1 358
SOLUTI ONS 4.2 388
SOLUTI ONS 4.3 408
CHAPTER 5 FET AMPLI FI ERS
5.2 SMALL SI GNAL ANALYSI S OF J FET CI RCUI T 413
5.2.1 Transconductance 413
5.2.2 Output Resistance 414
5.3 SOME STANDARD CONFI GURATI ONS 414
5.3.1 JFET Fixed Bias Configuration 414
5.3.2 JFET Self Bias Configuration with bypassed Capacitor 415
5.3.3 JFET Self Bias Configuration with Unbypassed R
S
416
5.3.4 JFET Voltage Divider Configuration 418
5.3.5 JFET Source Follower (Common Drain) Configuration 418
5.3.6 JFET Common Gate Configuration 420
5.4 SMALL SI GNAL ANALYSI S OF DEPLETI ON TYPE MOSFET 421
5.5 SMALL SI GNAL ANALYSI S FOR ENHANCEMENT TYPE MOSFET 422
EXERCI SE 5.1 423
EXERCI SE 5.2 432
EXERCI SE 5.3 438
SOLUTI ONS 5.1 442
SOLUTI ONS 5.2 467
SOLUTI ONS 5.3 483
CHAPTER 6 OUTPUT STAGES AND POWER AMPLI FI ERS
6.2 GENERAL CONSI DERATI ON 487
6.2.1 Power 487
6.2.2 Power Efficiency 487
6.3 EMI TTER FOLLOWER AS POWER AMPLI FI ER 487
6.3.1 Small Signal Voltage Gain of Emitter Follower 487
6.3.2 Relation between Input and Output Voltage 488
6.3.3 Emitter Follower Power Rating 488
6.3.4 Power Efficiency 489
6.4 PUSH-PULL STAGE 489
6.5 CLASSES OF AMPLI FI ERS 490
6.5.1 Class-A Operation 491
6.5.2 Class-B Operation : 492
6.5.3 Class-AB Output Stage 493
6.6 AMPLI FI ER DI STORTI ON 494
6.6.1 Total harmonic Distortion 494
6.6.2 Relationship Between Total Power and THD 494
6.7 HEAT SI NKS 494
6.7.1 Junction Temperature 495
6.7.2 Thermal Resistance 495
6.7.3 Transistor Case and Heat Sink 495
EXERCI SE 6.1 496
EXERCI SE 6.2 508
EXERCI SE 6.3 513
SOLUTI ONS 6.1 517
SOLUTI ONS 6.2 539
SOLUTI ONS 6.3 551
CHAPTER 7 OP- AMP CHARACTERI STI CS AND BASI C CI RCUI TS
7.2 OPERATI ONAL AMPLI FI ER 555
7.3 I DEAL OP-AMP CI RCUI T 555
7.3.1 Transfer Characteristic of Ideal Op-amp 556
7.3.2 Common Mode Signal for Ideal Op-amp 556
7.4 PRACTI CAL OP-AMP CI RCUI TS 556
7.4.1 Inverting Amplifier 556
7.4.2 Non-inverting Amplifier 558
7.4.3 Unity Follower 558
7.4.4 Summing Amplifier 558
7.4.5 Amplifier with a T-network 559
7.5 PRACTI CAL OP-AMP CI RCUI TS WI TH FI NI TE GAI N 559
7.5.1 Unity Follower 560
7.5.2 Inverting Amplifier 560
7.5.3 Non-inverting Amplifier 561
7.6 SLEW RATE 561
7.6.1 Maximum Signal Frequency in terms of Slew Rate 562
7.7 DI FFERENTI AL AND COMMON-MODE OPERATI ON 562
7.7.1 Differential Inputs 562
7.7.2 Common Inputs 562
7.7.3 Output voltage 562
7.7.4 Common Mode Rejection Ratio (CMRR) 562
7.8 DC OFFSET PARAMETER 563
7.8.1 Output Offset Voltage due to Input Offset Voltage 563
7.8.2 Output Offset Voltage due to Input Offset Current 563
EXERCI SE 7.1 565
EXERCI SE 7.2 578
EXERCI SE 7.3 587
SOLUTI ONS 7.1 591
SOLUTI ONS 7.2 619
SOLUTI ONS 7.3 644
CHAPTER 8 OP - AMP APPLI CATI ON
8.2 I NVERTI NG AMPLI FI ER 649
8.3 NON-I NVERTI NG AMPLI FI ER 650
8.4 MULTI PLE-STAGE GAI NS 650
8.5 VOLTAGE SUBTRACTI ON 650
8.6 CURRENT TO VOLTAGE CONVERTER 651
8.7 VOLTAGE TO CURRENT CONVERTER 651
8.8 DI FFERENCE AMPLI FI ER 652
8.9 I NSTRUMENTATI ON AMPLI FI ER 653
8.10 I NTEGRATOR 654
8.11 DI FFERENTI ATOR 655
8.12 LOGARI THMI C AMPLI FI ER 655
8.13 EXPONENTI AL AMPLI FI ER 656
8.14 SQUARE-ROOT AMPLI FI ER 656
8.15 COMPARATOR 657
8.16 SCHMI TT TRI GGER 657
8.17 NON I NVERTI NG SCHMI TT TRI GGER CI RCUI T 658
8.18 PRECI SI ON RECTI FI ER 659
8.19 FUNCTI ON GENERATOR 660
EXERCI SE 8.1 661
EXERCI SE 8.2 679
EXERCI SE 8.3 684
SOLUTI ONS 8.1 688
SOLUTI ONS 8.2 734
SOLUTI ONS 8.3 751
CHAPTER 9 ACTI VE FI LTERS
9.2 ACTI VE FI LTER 757
9.2.1 Low Pass Filter 757
9.2.2 High Pass Filter 759
9.2.3 Band pass filter 759
9.3 THE FI LTER TRANSFER FUNCTI ON 760
9.3.1 Pole-Zero Pattern of Low Pass Filter 761
9.3.2 Pole-Zero Pattern of Band Pass Filter 761
9.3.3 First-Order Filter Transfer Function 762
9.3.4 Second-order Filter Transfer Function 763
9.4 BUTTERWORTH FI LTERS 765
9.5 THE CHEBYSHEV FI LTER 765
9.6 SWI TCHED CAPACI TOR FI LTER 765
9.7 SENSI TI VI TY 766
EXERCI SE 9.1 767
EXERCI SE 9.2 778
EXERCI SE 9.3 781
SOLUTI ONS 9.1 786
SOLUTI ONS 9.2 813
SOLUTI ONS 9.3 818
CHAPTER 10 FEEDBACK AMPLI FI ER AND OSCI LLATOR
10.2 FEEDBACK 821
10.2.1 Negative Feedback 821
10.2.2 Positive Feedback 822
10.3 THE FOUR BASI C FEEDBACK TOPOLOGI ES 822
10.3.1 Voltage Amplifier 822
10.3.2 Current Amplifier 823
10.3.3 Transconductance Amplifier 823
10.3.4 Transresistance Amplifier 824
10.4 ANALYSI S OF FEEDBACK AMPLI FI ER 824
10.5 OSCI LLATORS 826
10.6 OP-AMP RC OSCI LLATOR CI RCUI TS 826
10.6.1 Wein Bridge Oscillator 826
10.6.2 Phase Shift Oscillator 827
10.7 LC OSCI LLATOR CI RCUI T 827
10.7.1 Colpitts Oscillator 827
10.7.2 Hartley oscillator 828
10.8 THE 555 CI RCUI T 828
10.8.1 Monostable Multivibrator 828
10.8.2 Astable Multivibrator 829
EXERCI SE 10.1 830
EXERCI SE 10.2 840
EXERCI SE 10.3 844
SOLUTI ONS 10.1 849
SOLUTI ONS 10.2 873
SOLUTI ONS 10.3 878
***********
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Chap 1
Diode Circuits
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Chap 1
Diode Circuits
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Sample Chapter of Analog Circuits (Vol-5, GATE Study Package)
1.1 I NTRODUCTI ON
A general goal of this chapter is to develop the ability to use the piece wise
linear model and approximation techniques in the hand analysis and design
of various diode circuits. The chapter includes the following topics:
Introduction to diode
AC and DC analysis of diode.
Application of diodes to perform signal processing functions: rectification,
clipping and clamping.
Zener diode, which operates in the reverse breakdown region
Application of Zener diode in voltage regulators
1.2 DI ODE
Diode is a two terminal device with nonlinear i -v (current-voltage)
characteristics. Figure 1.1 shows the circuit symbol of a diode. In the diode
symbol, the triangular head denoting the allowable direction of current flow
and the vertical bar representing the blocking behaviour for currents in the
opposite direction. The corresponding terminals are called the anode (or p
-terminal) and the cathode (or n-terminal) respectively.
Figure 1.1: Diode Circuit Symbol
1.2.1 Operating Modes of a Diode
A diode operates in the following two modes:
1. Forward bias
2. Reverse bias
Forward Bias
If the p-terminal of a diode is at higher voltage level than the n-terminal
(i.e. positive voltage applied across diode), a positive current flows through
the diode. The diode, operating in this mode, is said to be turned ON or
forward biased. Mathematically, we define the condition for a forward biased
diode as
CHAPTER 1
DI ODE CI RCUI TS
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Chap 1
Diode Circuits
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Chap 1
Diode Circuits
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10 Subject-wise books by R. K. Kanodia
Networks Electronic Devices Analog Circuits
Digital Circuits Signals & Systems Control Systems Electromagnetics Communication Systems
General Aptitude
Engineering Mathematics
Forward bias
V V
V V
V V V 0
>
>
>
anode cathode
p n
D p n
= -
_
`
a
b
b
bb
Reverse Bias
If the p-terminal of an ideal diode is at lower voltage level than the n
-terminal (i.e. negative voltage applied across diode), then there is no current
across the diode. The diode operating in this mode is said to be turned OFF
or reverse biased. Mathematically, we define the condition for a reverse
biased diode as
Reverse bias
V V
V V
V V V 0
<
<
<
anode cathode
p n
D p n
= -
_
`
a
b
b
bb
1.2.2 Current-Voltage Characteristics of a Diode
The theoretical relationship between the voltage ( ) V
D
and current ( ) i
D
in the
pn junction is given by
i
D
[ ( ) ] exp I 1
S
V
V
T
D
= -
h
...(1.1)
where the parameter I
S
is the reverse saturation current, V
T
is thermal
voltage, and h is the emission coefficient or ideality factor.
NOTE :
Thermal voltage at room temperature is . V V 0 026 T = . The value of ideality factor is in the
range 1 2 # # h . For germanium, 1 h = , and for silicon, 2 h = .
1.2.3 Current-Voltage Characteristics of an Ideal Diode
The ideal diode may be considered as the most fundamental non-linear circuit
element. Figure 1.2 (a) and (b) shows the current-voltage characteristics of
an ideal diode in the forward bias and reverse bias regions, respectively.
(a) Forward Biased Diode,
(b) Reverse Biased Diode
Figure 1.2: Current-Voltage Characteristic of (a) Forward Biased Diode, (b) Reverse Biased
Diode
Combining the two graphs, we get the overall current-voltage
characteristic of an ideal diode (as opposed to the i -v characteristic of a
diode given in equation (1.1)) as shown in Figure 1.3.
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Chap 1
Diode Circuits
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Chap 1
Diode Circuits
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Figure 1.3: Current-Voltage Characteristic of an Ideal Diode
1.3 LOAD LI NE ANALYSI S
The applied load to a device normally have an important impact on the
point or region of operation of the device. Load line analysis is the graphical
approach to analyse the operation of a circuit. Consider the network shown
in Figure 1.4 (a). Applying KVL in the circuit,
E V V
D R
- - 0 =
E V I R
D D
= + ...(1.2)

(a) (b)
Figure 1.4: (a) A Simple Diode Circuit, (b) Load Line Characteristic for the Diode Circuit
Substituting V 0
D
= in equation (1.2), we have
I
D

R
E
V 0 D
=
=
...(1.3)
Again, substituting I 0
D
= in equation (1.2), we get
V
D
E
I 0 D
=
=
The two variables (V
D
, I
D
) are the same as the diode axis variable, so
we draw the load line and determine the point of intersection, as shown in
Figure 1.4 (b).
1.4 PI ECEWI SE LI NEAR MODEL
Figure 1.5 shows the piecewise linear model of a diode forward characteristic.
The exponential curve is approximated by two straight lines, line A with
zero slope and line B with a slope of r
d
. The straight line model or piecewise
linear model can be described as
I
D
0 = , V V
D
#
g
I
D

r
V V
d
D
=
-
g
, V V
D
$
g
where r
d
= Diode forward resistance
V
g
= cut in voltage of diode
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Chap 1
Diode Circuits
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Chap 1
Diode Circuits
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General Aptitude

(a) (b)
Figure 1.5: (a) Piecewise Linear Model of the Diode Forward Characteristics, and (b) its
Equivalent Circuit Representation
1.5 SMALL SI GNAL MODEL
When pn junction diode is used in a linear amplifier circuit, the time varying
or ac characteristics of the diode becomes important. For these circuits, we
define the small signal model of diode. For the small signal model analysis,
assume that the ac signal is small compared to the dc component, so that a
linear ac model can be developed from the non linear diode. The relationship
between the diode current and voltage can be written as
i
D
I e
S
V
V
T
D
. I e
S
V
V v
T
DQ d
=
+
where V
DQ
is the dc quiescent voltage and v
d
is the ac component. So,
i
D
I e e
S
V
V
V
v
T
DQ
T
d
= ...(1.4)
Since, the ac signal is small, i.e
v
d
V <<
T
So, e
/ v V d T

V
v
1
T
d
. + ...(1.5)
Substituting the above expression to equation (1.4), we get
i
D
I e
V
v
1
S
V
V
T
d
T
DQ
=
+ _ a i k I
V
v
1
DQ
T
d
= +
a k
I I
V
v
( )
( )
Quiescent diode current
dc bias current
ACcurrent
signal current
DQ DQ
T
d
= +
S
S
where I I e
DQ S
V
V
T
DQ
. is the quiescent diode current. Thus, the relationship
between the ac components of the diode voltage and current is
i
d
I
V
v
DQ
T
d
= ...(1.6)
1.5.1 Small Signal Resistance
The small signal incremental resistance of a diode is defined as
r
d

i
v
I
V
d
d
DQ
T
= = [see equation (1.6)]
where V
T
is thermal voltage and I
DQ
is the quiescent diode current.
1.5.2 AC and DC Equivalent Model
In the above sections, we have already discussed the diode characteristics for
ac and dc supply. Figure 1.4 (a) and (b) illustrate the equivalent dc model
(bias model) and ac model (small signal model) of a diode.
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Chap 1
Diode Circuits
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Chap 1
Diode Circuits
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Figure 1.4 (a): Bias Model and (b): Small Signal Model of a Diode
METHODOLOGY: ANALYSI S OF SI NGLE DI ODE CI RCUI T
In using the piecewise linear model to the diode, the first objective is to
determine the Linear region (forward bias or reverse bias) in which the
diode is operating To do this, we can :
Step 1: Find the input voltage conditions such that a diode is ON
(forward bias) then find the output signal for this condition.
Step 2: Find the input voltage condition such that a diode is OFF
(Reverse bias) then find the output signal for this condition.
NOTE :
Step 2 can be performed before step 1.
METHODOLOGY: ANALYSI S OF MULTI PLE DI ODE CI RCUI T
Analyzing multidiode circuit requires determining if the individual
diodes are ON or OFF. In many cases, the choice is not obvious so we
must initially guess the state of each diode, then analyse the circuit to
determine if we have a solution consistent with our initial guess. To do
this, we may follow the steps given below.
Step 1: Assume the state of a diode. If a diode is assumed ON the voltage
across the diode is assumed to be V
g
. If a diode is assumed to be
OFF the current through the diode is assumed to be zero.
Step 2: Analyse the linear circuit with the assumed states.
Step 3: Evaluate the resulting state of each diode. If the initial assumption
were that a diode is OFF and the analysis shows that 0 I
D
= or
V V
D
#
g
then the assumption is correct if, however, the analysis
actually shows thatI 0 >
D
or V V >
D g
, then the initial assumption
is incorrect. Similarly, if the initial assumption were that a diode
is ON and the analysis shows that I 0
D
$ or V V
D
$
g
, then the
initial assumption is correct. If, however, the analysis shows that
I 0 <
D
or V V <
D f
, then the initial assumption is incorrect.
Step 4: If any initial assumption is proven incorrect then a new
assumption must be made and the new linear circuit must be
analysed. Step 3 must than be repeated.
NOTE :
For simplification at the initial step always assume that all the diodes are OFF then find
the voltage across diodes VD then follow step 3.
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General Aptitude
1.6 CLI PPER AND CLAMPER CI RCUI TS
Diode can be used in wave shaping circuits that either limit or clip portion
of a signal, or shift the dc voltage level. The circuits are called clippers and
clampers, respectively.
1.6.1 Clippers
Clipper circuits, also called limiter circuits are used to eliminate portion
of a signal that are above or below a specified level without distorting
the remaining part of the alternating waveform. The simple form of diode
clipper-one resistor and diode depending on the orientation of the diode the
positive or negative region of the input signal is clipped OFF. There are two
general categories of clippers:
1. Series clipper
2. Parallel clipper.
1. Series Clipper
The series configuration is defined as one where the diode is in series
with the load. Table 1.1 summarizes the output waveform of various
biased and unbiased series clipper circuits for the input waveform shown
in Figure 1.5.
Figure 1.5: Sinusoidal Input Waveform
Table 1.1: Series Clipper Circuits and its Output Waveform
Series Clippers Clipper Circuits Output Waveforms
Unbiased Series
Clipper Using
Ideal Diode
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Series Clippers Clipper Circuits Output Waveforms
Biased Series
Clipper Using
Ideal Diode
2. Parallel Clipper
The parallel clipper (or shunt clipper) has the diode in a branch parallel to
the load. Table 1.2 summarizes the output waveform of various biased and
unbiased parallel clipper circuits for the input waveform shown in Figure
1.5.
Table 1.2: Parallel Clipper Circuits and its Output Waveform
Parallel Clippers Clipper Circuits Output Waveforms
Unbiased
Parallel Clippers
Using Ideal
Diode
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General Aptitude
Parallel Clippers Clipper Circuits Output Waveforms
Biased Parallel
Clippers Using
Ideal Diode
Following are some important points that must be remembered while
analysing a parallel clipper circuit:
PROBLEM SOLVI NG TECHNI QUES I N PARALLEL CLI PPER
1. When the diode is in downward direction the signal will be transmitted
below the reference voltage.
2. When the diode is in upward direction the signal will be transmitted
above the reference voltage.
3. Under any circumstances - dc, ac, instantaneous values, pulses, and so
on; Kirchoffs voltage law must be satisfied.
1.6.2 Clampers
Clamping shifts the entire signal voltage by a dc level. In a steady state, the
output waveform is an exact replica of the input waveform, but the output
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signal is shifted by a dc value that depends on the circuit. The network must
have a capacitor, a diode, and a resistive elements but it can also employ an
independent dc supply to introduce an additional shift. Figure 1.6 shows a
clamper circuit and a sinusoidal input waveform.
(a) (b)
Figure 1.6: (a) Input Sinusoidal Waveform, (b) Clamper Circuit
For the positive half cycle of input waveform, diode is short and the
output is zero, as shown in Figure 1.7 (a). The capacitor is charged in the
positive half cycle. In the negative cycle, the diode is open and the output is
v
o
V V V 2 =- - =-
Thus, we get the output waveform of the clamper as shown in Figure 1.7 (c).

(a) (b)
(c)
Figure 1.7: Equivalent Clamping Circuit for (a) Positive Half Cycle, (b) Negative Half
Cycle of Input Waveform, (c) Output Waveform of Clamper Circuit
Following are some important points that must be remembered while
solving a clamper circuit:
PROBLEM SOLVI NG TECHNI QUES I N CLAMPER CI RCUI T
1. When the diode is in downward direction the total signal will be
clamped below the reference voltage.
2. When the diode is in upward direction the total signal will be clamped
1.7 VOLTAGE MULTI PLI ER CI RCUI T
Voltage multiplier Circuits provide a means by which multiple dc voltages
can be generated from a single ac source and power transformer. Here, we
will discuss some typical voltage multiplier circuits.
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General Aptitude
1.7.1 Voltage Doubler
Voltage doubler circuits provide twice the peak voltages of the transformer
secondary. Figure 1.8 shows the half wave voltage doubler circuit.
Figure 1.8: Half Wave Voltage Doubler Circuit
The output waveform of the voltage doubler can be determined by
following two methods:
METHODOLOGY 1: TO ANALYSE OUTPUT OF VOLTAGE DOUBLER
Step 1: For positive voltage half cycle across the transformer secondary,
diode D
1
conducts so capacitor C
1
will be charged.
Step 2: For negative voltage half cycle across the transformer secondary,
diode D
2
will conduct and capacitor C
2
will be charged.
Step 3: Applying KVL in loop 1, we get
V V v
m m o
- - - 0 =
v
o
V 2
m
=-
METHODOLOGY 2: TO ANALYSE OUTPUT OF VOLTAGE DOUBLER
Step 1: For the given voltage doubler circuit, we deduce that it includes
a negative clamper and a peak detector.
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Step 2: For the negative clamper (diode is in downward direction), the
total signal will be clamped below the reference voltage, i.e.
( ) v
clamper o
V v
m i
=- -
Step 3: Since, the peak detector provides the peak voltage at output, so
we get
v
o
V 2
m
=-
NOTE :
If a circuit includes a diode and a capacitor, then the circuit is either a clamper or
a peak detector. For a clamper, output is always across diode; whereas for a peak
detector, output is across capacitor.
1.7.2 Voltage Tripler and Quadrupler
Figure 1.9 shows the voltage tripler and quadrupler. It is an extension
of the half wave voltage doubler, which develops three and four times
the peak input voltage. For positive half cycle D
1
and D
3
will conduct so
capacitor C
1
, C
3
, C
2
will be charged. For negative half cycle D
2
and D
4
will
conduct.
Figure 1.9: Votage Tripler and Quadrupler
1.8 RECTI FI ER CI RCUI T
Rectification is the process of converting an alternating voltage into one that
is limited to one polarity. The diode is useful for this function because of its
nonlinear characteristic that is current exists for one voltage polarity, but
is essentially zero for the opposite polarity. The block diagram of a rectifier
circuit is shown in Figure 1.10.
Figure 1.10: Block diagram of an electronic power supply
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General Aptitude
1.8.1 Parameters of Rectifier Circuit
Some important parameters for rectifier are described in the following texts:
1. DC load current: The dc load current of a rectifier is given by
I
dc

area under curve output waveform of
2p
=
( ) I d t
2
1
0
2
p
w =
p
#
2. DC load voltage: If the rectifier is terminated to load R
L
, then the dc
load voltage of the rectifier is given by
V
dc
I R
dc L
=
3. RMS load current: The rms load current of a rectifier is defined as
I
rms
I d t
2
1 2
0
2
p
w =
p
^ h #
4. RMS load voltage: The rms load voltage of a rectifier is given by
V
rms
I R
rms L
=
5. Ripple: The time dependent component present in the output of the
rectifier filter is known as ripple.
6. Ripple factor: The ripple factor of a rectifier is obtained as
. . r f
averge value of output current
rms value of alternating component in output current
=

( )
I
I I
dc
rms dc
2 2
=
-
^ h

I
I
1
dc
rms
2
= -
b l
7. Voltage regulation: The percentage voltage regulation for a rectifier is
defined as
%VR
( )
( ) ( )
V
V V
FL
NL FL
dc
dc dc
=
-
where ( ) V
FL dc
is the full load dc voltage and ( ) V
NL dc
is the null load
voltage. Ideally VR should be zero.
8. Rectifier efficiency: The rectifier efficiency is defined as
h
ACinput power
DCpower delivered to the load
=
P
P
ac
dc
=
9. Peak inverse voltage: It is the maximum reverse bias voltage across the
diode where the diode withstand.
1.8.2 Classification of Rectifiers
Rectifier circuits can be classified as
1. Half wave rectifier
2. Full wave rectifier
In the following sections, we will discuss some typical classes of rectifiers.
1.9 HALF WAVE RECTI FI ERS
For a half wave rectifier, the output voltage appears only during the half
cycle of the input signal. Figure 1.11 shows a half wave rectifier, its input
waveform, and the corresponding output waveform.
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(a)

(b) (c)
Figure 1.11: (a) Half Wave Rectifier Circuit, (b) Input Waveform, and (c) Output Waveform
Some important parameters for a half wave rectifier are described in the
following table.
Table 1.3: Parameters of a Half Wave Rectifier Circuit
S.N. Parameters Expression
1.
DC load current
I
dc

I
m
p
=
2.
DC load voltage
V
dc

R
R R
V
1
L
f S
m
p
=
+
+
c m
where R
L
is load resistance, R
S
is second
transformer resistance, and R
f
is forward
resistance of diode.
3.
Null load dc voltage
V
NL
dc ^ h
V
m
p
=
if R
L
3 = , i.e. load terminal is open
4.
RMS load current
I
rms

I
2
m
=
5.
RMS load voltage
V
rms

V
2
m
=
6.
Ripple factor . . r f 1.21 =
7.
Voltage regulation Ideally VR should be zero, i.e. %VR 0 =
8.
Rectifier efficiency h . 40 6 .
9.
Peak inverse voltage In half wave rectifier, the PIV rating of the
diode must equal or exceed the peak value of
the applied voltage, i.e. PIV V
m
$
10.
Output frequency f , i.e. same as input frequency
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General Aptitude
1.10 FULL WAVE RECTI FI ERS
The full wave rectifier inverts the negative portions of the sine wave so
that a unipolar output signal is generated during both halves of the input
sinusoidal. Following are the full wave rectification methods:
1. Centre tap full wave rectifier
2. The Bridge rectifier
1.10.1 Centre Taped Full wave Rectifier
One possible implementation of full wave rectifier is centre taped full wave
rectifier. Figure 1.13 shows a centre taped full wave rectifier, input waveform,
and the corresponding output waveform. The current through the two diodes
in the circuit is given by
I
1
sin I t
m
w = , t 0 < < w p
I
2
sin I t
m
w = , t 2 < < p w p
(a)

(b) (c)
Figure 1.13: (a) Full Wave Rectifier, (b) Input Waveform, and (c) Output Waveform
Some important parameters for a centre taped full wave rectifier are
summarized in the following table.
Table 1.4: Parameters of Centre Taped Full Wave Rectifier
1.
DC load current
I
dc

I 2
m
p
=
3.
V
V 2
NL
dc
m
p
= ^ h if R
L
3 = , i.e. load terminal
is open
4.
RMS load current
I
rms

I
2
m
=
5.
RMS load voltage
V
rms

V
2
m
=
6.
Ripple factor . . r f . 0 48 =
8.
Rectifier efficiency h . % 81 2 .
9.
Peak inverse voltage PIV V 2
m
=
10.
Output frequency f 2 , where f is the input frequency.
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1.10.2 Bridge Rectifier
An alternative implementation of the full wave rectifier is bridge rectifier.
Figure 1.14 shows a bridge rectifier, input waveform, and the corresponding
output waveform.
(a)

(b) (c)
Figure 1.14: (a) Bridge Rectifier, (b) Input Waveform, (c) Output Waveform
Some important parameters for a bridge rectifier are summarized in the
table below.
1.
DC load current
I
dc

I 2
m
p
=
3.
V
NL
dc ^ h
V 2
m
p
=
if R
L
3 = , i.e. load terminal is open
4.
RMS load current
I
rms

I
2
m
=
5.
RMS load voltage
V
rms

V
2
m
=
6.
Ripple factor . . r f . 0 48 =
8.
Rectifier efficiency h . % 81 2 .
9.
Peak inverse voltage PIV V
m
=
10.
Output frequency f 2 , where f is the input frequency.
1.11 FI LTERS
A capacitor is added in parallel with the load resistor of a half wave rectifier
to form a simple filter circuit as shown in fig 1.15.
Conduction Interval
The diode only conducts for a short time T T during each cycle. This time
is called the conduction interval.
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General Aptitude
Output Voltage
During the discharge period the voltage across the capacitor is described by
v t
o ^ h V e
/
m
t RC
=
-
At the end of discharge interval, we have the output
V
L
V e
/
m
T RC
=
- l
where Tl is the discharge time.
(a) (b)
Figure 1.15: (a) Capacitor Filter Circuit, (b) Input and Output Waveform for the Filter
Ripple Voltage
The output voltage is no longer constant as in the ideal peak detector circuit
but has ripple voltage V
r ^ h. The ripple voltage is defined as the difference
between V
m
and V
L
, i.e.
V
r
V V V e 1
/
m L m
T RC
= - = -
- l
^ h
Since, RC T >> l, so we may write
V
r
V
RC
T
m
.
l
b l
or V
r
V
RC
T
m
. (T T . l )
or V
r

fRC
V
m
= ( / f T 1 = )
1.12 ZENER DI ODE
Zener diodes are designed to provide a specified breakdown voltage. The
breakdown voltage of the zener diode is nearly constant over a wide range
of reverse bias currents. This makes the zener diode useful in a voltage
regulator, or a constant voltage reference circuit. Figure 1.16 shows the
zener diode and its equivalent circuit models for ON and OFF states.
(a) (b)
Figure 1.16: Equivalent Circuit Model for a Zener Diode for (a) ON State and (b) OFF
State
1.13 VOLTAGE REGULATORS
A Voltage regulator is a device or combination of devices designed to maintain
the output voltage of a power supply as nearly constant as possible. One of
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the simplest discrete Regulator consists of only a resistor and a zener diode,
as shown in Figure 1.17.
Figure 1.17: Basic Zener Regulator
METHODOLOGY: TO ANALYSE ZENER REGULATOR CI RCUI T
The applied dc voltage is fixed, as is the load resistor. The zener regulator
can be analysed in the following steps.
Step 1: Remove the zener diode from the network.
Step 2: Calculate the voltage across the resulting open circuit.
V V
R R
R
v
L
L
L
i
= =
+
Step 3: Determine the state of the zener diode by checking the obtained
value of voltage V for the following conditions
If V V
z
$ , the zener diode is ON
If V V <
z
, the diode is OFF
Step 4: Substitute the appropriate equivalent circuit for the resulting
state of zener diode. For ON state, equivalent mode of Figure
1.16(a) can be substituted, while for OFF state the open circuit
equivalence of Figure 1.16(b) is substituted.
Step 5: Solve the resulting equivalent circuit for the desired unknowns.
For example, assume that the equivalent circuit for the zener
regulator is as shown below.
So, we get the various parameters for the circuit as
Load voltage, V
L
V
z
=
Load current, I
L

R
V
L
=
Current through resistance R, I
R

R
V
R
V V
R i L
= =
-
Zener current, I
z
I I
R L
= -
Power dissipated by Zener diode, P
z
V I
z z
=
***********
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General Aptitude
EXERCI SE 1.1
MCQ 1.1.1 Consider the given circuit and a waveform for the input voltage, shown in
figure below. The diode in circuit has cutin voltage 0 V =
g
.
The waveform of output voltage v
o
is
g
.
o
is
g
.
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o
is
MCQ 1.1.4 Consider the given circuit and a waveform for the input voltage. The diode
in circuit has cutin voltage 0 V =
g
.
o
is
MCQ 1.1.5 For the circuit shown below, let cut in voltage 0.7 V =
g
V.
The plot of v
o
verses v
i
for 10 10 v
i
# # - V is
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General Aptitude
MCQ 1.1.6 For the circuit shown below the cutin voltage of diode is 0.7 V =
g
V.
The plot of v
o
versus v
i
is
MCQ 1.1.7 For the circuit shown below each diode has 0.7 V =
g
V.
The v
o
for 10 10 v
s
# # - V is
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MCQ 1.1.8 A symmetrical 5 kHz square wave whose output varies between 10 V + and
10 V - is impressed upon the clipping shown in figure below
If diode has 0 r
f
= and 2 r
r
= MW and 0 V =
g
, the output waveform is
MCQ 1.1.9 In the circuit shown below, the three signals of fig are impressed on the
input terminals.
If diode are ideal then the voltage v
o
is
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General Aptitude
MCQ 1.1.10 For the circuit shown below the input voltage v
i
is as shown in figure.
Assume the RC time constant large and cutin voltage of diode 0 V =
g
. The
output voltage v
o
is
MCQ 1.1.11 For the circuit shown below, the input voltage v
i
is as shown in figure.
Assume the RC time constant large and cutin voltage 0 V =
g
. The output
voltage v
o
is
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MCQ 1.1.12 In the circuit I is DC current and capacitors are very large. Using small
signal model which of following is correct ?
(A) v v
V IR
V
o s
T s
T
h
h
=
+
(B) v v
o s
=
(C) v
V IR
v
o
T S
s
h
=
+
(D) 0 v
o
=
Common Data For Q. 13 to 15 :
Consider the circuit shown below. Assume diodes are ideal.
MCQ 1.1.13 If 10 v
1
= V and 5 v
2
= V, then output voltage v
o
is
(A) 9 V (B) 9.474 V
(C) 0 V (D) 8.943 V
MCQ 1.1.14 If 10 v v
1 2
= = V, then output voltage v
o
is
(A) 9 V (B) 9.474 V
(C) 4 V (D) 8.943 V
MCQ 1.1.15 If 5 v
1
=- V and 5 v
2
= V then v
o
is
(A) 9.474 V (B) 8.943 V
(C) 4.5 V (D) 9 V
Common Data For Q.16 and 17 :
Consider the circuit shown below. Assume diodes are ideal.
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General Aptitude
MCQ 1.1.16 If 10 v v
1 2
= = V, then output voltage v
o
is
(A) 0 V (B) 9.737 V
(B) 9 V (D) 9.5 V
MCQ 1.1.17 If 5 v
1
=- V and 10 v
2
= V, the output voltage v
o
is
(A) 9 V (B) 9.737 V
(C) 9.5 V (D) 4.5 V
MCQ 1.1.18 In the circuit shown below diodes has cutin voltage of 0.6 V. The diode in
ON state are
(A) only D
1
(B) only D
2
(C) both D
1
and D
2
(D) None of these
MCQ 1.1.19 For the circuit shown below cutin voltage of diode is 0.7 V =
g
. What is the
value of v and i ?
(A) 2.3 V, 2.65 mA (B) 2.65 V, 2.3 mA
(C) 2 V, 0 mA (D) 0 V, 2.3 mA
MCQ 1.1.20 For the circuit shown below the value of v and i are (if the diode is ideal)
(A) 5 + V, 0 mA (B) 1 + V, 0.6 mA
(C) 5 + V, 0.4 mA (D) 1 + V, 0.4 mA
MCQ 1.1.21 For the circuit shown below each diode has 0.6 V =
g
V and 0 r
f
= . Both
diode will be ON if
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(A) 3.9 v >
s
V (B) 4.9 v >
s
V
(C) 6.3 v >
s
V (D) 5.3 v >
s
V
Common Data For Q. 22 and 23 :
The diode In the circuit shown below has the non linear terminal characteristic
as shown in figure. Let the voltage be cos v t
i
w = V.
MCQ 1.1.22 The current i
D
is
(A) 2.5(1 ) cos t w + mA (B) 5(0.5 ) cos t w + mA
(C) 5(1 ) cos t w + mA (D) 5(1 0.5 ) cos t w + mA
MCQ 1.1.23 The voltage v
D
is
(A) 0.25(3 ) cos t w + V
(B) 0.25(1 3 ) cos t w + V
(C) 0.5(3 1 ) cos t w + V
(D) 0.5(2 3 ) cos t w + V
MCQ 1.1.24 The circuit inside the box in figure shown below contains only resistor and
diodes. The terminal voltage v
o
is connected to some point in the circuit
inside the box.
The largest and smallest possible value of v
o
most nearly to is respectively
(A) 15 V, 6 V
(B) 24 V, 0 V
(C) 24 V, 6 V
(D) 15 V, 9 - V
MCQ 1.1.25 The Q-point for the Zener diode shown below is
(A) (0.34 mA, 4 V)
(B) (0.34 mA, 4.93 V)
(C) (0.94 mA, 4 V)
(D) (0.94 mA, 4.93 V)
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General Aptitude
In the voltage regulator circuit shown below the zener diode current is to be
limited to the range 5 100 i
z
# # mA.
MCQ 1.1.26 The range of possible load current is
(A) 5 130 i
L
# # mA
(B) 25 120 i
L
# # mA
(C) 10 110 i
L
# # mA
(D) None of the above
MCQ 1.1.27 The range of possible load resistance is
(A) 60 372 R
L
# # W
(B) 60 200 R
L
# # W
(C) 40 192 R
L
# # W
(D) 40 360 R
L
# # W
MCQ 1.1.28 The power rating required for the load resistor is
(A) 576 mW (B) 360 W m
(C) 480 mW (D) 75 W m
MCQ 1.1.29 A clipper circuit is shown below.
Assuming forward voltage drops of the diodes to be 0.7 V, the input-output
transfer characteristics of the circuit is
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MCQ 1.1.30 The following circuit has a source voltage
V
s

as shown in the graph. The
current through the circuit is also shown.
The element connected between a and b could be
MCQ 1.1.31 In the voltage doubler circuit shown in the figure, the switch S is closed at
t 0 = . Assuming diodes D
1
and D
2
to be ideal, load resistance to be infinite
and initial capacitor voltages to be zero. The steady state voltage across
capacitor C
1
and C
2
will be
(A) 10 , 5 V V V V
c c 1 2
= =
(B) 10 , 5 V V V V
c c 1 2
= =-
(C) 5 , 10 V V V V
c c 1 2
= =
(D) 5 , 10 V V V V
c c 1 2
= =-
MCQ 1.1.32 What are the states of the three ideal diodes of the circuit shown in figure ?
(A) , , D D D ON OFF OFF
1 2 3

(B) , , D D D OFF ON OFF
1 2 3
(C) , , D D D ON OFF ON
1 2 3

(D) , , D D D OFF ON ON
1 2 3
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General Aptitude
MCQ 1.1.33 The equivalent circuit of a diode, during forward biased and reverse biased
conditions, are shown in the figure.
(I)
(II)
If such a diode is used in clipper circuit of figure given above, the output
voltage V
o
of the circuit will be
MCQ 1.1.34 Assuming the diodes D
1
and D
2
of the circuit shown in figure to be ideal
ones, the transfer characteristics of the circuit will be
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MCQ 1.1.35 A voltage signal sin t 10 w is applied to the circuit with ideal diodes, as shown
in figure, The maximum, and minimum values of the output waveform V
out

of the circuit are respectively
(A) 10 V + and 10 V -
(B) 4 V + and 4 V -
(C) 7 V + and 4 V -
(D) 4 V + and 7 V -
MCQ 1.1.36 The forward resistance of the diode shown in Figure is 5 W and the remaining
parameters are same at those of an ideal diode. The dc component of the
source current is
(A)
V
50
m
p
(B)
V
50 2
m
p
(C)
V
100 2
m
p
(D)
V
50
2
m
p
MCQ 1.1.37 The cut-in voltage of both zener diode D
Z
and diode D shown in Figure
is 0.7 V, while break-down voltage of D
Z
is 3.3 V and reverse break-down
voltage of D is 50 V. The other parameters can be assumed to be the same
as those of an ideal diode. The values of the peak output voltage ( ) V
o
are
(A) 3.3 V in the positive half cycle and 1.4 V in the negative half cycle.
(B) 4 V in the positive half cycle and 5 V in the negative half cycle.
(C) 3.3 V in both positive and negative half cycles.
(D) 4 V in both positive and negative half cycle
Common Data For Q. 38 and 39
In the circuit shown in Figure, the source I is a dc current source. The
switch S is operated with a time period T and a duty ratio D. You may
assume that the capacitance C has a finite value which is large enough
so that the voltage.
V
C
has negligible ripple, calculate the following under
steady state conditions, in terms of D, I and R
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General Aptitude

MCQ 1.1.38 The voltage V
c
, with the polarity shown in Figure,
(A)
C
I
(B) ( )
C
I
DT 1 -
(C) ( )
C
I
D T 1 - (D)
C
I
T -
MCQ 1.1.39 The average output voltage V
o
, with the polarity shown in figure
(A)
C
I
T - (B)
C
I
D T
2
2
-
(C) ( )
C
I
DT
2
1 - (D) (1 )
C
I
D T
2
-
Common Data For Q. 40 and 41:
Consider the given circuit and the cut in voltage of each diode is 0.6 V V =
g
.
MCQ 1.1.40 What is the value of I
D1
, I
D2
, I
D3
respectively?
(A) 1.94 mA, 0.94 mA - , 1.86 mA (B) 1.47 mA, 0.94 mA, 0 mA
(C) 1.47 mA, 0 mA, 0.94 mA (D) 1.94 mA, 0 mA, 0.94 mA
MCQ 1.1.41 The value of V
D1
, V
D2
, V
D3
respectively is
(A) 0.6, . 4 10 - , 0.6 (B) 0.6, . 8 8 - , 0.6
(C) 0.6, 0.6, 0.6 (D) 0.6, 0.6, . 4 10 -
MCQ 1.1.42 The voltage regulator shown below, what are the nominal and worst case
values of zener diode current if the power supply voltage, zener break down
voltage and registor all have 5 % tolerance?
I
nom
z
I
nom
z
I
min
worst
z
^ h
(A) 1.2 mA 0 mA 0 mA
(B) 0.5 mA 0.70 mA 0.103 mA
(C) 0.5 mA 0.60 mA 0.346 mA
(D) 0.5 mA 0.796 mA 0.215 mA
JAEGER/120/3.9
JAEGER/120/3.9
JAEGER/168/3.82
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MCQ 1.1.43 What are the nominal and worst case values of zener power dissipation?
(A) 10.8 mW, 0 mW, 0 mW (B) 4.5 mW, 7.52 nW, 1.80 mW
(C) 4.5 mW, 6.81 mW, 2.03 mW (D) 4.5 mW, 5.13 mW, 5.67 mW
MCQ 1.1.44 The diode circuit in figure shown below the biasing of the diode D
1
, D
2
is
(A) ON, ON (B) ON, OFF
(C) OFF, ON (D) OFF, OFF
MCQ 1.1.45 The diode circuit shown in figure. Assume that diode is ideal, what will be
the biasing modes of diode D
1
, D
2
and D
3
? (FB " forward biased, RB "
reverse biased)
D
1
D
2
D
3
(A) FB FB FB
(B) FB FB RB
(C) FB RB RB
(D) FB RB FB
MCQ 1.1.46 The diode in the circuit shown below have linear parameter of . V 0 7 =
g
(for
Si), . V 0 3 =
g
(for Ge) and r 0
f
= for both the diode. What is the biasing
condition of diode D
1
and D
2
?
(A) ON D
1
- , ON D
2
- (B) ON D
1
- , OFF D
2
-
(C) OFF D
1
- , ON D
2
- (D) OFF D
1
- , OFF D
2
-
BOYL-
STEAD/68/2.14
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General Aptitude
MCQ 1.1.47 In the voltage regulator circuit below rating of zener diode is given, then the
range of values of v
i
that will maintain the zener diode in the ON state is
(A) 16.87 36.87 V v
i
1 1
(B) 16.87 23.67 V v
i
1 1
(C) 23.67 36.87 V v
i
1 1
(D) None of the above
MCQ 1.1.48 Consider the given a circuit and a waveform for the input voltage.
If the diode has cut in voltage V 0 =
g
, the output waveform of the circuit is
MCQ 1.1.49 Assume that the diode cut in voltage for the circuit shown below is 0.7V V =
g
. Which of clamper circuit perform the function shown below ?
BOYL-
STEAD/109/29
BOYL-
STEAD/112/41
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MCQ 1.1.50 Having lost his 2.4 V cellphone charger, an electrical engineering student
tries several stores but does not find adaptors with outputs less than 3 V. He
then decides to put his knowledge of electronics to work and constructs the
circuit shown in figure where three identical diodes in forward bias produce a
total voltage of 3 2.4 V V V
out D
- = and resistor R
1
sustain remaining voltage.
Neglect the current drawn by the cellphone and assume 26 mV V
Thermal
= .
The reverse saturation current I
S
for the diode is
(A) 6 mA (B) 2.602 10 A
16
#
-
(C) 8.672 10 A
14
#
-
(D) 7.598 10 A
14
#
-
Common Data For Q. 25 to 27:
The circuit diagram of a zener regulator is shown in figure below. The data
sheet specification for zener IN4742A provides following values
12 V V
z
= at 21 mA I
zT
= , R 9
z
= (assume constant) 76 mA I
zM
= , 1 mA I
zk
=
.
MCQ 1.1.51 The values of zener diode voltages V
max
z ^ h , V
min
z ^ h respectively are
(A) 11.82 V, 12.5 V
(B) 12.5 V, 11.82 V
(C) 12.18 V, 11.82 V
(D) 12.5 V, 11.5 V
MCQ 1.1.52 The maximum value of load current over which the zener diode is in ON
state.
(A) 36.88 mA (B) 35.88 mA
(C) 36.36 mA (D) 35.36 mA
MCQ 1.1.53 The value of R
L
(Load resistance) corresponding to maximum load current is
(A) 329.43 W (B) 334.44 W
(C) 325.37 W (D) 320.49 W
DESH-
PANDE/169/3.17
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General Aptitude
A breakdown diode has 6.2 V V
z
= at 25 C c and 0.02%/ C
z
c a = . A silicon
diode with 0.7 V V
F
= and a temperature coefficient of . / mV C 1 8 c - is
connected in series with the breakdown diode.
MCQ 1.1.54 The new value of reference voltage and the temperature coefficient of the
series combination of diode D and zener diode.
(A) 6.9 V, 0.008 %/ C c - (B) 6.9 V, 0.0289 %/ C c -
(C) 6.9 V, 0.0 %/ C 56 c - (D) 6.2 V, 0.056 %/ C c -
MCQ 1.1.55 The new value of V
ref
at a temperature of C 50c is
(A) 6.186 (B) 6.886 V
(C) 6.914 V (D) 6.700 V
MCQ 1.1.56 The diode circuit given below. Assume diode is ideal. The operating states
of diodes D
1
, D
2
are
D
1
D
2
(A) ON, ON
(B) ON, OFF
(C) OFF, ON
(D) OFF, OFF
MCQ 1.1.57 Consider the given circuit. The diode in circuit has cut in voltage 0.6 V V =
g

and zener diode voltage 9.4 V V
z
= .
Plot v
o
versus v
i
is
REA/29/1.31
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MCQ 1.1.58 Assume that the diodes in the circuit are ideal. What are the operating
states of diodes ?
D
1
D
2
(A) ON ON
(B) ON OFF
(C) OFF ON
(D) OFF OFF
MCQ 1.1.59 Assuming that the diodes are ideal in the given circuit.
Status of the diodes D
1
, D
2
and D
3
are respectively
(A) ON, OFF, OFF
(B) ON, OFF, ON
(C) ON, ON, OFF
(D) ON, ON, ON
MCQ 1.1.60 What is the value of voltage V and current I respectively ?
(A) 0 V, 0 Amp (B) 7.5 V, 7.5 mAmp
(C) 7.5 V, 0 Amp (D) 0 V, 7.5 mAmp
* * * * * * * * * *
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General Aptitude
EXERCI SE 1.2
QUES 1.2.1 In the circuit shown below, D
1
and D
2
are ideal diodes. The current i
2
is
_____ mA
QUES 1.2.2 Let cutin voltage 0.7 V =
g
V for each diode in the circuit shown below.
The voltage v
o
is _____ volts
QUES 1.2.3 For the circuit in the figure below. The value of v
D
is _____volts.
-
QUES 1.2.4 The cutin voltage for each diode in circuit shown below is 0.6 V =
g
V. Each
diode current is 0.5 mA. The value of R
3
will be _____ kW.
QUES 1.2.5 The diodes in the circuit shown below has parameters 0.6 V =
g
V and 0 r
f
=
. The current i
D2
is ____ mA.
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The diodes in the given circuit have linear parameter of 0.6 V =
g
V and 0 r
f
= .
QUES 1.2.6 If 10 v
1
= V and 0 v
2
= V, then v
o
is _____ volts.
QUES 1.2.7 If 10 v
1
= V and 5 v
2
= V, then v
o
is_____ volts.
QUES 1.2.8 If 0 v v
1 2
= = , then output voltage v
o
is _____ volts.
The diodes in the circuit shown below have linear parameters of 0.6 V =
g

V and 0 r
f
= .
QUES 1.2.9 If 0 v
2
= , then output voltage v
o
is_____ volts.
QUES 1.2.10 If 5 v
2
= V, then v
o
is____volts.
QUES 1.2.11 If 10 v
2
= V, then v
o
is_____ volts.
QUES 1.2.12 Ten diodes, each of them provides 0.7 V drop when the current through it
is 20 mA, connected in parallel operate at a total current of 0.1 A. What
current flows in each diode (in Amp) ?
QUES 1.2.13 In the voltage regulator circuit shown below the maximum load current i
L

that can be drawn is _____ mA.
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General Aptitude
QUES 1.2.14 In the voltage regulator shown below the power dissipation in the Zener
diode is _____ watts.
QUES 1.2.15 In the voltage regulator circuit shown below the power rating of Zener diode
is 400 mW. The value of R
L
that will establish maximum power in Zener
diode is _____ kW.
QUES 1.2.16 The secondary transformer voltage of the rectifier circuit shown below is
60 2 60 sin v t
s
p = V. Each diode has a cut in voltage of 0. V 7 =
g
V. The
ripple voltage is to be no more than 2 v
rip
= V. The value of filter capacitor
will be _____ F m .
QUES 1.2.17 The input to full-wave rectifier shown below is 120 2 60 sin v t
i
p = V. The
diode cutin voltage is 0.7 V. If the output voltage cannot drop below 100 V,
the required value of the capacitor is _____ F m .
QUES 1.2.18 For the circuit shown below diode cutin voltage is 0 v
in
= . The ripple voltage
is to be no more than 4 v
rip
= V. The minimum load resistance, that can be
connected to the output is _____ kW.
QUES 1.2.19 Assuming that the diodes in the given circuit are ideal, the voltage V
o

is_____ volts.
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QUES 1.2.20 Assume that D
1
and D
2
in given figure are ideal diodes. The value of current
is _____ mA.
QUES 1.2.21 The current through the Zener diode in figure is _____ mA.
QUES 1.2.22 Assuming that in given circuit the diodes are ideal. The current in diode D
1

is ____ mA.
In the zener diode voltage regulator circuit shown in the figure below, the
zener diode has the following parameter.
V
z
5 V = , 0 R
z
W =
QUES 1.2.23 What is the value of R
min L
(Minimum load resistance) for zener voltage
regulator circuit (in kW ) ?
QUES 1.2.24 The value of output voltage v
o
for 1 k R
L
W = is ____ volts.
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General Aptitude
QUES 1.2.25 If R
L
3 = , the value of power dissipation in the zener diode is ____ mW.
Given that a half-wave rectifier circuit driven from a transformer having
a secondary voltage of . V 12 6
rms
, 60 Hz f = with 15 R W = and 25 mF C = .
Assume the diode on voltage 1 V V
on
= .
QUES 1.2.26 The value of the DC output voltage V
,dc o ^ h is _____ volts.
QUES 1.2.27 The value of ripple voltage is ____ volts.
QUES 1.2.28 Assume that in the given circuit diodes are ideal. The value of I
D2
is __mA.
QUES 1.2.29 The diode in the circuit shown below have linear parameter of 0.7 V V =
g

and 0 r
f
W = . The value of the current I
D2 ^ h in diode D
2
is ____ mA.
QUES 1.2.30 Given that 26 mV V
Thermal
= . A diode is biased with a current of 1 mA. What is
the value of the current change (in A m ), if V
D
(Diode voltage) changes by 1 mV?
QUES 1.2.31 A transformer convert the 110 V, 60 Hz line voltage to a peak to peak swing of 9
V. A half wave rectifier follows the transformer to supply the power to the laptop
computer of 0.436 R
L
W = . What is the minimum value of the filter capacitor
(in Farad) that maintains the ripple below 0.1 V ? (Assume 0.8 V V
, D on
= )
QUES 1.2.32 A full wave rectifier is driven by a sinusoidal input cos V V t
in o
w = , where
3 V V
o
= and 60 Hz 2 w p = ^ h. Assuming 800 mV V
, D on
= , what is the value
of the ripple amplitude (in volt) with a 1000 F m smoothing capacitor and a
load resistance of 30 W.
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A full wave rectifier circuit is powered by ac mains. Power transformer
has a center-tapped secondary. RMS secondary voltage across each half of
secondary is 20 V. The dc winding resistance of each half of secondary is 5 W
. Forward resistance of diode is 2 W. If the equivalent load resistance is 50 W,
QUES 1.2.33 The value of dc power delivered to load is ____ watt.
QUES 1.2.34 The percentage load regulation is _____.
QUES 1.2.35 The efficiency of rectification is ____
QUES 1.2.36 In the circuit shown in figure, both diodes have 1 h = , but D
1
has 10 times
the junction area of D
2
. The value of voltage V is ____ mV.
QUES 1.2.37 Assume that the voltage drop across each of the diodes in the circuit shown
below is 0.7 V. The value of current through diode D
1
, is I
D1
= _____ mA
The circuit shown below has 100 R W = , 2 k R
C
W = , 2 k R
L
W = . Also, assume
a constant diode voltage of 0.6 V and capacitors are very large using the
small signal model for 1.6 V V
C
= .
QUES 1.2.38 What is the Q-point value of the diode current (in mA) ?
QUES 1.2.39 The value of
v t
v t
in
o
^
^
h
h
is _____
***********
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General Aptitude
EXERCI SE 1.3
MCQ 1.3.1 Which of the following filter types is suitable only for large values of load
resistance ?
(A) Capacitor filter (B) Inductor filter
(C) Choke-input filter (D) p-type CLC filter
MCQ 1.3.2 Which of the following filter types is suitable only for small values of load
resistance ?
(A) Capacitor filter (B) Inductor filter
(C) Choke-input filter (D) p-type CLC filter
MCQ 1.3.3 A rectifier is used to
(A) convert a.c. voltage to d.c. voltage
(B) convert d.c. voltage to a.c. voltage
(C) both (a) and (b)
(D) convert voltage to current
MCQ 1.3.4 The ripple factor of a inductor filter is
(A)
L
R w
2 3
L
(B)
L
R
2 3
L
(C)
3 wL
R
2
L
(D)
wL
R
3 2
L
MCQ 1.3.5 A bleeded resistor is used in a d.c. power supply because it
(A) keeps the supply OFF (B) keeps the supply ON
(C) improves filtering action (D) improves voltage regulation
MCQ 1.3.6 A half wave diode rectifier and full wave diode bridge rectifier both have an
input frequency of 50 Hz. The frequencies of outputs respectively are
(A) 100 Hz and 50 Hz (B) 50 Hz and 100 Hz
(C) 100 Hz each (D) 50 Hz each
MCQ 1.3.7 A full wave bridge diode rectifier uses diodes having forward resistance of 50
ohms each. The load resistance is also 50 ohms. The voltage regulations is
(A) 20% (B) 50%
(C) 100% (D) 200%
MCQ 1.3.8 Which of the following components is essential for a voltage multiplier circuit
(A) resistor (B) inductor
(C) capacitor (D) both (A) and (C)
MCQ 1.3.9 In the circuit of Fig. the approximate value of V
o
across the germanium
diode is
MAINI/585/2
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(A) 10 V (B) 5 V
(C) 2.5 V (D) 0.3 V
MCQ 1.3.10 When used in a circuit, a zener diode is always
(A) forward-biased (B) reverse-biased
(C) connected in series (D) at a temperature below 0 C c
MCQ 1.3.11 For ideal Rectifier and filter circuits, % regulations must be
(A) 1% (B) 0.1%
(C) 5% (D) 0%
MCQ 1.3.12 A particular green LED emits light of wavelength 5490 A c . The energy
bandgap of the semiconductor material used there is (Plancks constant
6.626 10 J s
34
#
-
=
-
)
(A) 2.26 eV (B) 1.98 eV
(C) 1.17 eV (D) 0.74 eV
MCQ 1.3.13 The function of bleeder resistor in a rectifier with LC filter is to
(A) maintain the minimum current through C
(B) maintain the minimum current necessary for optimum inductor operation
(C) maintain maximum current through L
(D) Charge capacitor C to maximum value
MCQ 1.3.14 The forward resistance of the diode shown in figure is 5 W and the remaining
parameters are same as those of an ideal diode. The dc component of the
source current is
(A)
V
50
m
p
(B)
V
50 2
m
p
(C)
V
100 2
m
p
(D)
V
50
2
m
p
MCQ 1.3.15 The relation between diode current, voltage and temperature is given by
(A) I I e 1
o
V
V
T = - h _ i (B) I I e 1
o
V
V
T = - h _ i
(C) I I e 1
o
V
V
T = + h _ i (D) I I e
o
V
V
T = h
MCQ 1.3.16 The Transformer Utilization Factor (TUF) is defined as
(A)
P
P
rated ac
dc
(B)
P
P
ac
dc
(C)
I
I
dc
rms
(D)
I
I
dc
m
MCQ 1.3.17 The Peak inverse voltage (PIV) of an half wave rectifier and full-wave
rectifier are
(A) V
m
, V 2
m
respectively (B) V 2
m
, V
m
respectively
(C)
V
2
m
, V
m
respectively (D) V
m
,
V
2
m
respectively
MCQ 1.3.18 Inductor filter should be used when
(A) load current is high (B) load current is low
(C) high load resistance R
L
(D) none of the above
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MCQ 1.3.19 The value of critical inductance in an LC filter is
(A) 3 L R
c L
w = (B) L
R
3
c
L
w
=
(C) L
R
3
c
L
w
= (D) None of the above
MCQ 1.3.20 Transformer utilization factor is more for
(A) half wave rectifier
(B) center tapped full wave rectifier
(C) bridge rectifier
(D) all of the above
MCQ 1.3.21 The zener diode in the regulator circuit shown in figure has a Zener voltage
of 5.8 Volts and a Zener knee current of 0.5 mA. The maximum load current
drawn from this circuit ensuring proper functioning over the input voltage
range between 20 and 30 Volts, is
(A) 23.7 mA (B) 14.2 mA
(C) 13.7 mA (D) 24.2 mA
MCQ 1.3.22 The circuit which converts undirectional flow to D.C. is called
(A) Rectifier circuit
(B) Converter circuit
(C) filter circuit
(D) Eliminator
MCQ 1.3.23 The value of current that flows through R
L
in a p section filter circuit at
no load is
(A) 3 (B) 0.1 mA
(C) 0 (D) few mA
MCQ 1.3.24 The voltage at V
1
and V
2
of the arrangement shown in Fig. will be respectively.
(Assume diode cut in voltage 0.6 V V =
g
)
(A) 6 V and 5.4 V
(B) 5.4 V and 6 V
(C) 3 V and 5.4 V
(D) 6 V and 5 V
LAL KISHORE
198/4
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MCQ 1.3.25 For an input 5sin V t
S
w = (assume ideal diode), the circuit shown in Fig. will
be behave as a
(A) clipper, sine wave clipped at 2 V -
(B) clamper, sine wave clamped at 2 V -
(C) clamper, sine wave clamped at zero volt
(D) clipped, sine wave clipped at 2 V
MCQ 1.3.26 A clipper circuit always
(A) needs a dc source
(B) clips both half cycles of input signal
(C) clips upper portion of the signal
(D) clips some part of the input signal
MCQ 1.3.27 The primary function of a clamper circuit is to
(A) suppress variations in signal voltage
(B) raise positive half-cycle of the signal
(C) lower negative half-cycle of the signal
(D) introduce a dc level into an ac signal
MCQ 1.3.28 A zener diode has a dc power dissipation rating of 500 mW and a zener
voltage rating of 6.8 V. The value of I
ZM
is
(A) 70 mA
(B) 72 mA
(C) 73.5 mA
(D) 75 mA
MCQ 1.3.29 When the reverse current in a zener diode increases from 20 mA to 30 mA,
the zener voltage changes from 5.6 V to 5.65 V. The zener resistance is
(A) 2 W (B) 3 W
(C) 4 W (D) 5 W
MCQ 1.3.30 A 4.7 V zener has a resistance of 15 W. When a current 20 mA passes
through it, then the terminal voltage is
(A) 5 V
(B) 10 V
(C) 15 V
(D) 4.7 V
MCQ 1.3.31 In a full wave rectifier, the current in each of the diodes flows for
(A) the complete cycle of the input signal
(B) half cycle of the input signal
(C) for zero time
(D) more than half cycle of input signal
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MCQ 1.3.32 The ripple factor of power supply is a measure of
(A) its filter efficiency
(B) diode rating
(C) its voltage regulation
(D) purity of power output
MCQ 1.3.33 Larger the value of filter capacitor
(A) larger the p-p value of ripple voltage
(B) larger the peak current in the rectifying diode
(C) longer the time that current pulse flows through the diode
(D) smaller the d.c. voltage across the load
MCQ 1.3.34 In a centre-tap full-wave rectifier, if V
m
is the peak voltage between the
centre tap and one end of the secondary, the maximum voltage coming
across the reverse-biased diode is
(A) V
m
(B) V 2
m
(C) / V 2
m
(D) / V 2
m
MCQ 1.3.35 In a bridge type full wave rectifier, if V
m
is the peak voltage across the
secondary of the transformer, the maximum voltage coming across each
reverse-biased diode is
(A) V
m
(B) 2V
m
(C) / V 2
m
(D) / V 2
m
MCQ 1.3.36 In a half wave rectifier, the peak value of the ac. voltage across the secondary
of the transformer is 20 V 2 . If no filter circuit is used, the maximum d.c.
voltage across the load will be
(A) 28.28 V (B) 25 V
(C) 14.14 V (D) 9 V
***********
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SOLUTI ONS 1.1
SOL 1.1.1 Option (D) is correct.
For the given circuit, we first determine the linear region (forward bias or
reverse bias) in which the diode is operating, and then obtain the output.
Step 1: Assume that the diode is OFF, and replace it by open circuit. So,
equivalent circuit is,
Step 2: The voltage across the diode terminal is obtained as
v
p
v
i
= at the p-terminal
v
n
V 5 = at the n- terminal
Step 3: Now, we have the condition
v
p
v >
n
diode is ON
v
p
v <
n
diode is OFF
Applying these conditions, we determine the output voltage.
CASE I :
If 5 V v >
i
, then diode is ON. So the equivalent circuit is
So, the output voltage is
v
o
v
i
=
CASE I I :
If 5 V v <
i
, then diode is OFF. So equivalent circuit is
Since no current flows in the circuit (i.e. i 0 = ), so we get
v
o
5 V =
Step 4: From the two results obtained in the above steps, we sketch the
output waveform as shown below.
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SOL 1.1.2 Option (C) is correct.
v
p
V 2 =- at the p-terminal
v
n
v
i
= at the n- terminal
v
p
v >
n
diode is ON
v
p
v <
n
diode is OFF
CASE I :
If 2 V v <
i
- , then diode is ON. So the equivalent circuit is,
So, the output voltage is obtained as
v
o
v 2
i
= +
CASE I I :
If 2 V v >
i
- , then diode is OFF. So, the equivalent circuit is,
Since no current flows in the circuit (i.e. i 0 = ), so we get
v
o
V 0 =
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Step 1: Assume that the diode is OFF, and replace it by open circuit.
So, equivalent circuit is,
v
p
V 4 = at the p-terminal
V
n
v
i
= at the n- terminal
v
p
v >
n
diode is ON
v
p
v <
n
diode is OFF
CASE I :
If V v 4 <
i
, then diode is ON. So the equivalent circuit is
So, the output voltage is,
v
o
4 V =
CASE I I :
If 4 V v >
i
, then diode is OFF. So equivalent circuit is
v
o
v
i
=
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General Aptitude
reverse bias) in which the two diodes are operating, and then obtain the
output.
Step 1: Assume that both the diodes are OFF, and replace it by open circuit.
Step 2: For the assumption, the voltage across diode D
1
is obtained as
v
p1
v
i
= at the p-terminal
v
n1
V 8 = at the n- terminal
Step 3: Voltage across the diode D
2
is obtained as
v
p2
V 0 = at the p-terminal
v
n1
v 6
i
= + at the n- terminal
Step 4: Now, we have the condition for both the diodes
v
p
v >
n
diode is ON
v
p
v <
n
diode is OFF
CASE I :
If v 6 0 <
i
+ or v 6 <
i
- diode D
1
is OFF and diode D
2
is ON. So,
the equivalent circuit is
v
o
6 V =-
CASE I I :
If 6 8 V V v < <
i
- , then both diodes D
1
and D
2
are OFF. So, the
equivalent circuit is
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v
o
v
i
=
CASE I I I :
When 8 V v >
i
, then diode D
1
is ON and D
2
is OFF. So, the
v
o
8 V =
Step 5: From the results obtained in the above step, we sketch the output
waveform as shown below.
SOL 1.1.5 Option (B) is correct.
Step 2: Apply KVL in loop 1,
10 10 20 10 k k I I - - + 0 =
I mA mA
30
20
3
2
= =
v
o
10 10 3.333 V
3
2
3
10
#
= - = =
v
p
v >
n
diode is ON
v
p
v <
n
diode is OFF
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Using these conditions, we determine the output voltage.
CASE I
v
i
. . 3 333 0 7 $ + or . v 4 03 >
i
Diode is ON. So, the equivalent circuit is
v
o
. v 0 7
i
= -
CASE I I
v
i
. 4 03 #
Diode is OFF. So, the equivalent circuit is
v
o
. 3 33 =
Step 4: From the results obtained in the above step, we sketch the ransfer
characteristic is as shown below.
the equivalent circuit is,
v
p
v >
n
diode is ON
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v
p
v <
n
diode is OFF
Applying these conditions, we determine the output voltage. By
using voltage divider rule,
v
n
15 5
k k
k
V
1 2
1
#
=
+
=
CASE I :
If 5.7 V v
i
# then Diode is OFF, we have the same circuit as shown
above. So, the output voltage is,
v
o
v
i
=
CASE I I .
If . v 5 7
i
$ then Diode is ON and So, the equivalent circuit is,
By using super node technique

. .
k k k
v v v v
2
0 7 15
1
0 7
1
o o o i
- -
+
-
+
-
0 =

v
o
. . v 0 4 3 42
i
= +
Step 3 From the two results obtained in the above steps, we sketch the Transfer
characteristic is as shown below. So, the transfer characteristic is
reverse bias) in which the diodes are operating, and then obtain the output.
Step 1: Assume that the diodes are OFF, and replace it by open circuit
v
p
v >
n
diode is ON
v
p
v <
n
diode is OFF
Applying these conditions, we determine the output voltage
CASE I :
For positive part of v
s
V v 0 10
s
# # ^ h: For 0 V v >
s
, when D
1
is
OFF current through D
2
is (D
2
is ON). So, the equivalent circuit
stage is
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I
.
0.465 mA
10 10
10 0 7
=
+
-
=
v
o
10 0.465 4.65 k mA V
#
= =
If v
s
. 4 65 > then diode D
4
is always OFF. So, the equivalent circuit
is
v
o
4.65 V =
If 0 4.65 v < <
s
, diode D
3
and D
4
is ON. So, the equivalent circuit
is,
v
o
. . v v 0 7 0 7
s s
= - + =
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CASE I I :
For negative part of v
s
v 10 0
s
# # - ^ h: For 0 V v <
s
, when D
3
is
OFF and D
4
is ON. So, the equivalent circuit is
Current through D
4
is
I
.
0.465 mA
10 10
0 7 10
=
+
- - -
=
^ h
v
o
10 0.465 4.65 k
#
=- =- ^ h
If v
s
. 4 65 >- then D
1
& D
2
is ON. So, the equivalent circuit is,
v
o
v
s
=
If 10 - . v 4 65 < <
s
- then D
2
is OFF. So, the equivalent circuit is
v
o
4.65 V =-
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Step 3: From the results obtained in the above steps, we sketch the Transfer
characteristic is as shown below.
output.
Step 1: Assume that the diodes is OFF, and replace it by open circuit. So,
v
p
v >
n
diode is ON
v
p
v <
n
diode is OFF
CASE I :
If 2.5 V v <
i
then diode is ON. So, the equivalent circuit is,

v
o
10 V v v
i o
& = =-
CASE I I .
If 2.5 V v >
i
,then diode is OFF, 2 M r
r
W = . So, the equivalent circuit
is

For positive wave waveform,
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v
i
10 V =
Nodal analysis at Node v
o
,

.
M
v v
M
v
2 1
2 5
o i o
-
+
-
0 =
v 3
o
v 5
i
= +
v 3
o
15 =
v
o
5 V =
output waveform is as shown below.
For this circuit KVL gives,
v v
1 2
- v v
D D 1 2
= - ,
v v
1 3
- v v
D D 1 3
= -
Suppose that v
1
is positive and exceeds v
2
and v
3
. Then D
1
must be forward-
biased with 0 v
D1
= and consequently 0 v <
D2
and 0 v <
D3
. Hence D
2
and D
3

block, while v
1
is passed as v
o
. This is so in general. The largest positive
input signal is passed as v
o
, while the remainder of the input signals are
blocked. If all input signals are negative, 0 v
o
= .
This is a clamper circuit. Clamper circuit consists capacitor and a diode.
The capacitor is in series and the diode in shunt. In clamper circuit,
1. When the diode is in downward direction the total signal will be clamp
below the reference voltage.
2. When the diode is in upward direction the total signal will be clamp
In the given circuit, the diode is in upward direction and the reference
voltage is zero then the total signal will be clamp above the 0 V. So, the
output voltage is
ALTERNATI VE METHOD :
For the given circuit, we consider the following two cases:
CASE I :
In negative cycle diode will be ON and Capacitor will be charged
So, the equivalent circuit is,
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v
o
0 =
CASE I I :
In positive half cycle diode will be OFF. So, the equivalent circuit is
By using KVL in loop 1, we have
v
o
10 10 20 V = + =
From the two results obtained in the above cases, we sketch the output
voltage as shown below.
SOL 1.1.11 Option (A) is correct.
This is a clamper circuit. In this circuit, the diode is in upward direction. So,
total signal will be clamp above the 5 V + . From the results obtained in the
above steps, we sketch the output waveform is as shown below.
During 20 - V cycle of v
i
, diode is ON and capacitor will charge up
instantaneously to 25 V. Output is 5 + V during this cycle.
During the +10 V of v
i
, diode is OFF and capacitor will hold on this voltage
level, giving total output voltage +35 V.
In DC equivalent circuit capacitor is open. So, the equivalent circuit is
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Current through diode is I . So, we get the small signal resistance
r
d

I
V
I
V
dc
T T
h h
= =
The small signal equivalent circuit is as follows
For small signal response, open dc current source, short capacitor C
1
and C
2
,
and replace diode with it small signal resistance r
d
. So, the output voltage is
v
o

r R
v r
v
I
V
R
I
V
d s
s d
s
T
s
T
h
h
=
+
=
+
v
V R
V
v
V IR
V
s
T s
T
s
T s
T
h
h
h
h
=
+
=
+
output.
Step 1: Assume that the two diodes are OFF, and replace it by open circuit.
So, the equivalent circuit is
v
p
v >
n
diode is ON
v
p
v <
n
diode is OFF
Applying these conditions, we determine the output voltage. So,
v
pn1
10 0 10 V = - =
v
pn2
5 0 5 V = - =
Step 3: Assume diode is D
1
is ON and diode D
2
is OFF.
Current through diode D
1
,
i
D1
1 Amp
v
1 9
0
1 9
10 0
1
=
+
-
=
+
-
=
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So output voltage,
v
o
1 9 9 V
#
= =
Voltage across diode D
2
v
pn2
v v
p n 2 2
= -
5 9 4 = - =-
So diode D
2
is in OFF state.
Step 4: From the results obtained in the above steps, the output voltage is,
V
o
9 V =
output.
Step 1:Assume that the two diodes are OFF, and replace it by open circuit.
Since, the equivalent circuit is
v
p
v >
n
diode is ON
v
p
v <
n
diode is OFF
Step 3: Assume that diode D
1
and D
2
is in ON state. So, the equivalent
circuit is
Nodal analysis

v v v
1
10
1
10
9
o o 0
-
+
-
+ 0 =
Step 4: From the two results obtained in the above steps, the output voltage
is,
v
o
9.474 V
19
20 9
#
= =
In this case i
D1
and i
D2
both are positive. So, D
1
and D
2
are ON
(assumption is correct)
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output.
Step 1: Assume that the two diodes are OFF, and replace it by open circuit
v
p
v >
n
diode is ON
v
p
v <
n
diode is OFF
Applying these conditions, we determine the output voltage.So the
Step 3: From the results obtained in the above steps, the output voltage is,
v
o
9 4.5 V
10
5
#
= =
reverse bias) in which the two diode are operating, and then obtain the
output.
v
p
v >
n
diode is ON
v
p
v <
n
diode is OFF
Applying these conditions, we determine the output voltage
Step 3: Diode D
1
and D
2
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Using Nodal analysis

v v v
1
10
1
10
9
5
o o o
-
+
-
+
-
0 =
v
o
9.737 V =
For this voltage, i
D1
and i
D2
are positive, so D
1
and D
2
are ON
(assumption is correct).
output.
v
p
v >
n
diode is ON
v
p
v <
n
diode is OFF
Step 3: Diode D
1
is OFF and D
2
Node analysis at node v
o

1 9
5 V v v 10
o o
W W
-
+
-
0 =
v 10
o
95 =
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o
9.5 V =
In this case, i
D1
is negative, i
D2
is positive, so D
1
is OFF and D
2
is
ON (i.e. assumption is correct).
For the given circuit, we determine the linear region (forward bias or reverse
bias) in which the two diodes are operating.
v
p
v >
n
diode is ON
v
p
v <
n
diode is OFF
Applying these conditions, we analyse the circuit.
Step 3: Both diodes are ON. So, the equivalent circuit is
Using Nodal analysis at Node 1,

. . V V V
12
4 8
18 6
4 4 -
+ +
-
0 =
V 3.71 V =
In this case, i
D1
and i
D2
are positive, so D
1
and D
2
are ON (assumption
is correct).
output.
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v
p
v >
n
diode is ON
v
p
v <
n
diode is OFF
Applying these conditions, we obtain the required unknowns.
Step 3: When diode D
2
v 3 0.7 2.3 V = - =
This diode D
1
is not conducting because of diode D
2
is ON. (highly
forward biased).
i
.
2.65 mA
2
2 3 3
=
- -
=
^ h
output.
v
p
v >
n
diode is ON
v
p
v <
n
diode is OFF
Applying these conditions, we obtain the required unknowns
Step 3: Diode D
1
is OFF & D
2
is ON. Since the equivalent circuit is
v 5 V =
i
10 k
v 5
W
=
-
0
k
mA
10
5 5
=
-
=
The given circuit is,
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v v
s 1
- . 0 6 >
For both diode is ON when . v 0 6 >
1
. Using nodal analysis at node v
1
,

5
.
5
.
k k
v v v v v v 0 6
500 500
0 6
s s 1 1 1 1
+ -
+
-
+ +
-
0 =
v
1

.
.
v
22
2 5 4
0 6 >
s
=
+
v
s
3.9 V >
The thevenin equivalent circuit for the network to the left of terminal ab is
shown below.
v
TH
(2 ) 1 0.5 cos cos t t
200
100
w w = + = + V
R
TH
50
100 100
100 100
#
W =
+
=
The diode can be modeled with 0.5 v
f
= V and
r
f

.
. .
50
0 004
0 7 0 5
W =
-
= ,
i
D

1 0.5 0.5 cos
R r
v v
t
50 50
TH f
TH f w
=
+
-
=
+
+ -
5(1 ) cos t w = + mA
The voltage, v
D
r i v
f D f
= +
50 5(1 ) 10 0.5 cos t
3
w
# #
= + +
-
0.75 0.25 0.25(3 ) cos cos t t w w = + = + V
The output voltage cannot exceed the positive power supply voltage and
cannot be lower than the negative power supply voltage.
For Zener diode
| | V
pn
V >
z
Zener diode is ON
| | V
pn
V <
z
Zener diode is OFF
Applying these conditions, we determine the Q-point of the zener diode.
If we assume that the Zener diode is off, then the voltage across resistor (the
diode) is given by
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General Aptitude
V
.
.
11 3 6
3 6
20
#
=
+
. 4 93 =
So, V v >
z
Therefore, the zener diode is in ON State. In ON condition, the diode circuit
is
So, the current through the diode is
I
z

11 . k
i i
20 4
3 6
4
R C
= - =
-
-
0.343 mA =
Given the current through the Zener diode,
5 100 mA i
z
# #
The given circuit is
From the circuit, we have
i
L
i i
R z
= -
So, i
max L
^ h

. .
5 i i
12
6 3 4 8
125 5
( ) min R z
= - =
-
- = -
120 mA =
and i
( ) min L
125 10 i i 0
( ) max R z
= - = -
25 mA =
Thus, 25 m 120 mA i
L
# #
In Previous Question, the range of i
L
is
25 120 mA i
L
# #
So, 25 m
.
120 mA
R
4 8
L
# #
or 40 192 R
L
# # W
The power rating required for the load resistor is
p
L
. 576 mW i v 120 4 8
( ) max L z
= = = ^ ^ h h
output.
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Step 2: Now, we have the condition for both the diodes are
For normal diode,
v
p
v >
n
diode is ON
v
p
v <
n
diode is OFF
For Zener diode,
| | V
pn
V >
z
Zener diode is ON
| | V
pn
V <
z
Zener diode is OFF
CASE I :
If . v 0 7 <
i
- , pn diode are OFF and zener diode behave as forward
bias. So, the equivalent circuit is
v
o
. 0 7 =-
CASE I I :
0.7 . v 5 7
i
# # - both zener and diode D will be off. So, the
v
o
v
i
=
CASE I I I :
. v 5 7 10 < <
i
Diode D will be ON and zener will be OFF. So, the
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General Aptitude
v
o
5 0.7 5.7 V = + =
Step 3: From the results obtained in the above steps, the transfer
characteristics is
From the characteristics of voltage and current, we observe that only positive
current flowing through the element and negative cycle is blocked. Therefore,
given element is forward diode.
Step 1: We have the input waveform, sin v t 5
i
w = . So, we draw the waveform
as
Step 2: For half part of the circuit. When positive half cycle of input is
applied, diode D
1
is ON and D
2
is OFF. So, capacitor C
1
will charge
upto 5 Volt +
V
C1
5 Volt =+
This is a clamper circuit. So, output of the circuit is
In this clamper, diode is in downward position. So, it is negative
clamper.
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Step 3: Second part of the circuit is peak detector as shown below.
So, it allows only peaks at the output. Thus, from the results obtained
in the above step, the output voltage is
V
C2
10 Volt =-
reverse bias) in which the diode are operating, and then obtain the output.
Step 1: Assume that the diodes are OFF, and replace it by open circuit So,
the equivalent circuit is,
v
p
v >
n
diode is ON
v
p
v <
n
diode is OFF
Applying these conditions, we obtain the required unknowns
Step 3: In the given circuit, D
3
is always OFF because it is connected to 5 A
current source and D
1
is always ON because it is connected to 10 V
battery source. So, voltage drop across D
1
is always positive.
Step 4: Now, we check for D
2
diode.
v
p
0 V = , .5 V v 2
n
= (current divider rule)
Since, diode current and voltage is negative. So, D
2
is OFF.
Step 5: Thus, from results obtained in above case, we conclude that D
1
is
ON, D
2
is OFF, and D
3
is OFF.
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General Aptitude
Step 1: Assume that the diode is OFF, and replace it by open circuit. The
According to voltage divide rule, the output voltage is
v
o
10 5 sin sin
k k
k
t t
10 10
10
w w
#
=
+
=
v
p
v <
n
So diode is always OFF. Thus, we get the output voltage as shown
below.
output.
The equivalent circuit is
v
p
v >
n
diode is ON
v
p
v <
n
diode is OFF
CASE I :
If 10 V v <
i
D
1
is OFF. Since,
v
o
10 V =
So, D
2
is OFF. Since the equivalent circuit is
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The output voltage is
v
o
10 V =
CASE I I :
If 10 Volt v >
i
, D
1
is ON, i.e.
v
o
v
i
=
So, D
2
is OFF. Since the equivalent circuit is
The output voltage is
v
o
v
i
=
Step 3: In both cases diode D
2
is always OFF. From the results obtained in
above steps, we get the transfer characteristic as
For the given input signal, we obtain the output in following steps:
Step 1: In the positive half cycle (when 4 V V >
in
), diode D
2
conducts and
D
1
will be off. So, the equivalent circuit is
V
out
4 Volt = +
This is the maximum output voltage.
Step 2: In the negative half cycle diode D
1
conducts and D
2
will be off so the
circuit is
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General Aptitude
Applying KVL,
10kI I V 4 10k
in
- + - 0 =

20k
V 4
in
+
I =
Since, the minimum input voltage is V
in
10 V =- , so we obtain the
corresponding current as
I
20k
10 4
10
3
mA =
- +
=-
Thus, the minimum output voltage is obtained as

V V
10
in out
-
I =

10k
V 10
out
- -
m
10
3
=-
V
out
( ) 10 3 =- -
7 =- volt
This is a half-wave rectifier circuit. So, the dc voltage is given by,
V
dc

V
m
p
=
Equivalent circuit with forward resistance is
So, the dc current in the circuit is
I
dc

( )
( / )
r R
V
V
5 45
f
m
m
p
p
=
+
=
+

V
50
m
p
=
For the given input voltage, we consider the following two cases.
CASE I :
For positive half cycle 4 V v <
o ^ h, the equivalent circuit is
By using voltage divider rule,
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v
o

1 1
1
10sin
k k
k
t w =
+
v
o
sin t 5 w =
For peak positive value of input zener diode will be ON state So,
v
o
. . 3 3 0 7 = +
v
o
4 V =
CASE I I :
For negative value of input, the zener diode will be in OFF state. So, the
So, we get the output voltage as
v
o
10sin
k k
k
t
1 1
1
w
#
=-
+
5sin t w =-
Thus, we have the peak value
v
o
5 =-
When the switch is opened, current flows through capacitor and diode is ON
in this condition. So, the equivalent circuit during T
OFF
is
I C
dt
dV
c
=
& V
c
( )
C
I
t V 0
c
= +
Initially, ( ) V 0
c
0 =
V
c

C
I
t =
At t T
off
= , V
c

C
I
T
off
=
So, the duty cycle is
D
T T
T
T
T
ON OFF
ON ON
=
+
=
T
ON
DT =
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General Aptitude
T
OFF
T T
ON
= - T DT = -
So, V
c
( )
C
I
T DT = -
( )
C
I
D T 1 = -
During T
OFF
, output voltage is
V
o
0 volt = .
When the switch is closed, diode is off and the circuit is,
In steady state condition,
C
dt
dV
c
I
2
=
I
2
C
C
I
=
dt
dV
C
I
c
a =
V
o
V
C
I
t
c
=- =
-
Average output voltage,
V
o

T C
I
t dt dt
1
0
T DT T
0 0
OFF ON
= - +
=
b l ; E
# #
.
T C
I t 1
2
DT 2
0
=-
: D

. .
T C
I D T 1
2
2 2
=- .
C
I D
T
2
2
=-
reverse bias) in which the three diodes are operating, and then obtain the
output.
Step 1: Assume that the three diodes are OFF, and replace it by open circuit.
So, equivalent circuit is
As seen by biasing of diode, for each diode the p-terminal of diode
is greater than the n-terminal. So, our assumption is incorrect.
Step 2: For first iteration, assume that all three diode are ON. So, equivalent
circuit is
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V
C
0 0.6 0.6 V = - =-
V
B
0.6 0.6 0 V =- + =
V
A
0.6 0 0.6 0.6 V V
B
= - = - =-
So, current I
1
is
I
1

10 k
V 10
B
W
=
-
1
k
mA
10
10 0
=
-
=
1
is
I
D1

10 k
V 20
A
W
=
- - ^ h

.
1.94
k
mA
10
0 6 20
=
- +
=
Also, current I
2
is
I
2

10k
V 10
C
=
- - ^ h

10
.
0.94
k
mA
0 6 10
=
- +
=
Applying KCL at node V
B
,
I
1
I I
D D 1 2
= +
1 mA 1.94 mA I
D2
= +
I
D2
0.94 0 mA 1 =-
C
,
I I
D D 2 3
+ I
2
=
0.94 mA I
D3
- + 0.94 mA =
I
D3
1.86 0 mA 2 =
From the result I
D1
and I
D3
are greater than zero and I
D2
which is
less than zero, represent a contradiction. So, diode D
3
will be OFF.
Step 3: For second iteration let us assume D
1
and D
3
are ON and D
2
is OFF
so
Applying KVL in Loop 1,
10 10 0.6 10 kI I 20
D 1 1
- - - - - ^ h 0 =
In Loop 1, we have I I
D 1 1
= . Substituting it in above expression,
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General Aptitude
I
D1

20
.
1.47 0
k
mA
29 4
2 = =
3
is
I
D3

10
.
0.94 0
k
mA
0 6 10
2 =
- - -
=
^ h
2
is
I
D2
0 = (because D
2
is OFF)
From previous solution the equivalent circuit is
So voltage drop at diode D
1
is
V
D1
0.6 V =
Voltage drop across diode D
3
is
V
D3
0.6 V =
and voltage across the diode D
2
is
V
D2
V V
P n 2 2
= -
where V
n2
0 0.6 0.6 V = - =-
and V
P2
I R 10
1 1
= - (Put 1.47 m I
1
= )
10 1.47 10 4.70 m k V W
#
= - =-
So, V
D2
V V
P n 2 2
= -
4.70 . 4.10 V 0 6 =- - - =- ^ h
Let us consider the given circuit for nominal and worst cases.
CASE I : For Nominal Values
Assume that Zener diode is OFF and redraw the given circuit,
v
o

10 15
10
30 12
k k
k
V
#
=
+
=
v
o
v >
z
So, zener diode is in ON state. Therefore, the equivalent circuit is
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Applying KCL at v
z
node,
I
S
I I
z L
= +
or
15 k
30 9
W
-

10k
I
v 0
z
z
= +
-
or I
z

15 10
0.5
k k
mA
21 9
= - =
So, nominal value of zener diode current is
I
z
nom
0.5 mA =
CASE I I : For Worst Values
For 5 % tolerance (worst case), we have
V
max S
. . 30 1 05 31 5 = = ^ h
V
min S
. . 30 0 95 28 5 = = ^ h
R
max S
15 . 15.75 k k 1 05 W = = ^ h
R
min S
15 . 14.25 k 0 95 W = = ^ h
R
max L
10 . 10.5 k k 1 05 W = = ^ h
R
min L
10 . 9.5 k 0 95 W = = ^ h
V
max z
9 . 9.45 V 1 05 = = ^ h
V
max z
9 . 8.55 V 0 95 = = ^ h
I
z
I I
S L
= -
I
z

R
V V
R
V 0
S
S z
L
z
=
-
-
-
For I
max z
I
max
worst
z

R
V V
R
V
min
max min
max
min
S
S z
L
z
=
-
-
I
max
worst
z

14.25
. .
.
.
k
31 5 8 55
10 5
8 55
=
-
-
1.610 0.814 0.796 mA m mA = - =
For I
min z
I
min
worst
z

R
V V
R
V
max
min max
min
max
S
S z
L
z
=
-
-
I
min
worst
z

15.75
. .
9.5
.
k k
28 50 9 45 9 45
=
-
-
1.209 0.99 0.215 mA mA mA = - =
From the solution obtained in previous problem,
I
z
nom
0.50 mA =
So, P
z
nom
V I
z
nom
z
nom
= ^ h
9 0.5 4.5 mW
#
= =
In calculation of I
max
z
we use V
min
z
. So, P
max
z
is also calculated for the same
condition. Therefore, the maximum power dissipation is
P
max
z
V I
min max
z z
=
8.55 0.796 6.81 m mW
#
= =
Similarly, P
min
z
V I
max min
z z
=
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9.45 0.215 2.03 m mW
#
= =
bias) in which the two diode are operating.
So, equivalent circuit is
v
p
v >
n
diode is ON
v
p
v <
n
diode is OFF
For these condition, we conclude from the above circuit that diode
D
1
is ON and diode D
2
is OFF.
Step 3: For the result obtained in above step, we draw the equivalent circuit
as
Thus, D
1
is ON and D
2
is OFF is correct option.
bias) in which the diode are operating.
Step 1: Assume that the diodes are OFF, and replace it by open circuit. So,
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v
p
v >
n
diode is ON
v
p
v <
n
diode is OFF
Applying these conditions to above circuit, we conclude that D
1
, D
2
, D
3
are ON.
Step 3: If D
1
, D
2
, D
3
are ON, then equivalent circuit is
Current I
1

3
1.667
k
mA
10 5
=
-
=
Current I
2

7
0.714
k
mA
5 0
=
-
=
Applying KCL at v
A
node,
i i
D 1 2
+ I
2
=
i
D2
0.714 1.667 mA m = -
0.9527 mA =-
So, diode D
2
is OFF because i 0
D2
1
Step 4: For diode D
2
to be OFF, the modified circuit is
Current i
1

k k
mA
3 7
10 0
1 =
+
-
=
Current i
3

. k
mA
2 5
0 5
2 =
- -
=
^ h
Applying KCL at Node V
B
,
i i
D 1 3
+ i
3
=
i
D3
2 1 1 m mA mA = - =
I
D3
0 2
So, diode D
3
is ON.
Step 5: Thus, from the above results, we have
D
1
D
2
D
3
FB RB FB
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General Aptitude
Since, 15 V voltage source is used for biasing the diodes. So, the applied
voltage will turn both diodes ON. Therefore, we get the equivalent circuit as
In this case, the voltage across the parallel arm is not same. So it does not
follow the KVL rule. When the supply is turned ON, it will increase from
0 to 15 V within milliseconds. During the rise in voltage across the diodes,
when 0.3 V is established across the germanium diode it will turn ON and
maintain a level of 0.3 V. So, silicon diode always remains OFF. Therefore,
we get the equivalent circuit as
For the given circuit, we first determine the region (ON or OFF region) in
which the zener diode is operating, and then obtain the output.
Step 1: Assume that the zener diode is OFF, and replace it by open circuit.
Condition for ON state of zener diode is
V
A
v
z
$
Since, zener diode will be ON. So, we have
V
min A
20 V =
V
A

R R
R
v
L
L
L #
=
+
V
min A

R R
R
v
min
L
L
i #
=
+
v
min i

R
R R
v
min
L
L
A #
=
+ ^ h
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1200
1200 220
20
#
=
+
23.67 V =
So, the load current is
i
L

1.2 1.2
16.67
k k
mA
V 0 20
z
=
-
= =
A
,
I
R
I I
z L
= +
I
max R
I I
max z L
= +

R
v v
max i z
-
. m mA 60 16 67 = +
v
max i
76.67 220 m v
z #
= +
. 36.87 V V V 16 87 20 = + =
For the given input waveform, we obtain the output voltage waveform
considering the positive and negative half cycles.
CASE I :
For positive half wave of the input, the diode D
1
and D
3
will be forward
biased and diode D
2
, D
4
will be reverse diode. So, equivalent circuit diagram
is
v v
o i
+ 0 =
v
o
v
i
=- ...(1)
CASE I I :
For negative half cycle of the input, the diode D
4
and D
2
will be ON, and
D
1
and D
3
will be OFF. So, the equivalent circuit is
v v 0
o i
- + 0 =
v
o
v
i
=
Thus, from the obtained results in above two cases, we get the complete
output waveform as
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General Aptitude
For the given problem, we analyze the clamper circuit as
Step 1: In clamper circuit, the capacitor in series and diode in shunt. In peak
detector diode is in series and capacitor in shunt. So, we conclude
that circuit given in options (a), (b), and (c) are clamper circuit, but
the circuit given in option (d) is peak detector.
Step 2: Again, we observe that the output waveform is clamped downward
the reference voltage, it means the direction of diode must be in
downward direction and the reference voltage is 2 V V = . Thus,
option (b) follows the condition.
Given the circuit,
So, the current flowing through resistor R
1
is given by
I
R
V V
ad out
1
=
-

.
6 mA
100
3 2 4
=
-
=
Since, no current is drawn by cellphone, so this current I flows through each
diode and hence diode current equation is
I I e
S
V
V
T
D
=
or 6 m
26
800
m
m
I e
S
=
or I
S
2.602 10 A
16
#
=
-
When there is no load R
L
3 = ^ h, I 0
L
= . Under this condition, maximum
current flows through the zener diode. So, maximum current passing through
zener is I
zM
, when load current is zero. This current is more than I
zT
, so
voltage across zener diode changes due to small zener resistance. Therefore,
the maximum zener voltage is
V
max
z ^ h V I I R
max z z zT z
= + - ^ h
76 21 m m 12 9 = + - ^ h
12 0.495 12.5 V = + =
Similarly, we obtain the minimum Zener voltage as
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V
min
z ^ h V I I R
min z zT z z
= - - ^ h
V I I R
z zT zK z
= - -
^ h
12 9 11.82 m V 21 1 = - - = ^ h
Consider the given circuit,
Applying KCL at node A,
I
L
I I
S z
= -
I
max
L ^ h I I
max
min S z
= - ^ h

R
V V I R
I
min i z zk z
zk
=
- -
-

.
1m
330
24 11 82 1 9
#
=
- -
-
36.88 1 35.88 m m mA = - =
When load current is maximum, the load resistance will be
R
L

I
V
max
min
L
z
=

35.88
.
329.43
m
11 82
W = =
For the given circuit, we first determine the region (ON or OFF region)
in which the zener diode is operating, and the normal diode is forward or
reverse then obtain the output.
Step 1: Assume that the zener diode is OFF, and replace it by open circuit
Zener diode operates in ON state, if
V
ref
v
z
$
Step 2: From the biasing, we observe that the diode is in forward bias and
zener diode is in ON state So, equivalent circuit is
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General Aptitude
The reference voltage for the circuit is
V
ref
V V
z
= +
g
6.2 0.7 6.9 V = + =
Step 3: Thus, the temperature coefficient is obtained as

V V
V V
z f
z z f f
a a
+
+

.
.
.
1.8m
6 9
6 2
100
0 02
#
=
+ - ^ h

.
. . m m
6 9
1 24 1 8
=
-

.
.
/
m
C
6 9
0 56
c =-
. / m C 0 0811 c =-
. %/ C 0 008 c =-
The new value of V
ref
at 50 C c V T
ref #
T = + temperature coefficient
. . m 6 9 0 56 50 25
#
= - - ^ h
6.9 0.014 6.886 V = - =
v
p
v >
n
diode is ON
v
p
v <
n
diode is OFF
Applying these conditions, we conclude that the diodes , D D
1 2
are
ON.
Step 3: When both diodes are operating in ON state, we have the equivalent
network as
By nodal analysis, we obtain the voltage at node A as

1 k k
V
V
2
0
10
-
+
- - ^ h
5m =
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2 20 V V + + m k 5 2
#
=
V 3 10 =-
V
3
10
=-
Step 4: At node A voltage is negative, so we get
V
Pn1
0 < , V 0 >
Pn2
Therefore, diode D
1
is OFF and diode D
2
is ON. So, equivalent
circuit is as shown below.
From the above circuit, I 0 >
D2
. Thus, diode D
1
is OFF and Diode
D
2
is ON.
We have the condition for both the diodes are
For normal diode,
v
p
v >
n
diode is ON
v
p
v <
n
diode is OFF
For Zener diode,
| | V
pn
V >
z
Zener diode is ON
| | V
pn
V <
z
Zener diode is OFF
Using these conditions, we analyze the given circuit.
Step 1: For positive half cycle, the diode D
2
, D
3
, D
4
are operating in OFF
state and diode D
1
is in forward biased for . V 0 6
i
2 . Now, consider
the following two cases for positive half cycle.
CASE I :
If 0 10 V v
i
1 1 , then zener diode is in OFF state. So, it operates
as normal diode. In this case, the voltage across zener diode V 0
Pn
1
. So, it operates in reverse bias.
So, output voltage v v
o in
=
CASE I I :
If 10 V v
i
2 , then voltage across zener diode is V v
z
2 . So, zener
diode is in ON state.
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General Aptitude
v
o
9.4 0.6 10 V = + =
Step 2: For negative half cycle, the diode D
1
is in reverse bias. So, no more
use of zener diode and diode D
2
, D
3
, D
4
are ON if 1.8 V v <
i
- other
wise it is OFF. Consider the following cases for negative half cycle.
CASE I :
When . 1 8 - v 0
in
1 1 , the equivalent circuit is
v
o
v
in
=
CASE I I :
If v
in
1.8 V 1- , then diode D
2
, D
3
and D
4
is in ON state. So,
Therefore, the output voltage is
v
o
. . . 0 6 0 6 0 6 =- - -
1.8 V =-
Step 3: From the above results, we sketch the plot between v
in
and v
o
as
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Step 2: By using voltage divide rule, we have
v
P2

k k
k
V
5 10
5
15 5
#
=
+
=
So, voltage across diodes D
1
and D
2
are
v
Pn1
15 V = and v
Pn2
5 V =
Step 3: Now, we have the operating conditions for the diode
v
p
v >
n
diode is ON
v
p
v <
n
diode is OFF
Applying these conditions, we conclude that both diodes are
operating in ON state. But, the n-terminals of diode are commonly
connected, so the result is incorrect.
Step 4: For the obtained voltage, we conclude that diode D
1
approaches the
ON state first. So, we check for D
1
ON and D
2
OFF. The equivalent
circuit is
Step 5: By using voltage divider rule, we have
v
P2
5
k k
k
V
5 10
5
15
#
=
+
=
v
n2
15 10
k k
k
V
5 10
10
#
=
+
=
So, voltage across diode D
2
is
v
Pn2
5 10 = -
v
Pn2
5 =-
v
Pn2
0 1
i.e. diode D
2
is OFF (assumption is correct). Thus, diode D
1
is ON
and D
2
is OFF.
bias) in which the diodes are operating.
Step 1: Assume that all the diodes are OFF, and replace it by open circuit.
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General Aptitude
Step 2: By using voltage divider rule,
V
1

k k k k
k
1 1 1 1
1
15 15
#
=
+ + +
- - ^ ^ hh
V
1
30 7.5 V
4
1
#
= =
Voltage across diode D
1
is
v
Pn1
v v
P n 1 1
= -
0 7.5 V V
1
= - =
v
Pn1
0 2
Step 3: Now, we have the condition for the diode
v
p
v >
n
diode is ON
v
p
v <
n
diode is OFF
For these conditions, we conclude that diode D
1
is ON.
Step 4: Now, we draw the equivalent circuit (for the diode D
1
ON) for
checking the operating regions of diodes D
2
and D
3
.
Step 5: Using voltage divider rule,
V
2

k k k
k
V
1 1 1
1
15 =
+ +
- ^ h
5 V =-
v
Pn2
v v
P n 2 2
= -
0 5 5 = - - = ^ h
So, diode D
2
is also ON.
Step 6: Again, we redraw the equivalent circuit (for the diodes D
1
and D
3

ON) for checking the operating region of diode D
3
.
V
3
.
k k
k
V
1 1
1
15 7 5
W
=
+
- =- ^ h
v
Pn3
V V
P n 3 3
= -
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7.5 0 7.5 V =- - =-
v
Pn3
0 1
So, diode D
3
is OFF.
Step 7: Thus, combining the all results obtained in above cases, we conclude
that diode D
1
is ON, D
2
is ON, and diode D
3
is OFF.
From the results obtained in previous problem, we have the equivalent
circuit as
Thus, we get the voltage,
V V V
2 3
= -
. V 0 7 5 = - - ^ h
7.5 V =
and the current,
I
1 k
V V
1 2
W
=
-

1
0 0
0
k
Amp =
-
=
* * * * * * * * * *
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General Aptitude
SOLUTI ONS 1.2
SOL 1.2.1 Correct answer is 4.
reverse bias) in which the diodes are operating, and then obtain the required
unknowns.
v
p
v >
n
diode is ON
v
p
v <
n
diode is OFF
Applying these conditions, we conclude that diode D
1
is OFF and
D
2
is ON.
Step 3: For the result obtained in the above case, the equivalent circuit is
i
1
0 mA = , 4 mA i
500
5 3
2
=
-
=
SOL 1.2.2 Correct answer is 3.57 - .
v
p
v >
n
diode is ON
v
p
v <
n
diode is OFF
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Applying these conditions, we conclude that both diodes are ON.
But, the p-terminals of the diodes are commonly connected, so it
violates the result.
Step 3: When diode D
1
is OFF, and diode D
2
is ON, then equivalent circuit
is
I
15
.
1.287
k
mA
10 0 7 10
=
- - -
=
^ h
V 10 . 10 2.87 m k V 1 287
#
= - =- ^ h
So, diode D
1
is OFF (our assumption is correct).
Step 4: For the diode D
1
OFF, we have
i
D1
0 mA =
So, v
o
10 5 . k m 1 287 =- +^ ^ h h
3.57 V =-
SOL 1.2.3 Correct answer is 2 - .
Step 2: By using voltage divider rule,
v
A

10 10
10
4 2
k k
k
V
#
=
+
=
v
B

10 10
10
8 4
k k
k
V
#
=
+
=
v
p
v >
n
diode is ON
v
p
v <
n
diode is OFF
Applying these conditions, we conclude that diode is OFF.
Step 4: So, the voltage across diode is
v
D
2 4 2 V v v
A B
= - = - =-
SOL 1.2.4 Correct answer is 2.93.
Each diode having a forward bias current or 0 i >
D
. So, each diode is
operating in ON state. Therefore, the equivalent circuit is
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General Aptitude
From the circuit,we obtain the resistance
R
1

.
. .
0 5
9 4 4 4
=
-
k 10 W =
R
2

. .
1
4 4 0 6
=
- - ^ h
k 5 W =
R
3

.
.
1 5
0 6 5
=
- - - ^ h
. k 2 93 W =
SOL 1.2.5 Correct answer is 7.6 .
If D
3
is ON, then
v
o
. . 5 0 6 4 4 = - =
In this case,
i
D1
0 < , i 0 >
D2
So, diode D
1
is OFF and diode D
2
is ON. Therefore, the equivalent circuit is
Thus, the current through the diode D
2
is
i
D2

.
. .
k 0 5
4 4 0 6
=
-
. mA 7 6 =
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v
p
v >
n
diode is ON
v
p
v <
n
diode is OFF
1
is OFF and D
2

is ON.
Step 3: So, the equivalent circuit is
Using Nodal analysis, we obtain the output voltage as

. 0.5
.
k
v
v
9 5
10
0 6 0
o
o -
+
- - ^ h
0 =
v
0
1.07 V =
If 10 V v
1
= , 5 V v
2
= , then D
2
is OFF and D
2
is ON. In that case, the
Using nodal analysis at node v
o
,

. .
. v v
9 5
10
0 5
0 6 5
o o
-
+
- -
0 =
v
0
5.82 V =
the equivalent circuit is (for v
1
v 0
2
= = )
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General Aptitude
v
p
v >
n
diode is ON
v
p
v <
n
diode is OFF
Applying these conditions, we conclude that both diodes will be ON.
Step 3: For the both diodes operating in ON condition, we have the equivalent
circuit as
By using nodal analysis at node v
o
,

9.5 0.5
.
0.5
.
k k k
v
v v
10
0 6 0 0 6 0
o
o o -
+
- -
+
- - ^ ^ h h
0 =
v
o
0.842 V =
v
p
v >
n
diode is ON
v
p
v <
n
diode is OFF
2
is OFF and D
1

is ON.
Step 3: For the obtained operating state, the equivalent circuit is
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Using Nodal analysis, we get the output voltage as

9.5
.
k
v
v
0
500
0 6 10
o
o -
+
+ - ^ h
0 =
v
o
8.93 V =
In previous problem, we have obtained the output voltage
v
o
8.93 V =
This is the voltage at n-terminal of D
2
. So, the required voltage v
2
to turn
ON the diode D
2
is
v
2
. . . 8 93 0 60 9 53 = + = V
Since, for the given problem we have 5 v
2
= V. So, the output in this case is
same as in previous.
Now, we have
v
2
V 10 =
which is greater than the required voltage to turn ON the diode D
2
. So,
the diodes D
1
and D
2
both are ON for the given voltage. Therefore, the
Applying KCL at node v
o
,

9.5 .5
.
.5
.
k k k
v
v v
0
0 6 10 0 6 10
o
o o -
+
+ -
+
+ - ^ ^ h h
0 =
or v
o
9.16 V =
Since the diodes are connected in parallel, so each diode has the current
i
D

.
10
0 1
= A 0.01 = A
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General Aptitude
For Zener diode,
v
o
v >
z
Zener diode is ON
, v
o
v <
z
Zener diode is OFF
Zener diode in ON state.
According to KCL
i
R
i i
z L
= +
For i
( ) max L
0 i
( ) min z
& =
i
R
i
( ) max L
=
i
( ) max L
1.4
k
mA
15
30 9
W
=
-
=
We have the given circuit,
Step 1: From the circuit, the voltage across Zener diode is obtained as
V 50 16.66 V
225
75
#
= =
Step 2: For Zener diode, we have the condition
V v >
z
Zener diode is ON
V v <
z
Zener diode is OFF
Checking this condition for the obtained value V, we conclude that
V V >
z
16.66 15 V >
i.e. the Zener diode is ON.
Step 3: For the Zener diode operating in ON condition, the equivalent circuit
is
Step 4: From the equivalent circuit, we obtain the current through Zener
diode as
i
R
i i
z L
= +
i
z
i i
150
50 15
75
15
R L
= - =
-
-
i
z
33.33 mA =
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Step 5: So, the power dissipation in Zener diode is
p
z
15 33.33 0.5 Watt v i
z z # #
= = =
Zener diode is operating in ON state, so equivalent circuit is
Now, we obtain the required value of unknown in following steps.
Step 1: Since, the maximum power (power rating) in zener diode is
p
z
400 mW =
So, the maximum current through the zener diode is
i
z
0 mA
v
p
10
400
4
z
z
= = =
Step 2: Again, from the circuit we have the current through the resistance
222 W as
i
R
45 mA
222
20 10
=
-
=
Step 3: For maximum power in zener diode, the value of R
L
is obtained as
i
( ) min L
i i
( ) max R z
= -

R
10
L
45 40 = -
R
L
2 k
5
10
W = =
Given the secondary transformer voltage,
v
s
60 2 60 sin t p = V
So, the maximum voltage across capacitor is given by
V
max
( ) v V 2
, max on s D #
= -
60 1.4 58.6 = - = V
Thus, the capacitance is given by
C
( )
.
24.4
fRv
V
2
2 60 10 10 2
58 6
max
rip
3
# #
= = = F m
Given the input to full-wave rectifier,
v
i
sin t 120 2 60 p = V
So, we have the voltage across both the secondary transformer as
v
s
sin t 120 2 60 p = V
Therefore, the maximum voltage across the capacitor is
V
max
( ) v V
, max on s D
= -
120 0.7 119.3 = - = V
Since, the input cannot drop below 100 V, so we have
v
rip
119.3 100 19.3 = - = V
Thus, the capacitance is obtained as
C
( ) . .
.
20.6 F
fRv
V
2
2 60 2 5 10 14 4
119 3
max
rip
3
# #
m = = =
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General Aptitude
Since, we know
v
rip

fR C
v
max
L
=
So, R
L
6.25
fCv
v
60 50 10 4
75
max
rip
5
# # #
= = =
-
kW
v
p
v >
n
diode is ON
v
p
v <
n
diode is OFF
Checking the given circuit for these conditions, we conclude that D
2

is always OFF and D
1
is ON.
Step 3: So, we draw the equivalent circuit for the obtained result as
Step 4: By to voltage divider rule, we obtain
v
o

10 10
10
10
k k
k
#
=
+
5 V =
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v
p
v >
n
diode is ON
v
p
v <
n
diode is OFF
Checking the given circuit for the conditions,
Diode ve D v 2
pn 1
" = =+ . So D
1
is ON.
Diode ve D v 2
pn 2
" =- =- . So D
2
is OFF.
Step 3: Thus, for the obtained result, we draw the equivalent circuit as
Step 4: From the equivalent circuit, we get
I 0 =
We analyze the given circuit in following steps.
Step 1: Assume that Zener diode is OFF, and draw the equivalent circuit as
Step 2: For Zener diode, the operating regions are defined as
V V >
z
Zener diode is ON
, V V <
z
Zener diode is OFF
Checking the given circuit for the conditions, we have
V v >
z
i.e. zener diode is ON and work as a voltage regulation.
Step 3: For the obtained result, we draw the equivalent circuit as
Step 4: From the circuit, we obtain
I
z

0.1
. .
2
k
mA
3 5 3 3
=
-
=
output.
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General Aptitude
Step 1: Assume that the two diodes are OFF, and replace its by open circuit.
v
p
v >
n
diode is ON
v
p
v <
n
diode is OFF
Checking the given circuit for the conditions, we conclude that V
pn

of diode D
2
is highly positive respect to D
1
. So, D
1
is OFF and D
2
is
ON.
Current, I
2
6.5
k
mA
5 8
=
- -
=
^ h
Voltage, V 5 6.5 1 1.5 V
#
= - =-
So, diode D
1
is OFF (assumption is correct). Therefore,
I
D
0 =
We have the regulator circuit as
For R
min L
the load current will be maximum. Since, by applying KCL at
Node A, we have
I
S
I I
L z
= +
So, for I
max L
the value of I
z
has to be minimum, i.e.
I
min z
0 mA =
or
R
V V
S z
-
I 0
max L
= +
or
R
V
min L
z

5k
20 5
=
-
Put I
R
V
,max
min
L
L
z
=
: D
Thus, R
min L
1.66
m
k
3
5
W = =
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Assume that zener diode is OFF and draw the equivalent circuit
v
o

5 1
1
k k
k
20
#
=
+
3.33 V
Across the zener diode the voltage is 3.33 V v
o
= , and the Zener voltage is
V v 5
z
= . So, we have
v
o
v <
z
i.e. zener diode operates in OFF state (assumption is correct).Thus,
v
o
3.33 V =
For R
L
3 = , the equivalent circuit is
Now, we analyse the circuit in following steps.
Step 1: Assume zener diode in OFF state and draw the equivalent circuit.
Step 2: From the circuit, we have
v
o
V 30 =
Since V v 9
z
= , so we conclude that
v
o
v
z
2
i.e. Zener diode is operating in ON state (assumption is incorrect).
Step 4: So, the current flowing through zener diode is
I
z

15
1.4
k
mA
30 9
=
-
=
Step 5: Thus, the power dissipation in Zener diode is
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General Aptitude
P
z
v I
z z
=
9 1.4 12.6 m mW
#
= =
For the diode operating in ON state, simplified circuit is
The ideal dc output voltage in the absence of the ripple is given by
V
dc
output
^ h V V
dc
input
on
= - ^ h
Since, V
dc
input
^ h V 2
rms
input
#
=^ h
12.6 17.82 V 2
#
= =
So, V
dc
output
^ h 17.82 1 16.82 V = - =
Again, for the diode operating in ON state, we have the simplified circuit as
From the circuit, the ripple voltage is
V
rip

R
V V
C
T
m o
.
-
I
C
T
dc
= I
R
V V
dc
m o
a =
-
; E
Given that 60 Hz f = . So,
T sec
f
1
60
1
= =
Therefore, V
rip

.
/
15
16 8
25 10
1 60
3
#
#
=
-
0.747 V =
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v
p
v >
n
diode is ON
v
p
v <
n
diode is OFF
Checking the given circuit for these conditions, we conclude that the
diodes D
1
and D
2
will be ON.
Step 3: For the obtained result, we get the equivalent circuit as
From the circuit, we obtain
I
D2

5 10
1.66
k k
mA
15 10
=
+
- -
=
^ h
V
n2
10 1.66 k m 10
#
= -
6.6 V =
Step 4: Since, we have assumed diode D
1
ON, so
V
p2
0 V =
Therefore, the voltage across diode D
2
is
V
pn2
0 1
i.e. D
2
will be OFF due to D
1
ON (assumption is incorrect).
Step 5: Therefore, the total current from 15 V supply will go through diode
D
1
and no current flow through diode D
2
, i.e.
I
D2
0 =
Step 6: Thus, the actual equivalent circuit is
Current through diodes D
1
and D
2
are
I
D1

5
3
k
mA
15 0
W
=
-
=
I
D2
0 =
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General Aptitude
Step 2: For the equivalent circuit, we may conclude that the applied voltage
forward biases the diodes. So, both the diodes are operating in ON
state. So equivalent Circuit is
Step 3: For the equivalent circuit, we obtain
I
2

6.6
.
0.11
k
mA
0 7
W
= =
I
3

R
V 0
B
2
=
-

11.2
.
1.66
k
mA
18 6 0
=
-
=
Step 4: Again, applying KCL at node V
B
,
I
3
I I
D2 2
= +
1.66 m 0.11 mA I
D2
= +
I
D2
1.55 mA =
The diode current equation is
I
D
I e
V
V
S
T
D
= ...(1)
Differentiating with respect to V
D
,

dV
dI
D
D
I e
V
V
V
1
S
T
D
T
= ...(2)
So we may write

V
I
D
D
T
T

V
I
T
D
=
Thus, I
D
T
V
I
V
T
D
D #
T =

26
1
1 38.4
m
m
m A m
#
= =
We have
DC bias current, I
D
1 mA =
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Small signal resistance, r
d

I
V
D
T
= 26
m
m
1
26
W = =
By ac analysis, we get small change in current as
I
D
T
r
V
d
D
T
=
1
38.4
m
A
26
m = =
The ripple voltage is given by
V
rip

R
V V
C
T ,
L
m D on
=
-
where V
m
= peak voltage
or V
rip
I
C
T
dc
=
Given that peak to peak swing is
V
peak peak -
9 V =
So, the peak voltage is obtained as
V
m
. V
V
2 2
9
4 5
peak peak
= = =
-
Also, we have V
, D on
0.8 V =
R
L
0.436 W =
T 16.67 ms
f
1
60
1
= = =
Thus, the capacitance is obtained as
C
0.436
. .
.
16.67 ms 4 5 0 8
0 1
#
W
=
-
1.417 F =
Full wave rectifier with smoothing capacitor and load resistance R
L
is
Ripple in full wave rectifier is
The output remains equal to zero for
V
in
V 2
, D on
1
So output voltage is
V
out
V V 2
, P D on
= -
The capacitor is discharged for half of the input cycle (approx.), so the
ripple is approximately equal to half of that in half wave rectifier. Therefore,
ripple voltage in full wave rectifier is
V
rip

R C
V V
T
2
1
2
, m D on
1 1
=
-

.
2
1
30 1000 10 60
3 2 0 8
6
# # #
#
=
-
-
0.389 V =
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General Aptitude
Load current waveform for full wave rectifier is
By definition, average or dc current is given by
I
dc

T
i t d t
1
L
T
0
w = ^ ^ h h #
i d t
2
1
L
0
2
p
w =
p
^ h #
The load current is given by
i
L

sin
sin
I t t
I t t
0
2
m
m
# #
# #
w w p
w p w p
=
-
)
So, the average dc current is obtained as
I
dc
sin sin I t d t I t d t
2
1
m m
0
2
p
w w w w = + -
p
p
p
^ ^ h h < F # #
cos cos
I
t t
2
m
0
2
p
w w = - +
p
p
p
^ ^ h h 8 B

I 2
m
p
= ...(1)
Now, the rectifier circuit is
I
m

R R R
V
S f L
m
=
+ +
...(2)
Where R
S
" Secondary winding resistance
R
f
" Diode forward resistance
R
L
" Load resistance
Substituting equation (2) in equation (1), we get
I
dc

I
R R R
V 2 2
m
S f L
m
p
p
= =
+ + ^ h
Again, for positive half cycle diode D
1
is ON and D
2
is OFF, and for negative
half cycle diode D
1
is OFF and D
2
is ON. Average or dc voltage V
dc
is load
voltage produced by I
dc
flowing through the load, i.e.
V
dc
I R
I R 2
dc L
m L
p
= =
Substituting equation (2) in above expression, we have
V
dc

R R R
V R 2
S f L
m L
p
=
+ + ^ h
Since R R
S f
+ R <<
L
, so
V
dc

V 2
m
p
=
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Therefor, dc power delivered to the load is given by
P
dc
V I I R
dc dc dc L
2
= =

I
R
R R R
V
R
2 2
m
L
S f L
m
L
2 2
p
p
= =
+ +
b
^
l
h
; E
...(3)
Given that, V
S rms ^ h
20 V =
R
S
5 W = , 2 R
f
W = , 50 R
L
W =
V
m
V 2
S rms
=
^ h

20 28.28 V 2
#
= =
Substituting these values in equation (3), we get
P
dc

.
.
3 14 5 2 50
2 28 28
50
2
#
#
=
+ + ^ h
; E
4.98 watt =
In previous solution, we have obtained
V
dc

R R R
V R 2
S f L
m L
p
=
+ + ^ h
For calculation of Null load voltage V
NL ^ h, we put R
L
"3 in above
expression, i.e.
V
NL
lim
R
R R
V
1
2
R
L
S f
m
L
p
=
+
+ "3
d n
18.01 V
V 2
m
p
= =
Also, the full load voltage is obtained as
V
FL
I R
R R R
V R 2
dc L
S f L
m L
p
= =
+ + ^ h

.
.
3 14 5 2 50
2 28 28 50
# #
=
+ + ^ h
15.80 V =
Thus, the percentage load regulation is
% Load regulation %
V
V V
100
FL
NL FL
#
=
-

.
. .
%
15 80
18 01 15 80
100 14
#
=
-
=
The rectifier efficiency is defined as
h
Input ac power
Output dc power
=
Now, we have the output dc power,
P
dc
o
^ h V I I R
dc dc dc L
2
= =

I
R
2
m
L
2
p
=b l
The input ac power is
P
ac
in
^ h V I
V V
2 2
rms
i
rms
i
m
i
m
i
= = ^ ^
c c
h h
m m

V I
2
m
i
m
i
=
^ ^ h h

R R R
I
2
S f L
m
2
=
+ + ^ h
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General Aptitude
Thus, we get
h
R R R
I
I R
2
4
S f L
m
m L
2
2
2
p
=
+ + ^ h

R R R
R 8
S f L
L
2
p
=
+ + ^ h

8
5 2 50
50
2
p
=
+ +
. 0 711 =
We redraw the given the diode circuit as
From circuit, we have the current through D
2
as
I
D2
I e I e
S
V
V
S
V
V
2 2
T
D
T
2 1
= = h h ...(1)
Also, we have
V
D1
V V
1
= -
So, the current through diode D
1
is
I
D1
I e
S
V
V V
1
1
T = h
-
...(2)
Now, the reverse saturation current is directly proportional to junction area,
i.e.
I
S
A \
where A denotes the junction area. Since, D
1
has 10 times the junction area
of D
2
. So, we get

I
I
S
S
2
1
10 =
1
,
I
1
I I
D D 1 2
= +
or 10m 2m I
D2
= +
or I
D2
8 mA =
Dividing equation (2) by (1), we have

I
I
D
D
2
1

I e
I e
S
V
V
S
V
V V
2
1
T
T
1
1
=
-
or
m
m
8
2
e 10 V
V
T =
-
Thus, V ln V 40
T
= ^ h
. mV 92 22 =
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All the diodes are forward biased due to 12 V supply voltage. So, diode D
1
, D
2
, D
3
are ON.
Voltage, V
1
. . 12 0 7 11 3 = - =
Voltage, V
2
12 0.7 0.7 10.6 V = - - =
Voltage, V
3
12 0.7 0.7 0.7 9.9 V = - - - =
Current, I
3

1 k
V 0
3
W
=
-

1
.
9.9
k
mA
9 9 0
W
=
-
=
So, the current through diode D
3
is
I
D3
9.9 mA I
3
= =
Again, we obtain
I
2

1 k
V 0
2
W
=
-

1
.
10.6
k
mA
10 6 0
W
=
-
=
2
, we get current through diode D
2
as
I
D2
I I
D 2 3
= +
. . m m 10 6 9 9 = +
20.5 mA =
From the circuit, we have the current
I
1

1 k
V 0
1
W
=
-

.
11.3
k
mA
1
11 3
= =
Thus, applying KCL at node V
1
we obtain the current through diode D
1
as
I
D1
I I
D 1 2
= +
. . . mA m mA 11 3 20 5 31 8 = + =
For DC analysis, coupling capacitor C
1
and C
2
is open circuited. So, equivalent
circuit is
Since, diode is forward biased, so current through the diode is
I
DQ

.
R
V 0 6
C
C
=
-

2
. .
k
1 6 0 6
W
=
-
0.5 mA =
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General Aptitude
For ac analysis, we have the diode resistance
r
d

I
V
DQ
T
h
=
0.5
1 25
50
m
mV
W
#
= =
In ac analysis, capacitor is short circuit and dc voltage source acts as a short
circuit. So, we get the small signal ac equivalent circuit is
The above circuit can be redrawn in simplified form as
Thus, by using voltage divider rule
v t
o ^ h
| | | |
| | | |
k k
k k
v t
100 2 50 2
2 50 2
i
=
+
^ h
or
v t
v t
i
o
^
^
h
h

.
.
100 47 61
47 61
=
+
. 0 33 =
***********
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SOLUTI ONS 1.3
In capacitor filter,
Ripple factor, r
fCR 4 3
1
L
=
For large value of R
L
(load resistance) the ripple factor should be small. So
it is suitable for large value of load resistance.
In inductor filter,
Ripple factor, r
L
R
3 2
L
w
=
^ h
For small value of load resistance R
L ^ h the ripple factor should be small. So
inductor filter is suitable for small values of load-resistance.
The rectifier circuit is to convert a.c. voltage to d.c. voltage.
The ripple factor of Inductor filter is,
r
L
R
3 2
L
w
=
^ h
A bleeder resistance R
B
, is connected in parallel with the load resistance as
shown in figure
It improves voltage regulation of the supply by acting as the preload on the
supply.
For half wave rectifier,
The output frequency f
o
f
i
=
Where, f
i
= input frequency
f
o
50 Hz =
For full wave bridge rectifier
f
o
f 2
i
=
2 50
#
=
100 Hz =
The full wave bridge diode rectifier,
% Voltage regulation %
R
R 2
100
L
f
#
=
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General Aptitude
%
50
2 50
100
#
#
=
% 200 =
A voltage multiplier circuit is shown in figure
So essential component is capacitor.
Let us assume diode is OFF.
So the circuit is
V 0 <
pn
, So diode is actually OFF.
So the equivalent circuit is
V
o
10 V =
Zener diode can work in the breakdown region without getting damaged. So
a Zener diode is always used in Reverse biased.
Voltage regulation it is defined as the % change in regulated output voltage
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for a change in load current from minimum to maximum value.
%VR %
V
V V
100
NL
NL FL
#
=
-
So it should be as small as possible for ideal rectifier and filter circuit,
% Regulation % 0 =
From Plancks equation,
E hn =
E
g

hC
l
=
E
g

.
5490 10
6 626 10 3 10
10
34 8
#
# # #
=
-
-
3.62 10 J
19
#
=
-
2.26 eV =
When the load resistance is infinity the value of the inductance will also tend
to be infinity to over come this problem, a bleeder resistor R
B
, is connected
in parallel with the load resistance as shown in Fig.
Therefore, a minimum current will always be present for optimum operation
of the inductor.
The given circuit is half wave rectifier circuit so
DC current, I
dc

I
m
p
=
R R
V
L F
m
p
=
+ ^ h

V
5 45
m
p
=
+ ^ h

V
50
m
p
=
The relation between diode current voltage and temperature is given by
I I e 1
/
o
V VT
= -
h
^ h
where I
o
= reverse saturation current
V = voltage across diode
V
T
= temperature equivalent voltage

q
KT
=
The transformer utilization factor (TUF) is defined as,
TUF
sec ac rating of the transformer ondary
dc power delivered to the load
=

R
P
rated ac
dc
=
Peak inverse voltage (PIV) of an half wave rectifier is V
m
.
PIV of an full wave rectifier with centre tapped is V 2
m
.
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General Aptitude
For inductor filter,
Ripple factor, r
L
R
3 2
L
w
=
^ h
So the ripple factor value is low for low value of load resistance and low
value of load resistance means for heavy load currents.
The minimum value of inductance required to make the current to flow
through the circuit at all times is known as critical inductance. It depends
on load resistance and supply frequency. It is given by,
The critical inductance L
c

R
3
L
w
=
Transformer utilization factor,
For Half wave rectifier, TUF . 0 287 =
For Full wave centre tapped rectifier,
TUF . 0 693 =
For Full wave bridge rectifier,
TUF . 0 812 =
So, TUF is more in bridge rectifier.
Zener diode is in OFF state. So, it work as voltage regulator.
KCL at node A
I
S
I I
L z
= +
For maximum load current,
I
max S^ h
I I
min min L z
= +
^ ^ h h

R
V V
max
S
i z
-
^ h
0.5m I
max L
= +
^ h
I
max L^ h

.
0.5m
1000
30 5 8
=
-
-
24. . m m 2 0 5 = - 23.7 mAmp =
The p-section filter circuit is,
At no load, R
L
3 =
Page 129
Chap 1
Diode Circuits
Page 129
Chap 1
Diode Circuits
w
w
w
.
n
o
d
i
a
.
c
o
.
i
n
So current flow through is zero.
The Diode D
1
is ON due to 6 V and due to D
1
is F.B. D
2
is always in R.B.
So equivalent circuit is,
So, V
2
. 6 0 6 = -
5.4 V =
V
1
6 V =
The given circuit is,
This is a clamper circuit and the diode is in downward direction the total
signal will be clamp below the reference voltage.
Clipper circuits, also called limiter circuits are used to eliminate portion
of a signal that are above or below a specified level without distorting the
remaining part of the alternating waveform.
Clamper circuits shifts the entire signal voltage by a dc level.
I
ZM

. V
P
6 8
500 10
Z
ZM
3
#
= =
-
. . A mA 73 5 10 73 5
3
#
= =
-
Page 130
Chap 1
Diode Circuits
Page 130
Chap 1
Diode Circuits
w
w
w
.
n
o
d
i
a
.
c
o
.
i
n
General Aptitude
r
Z

.
5
I
V
10 10
0 05
Z
Z
3
#
T
T
W = = =
-

Z
Vl 4.7 15 5 V V I r 20 10
Z Z Z
3
# #
= + = + =
-
^ h
The output of a rectifier consists of d.c. component as well as a.c. component.
The a.c. component in the output is called as ripple. So the ripple factor g ^ h
is the ratio of ripple voltage or effective value of a.c. component voltage to
the average or d.c. voltage, so it defined the purity of output power.
g
. .
. .
d c value of wave
rms value of a c component
=
V
m
20 V 2 =
V
dc

V
m
p
=

20 2
p
=
9 V =
***********

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