Ts5a12301e PDF

YFP PACKAGE
B
A
2 1
C
B
A
1 2
C
(Laser Marking View) (Bump View)
T S 5 A 1 2 3 0 1 E
www.ti.com SCES707B AUGUST 2008REVISED APRIL 2011
I E C L E V E L 4 E S D - P R O T E C T E D 0 .7 5 - S P D T A N A L O G S W I T C H
W I T H 1 .8 - V C O M P A T I B L E I N P U T L O G I C
C heck for S amples: T S 5 A 1 2 3 0 1 E
1 FE A T U R E S A P P L I C A T I O N S
L ow O N - S tate R esistance (0 .7 5 ) C ell P hones
L ow C harge I njection P D A s
E xcellent O N - S tate R esistance M atching P ortable I nstrumentation
I solation in P ower- D own M ode, V
+
= 0 M P 3 P layers
S pecified B reak- B efore- M ake S witching P ortable M edia P layers
2 .2 5 - V to 5 .5 - V P ower S upply (V
+
)
6- M I nput P ulldown A llows C ontrol I nput (I N )
to B e U nconnected
1 .8 - V C ompatible C ontrol I nput T hreshold
I ndepedent of V
+
L atch- U p P erformance E xceeds 1 0 0 mA P er
JE S D 7 8 , C lass I I
E S D P erformance T ested P er JE S D 2 2
3 0 0 0 - V H uman- B ody M odel
T able 1 . T E R M I N A L A S S I G N M E N T S
(A 1 1 4 - B , C lass I I )
C V
+
NC
1 0 0 0 - V C harged- D evice M odel (C 1 0 1 )
B COM GND
E S D P erformance C O M P ort to G N D
A IN NO
8 0 0 0 - V H uman- B ody M odel
2 1
(A 1 1 4 - B , C lass I I )
8 - kV C ontact D ischarge
(I E C 61 0 0 0 - 4 - 2 )
1 5 - kV A ir- G ap D ischarge
(I E C 61 0 0 0 - 4 - 2 )
D E S C R I P T I O N /O R D E R I N G I N FO R M A T I O N
The TS5A12301E is a single-pole double-throw (SPDT) analog switch that is designed to operate from 2.25 V to
5.5 V. The device offers a low ON-state resistance with an excellent channel-to-channel ON-state resistance
matching, and the break-before-make feature to prevent signal distortion during the transferring of a signal from
one path to another.
The device has excellent total harmonic distortion (THD) performance and consumes very low power. These
features make this device suitable for portable audio applications. The control input (IN) pin can be connected to
low-voltage GPIOs, allowing it to be controlled by 1.8-V signals.
The TS5A12301E has 15-kV Air-Gap Discharge and 8-kV Contact Discharge ESD protection for the COM port
to GND, which make it compliant with the IEC Level 4 ESD standard (IEC 61000-4-2).
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright 20082011, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
V+
GND
NC
NO
COM
IN
T S 5 A 1 2 3 0 1 E
SCES707B AUGUST 2008REVISED APRIL 2011 www.ti.com
T able 2 . O R D E R I N G I N FO R M A T I O N
(1 )
T
A
P A C KA G E
(2 )
O R D E R A B L E P A R T N U M B E R T O P - S I D E M A R KI N G
(3 )
WCSP (DSBGA)
40C to 85C Tape and reel TS5A12301EYFPR _ _ _ 3W_
0.4-mm Pitch YFP (Pb-free)
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
(3) YFP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the wafer fab/assembly site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, = Pb-free).
S U M M A R Y O F C H A R A C T E R I S T I C S
(1 )
2 :1 M ultiplexer/D emultiplexer
C onfiguration
(1 S P D T )
Number of channels 1
ON-state resistance (r
on
) 0.75 max
ON-state resistance match (r
on
) 0.1 max
ON-state resistance flatness (r
on(flat)
) 0.1 max
Turn-on/turn-off time (t
ON
/t
OFF
) 110 ns/100 ns
Break-before-make time (t
BBM
) 10 ns
Charge injection (Q
C
) 97 pC
Bandwidth (BW) 55 MHz
OFF isolation (O
ISO
) 63 dB at 1 MHz
Crosstalk (X
TALK
) 63 dB at 1 MHz
Total harmonic distortion (THD) 0.003%
Leakage current (I
NO(OFF)
/I
NC(OFF)
) 20 nA
Package option 6-pin WCSP, 0.4-mm pitch
(1) V
+
= 5 V, T
A
= 25C
FU N C T I O N T A B L E
N C T O C O M , N O T O C O M ,
I N
C O M T O N C C O M T O N O
L or Open ON OFF
H OFF ON
Figure 1 . L ogic D iagram
2 Copyright 20082011, Texas Instruments Incorporated
T S 5 A 1 2 3 0 1 E
A B S O L U T E M A XI M U M R A T I N G S
(1 ) (2 )
over operating free-air temperature range (unless otherwise noted)
M I N M A X U N I T
V
+
Supply voltage range
(3)
0.5 6.5 V
V
NC
V
NO
Analog voltage range
(3) (4) (5)
0.5 V
+
+ 0.5 V
V
COM
V
+
< V
NC
, V
NO
, V
COM
or
I
IK
Analog port diode current 50 50 mA
V
NC
, V
NO
, V
COM
< 0
I
NC
On-state switch current 450 450
I
NO
V
NC
, V
NO
, V
COM
= 0 to V
+
mA
On-state peak switch current
(6)
700 700
I
COM
V
I
Digital input voltage range
(3) (4)
0.5 6.5 V
I
IK
Digital input clamp current V
I
< 0 50 mA
I+
Continuous current through V
+
or GND 100 100 mA
I
GND
T
stg
Storage temperature range 65 150 C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum
(3) All voltages are with respect to ground, unless otherwise specified.
(4) The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
(5) This value is limited to 5.5 V maximum.
(6) Pulse at 1-ms duration < 10% duty cycle
T H E R M A L I M P E D A N C E R A T I N G S
U N I T
JA
Package thermal impedance
(1)
YFP package 154.2 C/W
(1) The package thermal impedance is calculated in accordance with JESD 51-7.
Copyright 20082011, Texas Instruments Incorporated 3
T S 5 A 1 2 3 0 1 E
E L E C T R I C A L C H A R A C T E R I S T I C S FO R 5 - V S U P P L Y
(1 )
V
+
= 4.5 V to 5.5 V, T
A
= 40C to 85C (unless otherwise noted)
P A R A M E T E R S YM B O L T E S T C O N D I T I O N S T
A
V
+
M I N T YP M A X U N I T
A nalog S witch
V
COM
,
Analog signal range 0 V
+
V
V
NO
, V
NO
25C 0.5 0.75
V
NO
or V
NC
= 2.5 V,
ON-state resistance r
on
See Figure 15 4.5 V
I
COM
= 100 mA,
Full 0.8
ON-state resistance 25C 0.05 0.1
V
NO
or V
NC
= 2.5 V,
match between r
on
See Figure 15 4.5 V
I
COM
= 100 mA,
Full 0.1
channels
0 (V
NO
or V
NC
) V
+
,
See Figure 15 25C 0.15
I
COM
= 100 mA,
ON-state resistance
r
on(flat)
4.5 V
V
NO
or V
NC
= 1 V, 1.5 V, 25C 0.1 0.2
flatness
2.5 V, See Figure 15
Full 0.25
I
COM
= 100 mA,
V
NO
= 1 V, 4.5 V, 25C 20 2 20
V
COM
= 4.5 V, 1 V,
V
NC
= Open,
I
NO(OFF)
,
or 5.5 V nA
I
NC (OFF) Full 100 100
NO, NC V
NO
= 1 V, 4.5 V,
See Figure 16
OFF leakage current V
COM
= 4.5 V, 1 V,
V
NO
= Open,
25C 10 10
I
NO(PWROFF)
, V
NO
or V
NC
= 0 to 5.5 V,
0 V A
I
NC (PWROFF)
V
COM
= 5.5V to 0
Full 10 10
V
NO
= 1 V, 4.5 V, 25C 20 2 20
V
COM
, V
NC
= Open,
NC, NO
I
NO(ON)
or See Figure 17 5.5 V nA
ON leakage current
Full 200 200
V
NC
= 1 V, 4.5 V,
V
COM
, V
NO
= Open,
V
COM
= 1 V, 4.5 V, 25C 20 2 20
V
NO
and V
NC
= Open,
COM
I
COM(ON)
ON leakage current
Full 200 200
V
COM
= 1 V, 4.5 V,
V
NO
or V
NC
= Open,
25C 10 10
COM V
NO
or V
NC
= 0 to 5.5 V,
I
COM(PWROFF)
See Figure 16 0 V A
COM
= 5.5V to 0
Full 10 10
D igital C ontrol I nput (I N )
Input logic high V
IH
Full 5.5 V 1.05 5.5 V
Input logic low V
IL
Full 5.5 V 0 0.65 V
Input leakage current I
IH
, I
IL
V
I
= 1.95 V or 0 Full 5.5 V 0.05 0.5 A
Input resistance r
IN
V
I
= 1.95 V Full 5.5 V 6 M
T S 5 A 1 2 3 0 1 E
E L E C T R I C A L C H A R A C T E R I S T I C S FO R 5 - V S U P P L Y
(1 )
(continued)
V
+
= 4.5 V to 5.5 V, T
A
A
V
+
D ynamic
25C 5 V 110 225
V
COM
= V
+
, C
L
= 35 pF,
Turn-on time t
ON
ns
R
L
= 50 , See Figure 19
Full 4.5 V 250
25C 5 V 100 215
V
COM
= V
+
, C
L
= 35 pF,
Turn-off time t
OFF
ns
R
L
Full 4.5 V 225
25C 5 V 1 10 15
Break-before-make V
COM
= V
+
, C
L
= 35 pF,
t
BBM
ns
time R
L
Full 4.5 V 1 20
V
GEN
= 0, C
L
= 1 nF,
Charge injection Q
C
25C 5 V 97 pC
R
GEN
= 0, See Figure 24
V
NC
or V
NO
= V
+
or
NO
C
NO(OFF)
GND, See Figure 18 25C 5 V 28 pF
OFF capacitance
Switch OFF,
V
NC
or V
NO
= V
+
or
NC, NO C
NC(ON)
,
GND, See Figure 18 25C 5 V 112 pF
ON capacitance C
NO(ON)
Switch ON,
COM V
COM
= V
+
or GND,
C
COM(ON)
See Figure 18 25C 5 V 112 pF
ON capacitance Switch ON,
Digital input
C
I
V
I
= V
+
or GND, See Figure 18 25C 5 V 3 pF
capacitance
R
L
= 50 ,
Bandwidth BW See Figure 21 25C 5 V 55 MHz
Switch ON,
R
L
= 50 ,
OFF isolation O
ISO
See Figure 22 25C 5 V 63 dB
f = 1 MHz,
R
L
= 50 ,
Crosstalk X
TALK
See Figure 23 25C 5 V 63 dB
f = 1 MHz,
f = 20 Hz to 20
Total harmonic R
L
= 600 ,
THD kHz, 25C 5 V 0.003 %
distortion C
L
= 50 pF,
See Figure 25
S upply
Positive supply
I+ V
I
= V
+
or GND Full 5.5 V 10 A
current
T S 5 A 1 2 3 0 1 E
E L E C T R I C A L C H A R A C T E R I S T I C S FO R 3 .3 - V S U P P L Y
(1 )
V
+
= 3 V to 3.6 V, T
A
A
V
+
A nalog S witch
V
COM
,
+
V
V
NO
25C 0.75 0.9
V
NO
or V
NC
= 2 V, Switch ON,
on
3 V
I
COM
= 100 mA, See Figure 15
Full 1.2
ON-state resistance 25C 0.1 0.15
V
NO
or V
NC
= 2 V, 0.8 V, Switch ON,
match between r
on
3 V
I
COM
Full 0.15
channels
0 (V
NO
or V
NC
) V
+
, Switch ON,
25C 0.2
I
COM
ON-state resistance
r
on(flat)
3 V
flatness 25C 0.1 0.2
V
NO
or V
NC
= 0.8 V, 2 V, Switch ON,
I
COM
Full 0.3
V
NO
= 1 V, 3 V, 25C 20 2 20
V
COM
= 3 V, 1 V,
V
NC
= Open,
I
NO(OFF)
, I
NC
or 3.6 V nA
(OFF) Full 50 50
NO, NC Switch OFF, V
NC
= 1 V, 3 V,
OFF leakage current See Figure 16 V
COM
= 3 V, 1 V,
V
NO
= Open,
25C 10 10
I
NO(PWROFF)
, V
NO
or V
NC
= 0 to 3.6 V,
0 V A
I
NC (PWROFF)
V
COM
= 3.6V to 0
Full 10 10
V
NO
= 1 V, 3 V, 25C 20 2 20
V
NC
and V
COM
= Open,
NC, NO Switch ON,
I
NO(ON)
or 3.6 V nA
ON leakage current See Figure 17
Full 100 100
V
NC
= 1 V, 3 V,
V
NO
and V
COM
= Open,
V
COM
= 1 V, 25C 20 2 20
V
NO
and V
NC
= Open,
COM
I
COM(ON)
ON leakage current
Full 100 100
V
COM
= 3 V,
V
NO
and V
NC
= Open,
25C 10 10
COM V
NO
or V
NC
= 0 to 3.6 V,
I
COM(PWROFF)
See Figure 16 0 V A
COM
= 3.6 V to 0
Full 10 10
Input logic high V
IH
Full 3.6 V 1.05 5.5 V
Input logic low V
IL
Full 3.6 V 0 0.65 V
IH
, I
IL
V
I
= 1.95 V or 0 Full 3.6 V 0.05 0.5 A
Input resistance r
IN
V
I
= 1.95 V Full 3.6 V 6 M
T S 5 A 1 2 3 0 1 E
(1 )
(continued)
V
+
= 3 V to 3.6 V, T
A
A
V
+
D ynamic
25C 3.3 V 72 175
V
COM
= V
+
, C
L
= 35 pF,
Turn-on time t
ON
ns
R
L
Full 3 V 185
25C 3.3 V 105 165
V
COM
= V
+
, C
L
= 35 pF,
Turn-off time t
OFF
ns
R
L
Full 3 V 170
25C 3.3 V 1 16 30
Break-before-make V
COM
= V
+
, C
L
= 35 pF,
t
BBM
ns
time R
L
Full 3 V 1 35
V
GEN
= 0, C
L
= 1 nF,
Charge injection Q
C
25C 3.3V 97 pC
R
GEN
= 0, See Figure 24
NO V
NO
= V
+
or GND,
C
NO(OFF)
See Figure 18 25C 3.3 V 28 pF
OFF capacitance Switch OFF,
NC, NO C
NC(ON)
, V
NC
or V
NO
= V
+
or GND,
ON capacitance C
NO(ON)
Switch ON,
COM V
COM
= V
+
or GND,
C
COM(ON)
Digital input
C
I
V
I
= V
+
or GND, See Figure 18 25C 3.3 V 3 pF
capacitance
R
L
= 50 ,
Bandwidth BW See Figure 21 25C 3.3 V 54 MHz
Switch ON,
R
L
= 50 ,
OFF isolation O
ISO
See Figure 22 25C 3.3 V 63 dB
f = 1 MHz,
R
L
= 50 ,
Crosstalk X
TALK
f = 1 MHz,
f = 20 Hz to 20
Total harmonic R
L
= 600 ,
THD kHz, 25C 3.3 V 0.004 %
distortion C
L
= 50 pF,
See Figure 25
S upply
Positive supply
I+ V
I
= 1.95 V or GND 25C 3.6 V 10 A
current
T S 5 A 1 2 3 0 1 E
(1 )
V
+
= 2.25 V to 2.75 V, T
A
A
V
+
A nalog S witch
V
COM
,
+
V
V
NO
25C 1.1 1.3
V
NO
or V
NC
= 1.8 V, Switch ON,
on
2.25 V
I
COM
Full 1.6
ON-state resistance V
NO
or V
NC
= 1.8 V, 25C 0.15 0.2
Switch ON,
match between r
on
0.8 V, 2.25 V
See Figure 15
Full 0.2
channels I
COM
= 100 mA,
0 (V
NO
or V
NC
) V
+
, Switch ON,
25C 0.4
I
COM
ON-state resistance
r
on(flat)
2.25 V
V
NO
or V
NC
= 0.8 V, 1 V, 25C 0.25 0.5
flatness
Switch ON,
1.8 V,
See Figure 15
Full 0.6
I
COM
= 100 mA,
V
NO
= 0.5 V, 2.2 V, 25C 20 2 20
V
COM
= 2.2 V, 0.5 V,
V
NC
= Open,
I
NO(OFF)
, I
NC
or 2.75 V nA
(OFF) Full 50 50
NO, NC Switch OFF, V
NC
= 0.5 V, 2.2 V,
OFF leakage current See Figure 16 V
COM
= 2.2 V, 0.5 V,
V
NO
= Open,
25C 10 10
I
NO(PWROFF)
, V
NO
or V
NC
= 0 to 2.75 V,
0 V A
I
NC (PWROFF)
V
COM
= 2.75 V to 0
Full 10 10
V
NO
= 0.5 V, 2.2 V, 25C 20 2 20
V
NC
and V
COM
= Open,
NC, NO Switch ON,
I
NO(ON)
or 2.75 V nA
Full 100 100
V
NC
= 2.2 V, 0.5 V,
V
NO
and V
COM
= Open,
V
COM
= 0.5 V, 25C 20 2 20
V
NO
and V
NC
= Open,
COM Switch ON,
I
COM(ON)
or 2.75 V nA
Full 100 100
V
COM
= 2.2 V,
V
NO
and V
NC
= Open,
25C 10 10
COM V
NO
or V
NC
= 0 to 2.75 V,
I
COM(PWROFF)
See Figure 16 0 V A
COM
= 2.75 V to 0
Full 10 10
Input logic high V
IH
Full 2.75 V 1.05 5.5 V
Input logic low V
IL
Full 2.75 V 0 0.65 V
IH
, I
IL
V
I
= 1.95 V or 0 Full 2.75 V 0.05 0.5 A
Input resistance r
IN
V
I
= 1.95 V Full 2.75 V 6 M
T S 5 A 1 2 3 0 1 E
(1 )
(continued)
V
+
= 2.25 V to 2.75 V, T
A
A
V
+
D ynamic
V
COM
= 25C 2.5 V 97 170
C
L
= 35 pF,
Turn-on time t
ON
V
+
, ns
See Figure 19
Full 2.25 V 175
R
L
= 50 ,
25C 2.5 V 80 155
V
COM
= V
+
, C
L
= 35 pF,
Turn-off time t
OFF
ns
R
L
Full 2.25 V 160
V
COM
= 25C 2.5 V 5 18 35
Break-before-make C
L
= 35 pF,
t
BBM
V
+
, ns
time See Figure 20
Full 2.25 V 5 40
R
L
= 50 ,
V
GEN
= 0, C
L
= 1 nF,
Charge injection Q
C
25C 2.5 V 82 pC
R
GEN
= 0, See Figure 24
NO V
NO
= V
+
or GND,
C
NO(OFF)
OFF capacitance Switch OFF,
NC, NO C
NC(ON)
, V
NC
or V
NO
= V
+
or GND,
ON capacitance C
NO(ON)
Switch ON,
COM V
COM
= V
+
or GND,
C
COM(ON)
Digital input
C
I
V
I
= V
+
or GND, See Figure 18 25C 2.5 V 3 pF
capacitance
R
L
= 50 ,
Bandwidth BW See Figure 21 25C 2.5 V 54 MHz
Switch ON,
R
L
= 50 ,
OFF isolation O
ISO
f = 1 MHz,
R
L
= 50 ,
Crosstalk X
TALK
f = 1 MHz,
f = 20 Hz to 20
Total harmonic R
L
= 600 ,
THD kHz, 25C 2.5 V 0.008 %
distortion C
L
= 50 pF,
See Figure 25
S upply
Positive supply
I+ V
I
= 1.95 V or GND Full 2.75 V 10 A
current
V (V)
COM
r
o
n
(
)
0.0
0.2
0.4
0.6
0.8
1.0
1.2
0.0 1.1 2.3 3.4 4.5
T = 25C
A
T = 85C
A
T = 40C
A
V (V)
COM
r
o
n
(
)
0.0
0.2
0.4
0.6
0.8
1.0
1.2
0.0 1.1 2.3 3.4 4.5
T = 40C
A
T = 25C
A
T = 85C
A
( C)
V (V)
COM
r
o
n
(
)
0.0
0.2
0.4
0.6
0.8
1.0
1.2
0.0 1.1 2.3 3.4 4.5
T = 85C
A
T = 25C
A
T = 40C
A
0.0
1.0
2.0
3.0
4.0
5.0
6.0
0.0 1.0 2.0 3.0 4.0 5.0
V (V)
+
I
(
A
)
+
Control input (IN) low

Control input (IN) high
0.0
1.0
2.0
3.0
4.0
5.0
6.0
0.0 1.0 2.0 3.0 4.0 5.0 6.0
V (V)
IN
V
(
V
)
O
U
T
V = 3 V
+
V = 3.6 V
+
V = 2.75 V
+
V = 4.5 V
+
V = 5.5 V
+
V = 2.25 V
+
T S 5 A 1 2 3 0 1 E
T YP I C A L P E R FO R M A N C E
Figure 2 . r
on
vs V
C O M
(V
+
= 2 .2 5 V ) Figure 3 . r
on
vs V
C O M
(V
+
= 3 V )
Figure 4 . r
on
vs V
C O M
(V
+
= 4 .5 V ) Figure 5 . L eakage C urrent vs T emperature (V
+
= 5 V )
Figure 6. I
+
vs V
+
(T
A
= 2 5 C ) Figure 7 . C ontrol I nput T hresholds
25
45
65
85
105
125
145
165
185
40 20 0 20 40 60 80 100
Temperature ( C)
t
/
t
(
n
s
)
O
N
O
F
F
t (NO)
ON
t (NO)
OFF
t (NC)
OFF t (NC)
ON
V (V)
+
t
/
(
n
s
)
O
N
t
O
F
F
0
20
40
60
80
100
120
140
160
180
200
0 1 2 3 4 5 6
t (NC)
ON
t (NC)
OFF
t (NO)
OFF
t (NO)
ON
14
12
10
8
6
4
2
0
0.1 1 10 100 1000
Frequency (MHz)
G
a
i
n

(
d
B
)
60
50
40
30
20
10
0
10
20
0.0 1.0 2.0 3.0 4.0 5.0 6.0
V (V)
COM
Q
(
p
C
)
C
V = 5 V
+
V = 3 V
+
V = 2.5 V
+
100
90
80
70
60
50
40
30
20
10
0
0.1 1 10 100 1000
Frequency (MHz)
A
t
t
e
n
u
a
t
i
o
n

(
d
B
)
100
90
80
70
60
50
40
30
20
10
0
0.1 1 10 100 1000
Frequency (MHz)
A
t
t
e
n
u
a
t
i
o
n

(
d
B
)
T S 5 A 1 2 3 0 1 E
T YP I C A L P E R FO R M A N C E (continued)
Figure 8 . t
O N
/t
O FF
vs S upply V oltage Figure 9. t
O N
/t
O FF
vs T emperature
Figure 1 0 . C harge I njection (Q
C
) vs V
C O M
Figure 1 1 . G ain vs Frequency
Figure 1 2 . O FF I solation vs Frequency Figure 1 3 . C rosstalk vs Frequency
0
0.001
0.002
0.003
0.004
0.005
0.006
0.007
0.008
0.009
0.01
10 100 1000 10000 100000
Frequency (Hz)
T
H
D

(
%
)
V = 5 V
+
V = 3 V
+
V = 2.5 V
+
T S 5 A 1 2 3 0 1 E
T YP I C A L P E R FO R M A N C E (continued)
Figure 1 4 . T otal H armonic D istortion (T H D ) vs Frequency
V
+
I
COM
r
on
V
COM
V
NO
I
COM
GND
Channel ON
NO
V
I
COM
V
COM
V
I
= V
IH
or V
IL
V
NO
IN
+
+
Channel OFF
OFF-State Leakage Current
V
I
= V
IH
or V
IL
V
+
GND
NO
V
I
COM V
COM
V
NO
IN
+
+
+
Channel ON
ON-State Leakage Current
V
I
= V
IH
or V
IL
V
+
GND
NO
V
I
COM
V
COM
V
NO
IN
+
+
T S 5 A 1 2 3 0 1 E
P A R A M E T E R M E A S U R E M E N T I N FO R M A T I O N
Figure 1 5 . O N - S tate R esistance (r
on
)
Figure 1 6. O FF- S tate L eakage C urrent (I
C O M (O FF)
, I
N C (O FF)
, I
C O M (P W R O FF)
, I
N C (P W R (FF)
)
Figure 1 7 . O N - S tate L eakage C urrent (I
C O M (O N )
, I
N C (O N )
)
V
+
GND
IN
V
BIAS
V
I
V = V or V
I IL IH
V
BIAS
= V+ or GND and
Capacitance is measured at NO,
COM, and IN inputs during ON
and OFF conditions.
Capacitance
Meter
V
NO
COM
NO
COM
C
L
(2)
R
L
V
COM
V
+
GND
NO
IN
V
NO
V
I
COM
Logic
Input
(1)
V
+
V
COM
50
R
L
C
L
35 pF t
ON
TEST
V
+
50 35 pF t
OFF
50%
t
ON
t
OFF
50%
90% 90%
Logic
Input
(V
I
)
V+
Switch
Output
(V
NO
)
0
T S 5 A 1 2 3 0 1 E
P A R A M E T E R M E A S U R E M E N T I N FO R M A T I O N (continued)
Figure 1 8 . C apacitance (C
I
, C
C O M (O FF)
, C
C O M (O N )
, C
N C (O FF)
, C
N C (O N )
)
A. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, Z
O
= 50 , t
r
< 5 ns, t
f
< 5 ns.
B. C
L
includes probe and jig capacitance.
Figure 1 9. T urn- O n (t
O N
) and T urn- O ff T ime (t
O FF
)
V+
GND
NC or NO
V
NC
or V
NO
V
I
NC or NO
COM
V
COM
C
L
(2)
R
L
t
BBM
50%
90% 90%
V
NC
or V
NO
= V+/2
R
L
= 50
C
L
= 35 pF
Logic
Input
(1)
Logic
Input
(V
I
)
Switch
Output
(V
COM
)
V+
0
IN
V
+
GND
NO
IN V
I
COM
50
50
V
NO
V
COM
Channel ON: NO to COM
Network Analyzer Setup
Source Power = 0 dBm
(632-mV P-P at 50- load)
DC Bias = 350 mV
Network Analyzer
Source
Signal
+
V
I
= V
IH
or V
IL
T S 5 A 1 2 3 0 1 E
O
= 50 , t
r
< 5 ns, t
f
< 5 ns.
B. C
L
Figure 2 0 . B reak- B efore- M ake T ime (t
B B M
)
Figure 2 1 . B andwidth (B W )
V
+
GND
NO
IN V
I
COM
50
V
NO
V
COM
Channel OFF: NO to COM
(632-mV P-P at 50- load)
DC Bias = 350 mV
Network Analyzer
Source
Signal
+
V
I
= V
IH
or V
IL
50
50
NC
NO
50 W
50 W
V
NC
V
COM
Channel ON: NC to COM
(632-mV P-P at 50-W load)
DC Bias = 350 mV
50 W
V
+
GND
V
NO
Source
Signal
Channel OFF: NO to COM
Network Analyzer
V
I
+
V
I
= V
+
or GND
IN
T S 5 A 1 2 3 0 1 E
Figure 2 2 . O FF I solation (O
I S O
)
Figure 2 3 . C rosstalk (X
T A L K
)
V
+
GND
NO
IN
R
GEN
V
I
COM V
COM
C
L
(1)
OFF
V
COM
ON OFF
V
COM
V
GEN
+
V
I
= V
IH
or V
IL
C
L
= 1 nF
V
GEN
= 0 to V
+
R
GEN
= 0
Q
C
= C
L
X V
COM
Logic
Input
(2)
V
IH
V
IL
Logic
Input
(V
I)
NO
COM
C
L
(1)
V
+
/2
IN V
I
600
600
Audio Analyzer
Source
Signal
R
L
= 600
C
L
= 50 pF V
SOURCE
= V+ P-P f
SOURCE
= 20 Hz to 20 kHz
Channel ON: COM to NO V
I
= V
IH
or V
IL
-V
+
/2
T S 5 A 1 2 3 0 1 E
O
= 50 , t
r
< 5 ns, t
f
< 5 ns.
B. C
L
Figure 2 4 . C harge I njection (Q
C
)
A. C
L
Figure 2 5 . T otal H armonic D istortion (T H D )
T S 5 A 1 2 3 0 1 E
R E V I S I O N H I S T O R Y
C hanges from R evision A (D ecember 2 0 0 9) to R evision B P age
Added Logic Diagram. .......................................................................................................................................................... 2
PACKAGE OPTION ADDENDUM
www.ti.com 20-May-2013
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing
Pins Package
Qty
Eco Plan
(2)
Lead/Ball Finish MSL Peak Temp
(3)
Op Temp (C) Device Marking
(4/5)
Samples
TS5A12301EYFPR ACTIVE DSBGA YFP 6 3000 Green (RoHS
& no Sb/Br)
SNAGCU Level-1-260C-UNLIM -40 to 85 (3W2 ~ 3W7 ~ 3WN)

(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)

(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type
Package
Drawing
Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
(mm)
Pin1
Quadrant
TS5A12301EYFPR DSBGA YFP 6 3000 178.0 9.2 0.89 1.29 0.62 4.0 8.0 Q1
TS5A12301EYFPR DSBGA YFP 6 3000 180.0 8.4 0.89 1.29 0.62 4.0 8.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 22-Mar-2014
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TS5A12301EYFPR DSBGA YFP 6 3000 220.0 220.0 35.0
TS5A12301EYFPR DSBGA YFP 6 3000 220.0 220.0 34.0
PACKAGE MATERIALS INFORMATION
www.ti.com 22-Mar-2014
Pack Materials-Page 2
D: Max =
E: Max =
1.19 mm, Min =
0.79 mm, Min =
1.13 mm
0.73 mm
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
changes to its semiconductor products and services per J ESD46, latest issue, and to discontinue any product or service per J ESD48, latest
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TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TIs terms
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