Chapters 0 and 1

1st hour: Chapter 0: review

2nd hour: Chapter 1: intro to MCU

Administrative:

textbook:
M. Mazidi, J. Mazidi, and R. McKinlay,
The 8051 Microcontroller and Embedded
Systems Using Assembly and C,
Pearson International Edition, 2006. ISBN:
0-13-197089-5
Number systems

Numbers vs. Numerals

Number = value

Numeral = text representation of number

Base of a numeral

Decimal: Base 10, Binary: Base 2

Octal: Base 8, Hexadecimal: Base 16

Mapping
decimal binary octal hex Roman
0 0000 0 0 ??
1 0001 1 1 I
2 0010 2 2 II
3 0011 3 3 III
4 0100 4 4 IV
5 0101 5 5 V
6 0110 6 6 VI
7 0111 7 7 VII
8 1000 10 8 VIII
9 1001 11 9 IX
10 1010 12 A X
11 1011 13 B XI
12 1100 14 C XII
13 1101 15 D XIII
14 1110 16 E XIV
15 1111 17 F XV
2's complement

to represent negative numbers

"ip all bits and add one"

example: (assume 8-bit words)

1 as binary: 00000001

-1 is binary: 11111110 + 1 => 11111111

Reason: use the same adder for + or -

test: 00000001 + 11111111 = 00000000

(ignore the carry, keep only lower 8 bits)
Character
representation

ASCII (American Standard Code for

Information Interchange)
Dec Char Dec Char Dec Char Dec Char Dec Char Dec Char
33 ! 49 1 65 A 81 Q 97 a 113 q
34 ~ 50 2 66 B 82 R 98 b 114 r
35 # 51 3 67 C 83 S 99 c 115 s
36 $ 52 4 68 D 84 T 100 d 116 t
37 % 53 5 69 E 85 U 101 e 117 u
38 & 54 6 70 F 86 V 102 f 118 v
39 ' 55 7 71 G 87 W 103 g 119 w
40 ( 56 8 72 H 88 X 104 h 120 x
41 ) 57 9 73 I 89 Y 105 i 121 y
42 * 58 : 74 J 90 Z 106 j 122 z
43 + 59 ; 75 K 91 [ 107 k 123 {
44 , 60 < 76 L 92 \ 108 l 124 |
45 - 61 = 77 M 93 ] 109 m 125 }
46 . 62 > 78 N 94 ^ 110 n 126 ~
47 / 63 ? 79 O 95 _ 111 o 127 _
48 0 64 @ 80 P 96 ` 112 p
AND NAND
OR NOR
INVERT buffer
XOR Tristate
Digital Logic
1
2
3
1
2
3
1 2
1
2
3
1
2
3
2
3
1
1 2
1
2
3
2
3
1
1 2
3
Combinational Logic vs.
Sequential Logic

Combinational

no memory ("stateless"); pure function

e.g., AND gate, OR gate, connected w/out

cycle

Sequential

has memory ("stateful")

built by combinational logic with feedback

mux
choose 1
from n
demux
from 1 to
one of n
decoder
binary to
unary
bit-adder
sum and
carry
Examples of
Combinational Logic
A
B
Cin
Sum
Cout

D-latch

remembers a new value every clock edge

D-ipop

remembers new value on clock edge AND

write-enable ("load")
Examples of Sequential
Logic
D
Clk
Q
D
Clk
Q
load
Synchronous vs.
Asynchronous logic

Both are sequential

Synchronous:

happens only with clock event

(rising edge or falling edge)

Asynchronous

not dependent on clock; happens any time

Most of the time, we use synchronous logic

More example of
sequential logic

Counter

each time, add 1

possible to reset

option to load

How to build it

D-register with +1 feedback

D
clk
load
count
Q adder
1
Memory

Conceptually: group of multiple D-ipops

Access to elements

Random access: give address

Sequential access: FIFO, LIFO (stack), ...

R/W

Read-only (can be viewed as combinational)

Read-Write
Register le
busA
<31:0>
Clk
busW
Write
Enable
32
32
busA
5 5
Rw Ra
32 32-bit
Registers
D<31:0>
load
clk
contains 32 registers, 3 shown
D<31:0>
load
clk
D<31:0>
load
clk
Clk
busW
1
:
3
2

d
e
m
u
x Write
Enable
Rw<4:0> Ra<4:0>
3
2
:
1

m
u
x
Q
Q
Q
Example with
32 registers
(5-bit addressable)
Bus

Shared electrical connection

Data, address, control

Internal or external

Serial or parallel

How to share?

Tri-state output

Arbitration policy
(master-slave, peer-to-peer, etc)
1 2
3
to bus
output
enable
ALU: Arithmetic and Logical
Unit
Data inputs (example: 32 bits)
AInput, BInput: operands
Control signal (3 bits for up to 8 operators)
ALUCtl: add, addu, sub, subu, and, or, xor, nor
Data output
Result: 32-bits
N, Z, C, V ags
32
32
ALUctl
ALU
N,Z,C,V
Result
AInput
BInput
32
3
What's inside an ALU?
Giant mux that inputs from Adder,
addu'er, ...
16
<31:0>
ALUctl
N,Z,C,V
Result
AInput
BInput
8
:
1

m
u
x
add
addu
sub
subu
and
or
xor
nor
AddOut
AdduOut
SubOut
SubuOut
AndOut
OrOut
XorOut
NorOut
MuxOut
<35:0>
<35:32>
Detailed connection of each unit
Giant mux that inputs from Adder,
addu'er, ...
17
<31:0>
ALUctl
N,Z,C,V
Result
AInput
BInput
8
:
1

m
u
x
add
addu
sub
subu
and
or
xor
nor
AddOut
AdduOut
SubOut
SubuOut
AndOut
OrOut
XorOut
NorOut
MuxOut
<35:0>
add
AInput
BInput
+
NZCV
AddOut
<35:0>
AddOut
<31:0>
AddOut
<35:32>
<31>
<35:32>
Structure of a CPU

Datapath

ALU

Register le

Control

Instruction decoder

Program counter

Program & Data memories, I/O

Reg
le
ALU
Data memory I/O

Microprocessors vs. MCU

Advantages of MCUs

Embedded systems

Choose a microcontroller

Speed, packaging, memory & cost per unit

Various members of 8051 family

Various manufacturers of 8051

Chapter 1: 8051
CPU vs. MCU vs.
embedded microproc.

Microprocessor, a.k.a. CPU

general purpose, usually w/out memory, I/O

Microcontroller (MCU)

CPU + integrated I/O for embedded apps

usually simpler (no MMU, no Floating Point)

Embedded Microprocessor

usually means higher-end CPU used in

embedded applications
8-bit MCU instruction-
set architectures

Older

6811 (formerly Motorola, now Freescale)

8051 (Intel), Z8 (Zilog), PIC 16 (Microchip)

Newer

ATMega (Atmel)

Hitachi H8

8-bit means registers (native data size) 8 bits

Block diagram of 8051

Intel allows others to make compatible MCUs

Atmel, Philips/Signetics, Siemens, Dallas

Semiconductor

New and improved

Silicon Labs (100MHz! low power, hi-perf)

Free designs available!

integrated RF (e.g., Nordic nRF24E1,

Chipcon CC2430, RadioPulse RG2400...)
Why 8051 is still popular
after 25 years
Feature 8051 8052 8031
ROM (on chip program
space in bytes)
4K 8k 0k
RAM (bytes) 128 256 128
Timers 2 3 2
I/O pins 32 32 32
Serial port 1 1 1
Interrupt sources 6 8 6
8051 Family
Question: how to
program?

Make ROM (cheap if large quantity)

Problem: you cannot change the program!

Make writable ROM

PROM: (P=programmable) write-once

EEPROM: electrically erasable PROM

UV-EPROM: erasable w/ultraviolet(UV) light

Flash: a type of EEPROM

NV-RAM: non-volatile RAM

EEPROM Programmer
and UV-Eraser
Flash memory

NAND-ash

cheaper, page access, erase whole page

before writing

good for data (e.g., digital camera)

NOR-ash

word addressable, more expensive

good for MCU program (rmware)

Limited number of rewrite cycles (10,000)

Package types

DIP (dual-inline package)

used in breadboards

PLCC (plastic leadless chip carrier)

removable from socket

BGA (ball-grid array)

connect on bottom

SMT (surface mount)

small or no leads
socket

Computing needs

Speed, packaging, power consumption,

RAM, ROM, I/O pins, timers, radio, cost

Voltage: TTL, CMOS, NMOS, ...

Software development tools

Assembler, debugger, C compiler, emulator,

technical support

Availability & source

Choosing a
Microcontroller