ANNA UNIVERSITY CHENNAI : : CHENNAI 600 025

AFFILIATED INSTITUTIONS
B.TECH. (8 SEMESTER) INFORMATION TECHNOLOGY
CURRICULUM R 2008
SEMESTER VI
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IT2354 EMBEDDED SYSTEMS L T 5 C
3 0 0 3
UNIT I EMBEDDED COM5UTING 1
Challenges of Embedded Systems Embedded system design process. Embedded processors 8051
Microcontroller, AM processor Architect!re, "nstr!ction sets and programming.
UNIT II MEMORY AND IN5UT 6 OUT5UT MANAGEMENT 1
#rogramming "np!t and $!tp!t Memory system mechanisms Memory and "%$ de&ices and
interfacing "nterr!pts handling.
UNIT III 5ROCESSES AND O5ERATING SYSTEMS 1
M!ltiple tas's and processes Conte(t s)itching Sched!ling policies "nterprocess comm!nication
mechanisms #erformance iss!es.
UNIT IV EMBEDDED SOFT7ARE 1
#rogramming embedded systems in assembly and C Meeting real time constraints M!lti*state
systems and f!nction se+!ences. Embedded soft)are de&elopment tools Em!lators and deb!ggers.
UNIT V EMBEDDED SYSTEM DEVELO5MENT 1
,esign iss!es and techni+!es Case st!dies Complete design of e(ample embedded systems.
TOTAL 8 45 5ERIODS
TE9T BOO:S:
1. -ayne -olf, .Comp!ters as Components/ #rinciples of Embedded Comp!ter System ,esign0,
Else&ier, 1002.
1. Michael 3. #ont, .Embedded C0, #earson Ed!cation , 1004.
REFERENCES:
1. Ste&e 5eath, .Embedded System ,esign0, Else&ier, 1005.
1. M!hammed Ali Ma6idi, 3anice 7illispie Ma6idi and olin ,. Mc8inlay, .9he 8051
Microcontroller and Embedded Systems0, #earson Ed!cation, Second edition, 1004.
LESSON 5LAN
S*$;%"& C'+%6N#-% : "9 1:5; 6 Embedded system N'. '. 5%/!'+) : ;5
F#"*&0 N#-% : #arthiban. S. % Assistant #rofessor 5/#"&!"# : <il
D%p#/&-%,& : "nformation 9echnology T*&'/!# : <il
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TE9T BOO:S
T<: -ayne -olf, .Comp!ters as Components/ #rinciples of Embedded Comp!ter System ,esign0, Else&ier,
1002.
T2: Michael 3. #ont, .Embedded C0, #earson Ed!cation, 1004.
REFERENCE BOO:S/
R<: M!hammed Ali Ma6idi, 3anice 7illispie Ma6idi and olin ,. Mc8inlay, .9he 8051 Microcontroller and
Embedded Systems0, #earson Ed!cation, Second edition, 1004.
R2: Ste&e 5eath, .Embedded System ,esign0, Else&ier, 1005.
ADDITIONAL REFERENCE BOO:
AR<: =Embedded system design0, >ran' &ahid, -iley "ndia Edition.
AR2: .Embedded System0, a? 8amal, 9ata Mcgra) hill, Second Edition.
AR3: .$perating System0, Silbersc)hrat6 Si(th edition.
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Embedded Comp!ting
01.01.101: 1:.01.101: @
CA*"
Model
"" Memory , "np!t%o!tp!t Management 18.01.101: 11.01.101: @
CA*""
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Embedded #rocesses and $perating
System
11.01.101: 12.01.101: @
"= Embedded Soft)are 14.01.101: 11.0:.101: @
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= Embedded System ,e&elopment 1:.0:.101: 14.0:.101: @
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UNIT 5LAN
S*$;%"& C'+%6N#-% : "9 1:5; 6 Embedded system N'. '. 5%/!'+) : ;5
F#"*&0 N#-% : #arthiban. S. % Assistant #rofessor 5/#"&!"# : <il
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UNIT I II III IV V
TITLE EMBEDDED
COM5UTING
MEMORY @
IN5UT6OUT5UT
MANAGEMENT
EMBEDDED
5ROCESSES
AND
O5ERATING
SYSTEM
EMBEDDED
SOFT7ARE
EMBEDDED
SYSTEM
DEVELO5MENT
,!ration
Ain periodsB
@ @ @ @ @
Session 1
Embedded
comp!ting system
)ith e(ample
Characteristic of
embedded
comp!ting
application
Challenges in
embedded system
design
#erformance in
embedded
comp!ting
#rogramming
inp!t and o!tp!t
"nterr!pt dri&en "%$
C!sy*)ait "%$
M!ltitas's and
M!ltiple
processes
9as's and
processes
M!lti rate system
#rogramming
embedded system in
assembly and c
"ntrod!ction
*#rocessor to be
!sed
#rogramming
lang!age
$perating system
,esign iss!e and
techni+!e
"ntrod!ction
Comple( design of
embedded system
Session 1
Embedded system
design process
e+!irements
Specification
Architect!re design
,esigning 5%) and
S%) Component
System integration
C"SC &s.
"SC processor
#rogramming
inp!t and o!tp!t
"np!t and o!tp!t
de&ices
"np!t and o!tp!t
primiti&es
M!ltitas's and
M!ltiple
processes
9iming
re+!irements
on processes
C#D metrics
Meeting real time
constraint
"ntrod!ction
Creating hard)are
delay !sing 9imer 0
and 9imer 1
#rogram generating a
precise predefined
time delay
,esign
methodology
,esign flo)
Session :
8051
microcontroller
>eat!re
Architect!re and bloc'
diagram
Casic
organi6ation
"nterr!pt
handling
"nterr!pt priority
"nterr!pt enabling %
disabling
"nterr!pt &ector
"nterr!pt in AM
M!ltitas's and
processes
#rocesses state
and sched!ling
Sched!ling
policies
!nning periodic
processes
Meeting real time
constraint
Dse of 9imer 1
<eed for time o!t
mechanism
Creating loop time o!t
Case st!dy
"ntr!der alarm
system
Soft)are component
!sed
Soft)are
architect!re
#rogram to r!n
Session ;
8051
microcontroller
"nternal AM
Special f!nction
register
Memory
management !nit
Memory
composition
Memory 5ierarchy
#re empti&e
real time
operating
system
#reempti&e
#riorities
Meeting real time
constraint
#rogram for testing
loop time o!t
#rogram for a more
reliable s)itch
interface
Creating hard)are
time o!t
#rogram for testing a
hard)are time o!t
9elephone
ans)ering
machine
e+!irement%Specifi
cation
#rogram
design%9esting
Session 5 8051 Memory #re empti&e M!lti*state system Ele&ator controller
microcontroller
Memory organi6ation
egister organi6ation
E(ternal
memory interface
management
mechanism
Caches
Memory mapping
techni+!es
real time
operating
system
Conte(t
s)itching
#rocesses and
conte(t
and f!nction
se+!ence
"ntrod!ction
"mplementation m!lti
state AtimedB system
$peration and
re+!irement%Specifi
cation
System architect!re%
component design
System integration
Session 2
8051
microcontroller
Serial port * "%$ #ort
circ!it
9imer %co!nter
Memory
management
mechanism
-rite policy and
replacement
policy in cache
#aging
Segmentation
>ragmentation
Memory scheme in
AM
#riority based
sched!ling
ate monotonic
sched!ling
Earliest deadline
first sched!ling
M &s. E,>
M!lti state
systemAtimedB
9raffic light se+!ence*
Animatronics
dinosa!r
,ata compressor
$peration and
re+!irement%
Specification
System
architect!re%compo
nent design
System integration
Session 4
8051
microcontroller
"nterr!pt *
Addressing modes
Memory types
AM, SAM,
,AM, $M,
>EAS5 memory
E(ample
#roblems
based on MS
and E,>
algorithm
M!lti*state system
and f!nction
se+!ence
"mplementation m!lti
state A"%#, timed B
system
Controller for )ashing
machine
A!tomatic
Chocolate
&ending machine
$peration and
re+!irement%
Specification
System
architect!re%compo
nent design
System integration
Session 8
8051
microcontroller
"nstr!ction set
Simple programs
"%$ de&ices
8eyboards*EE,,
,isplay
9o!ch screen*
9imers and
co!nters
A,C*,AC
"nter process
comm!nication
Shared memory
comm!nication
Message passing
Signals
Embedded soft)are
de&elopment
,e&elopment
en&ironment
,eb!gging techni+!es
and challenges
Model train
controller
$peration and
re+!irement%
Specification
System
architect!re%compo
nent design
System integration
Session @
AM processor
Architect!re
#rocessor and memory
organi6ation
,ata operation F
>lo) of control
"nstr!ction set
Simple programs
Component
interfacing
"%$ de&ice
interfacing
E(ternal memory
interfacing
E&al!ating
operating
system
performance
#o)er
management
and
optimi6ation
for process
Embedded soft)are
de&elopment and
deb!gging
Em!lator
emote deb!gger
Alarm cloc'
$peration and
re+!irement%
Specification
System
architect!re%compo
nent design and
testing
System integration
Smart card
e+!irement
%specification
Architect!re design %
testing
System integration
S&#.. I,A"(#/B% HOD 6 ECE 5/!,"!p#