PARICHAIY CHOPRA

parichaiyiitg@gmail.com



EDUCATION

Indian Institute of Technology, Guwahati July 2009-Apr2013
B.Tech in Electronics and Communication Engineering GPA: 7.67/10

Selected Coursework:
- Parallel Computing Architecture - Embedded Systems - Communication Networks
- OOP and Data Structures - Introduction to computing - Introduction to VLSI design


EXPERIENCE

Qualcomm - Software Engineer. Hyderabad, India June 2013 Present
In-charge for the buses driver UART
Muxing of interrupt lines for multiple UART
Earlier there was a requirement of 1 interrupt line per UART device. Implemented the
muxing of multiple UART devices on a single interrupt line.
One way communication on UART:
UART was a 2-way asynchronous communication protocol. Provided a feature enabling one-
way communication.
Ported UART driver to various Snapdragon chipsets (8974Pro/8x26/8936/8909/9x35/9x45).


RESEARCH AND TERM PROJECTS

Energy Efficient and Energy Balancing Cooperative Routing Algorithm
Bachelor Thesis Project Jan 2013-April 2013
Supervisor: Prof. Ratnajit Bhattacharjee
Formulated an algorithm characteristics of both energy efficiency (MPCR) as well as energy
balancing (FA Routing) to increase network lifetime of a wireless ad hoc network.

Policy Sensitivity of Delay Performance in a Cloud based Video Delivery Network
Research Assistant - Cloud Service Policy Research Center, Hanyang University, South Korea
Supervisor: Prof. Suk-Gwon Chang May 2012-July 2012
Formulated and solved an optimization policy to reduce the traffic burden in a cloud-based
video distribution network.
Analyzed effects of variations in distribution, popularity and prediction accuracy of content
on expected delay.






Voice transmitter Bug
Hardware Project Jan 2012 Apr 2012
Supervisor: Dr. Kannan Karthik
Initially designed a FM jammer. Upgraded it to a Voice Transmitter Bug by modifying the LC
tank circuit

Automatic Braking System in Trains
Term Project Sept 2011- Dec 2011
Supervisor: Dr. Dipankar Deb
Implemented the research paper "Fuzzy logic based automatic braking system in trains" by
Sankar and Kumar on MATLAB.
Redesigned the fuzzy logic controller and fuzzy functions to achieve a smooth decreasing
curve for speed, to overcome the abrupt changes in speed achieved by authors.


POSITION OF RESPONSIBILITY

Junior Year Department Representative
Acted as a mediator between faculty and the students in departmental related matters.
Leader of our team that reached regional finals in an international business competition,
CIMA Global Business Challenge.
Main organizer of manual robotic event Techniche-Technical Festival of IITG(2010).


ACADEMIC ACHIEVEMENTS

67th rank in National Science Olympiad (2003)
29th rank in Regional Mathematical Olympiads Delhi (2003).


SPORTS ACHIEVEMENTS

Silver Medalist in Mens 4x100 Relay Swimming at inter hostel sports meet, IIT Guwahati.
Ranked 160 among 9000 runners in Hyderabad Half Marathon 2014.