Universidad de Hunuco

Facultad de Ingeniera de Sistemas e Informtica

Page 1

Agenda

Base del Conocimiento

Diagramas de Bode
Diseo de Filtros Analgicos
Diseo de un Electrocardiograma
Microcontrolador PIC con Labview

Motor de Inferencia
Tcnicas de Diagnstico de un ECG

Medios de Comunicacin
Prototipo de un ECG
Page 2

Acerca del ECG-UDH

Page 3

Modelando un PIC
Procesador

Oscilador

Memoria

PIC
GLCD

Temporizador

USB

ADC

Page 4

Modelando un PIC

Embedded Computer
Software

Output
Drive

Data
Conversion

Input
Variables

Signal
Conditioning

(User Interface)
(display, keypad etc.)

Output
Variables

Hardware

(Link to other Systems)

Page 5

Microcontrolador PIC
Como sabemos los micro
controladores de 8 bits de
Microchip se dividen en 3
gamas:

PIC10 y PIC12: Gama baja

PIC16: Gama media
PIC18: Gama alta

Page 6

Estructura Interna de un PIC

Page 7

Estructura Externa de un PIC

Page 8

Organizacin de las Memorias de un PIC

Address

Data
Memory
Data

Central
Processing
Unit (CPU)

Address

Input/
Output
Data

Program
Memory

Central
Processing
Unit (CPU)

Data
Memory

Address

Input/
Output
Data
Address

Program
Memory
Data

a) Enfoque de Von Neumann

b) Enfoque de Harvard

Page 9

Arquitectura RISC-PIC
Power

Reset
Interrupt(s)

Program
Memory

Further
Peripheral

Data
Memory

Further
Peripheral

Microprocessor
Core
Internal Data &
Address Buses

Clock

Digital
I/0
Analog
I/0
Counters
& Timers

A CISC machine is generally

recognised by:
Many instructions (say over one
hundred), some with considerable
sophistication;
Instruction words are of different
length;
Instructions take different
lengths of time to execute.

A RISC machine is generally

recognised by:
Few instructions (say well below
one hundred),
Each performs a very simple
action;
All instructions are single word;
All, or almost all instructions
take the same length of time to
execute.

A microcontroller = microprocessor core + memory + peripherals

Page 10

Diagrama de Bloques del PIC

Address for Program Memory
Program Memory

Data from
Program
Memory,
carrying
instruction
word

It is easy to see the

Program memory, which
uses Flash memory
technology. Alongside this
comes the Stack, which
we meet later. Microchip
call the main data
memory File Registers.
There is another section
of data memory which
uses EEPROM
technology.

Data
Memory

Extra nonvolatile Data

Memory

Address for
Data Memory
Data bus for
Data Memory
and
peripherals
Counter/Timer
Peripheral

Digital Input/
Output Ports

The CPU

Page 11

Registro de Estado de un PIC

Condition
Code Flags

Page 12

Memoria de Programa y Stack

Program
Counter
16 Series
instructions which
invoke the Stack

The Interrupt
Service Routine
must start here

The program
must start here

Program Counter
points to locations
in program memory

Unimplemented memory
space, still addressable
by the 13-bit 16F84A
program address bus.

Page 13

Mapa de Memoria de Datos y (SFR)

Registro de Funciones Especiales

These are the Special Function

Registers, which allow the CPU to
interact with the peripherals

msb is bank select bit

(Status register).

General purpose memory

Page 14

Interface con Perifricos va el

Registro de Funciones Especiales

Control SFR(s)
Microcontroller
Core

Peripheral

"Outside
World"

Data Transfer SFR(s)

Interrupt(s)
Microcontroller Interaction with its Peripherals, via Special Function Register (SFR) and Interrupt
microcontroller peripherals can be configured in software to operate in a number of different modes,
to do this certain control data must be sent to them to set them up in the desired way
once in use, there will be data flow between core and peripheral,
there may still be need for further control data,
these needs are commonly met by means of dedicated, memory - mapped registers, sometimes
called Special Function Registers,
this approach gives the microcontroller manufacturer great flexibility to extend a microcontroller
family SFRs for new peripherals can easily be located in gaps in the memory map.

Page 15

Configuraciones Globales del PIC

The 16F84A
Configuration
Word

The configuration word determines certain operating features

of the microcontroller. It is in program memory, but cannot be
accessed in normal operation. It is written to during the
programming process. You set its value either by response to
a dialogue box in MPLAB, or by use of Assembler
Directives, at the head of your programme.

Page 16

Tipos de Memorias de un PIC

Page 17

Caractersticas de los Osciladores

Oscilador Primario

Frecuencias de Oscilacin Altas (XT, HS)

Oscilador Secundario

Frecuencias de Oscilacin Medias (LP)

Oscilador Interno

Frecuencias de Oscilacin Bajas (RC)

Con Pre Escala

Con PLL

Divide Frecuencia de Oscilacin

Multiplica Frecuencia
de Oscilacin

Sin Pre Escala

Sin PLL

Con Pre Escala

Divide Frecuencia de Oscilacin

Sin Pre Escala

Page 18

Modos del Oscilador

The 16F84A can be configured to operate in four different oscillator modes, using R-C,
crystal or ceramic oscillators. It can also accept an external clock source. The user selects
which mode is to be used by setting bits in the Configuration Word.
XT Crystal
The standard crystal configuration, intended for crystals or ceramics in the range 1MHz to
4MHz.
HS High Speed
A higher drive version of the XT configuration, for higher frequency crystals and ceramic
resonators. Intended for frequencies in the region of 4MHz or greater. It leads to the highest
current consumption of all the oscillator modes.

LP Low Power
Intended for low frequency crystal applications, and gives the lowest power consumption
possible. Will however operate at any frequency below around 200kHz.
RC - Resistor-Capacitor
Requires connection of an external resistor and capacitor. The lowest cost way of getting an
oscillator, but should not be used when any timing accuracy is required.

Page 19

Modos del Oscilador

Port A, Bit 2
RA2
Port A, Bit 3
RA3
*Port A, Bit 4 RA4/T0CKI
Reset
MCLR
Ground
VSS
**Port B, Bit 0 RB0/INT
Port B, Bit 1
RB1
Port B, Bit 2
RB2
Port B, Bit 3
RB3

18

10

RA1
Port A, Bit 1
RA0
Port A, Bit 0
OS C1/CLKIN Oscillator connections
OS C2/CLKOUT
VDD
Supply voltage
RB7
Port B, Bit 7
RB6
Port B, Bit 6
RB5
Port B, Bit 5
RB4
Port B, Bit 4

*also Counter/Timer clock input

**also external Interrupt input

The Oscillator Pins

b) Resistor-Capacitor

a) Crystal or Ceramic, HS, XT, or LP

c) Externally Supplied Clock

Page 20

Diagramas de un Oscilador Primario

Page 21

Acerca del Conversor Analgico a Digital

ADC del PIC

Page 22

Acerca del ADC del PIC

Page 23

Agenda

Base del Conocimiento

Diagramas de Bode
Diseo de Filtros Analgicos
Diseo de un Electrocardiograma
Microcontrolador PIC con Labview

ADC

Motor de Inferencia
Tcnicas de Diagnstico de un ECG

Medios de Comunicacin
Prototipo de un ECG
Page 24

Acerca del ECG-UDH

Page 25

Caractersticas ADC del DSPIC

Conversin va aproximacin sucesiva SAR.

Velocidad de conversin de hasta 500 ksps.
Hasta 16 pines de entrada analgica.
Pines de referencia de Voltaje Externo.
Modo Automtico de Escaneo de Canal .
Fuente seleccionable de activacin de conversin.
Buffer de resultado de conversin de 16 word
Modos seleccionables de llenado de Buffers.
Cuatro opciones de alineamiento de resultado.
Modos de operacin durante el estado Sleep e Idle.

Page 26

Acerca del ADC del PIC

Page 27

Flujo grama de operacin del ADC

Page 28

Estructura Mdulo A/D del PIC24F

AVSS
VREF+

VR
Select

AVDD
VR+
VR-

Conversion
Control

VREFAN0
CH0

AN1

8/16 Level
Results
Buffer

Data
Format

Bus Interface

S/H

A/D
converter

AN15

Sample
Sequence
Page
Control

29

Eje y: Tiempo de Conversin A/D = Tiempo

de Adquisicin ms Conversin

Entrada
Analgica
TAD
Clock A/D
Inicio del
Tiempo de
Adquisicin

Fin de
Conversin

Tiempo de
Adquisicin

Tiempo de
Conversin

Tiempo de Conversin A/D

Page 30

Registro de Control ADC

Page 31

Eje x: Tiempo de Muestreo

AD1CON3<ADCS7:ADCS0>

FCY = FOSC/2

AD Clock
Postscaler by
1 to 256
TCY to 256*TCY 0

TAD

RCAD 1
AD1CON3<ADRC>

Page 32

Proceso de Operacin del ADC

Page 33

Configuracin del Clock del ADC

Page 34

Aspectos de Precisin Digital

Page 35

Diagrama de Bloques del ADC 10bits

AD1CON2<VCFG2:VCFG0>

VR Select

AVDD
AVSS

VREF+

VR+

VR-

VCFG2:VCFG0

VR+

VR-

000

AVDD

AVSS

001

VREF+

AVSS

010

AVDD

VREF-

011

VREF+

VREF-

1xx

AVDD

AVSS

VREF-

AD1CON2 Register
bit8

bit15

CSSL15=0
VCFG1 CSSL13=0
VCFG0
VCFG2 CSSL14=0

---

---

CSNA

---

bit7

BUFS

---

SMPI3

SMPI2

SMPI1

SMPI 0

BUFM

--bit0
Page
36

ALTS

Diagrama de Bloques del ADC 10bits

AN0
AN1

Mux A

AD1CHS<CH0SA3:CH0SA0>

(1) AN1

VINH
VINL

(0) VRAD1CHS<CH0NA>

AN15

bit15

AD1CON2 Register

bit8

VCFG2

CSSL14=0
VCFG1 CSSL13=0
VCFG0

---

---

CSNA

bit7

---

--bit0

BUFS

---

SMPI3

SMPI2

SMPI1

SMPI 0

BUFM

bit15

AD1CSSL Register

bit0

CSSL15

CSSL14=0
CSSL14 CSSL13=0
CSSL13

CSSL2

CSSL1

CH0NB

---

---

---

CH0SB3

CH0SB2

CH0SB1

CH0SB0
bit0

bit7

CH0NA

CSSL0
bit8

bit15

AD1CHS Register

ALTS

---

---

---

CH0SA3

CH0SA2

CH0SA1

CH0SA0

PCFG1

bit0
Page
37
CSSL8=0
PCFG0

bit15

AD1PCFG Register PCFG15 CSSL14=0

PCFG14 CSSL13=0
PCFG13 CSSL10=0
PCFG2

Escaneo de Canales del ADC

AN15
AN14
AN13
.

+B
-B

AN5
AN4
AN3
AN2
AN1
AN0

ADCBUF Buffer
ADCBUF0
AN0
AN2
INT
AN13
AN14

+
CH 0
-

+A
-A
AN1
VREF-

bit15

AD1CSSL Register

bit0

CSSL15

CSSL14=0
CSSL14 CSSL13=0
CSSL13

CSSL2

CSSL1

CSSL0

bit15

AD1CON2 Register

VCFG2

bit8

CSSL14=0
VCFG1 CSSL13=0
VCFG0

---

---

CSNA

--bit0

bit7

BUFS

---

---

SMPI3

SMPI2

SMPI1

SMPI 0

BUFM

ALTS
Page
38

Mux A

Diagrama de Bloques del ADC 10 bits

VINH

Mux B

S/H
VINL

AD1CON1<ASAM>
1
Seal de
Conversion
completa

0
AD1CON1<SAMP>

bit8

bit15

AD1CON2 Register

VCFG2

VCFG1

CSSL13=0
VCFG0

---

---

CSNA

---

BUFS

--bit0

bit7

---

SMPI3

SMPI2

SMPI1

SMPI 0

BUFM

ALTS

Page 39

Diagrama de Bloques del ADC 10 bits

AD1CON3<SAMC4:SAMC0> (7)
Timer4 Compare ends
(2)
Active Transition on INT0 pin (1)
Clearing AD1CON1<SAMP> (0)

AD1CON1
<SSRC2:SSRC0>

VINH

VINL

0 TAD to 31 TAD
Evitar 0 TAD

VR- VR+
S/
H

AD1CON1<ASAM>

VR-

VR+

A/D
converter

Conversion
complete Signal

AD1CON1<SAMP>
AD1CON1<DONE>

RESULT

ADC1BUF0
:
ADC1BUF15

Page 40

Diagrama de Bloques del ADC 10 bits

RESULT
FORMAT

0000 00dd dddd dddd

ssss sssd dddd dddd
dddd dddd dd00 0000
sddd dddd dd00 0000
AD1CON2<SMPI3:SMPI0>
AD1CON1<FORM1:FORM0>

ADC1BUF0
:
:
:
:
:
:
ADC1BUF15
AD1CON2<BUFM> = 0

ADC1BUF0
:
:
ADC1BUF7

0
AD1CON2<BUFS>

ADC1BUF8
:
:
ADC1BUF15
AD1CON2<BUFM> = 1

Page 41

Ejercicio N1:
Digitalizar la Seal Analgica ECG

Tareas a realizar:
Programar el PIC con MPLAB en C18.
Realizar la conversin digital de una seal
analgica en Proteus con PIC usando
Potencimetro.

Resultado esperado:
Digitalizacin de una seal analgica y su
visualizacin usando LCD.

Page 42

Objetivos del Laboratorio

Configurar el ADC
Configurar los puertos de E/S
Leer el ADC y mostrarlos en LEDs
PIC24

VDD
POT R6

AN5

Vss
RA7-RA0

LEDs D10-D3
Page 43

Pasos a Realizar

Open the project

C:\RTC\203_PRC\Lab5\Lab5.mcp
Open the file
C:\RTC\203_PRC\Lab5\Lab5.c
Look for ADCInit() function and configure ADC by initializing the registers
AD1CON1, AD1CON2, and AD1CON3 looking into the Register details on the
next few pages.
STEP 1: AD1CON1
Select Integer Format Result
Auto Conversion Start
Sample after conversion

STEP 2: AD1CON2

Select AVDD and AVSS as references

Disable Scan mode
Interrupt at 16th sample/Convert sequence
16*1 level buffer
Always use Mux A

STEP 3: AD1CON3
Select Sample Time = 13TAD
Conversion Time is always 12TAD
Select AD Clock Source such that you get 16 samples in around 1 mSec (16
ksps)
Assume 1TCY =.25 uS (FCY = 4 MHz)

Page 44

Pasos a Realizar

Continue to configure ADC by initializing the registers AD1CHS,

AD1PCFG, and AD1CSSL looking into the Register details on the
next few pages.
STEP 4: AD1CHS
Set the positive sample input channel for MUX A to use AN5
Set the negative input channel for MUX A to use VR-

STEP 5: AD1PCFG
Set AD1PCFG so that the only pin using analog functionality is AN5

STEP 6: AD1CSSL
Channel scanning is not enabled, so no input channels should be
selected for scanning

Build the project and program the device

Procedure to Test
Vary the POT and observe LEDs

Page 45

Configurando el Registro ADC

AD1CON1: A/D CONTROL REGISTER 1
Bit:15
ADON

Bit:8
--

ADC Module
enable bit

ADSIL

--

ADC Module
enable/disable
in IDLE mode

--

--

FORM1

FORM0

Result Format
00: Intiger (0000 00dd dddd dddd)
01: Signed Intiger (ssss sssd dddd dddd)
10: Fractional (dddd dddd dd00 0000)
11: Signed Fractional (sddd dddd dd00 0000)

Bit:7

SSRC2

Bit:0

SSRC1

SSRC0

--

--

ASAM

Conversion Trigger Source Selection Bits

000: Manual Conversion Trigger
001: Active transition on INT0 pin triggers conversion
010: Timer3 compare triggers conversion
111: Auto conversion

SAMP

DONE

Start Sampling,
If ASAM is 0
Conversion
Status bit

Auto Sample Selection bit

1: Sample immediately after completion of last conversion.
0: Sample on setting of SAMP

Page 46

Configurando el Registro AD1CON2

Bit:15

Bit:8

VCFG2

VCFG2

VCFG0

--

--

CSCNA

--

--

Scan CH0 Mux A Input

VR+

VR-

000

AVDD

AVSS

001

VREF+

AVSS

010

AVDD

VREF-

011

VREF+

VREF-

1xx

AVDD

AVSS

VCFG2:VCFG0

AVDD
VREF+

VR
Select

VCFG2:VCFG0

AVSS

Bit:0
--

SMPI3

SMPI3:SMPI0

Buffer Status bit, is valid only

when BUFM = 1
1: Buffer 8-F is being filled,
can access Buffer 0-7
0: Buffer 0-7 is being filled,
can access Buffer 8-F

VR-

VREF-

Bit:7
BUFS

VR+

SMPI2

SMPI1

SMPI0

Interrupt Event
(Sample/convert sequence)

0000

each

0001

alternate

....

1110

Every 15th

1111

Every 16th

BUFM

ALTS

Sample alternatively
MUX-A & MUX-B
Buffer Mode Select bit
1: Buffer configured as two 8-words buffers
0: Buffer configured as one 16-words
buffers
Page 47

Configurando el Registro AD1CON3

Bit:15
ADRC

Bit:8
--

--

SAMC4

SAMC3

SAMC2

SAMC1

SAMC0

A/D Sample Time Selection bits

A/D conversion Clock
Source

SAMC4:SAMC0

Sampling Time

00000

0 TAD

00001

1 TAD

....

11110

30 TAD

11111

31 TAD

1: ADRC is used
0: System clock is used

Bit:7
ADCS7

Bit:0
ADCS6

ADCS5

ADCS4

ADCS3

ADCS2

ADCS1

ADCS0

A/D Conversion Clock Selection bits

ADCS7:ADCS0

Conversion Clock

00000000

TCY ( FCY )

00000001

2*TCY ( FCY / 2 )

....

11111110

255*TCY ( FCY / 255 )

11111111

256*TCY ( FCY / 256 )

ADCS = (TAD/TCY) - 1

Page 48

Configurando el Registro AD1CHS

Bit:15

Bit:8

CH0NB

--

--

--

CH0SB3

CH0 Negative input for

MUX B
1: AN1
0: VR-

CH0SB2

CH0SB1

CH0SB0

CH0SB3:CH0SB0

CH0 Positive Input for MUX B

0000

AN0

0001

AN1

....

1110

AN14

1111

AN15

Bit:7

Bit:0

CH0NA

--

--

--

CH0SA3

CH0 Negative input for

MUX A
CH0SB3:CH0SB0
1: AN1
0: VR- AN15
CH0NB

ANxx
AN0

+B
AN1

-B

VREF-

CH 0

AN15
+
A
-A

ANxx
AN0

CH0SA2

CH0SA1

CH0SA0

CH0SA3:CH0SA0

CH0 Positive Input for MUX A

0000

AN0

0001

AN1

....

1110

AN14

1111

AN15

AN1
VREF-

CH0SA3:CH0SA0

CH0NA

Page 49

Configurando el AD1PCFG: Registro de

Configuracin de Puertos
Bit:15
PCFG15

Bit:8
PCFG14

PCFG13

PCFG12

PCFG10

PCFG11

PCFG9

PCFG8

Bit:7
PCFG7

Bit:0
PCFG6

PCFG5

PCFG4

PCFG2

PCFG3

PCFG1

PCFG0

Analog Input Pin Configuration Control bits 0 to 15

1: Pin for corresponding analog channel (ANxx) is in digital mode
0: Pin for corresponding analog channel (ANxx) is in analog mode

AD1CSSL : A/D Input Scan Select Regsiter

Bit:15
CSSL15

Bit:8
CSSL14

CSSL13

CSSL12

CSSL11

CSSL10

CSSL9

CSSL8

Bit:7
CSSL7

Bit:0
CSSL6

CSSL5

CSSL4

CSSL3

CSSL2

CSSL1

CSSL0

A/D Input Channel Scan Selection bits 0 to 15

1: Corresponding analog channel (ANxx) is selected for sequential
scanning
0: Corresponding analog channel (ANxx) is ignored for sequential
scanning

Page 50

Resultado Esperado

El valor del POT es promediado cada 16

muestras en 1 ms.
El valor del POT es mostrado en los LEDs
como un valor binario desde 0 hasta 255
El Pin RB2 cambia de valor cada 16
muestras (con una frecuencia de 500 Hz)

Page 51

Agenda

Base del Conocimiento

Diagramas de Bode
Diseo de Filtros Analgicos
Diseo de un Electrocardiograma
Microcontrolador PIC con Labview

USB

Motor de Inferencia
Tcnicas de Diagnstico de un ECG

Medios de Comunicacin
Prototipo de un ECG
Page 52

Acerca del ECG-UDH

Page 53

Interfaces USB

USB
Creado por Intel en el ao 1994, versin 1.0.
En el ao 1998 se lanza la versin 1.1 con una velocidad de
transferencia baja de 1.5 Mbps y a full capacidad de 12 Mbps.
En el ao 2000, se lanza la versin 2.0 de alta capacidad con 480 Mbps.

Page 54

USB: Bus Serial Universal

Extend the functionality of

your computer!
Tipos de
Aplicacin

Data Analysis,
Data Logging,
Firmware Updates,
Diagnostics,
Embedded Applications!

Auto dteccin & configuraion (Plug&Play)

Energa en el Bus

RS232
Paralelo
PS/2

3 velocidades:
Low- 1.5 Mbps, Full- 12 Mbps,
High- 480 Megabits/second
Page 55

Caractersticas del USB

4-wire
connection

Differential
Signaling

VBUS

VBUS

D+

D+

D-

D-

GND

GND

~ 5.0 V
~ 3.3 V

NRZI Data Encoding

Half duplex data transmission can go in only one direction at a time

Bus Power to each device:

4.40 - 5.25 V
Guaranteed 100 mA
500 mA maximum through negotiation
Page 56

Caractersticas del USB

A Plug
USB Host

B Plug
FS, HS Peripheral

mini-B Plug
FS, HS Peripheral

Page 57

Caractersticas del USB

Guaranteed Latency

Guaranteed Data
Integrity

Interrupt
Bulk

Isochronous

PIC18F4550 family supports all these transfer types.

Page 58

USB Pipes

Small Pipe to each USB

device (up to 127)

HOST PC

Tiny Pipes (endpoints)

Big USB Pipe

12Mb/s

Page 59

Client Software <-> Function

Client
Software

Host

Buffers

Data Flows
Pipes

USB Device

Endpoints
Interface
Page 60

El Dispositivo Lgico

Device
(Manufacturer: Microchip Technology)
(Product: Mouse in a Circle Demo)

Configuration

Interface

USB Device-Specific Pipe(s)

(Human Interface Device)

IN (Endpoint x)

Analog/Digital I/O

HID TX/RX Functions

(MCHPFSUSB FW)

OUT (Endpoint x)

USB System Software

(default control pipes)

IN (Endpoint 0)

OUT (Endpoint 0)

These settings are

represented by a
Device Descriptor
Table, stored in
firmware.
Page 61

Trama USB

Slot
Trame = 1ms
Stereo Audio

BULK

Stereo Audio

BULK

Stereo Audio

BULK

Stereo Audio

BULK

Stereo Audio

BULK

Stereo Audio

BULK

Stereo Audio

BULK

Stereo Audio

BULK
Scanner

Stereo Audio

Interrupt,
Control,
Low
Speed

Rx Line

Tx Line

Rx Voice

Tx Voice

SOF

Stereo Audio

Low Speed
Low Speed

BULK
BULK

Page 62

Perifricos USB

UPS

Data
Logger

MIDI

Generic

Mouse
SD Card
Reader
Digitizer

Speaker
RS-232

Audio
Class

Mass Storage
Device Class (MSD)

Joystick
Keyboar
d
Human Interface Device
Class (HID)

Communication
Device Class (CDC)

WinUSB

LibUSB
MCHP

Custom Class
63
Page 63
(Vendor Class)

El Proceso de Enumeracin

Power
(self/bus)

POWERED
Bus
reset

ATTACHED

DEFAULT

Cable
Connected

Get Device
Descriptor
SUSPENDED

DETACHED

ADDRESS
Get
Descriptors
CONFIGURED

Page 64

Auto Deteccin: Full Velocidad

Peripheral Device

VUSB 3.3 V

USB PIC MCU

Full Speed Identification

D+ line pull-up

1.5 k5%
+5V
D+

Transceiver

DGND

USB
Connector

Page 65

Auto Deteccin: Baja Velocidad

Peripheral Device

VUSB 3.3 V

USB PIC MCU

Low Speed Identification

D- line pull-up

1.5 k5%
+5V
D+

Transceiver

DGND

USB
Connector

Page 66

On-chip Pull-up Resistors

Peripheral Device

USB PIC MCU

VUSB 3.3 V
On-chip pull-up resistors
available!
+5V

D+
Transceiver

DGND

USB
Connector

Page 67

Address and Configuration: EP0

See Chapter 9 in USB 2.0 Spec for more info.

USB PIC MCU

Dual Port/Access RAM

Endpoint 0 OUT
(Control Data)

Control Transfers
Endpoint 0 IN
(Control Data)

Descriptors

Other Endpoints

Page 68

Descriptores

Device

String 0
String 1

To other Configurations if any

String N

Configuration 1

To other Interfaces
if any
Interface 0

Endpoint

Endpoint

Interface 1

Endpoint

Endpoint

Descriptors are typically stored in non-volatile/Flash memory

Page 69

Ejemplo de Descriptores

Manu. String

Device

USB 2.0, VID = 0x04D8,

PID = 0x0007, Num. Configurations,
Strings?

Configuration 1

Configuration #1: Bus-Powered,

Remote Wakeup, 500mA, Num.
Interfaces

Interface 0

Interface #0: HID Class, Num. Endpoints

Endpoint

Endpoint 1 IN, Interrupt Transfer Type,

64-byte buffer, Poll every 3 ms

Microchip
Prod. String

PICDEM USB
Other String

Go USB!

Unicode
Characters

Page 70

MCHPFSUSB Software Framework

- Device Descriptor Table -

usb_descriptors.c
Descriptors

VID & PID

Class Specific

/* Device Descriptor */
ROM USB_DEVICE_DESCRIPTOR device_dsc=
{
0x12,
// Size of this descriptor in bytes
USB_DESCRIPTOR_DEVICE, // DEVICE descriptor type
0x0200,
// USB Spec Release Number
CDC_DEVICE,
// Class Code
0x00,
// Subclass code
0x00,
// Protocol code
EP0_BUFF_SIZE,
// Max packet size for EP0,
0x04D8,
// Microchip Vendor ID
0x000C,
// Product ID ID

Page 71

CDC RS-232 Emulation

PIC Microcontroller

PC Computer

CDC

Standard Windows Drivers

Hyper Terminal

USB Cable

INF File Required

(Supplied in MCHPSUSB)

Design Considerations:
~80 KB/s max
Bulk Transfers
PC applications can access the device as though it
is connected to a serial COM port
Page 72

MCHPFSUSB Framework
- Polled Program Flow -

main()

Reset

InitializeSystem()

You edit UserInit()

while(1)

Cooperative
Multitasking!!
USBDeviceTasks()

USB Stack

ProcessIO()

Your application
code

Function
Services

CDCTxService()
MSDTasks()
Re-arm OUT Endpoint
(HID & Generic)
Page 73

No blocking
functions.
Use state
machine.

MCHPFSUSB Framework
- Interrupt Program Flow -

Reset

main()

InitializeSystem()

USBDeviceAttach()

USB Interrupt
Context

You edit
UserInit()

Notifies the stack

when the device is
attached

while(1)

USBDeviceTasks()
ProcessIO()

Function
Services

Your application
code

CDCTxService()
MSDTasks()
Re-arm OUT Endpoint
(HID & Generic)
Page 74

Cdigo de Ejemplo
Main.c
#include
#include
#include
#include

Compiler.h
USB\usb.h
USB\usb_function_cdc.h
HardwareProfile.h

Needed (usb_config.h is called by usb.h)

void UserInit(void){

Put your initialization code here

}
void ProcessIO(void){
if((USBDeviceState < CONFIGURED_STATE)||(USBSuspendControl==1)) return;

Put your application code (state machine) here

CDCTxService();
}
static void InitializeSystem(void){
#if define
#endif
UserInit();
USBDeviceInit();
}
int main(void){
InitializeSystem();
USBDeviceAttach();
while(1){
ProcessIO();
}
}

Conditional compiling
(no need to change)

No need to change

USBDeviceTasks()
is executed in an ISR
(High Priority PIC18,
_USB1Interrupt()
PIC24 & PIC32)

Page 75

Agenda

Base del Conocimiento

Diagramas de Bode
Diseo de Filtros Analgicos
Diseo de un Electrocardiograma
Microcontrolador PIC con Labview

GLCD

Motor de Inferencia
Tcnicas de Diagnstico de un ECG

Medios de Comunicacin
Prototipo de un ECG
Page 76

Acerca del ECG-UDH

Page 77

Pantallas Grficas LCD (GLCD)

A
B

R25

R3

10k

10k

V-

R23

LCD2

U8

AMPIRE128X64

4
8

4
8

20k

R14

R24

V-

U1
6
3

10k

2
6
3

7
1

7
1

10k
OP07
V+

SUMADOR

-Vout
RST
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
E
R/W
RS
V0
VCC
GND
CS2
CS1

OP07
V+

J2
10k

18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

CONN-SIL5

RV4
2

AN 4-3-ECG

U2

4
3
2
1

C1

2
3
4
5
6
7
14
13

CONN-H4

22pF

X1

E
RW
DI
CS2
CS1
PGC
PGD

CRYSTAL

C2
22pF

A114
R26

R28

25K

25k

33
34
35
36
37
38
39
40

18

CS2
CS1

RST

E
RW
DI

1
2
3
4
5

U2(RC0/T1OSO/T1CKI)

RA0/AN0
RC0/T1OSO/T1CKI
RA1/AN1
RC1/T1OSI/CCP2/UOE
RA2/AN2/VREF-/CVREF
RC2/CCP1/P1A
RA3/AN3/VREF+
RC4/D-/VM
RA4/T0CKI/C1OUT/RCV
RC5/D+/VP
RA5/AN4/SS/LVDIN/C2OUT
RC6/TX/CK
RA6/OSC2/CLKO
RC7/RX/DT/SDO
OSC1/CLKI
RB0/AN12/INT0/FLT0/SDI/SDA
RB1/AN10/INT1/SCK/SCL
RB2/AN8/INT2/VMO
RB3/AN9/CCP2/VPO
RB4/AN11/KBI0/CSSPP
RB5/KBI1/PGM
RB6/KBI2/PGC
RB7/KBI3/PGD

RD0/SPP0
RD1/SPP1
RD2/SPP2
RD3/SPP3
RD4/SPP4
RD5/SPP5/P1B
RD6/SPP6/P1C
RD7/SPP7/P1D
RE0/AN5/CK1SPP
RE1/AN6/CK2SPP
RE2/AN7/OESPP
RE3/MCLR/VPP

VUSB
PIC18F4550

15
16
17
23
24
25
26

RST

USBCONN
10k

8
9
10
1

MCLR

ICSP 1-5
R1

MCLR

1uF

U10

VCC
D+
DGND

R4

19
20
21
22
27
28
29
30

D1

C3

J3
1
3
2
4

1N5817

10k
PGD
PGC

1
2
3
4
5
CONN-SIL5

OPAMP

25k
2

TR1

BR1

FUENTE DE ALIMENTACION +/- 9V y 5V

Page 78
VDD

R29

25k

R27

Caractersticas de los GLCD

Page 79

Controladores GLCD para Escribir

Byte 0xAB

Page 80

Instrucciones del Controlador GLCD

Page 81

Diagrama de Bloque del

Controlador GLCD

Page 82

Cdigo del Proyecto ECG

Page 83

Agenda:

UDH Rumbo a la Acreditacin Internacional

Page 84