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2008 International Conference on Signals, Circuits and Systems

Microstrip Design of Low Noise Amplifier for


Application in NarrowBand and WideBand
M. CHALLAL1,2, A. AZRAR1, H. BENTARZI1 and D. VANHOENACKER JANVIER2
1

Dept. Electrical Engineering and Electronics DGEE


FSI, University of Boumerdes UMBB
Boumerdes, ALGERIA

Electromagnetics MIcrowave Communication


laboratory, EMIC
Universit Catholique de Louvain la neuve UCL
Louvain-La-Neuve, BELGIUM
mouloud.challal@uclouvain.be

Output Return Loss (ORL) where its performance is a function


of the applied terminations, source reflection coefficient (S)
and load reflection coefficient (L).

Abstract A low-noise amplifier (LNA) is presented in this


paper. The LNA is designed and optimized for narrowband and
wideband operations along with minimum noise figure around 24
GHz (K-Band). The designed LNA employs microstrip input and
output matching networks; it achieves a noise figure of 3.85 dB
and 10.55 dB of gain along with 10.27 dB and 17.83 dB of input
and output return losses, respectively for its narrow band. Where
as for its wideband it accomplishes a gain of 6.5 dB with 0.3 dB
flatness from 24 to 25.25 GHz wideband frequency range, the
noise figure obtained for the presented LNA is in close proximity
to the minimum noise figure over 23 24.5 GHz frequency range

The block diagram of an amplifier circuit is shown in


Figure 1.

Keywords- Low Noise Amplifier (LNA); Microstrip Matching


Networks; NarrowBand (NB) and WideBand (WB).

I.

Figure 1. Two ports microwave amplifier block diagram

INTRODUCTION

Where

Low Noise Amplifiers find many applications in wireless


communication systems; it constitutes a part of a RF Front-end
section and a key block in a receiver systems. The principle
function of an LNA is to provide an enough gain along with
minimum noise figure. Several LNA designs at 24 GHz
(Industrial, Scientific, and Medical ISM band) based on
different technologies such as SiGe and CMOS technologies
which have been reported by literature [1-4] whilst on
microstrip technology is rarely investigated. The purpose of
this work is to design, simulate and optimize the first bloc of
RF frond-end receiver (i.e, LNA) in microstrip technology for
narrowband (NB) and wideband (WB) around 24 GHz
applications operating. In the first section of this paper, we
present designs of NB and WB LNA circuit. In the second part,
the obtained simulations performances are compared to those
obtained by measurements in [5].
II.

in = S11 +

(1)

S12 S 21S
1 S11S

(2)

and

out = S 22 +

The LNA is deemed a NB amplifier when its BW is smaller


than approximately 10% of the center frequency, i.e,

f
< 10%
f0
Where f
frequency.

CIRCUIT DESIGN

and

(3)

f 0 are respectively bandwidth and center

In this section, LNA specifications are defined for different


target values. The LNA in [4] shows the lowest 3.9 dB NF
among the reported CMOS LNAs beyond 20 GHz.
Consequently, the NF target value is set under 4 dB at the
operating frequency for NB LNA. High power gain is as
important as having minimum noise figure.

A single ended LNA is designed using microstrip


technology. Several and different design techniques based on
lumped and distributed elements are reported in [6-11]. The
main considerations in an amplifier design are stability, gain,
Bandwidth (BW), Noise Figure (NF) and the DC bias. For thus,
general design methodology involves a set of chronological
steps. Design and the optimization operations are carried out
using the Advanced Design System (ADS) software of Agilent
Technologies Inc.

For good input and output matching, the target values for
S11 and S22 is set below -10 dB around the operating frequency.

A general LNA is characterized in terms of S-parameters,


i.e, Gain, Noise Figure (NF), Input Return Loss (IRL) and
978-1-4244-2628-7/08/$25.00 2008 IEEE

S12 S 21 L
1 S 22 L

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2008 International Conference on Signals, Circuits and Systems

Figure 2. Optimized microstrip LNA

The design is based on PHEMT NE3514S02 transistor


biased at 2.5 V with drain current of 13.80 mA for enough
possible gain at 24 GHz. It is selected since its S/Noise
parameters and the design Kit (NEC_ACTIVELIBRARY) are
available in the NEC website.

This can be achieved by transforming the input impedance (50


ohms) to  opt . For that, a smith chart utility window has been
used. Shunt open-transmission line has been used as first step.
Next, a transmission line has been added for Input Matching
Network (IMN) building.

Since the transistor match with the design requirements, it is


not stable at the operating frequency, i.e, stability factor
mu less than 1.

The gain can be improved by the Output Matching Network


(OMN). In an LNA, the OMN will not interfere with the NF
which is affected by only the input impedance and S22 has been
plotted on a smith chart. Therefore, to achieve the maximum
gain, we need to match 50 ohms to S22 conjugate.

A set of most passive feedback networks are available to


stabilize the amplifier and which are:

Shunt open-transmission line has been used as first step.


Next, a transmission line has been added for OMN building.

1) Resistor placed either in series or in shunt on the input


transistor pad (input resistive loading).
2) Resistor placed either in series or in shunt on the output
transistor pad (output resistive loading).
3) Drain to gate resistor-capacitor (RC) feedback.
4) Simple source feedback inductor.

The complete schematic of the optimized LNA is depicted


in Figure 2. MLIN, MTAPER, MTEE, MLOC, MRSTUB are
respectively microstrip line, with taper, T-junction, opencircuited stub and radial stub component available in ADS
software. Several bias networks based on lumped or/and
distributed elements have been used in literatures [10-12]. In
this design, a radial stub is set up directly after a quarter
wavelength high impedance bias line.

Configuration with shunt resistor is added as simplest


approach in the output port. For practical consideration,
stabilization point should be shifted at least 1 or 2 mm out from
transistor pad and the transmission line joining the pad is 0.8
mm wide.

The firstly designed microstrip LNA is optimized for NB


operating at 24 GHz according to the requirement
specifications, whereas the second LNA is optimized for
wideband along with minimum possible noise figure using the
same active element PHEMT. The IMN and the OMN are
critical parts in reaching specified LNA performances [7-9].
Therefore, the elements of the IMN and the OMN are modified
for achieving WB LNA. It is obvious that the UWB LNA
requires more design challenges compared to the NB LNA
where matching conditions should assure at least 2 GHz BW.

The substrate material used for the microstrip design is


based on RO4350B Rogers material and its parameters are
listed in Table 1.
TABLE I.

SUBSTRATE PARAMETERS

RO4350B

Parameters

Conductivity thickness

35 m

Dielectric constant
Dissipation factor
Metal thickness
Metal conductivity
Surface roughness

3.66
0.0037
0.254 mm
5.8e+7 S/m
0.00 mm

III.

SIMULATION RESULTS

For the proposed LNA shown in Figure 2, the simulation


results are shown in Figures 3-6. In the first step, the ORL is
good (36.23 dB) but the IRL is weak (5.76 dB). The IRL can
be improved by mis-match slightly the output. After modifying
the OMN elements, the input return loss has been improved to
10.27 dB (Figure 5).

To achieve optimum NF, opt (optimum reflection


coefficient) needs to be present at the input of the transistor.

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2008 International Conference on Signals, Circuits and Systems

The simulation results show around 24 GHz frequency a


gain of 10.55 dB along with 3.85 dB NF, 10.27 dB IRL and
17.83 dB ORL.

The NB LNA performances summary is shown in Table II.


It has been observed that the simulation results match with the
desired requirements which demonstrate the robustness of the
design procedure.

20
m1
freq=24.00GHz
dB(S(2,1))=10.554

dB(S(2,1))

15

TABLE II.

m1

10

Parameters

Technology

Microstrip

Frequency
Power Gain
NF
IRL
ORL

24 GHz
10.55 dB
3.85 dB
10.27 dB
17.83 dB

-10
22

23

24

25

26

freq, GHz

Figure 3.

Power gain

The S-parameters that characterize the amplifier are shown


in Figures.7-10. From Figure 7, it is seen that the amplifier gain
is 6.5 dB with WUZ dB flatness from 24 to 26 GHz wide band
frequency range. This demonstrates that the designed amplifier
is a WB LNA. Figure 8, shows that the noise figure obtained
for the presented LNA is in close proximity to the minimum
noise figure over 23 24.2 GHz frequency range. The noise
figure is 3.2 dB to 3.8 dB from 23 to 25 GHz. The measured
gain obtained in [5] is approximately equal to 5 dB in the 22-24
GHz frequency range, with the same biasing voltage of 2.5 V
with drain current of 13.80 mA for the minimum noise figure.
Consequently, the simulated features of the designed LNA
confirm the design process compared to the measured features
of the realized circuit [5].

20
m2
freq=24.00GHz
nf(2)=3.853

15

nf(2)

Value

-5

10
m2

0
22

23

24

25

26

freq, GHz

Figure 4.

Noise Figure

10

m2

m1

-2

5
dB(S(2,1))

dB(S(1,1))

PERFORMANCE SUMMARY OF NARROWBAND LNA

-4
-6
-8

-5

m4

m4
freq=24.00GHz
dB(S(1,1))=-10.274

-10

m2
freq=25.25GHz
dB(S(2,1))=6.742

m1
freq=24.00GHz
dB(S(2,1))=6.250

-10

-12
22

23

24

25

26

20

21

22

23

freq, GHz

Figure 5.

24

25

26

27

28

26

27

28

freq, GHz

Input Return Loss

Figure 7.

Power gain

20

15

-30

m6
freq=24.00GHz
dB(S(2,2))=-17.836

-40
22

23

24

25

10

Minimum Noise Figure

26

20

freq, GHz

Figure 6.

Noise Figure

-20

NFmin
_
nf(2)
nf(2)

m6

21

22

23

24

25

freq, GHz

Output Return Loss

y_

dB(S(2,2))

-10

-3-

Figure 8

Noise Figure

2008 International Conference on Signals, Circuits and Systems

REFERENCES

[1]

Dupuis, O.; Xiao Sun; Carchon, G.; Soussan, P.; Ferndahl, M.;
Decoutere, S.; De Raedt, W. 24 GHz LNA in 90nm RF-CMOS with
high-Q above-IC inductors, Solid-State Circuits Conference, 2005.
ESSCIRC
2005.
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of
the
31st
European
12-16 Sept. 2005, pp. 89 92.
[2] Kyung-Wan Yu; Yin-Lung Lu; Da-Chiang Chang; Liang, V.; Chang,
M.F. K-band low-noise amplifiers using 0.18 /spl mu/m CMOS
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[3] Toru Masuda Takahiro Nakamura Masamichi Tanabe Nobuhiro
Shiramizu Shin-ichiro Wada Takashi Hashimoto Katsuyoshi
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[4] Shin, S.-C.; Ming-Da Tsai; Ren-Chieh Liu; Lin, K.-Y.; Huei Wang, A
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technology, Microwave and Wireless Components Letters, IEEE
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[5] Roselli L., Alimenti F., Comez M., Palazzari V., Placentino F., Porzi N.,
Scarponi A. A cost driven 24 GHz Dopller radar sensor developpement
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European, v. 3, pp. 335-338. issue, 6-7 Oct. 2005
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2nd Ed, Prentice Hall, 1997.
[8] Ulrich L. Rohde, David P. Newkirik, RF/Microwave Circuit design for
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dB(S(1,1))

-1
-2
-3
-4
-5
20

21

22

23

24

25

26

27

28

freq, GHz
Figure 9. Input Return Loss

dB(S(2,2))

-5
-10
-15
-20
-25
20

21

22

23

24

25

26

27

28

freq, GHz
Figure 10.

IV.

Output Return Loss

CONCLUSION

This paper presents narrowband (NB) and wideband (WB)


single stage LNA design and optimization in microstrip
technology. The designed LNA is biased at supply voltage of
2.5 V with drain current of 13.80 mA. At 24 GHz, the NB LNA
has noise figure of 3.85 dB with gain of 10.55 dB, input return
loss of 10.27 dB and output return loss of 17.83 dB. For the
WB LNA, the gain is 6.5 dB with WUZ dB flatness in the 24 to
25.25 frequency range for minimum possible noise figure. In
addition, it shows that WB LNA design can be realized from
the same circuit used in NB LNA by introducing an adequate
modification for both IMN and OMN elements.

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