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SC DC-DC Converter
Kei Eguchi
Sawai Pongswatd
Faculty of Engineering
King Mongkut's Institute of Technology Ladkrabang
Ladkrabang, Bangkok, 10525 Thailand
Kitti Tirasesth
Hirofumi Sasaki
Faculty of Engineering
King Mongkut's Institute of Technology Ladkrabang
Ladkrabang, Bangkok, 10525 Thailand
Vout
Vin
"
3rd stage-
(a)
4th stage- .
r~J
~C4~ cJljT::'
Vin
Vinl
oCT
_Roo
i~
(b)
Fig. 3. Instantaneous equivalent circuits when \inl
(b) State - T2.
= T1 + T2,
T1
= DT,
and T2
= (1 -
LJ
Fig.3 shows instantaneous equivalent circuits of the proposed step-up converter. In Fig.3, Ron 1 denotes an onresistance of power switches. In the steady state, differential
values of the electric charges in C 1 ,k (k = {1, 2, 3, 4,5, L})
satisfy
0,
(2)
where ilq!T1 and ilq!T2 denote electric charges when State T1 and State - T2, respectively. In the case of State - T1,
differential values of the electric charges in the input and the
output terminals, ilqT1,Vin and ilqT1,Vout ' are given by
and
where
ilq~l
(4)
D)T, (1)
ilq}2 = ilq}2'
ilqf2
and
ilqf2
= ilq}2 + ilq~2'
+ ilq}2 = o.
(5)
Here, average currents of the input and the output are given
by
A. Equivalent Circuit
(3)
lin
and
(6)
- - - - Ron
8
Fig. 4.
- - - - Ron
- - - - Ron
where ~qVin and ~qVout are electric charges in the input and
the output, respectively. From Eqs.(2) rv (6), the following
equation is derived:
-8 lout.
- - - - - Ron
(7)
/i:Mi-.. L;"utl
lint
~:.
i I 1
[D
Vinll
Vol
~ ..
(8)
WT
RSCl ...........
: ~----:;.........---o-...,
RL
L . . . - - O - - - - - - - - I - - . . . . . . " 1'.......---0-......
-~
Ft:<:.
where
lin2
Ron
Tl
qT1
+ Ron
(~ 4 )2 +
Tl
qT1
Tl
qT1
;\
3 )2
- uqT1
RSC2
Vin2WII
T1
2Ron (~ 5 )2
Tl
qT1
(;\ 1
;\ 2
+ Ron
Tl uqT1 + uqT1
.i:M2-.. L;"ut2
:--
lV&
'
(9)
Fig. 5.
'
and
W
T2
From Eqs.(2)
rv
(10)
(7), Eqs. (9) and (10) can be rewritten as
and
on ( ; \ ) 2
uqvout
(11)
25Ron (
)2
(1 _ D)T ~qvout
(12)
WT1
= 93R
DT
WT2
WTl
(~qvout )2 Rsc T.
+ WT2
(13)
T
By substituting Eqs.(II) and (12) into Eq.(13), SC resistance
RSC1 when Vin1 = Vref is given by
93 - 68D
RSCl
= D(1 _
D) Ron
(14)
= [ 1/Ml
0
0 ] [1
Ml
0
RSC1] [ Vout1 ],
1
-lout1
(15)
where Ml = 8. To save space, only the conversion mode
in the case of Vin1 = Vref is discussed in this manuscript.
Vout1
. Ml . Vin1.
RL
RL
+ RSC1
can be given by
--2
171
RLlout1
= RLlout1
--2
--2
+ RSC1lout1
(16)
RL
RL
+ RSC1 .
(17)
= [ 1/M2
0
0 ] [1
M2
RSC2] [ Vout2 ],
1
-lout2
(18)
R on (3 + D)/{4D(1 - D)} .
Simulated (Vinl=O.75V)
+ Simulated (Vinl=I.50V)
. . Simulated (Vinl=2.25V)
10
Fig. 6.
Output load
100
1000
(Q)
.....
(a)
~
V out
RSG1RsG2
V
R L+-----RSG1
RSG2
sum
(19)
RSG2
RSG1
+ RSG2
Vol
RSG1V o2 .
RSG1
RSG2
(20)
By using Eqs.( 19) and (20), the electric power supplied to the
output load RL, PRL , is given by
(21)
On the other hand, the electric power consumed by resistances
RSG1 and RSG2' PSG1 and PSG2, are given by
PSG1
and
PSG2
rv
--2
V out )
(22)
--2
V out ) ,
(23)
PRL
'TJ
(24)
(b)
Fig. 7. Output voltage of experimental circuit. (a) 5 x mode. (b) 3 x mode.