Professional Documents
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COURSE SYLLABUS/DESCRIPTION
Department and Course Number
Course Title
Course Coordinator
Total Credits
Date of Last Revision
1.0
2.0
Course Description
1.1
1.2
1.3
1.4
1.5
Objectives
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
3.0
CSCI 3710
Introduction to Computer Organization and
Architecture
Hassan Farhat
3
June 19, 2003
Contact hours
X.X
3.2
3.3
X.X
X.X
3.4
3.5
X.X
X.X
3.6
3.7
3.8
X.X
X.X
X.X
3.8.1
3.9
Input-Output Interface
3.8.1.1 I/O Bus and Interface Modules
3.8.1.2 I/O versus Memory Bus
3.8.1.3 Isolated versus Memory-Mapped I/O
3.8.1.4 Example of I/O Interface
3.8.2 Asynchronous Data Transfer
3.8.2.1 Strobe Control
3.8.2.2 Handshaking
3.8.2.3 Asynchronous Serial Transfer
3.8.2.4 Asynchronous Communication Interface
3.8.2.5 First-In, First-Out Buffer
3.8.3 Modes of Transfer
3.8.3.1 Example of Programmed I/O
3.8.3.2 Interrupt-Initiated I/O
3.8.3.3 Software Considerations
3.8.4 Priority Interrupt
3.8.4.1 Daisy-Chaining Priority
3.8.4.2 Parallel Priority Interrupt
3.8.4.3 Priority Encoder
3.8.4.4 Interrupt Cycle
3.8.4.5 Software Routines
3.8.4.6 Initial and Final Operations
3.8.5 Direct Memory Access (DMA)
3.8.5.1 DMA Controller
3.8.5.2 DMA Transfer
3.8.6 Input-Output Processor (IOP)
3.8.6.1 CPU-IOP Communication
3.8.6.2 IBM 370 I/O Channel
3.8.6.3 Intel 8089 IOP
3.8.7 Serial Communication
3.8.7.1 Character-Oriented Protocol
3.8.7.2 Transmission Example
3.8.7.3 Data Transparency
3.8.7.4 Bit-Oriented Protocol
Memory Organization
3.9.1 Memory Hierarchy
3.9.2 Main Memory
3.9.2.1 RAM and ROM Chips
3.9.2.2 Memory Address Map
3.9.2.3 Memory Connection to CPU
3.9.3 Auxiliary Memory
3.9.3.1 Magnetic Disks
3.9.3.2 Magnetic Tape
3.9.4 Associative Memory
3.9.4.1 Hardware Organization
3.9.4.2 Match Logic
X.X
3.9.5
4.0
Teaching Methodology
4.1
Methods to be used
The primary teaching methods will be lecture, in-class demonstrations, and lab
assignments.
4.2
4.3
Contact hours
Three hours per week
5.0
Evaluation
5.1
Type of student projects that will be the basis for evaluating student performance,
specifying distinction between undergraduate and graduate, if applicable. For Laboratory
projects, specify the number of weeks spent on each project).
Students will complete a sequence of four assembly language assignments. Students will
participate in the design simulation of a simple AC- based CPU. This is in addition to
three examinations.
5.2
Basis for determining the final grade (Course requirements and grading standards)
specifying distinction between undergraduate and graduate, if applicable.
Component
Exams
Homework/ Lab Assignments
Participation
Grading
80%
15%
5%
5.3
6.0
Grade
A+
A
A
B+
B
B
C+
C
C
D+
D
D
F
Resource Material
6.1
6.2
6.3
6.4
8.0
Core
Advanced
35
3
3
9.0
10.0
Theoretical content
The course is considers theoretical aspects of Boolean algebra, and finite state machine design
and minimization.
11.0
Problem analysis
The course is an introduction to computer architecture. As a result, design problems from
Register Transfer Languages are analyzed. The designed solutions are considered in the analysis
aspect of the design.
12.0
Solution design
The solution design includes translating the word problem into a formal description in the
context of state machines, ASM charts, and microoperations realization.
CHANGE HISTORY
Date
Change
06/19/2003 Initial ABET version
06/19/2003 Cleanup
By whom
Farhat
Wileman
Comments