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FlexRay transceiver
Rev. 6 28 November 2012
1. General description
The TJA1080A is a FlexRay transceiver that is fully compliant with the FlexRay electrical
physical layer specification V2.1 Rev. A (see Ref. 1). In addition, it incorporates features
and parameters included in V3.0.1 (see Ref. 2 and Section 14). It is primarily intended for
communication systems from 1 Mbit/s to 10 Mbit/s, and provides an advanced interface
between the protocol controller and the physical bus in a FlexRay network.
The TJA1080A can be configured to be used as an active star transceiver or as a node
transceiver.
The TJA1080A provides differential transmit capability to the network and differential
receive capability to the FlexRay controller. It offers excellent EMC performance as well as
high ESD protection.
The TJA1080A actively monitors the system performance using dedicated error and
status information (readable by any microcontroller), as well as internal voltage and
temperature monitoring.
The TJA1080A supports the mode control as used in NXP Semiconductors TJA1054
(see Ref. 3) and TJA1041 (see Ref. 4) CAN transceivers.
The TJA1080A is the next step up from the TJA1080 FlexRay transceiver (Ref. 5). Being
fully pin compatible and offering the same excellent ESD protection, the TJA1080A also
features:
This makes the TJA1080A an excellent choice in any kind of FlexRay node.
See Section 14 for a detailed overview of differences between the TJA1080 and the
TJA1080A.
Compliant with FlexRay electrical physical layer specification V2.1 Rev. A (see Ref. 1)
Automotive product qualification in accordance with AEC-Q100
Data transfer up to 10 Mbit/s
Support of 60 ns minimum bit time
TJA1080A
NXP Semiconductors
FlexRay transceiver
Overtemperature detection
Short-circuit on bus lines
VBAT power-on flag (first battery connection and cold start)
Pin TXEN and pin BGE clamping
Undervoltage detection on pins VBAT, VCC and VIO
Wake source indication
2.4 Protection
Bus pins protected against 8 kV HBM ESD pulses
Bus pins protected against transients in automotive environment (according to
ISO 7637 class C)
Bus pins short-circuit proof to battery voltage (14 V and 42 V) and ground
Fail-silent behavior in case of an undervoltage on pins VBAT, VCC or VIO
Passive behavior of bus lines in the event that transceiver is not powered
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FlexRay transceiver
3. Ordering information
Table 1.
Ordering information
Type number
TJA1080ATS/2/T
TJA1080A
Package
Name
Description
Version
SSOP20
SOT339-1
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FlexRay transceiver
4. Block diagram
VIO
VCC
VBUF
19
VBAT
20
14
1
2
TJA1080A
TRXD0
INH1
11
18
SIGNAL
ROUTER
TRXD1
INH2
TRANSMITTER
17
BP
BM
10
VIO
TXD
TXEN
BGE
STBN
EN
RXD
ERRN
RXEN
5
6
INPUT
VOLTAGE
ADAPTATION
8
9
BUS
FAILURE
DETECTION
7
13
12
RXDINT
OUTPUT
VOLTAGE
ADAPTATION
STATE
MACHINE
VBAT
WAKE
15
RXDINT
NORMAL
RECEIVER
OVERTEMPERATURE
DETECTION
WAKE-UP
DETECTION
OSCILLATOR
LOWPOWER
RECEIVER
UNDERVOLTAGE
DETECTION
16
015aaa051
GND
Fig 1.
Block diagram
TJA1080A
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5. Pinning information
5.1 Pinning
INH2
20 VBUF
INH1
19 VCC
EN
18 BP
VIO
TXD
TXEN
15 WAKE
RXD
14 VBAT
BGE
13 ERRN
STBN
12 RXEN
17 BM
TJA1080A
16 GND
TRXD1 10
11 TRXD0
015aaa052
Fig 2.
Pin configuration
TJA1080A
Pin description
Symbol Pin
Type
Description
INH2
INH1
EN
VIO
TXD
TXEN
RXD
BGE
STBN
TRXD1
10
I/O
TRXD0
11
I/O
RXEN
12
ERRN
13
VBAT
14
WAKE
15
GND
16
ground
BM
17
I/O
BP
18
I/O
VCC
19
VBUF
20
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6. Functional description
The block diagram of the total transceiver is illustrated in Figure 1.
In the star configuration all modes are autonomously controlled by the transceiver, except
in the case of a wake-up.
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If the absolute differential voltage on the bus lines is higher than Vi(dif)det(act) for
tdet(act)(bus), then activity is detected on the bus lines and pin RXEN is switched to
LOW which results in pin RXD being released:
If, after bus activity detection, the differential voltage on the bus lines is higher than
VIH(dif), pin RXD will go HIGH
If, after bus activity detection, the differential voltage on the bus lines is lower than
VIL(dif), pin RXD will go LOW
If the absolute differential voltage on the bus lines is lower than Vi(dif)det(act) for
tdet(idle)(bus), then idle is detected on the bus lines and pin RXEN is switched to HIGH.
This results in pin RXD being blocked (pin RXD is switched to HIGH or stays HIGH)
Additionally, in star configuration, activity and idle can be detected (see Figure 6 for state
transitions due to activity/idle detection in star configuration):
If pin TXEN is LOW for longer than tdet(act)(TXEN), activity is detected on pin TXEN
If pin TXEN is HIGH for longer than tdet(idle)(TXEN), idle is detected on pin TXEN
If pin TRXD0 or TRXD1 is LOW for longer than tdet(act)(TRXD), activity is detected on
pins TRXD0 and TRXD1
If pin TRXD0 and TRXD1 is HIGH for longer than tdet(idle)(TRXD), idle is detected on
pins TRXD0 and TRXD1
Mode
STBN EN
ERRN[1]
LOW
RXEN
HIGH
RXD
HIGH
LOW
HIGH
bus
activity
bus
idle
bus
DATA_0
bus
enabled
DATA_1 disabled
or idle
wake flag
set[2]
wake
flag
reset
Normal
HIGH
Receive-only
HIGH
Go-to-sleep
LOW
Standby
LOW
Sleep
LOW
[1]
[2]
TJA1080A
LOW
HIGH HIGH
float[3]
float
float
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[3]
TXD
BGE
TXEN
BP
BM
RXEN
RXD
001aae439
Fig 3.
normal
receive
only
standby
receive
only
normal
0.7VIO
STBN
0.3VIO
tdet(EN)
td(STBN-INH2)
tdet(EN)
td(STBN-RXD)
EN
ERRN
0.7VIO
0.3VIO
S2
001aag894
Fig 4.
TJA1080A
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FlexRay transceiver
1
RECEIVE ONLY
NORMAL
STBN = HIGH
EN = LOW
STBN = HIGH
EN = HIGH
4
3, 30
15, 25, 42, 43
8, 17, 39
6, 33
10, 20
31, 32
11, 21
7, 16, 38
28, 29
12, 22
19
STANDBY(1)
GO-TO-SLEEP
STBN = LOW
EN = LOW
STBN = LOW
EN = HIGH
23
9, 18
36, 37
13, 34, 35
26, 44
27, 45
SLEEP
STBN = LOW
EN = X
001aae438
(1) At the first battery connection the transceiver will enter the Standby mode.
Fig 5.
The state transitions are represented with numbers, which correspond with the numbers
in column 3 of Table 4 to Table 7.
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Table 4.
State transitions forced by EN and STBN (node configuration)
indicates the action that initiates a transaction; 1 and 2 are the consequences of a transaction.
Transition
from mode
Direction to
mode
Normal
Go-to-sleep
Sleep
Pin
Flag
Note
STBN
EN
UVVIO
UVVBAT
UVVCC
PWON
Wake
Receive-only 1
cleared
cleared
cleared
cleared
cleared
Go-to-sleep
cleared
cleared
cleared
cleared
cleared
Standby
cleared
cleared
cleared
cleared
cleared
cleared
cleared
cleared
Go-to-sleep
cleared
cleared
cleared
Standby
cleared
cleared
cleared
Normal
cleared
cleared
2 cleared
1 cleared
[2][3]
Receive-only 8
cleared
cleared
2 cleared
1 set
[2][3]
Go-to-sleep
cleared
cleared
Normal
10
cleared
cleared
cleared
1 cleared
[2][4]
Receive-only 11
cleared
cleared
cleared
1 set
[2][4]
Standby
12
cleared
cleared
[4]
Sleep
13
cleared
cleared
cleared
[5]
Normal
14
2 cleared
2 cleared
2 cleared
1 cleared
[2][3]
Receive-only 15
2 cleared
2 cleared
2 cleared
1 set
[2][3]
Receive-only Normal
Standby
Transition
number
[1]
STBN must be set to LOW at least tdet(EN) after the falling edge on EN.
[2]
Positive edge on pin STBN sets the wake flag. In the case of a transition to Normal mode the wake flag is immediately cleared.
[3]
Setting the wake flag clears the UVVIO, UVVBAT and UVVCC flags.
[4]
[5]
[1]
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FlexRay transceiver
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TJA1080A
Table 5.
State transitions forced by a wake-up (node configuration)
indicates the action that initiates a transaction; 1 and 2 are the consequences of a transaction.
Transition
from mode
Direction to
mode
Transition
number
Pin
STBN
EN
UVVIO
UVVBAT
UVVCC
PWON
Wake
Standby
Normal
16
cleared
cleared
1 cleared
set
[1]
Receive-only
17
cleared
cleared
1 cleared
set
[1]
Go-to-sleep
18
cleared
cleared
1 cleared
set
[1]
Standby
19
cleared
cleared
1 cleared
set
[1]
Normal
20
cleared
cleared
1 cleared
set
[1]
Receive-only
21
cleared
cleared
1 cleared
set
[1]
Standby
22
cleared
cleared
1 cleared
set
[1]
Go-to-sleep
23
cleared
cleared
1 cleared
set
[1]
Go-to-sleep
Sleep
Flag
Note
Normal
24
1 cleared
1 cleared
1 cleared
set
[1][2]
Receive-only
25
1 cleared
1 cleared
1 cleared
set
[1][2]
Standby
26
1 cleared
1 cleared
1 cleared
set
[1]
Go-to-sleep
27
1 cleared
1 cleared
1 cleared
set
[1][2]
[1]
Setting the wake flag clears the UVVIO, UVVBAT and UVVCC flag.
[2]
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FlexRay transceiver
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TJA1080A
Table 6.
State transitions forced by an undervoltage condition (node configuration)
indicates the action that initiates a transaction; 1 and 2 are the consequences of a transaction.
Transition from
mode
Direction to
mode
Transition
number
Flag
UVVIO
UVVBAT
UVVCC
PWON
Wake
Normal
Sleep
28
set
cleared
cleared
cleared
cleared
[1]
Sleep
29
cleared
set
cleared
cleared
cleared
[1]
Standby
30
cleared
cleared
set
cleared
cleared
[1]
Sleep
31
set
cleared
cleared
1 cleared
[1]
Sleep
32
cleared
set
cleared
1 cleared
[1]
Standby
33
cleared
cleared
set
1 cleared
[1]
Sleep
34
set
cleared
cleared
1 cleared
[1]
Sleep
35
cleared
set
cleared
1 cleared
[1]
Sleep
36
set
cleared
1 cleared
[1][2]
Sleep
37
cleared
set
1 cleared
[1][3]
Receive-only
Go-to-sleep
Standby
[1]
[2]
[3]
Note
TJA1080A
FlexRay transceiver
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TJA1080A
Table 7.
State transitions forced by an undervoltage recovery (node configuration)
indicates the action that initiates a transaction; 1 and 2 are the consequences of a transaction.
Transition
from mode
Direction to
mode
Transition
number
Pin
STBN
EN
UVVIO
UVVBAT
UVVCC
PWON
Wake
Standby
Normal
38
cleared
cleared
cleared
[1]
Receive-only 39
cleared
cleared
cleared
[1]
Normal
40
cleared
cleared
cleared
1 cleared
Normal
41
cleared
cleared
cleared
Sleep
Flag
Note
[2][3]
[4]
Receive-only 42
cleared
cleared
cleared
1 set
Receive-only 43
cleared
cleared
cleared
Standby
44
cleared
cleared
cleared
1 set
Sleep
45
cleared
cleared
cleared
cleared
[4]
[2][3]
[4]
[2][3]
Go-to-sleep
46
cleared
cleared
cleared
1 set
[2][3]
Sleep
47
cleared
cleared
cleared
cleared
[4]
[1]
[2]
[3]
Clearing the UVVBAT flag sets the wake flag. In the case of a transition to Normal mode the wake flag is immediately cleared.
[4]
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FlexRay transceiver
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BGE
TXEN
TXD
Transmitter
transmitter is disabled
transmitter is disabled
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Mode
TRXD0 /
TRXD1
ERRN[1]
Star-transmit
output[2]
input[3]
Star-receive
output
Star-idle
input
Star-locked
input
Star-standby
input
Star-sleep
input
[1]
LOW
RXEN
HIGH
LOW
RXD
HIGH
LOW
HIGH
bus idle
bus
DATA_0
bus
DATA_1
or idle
error flag error flag wake flag wake flag wake flag wake flag
reset
set[4]
reset
set[4]
reset
set[4]
Transmitter INH1
INH2
enabled
HIGH
HIGH
float
float
disabled
[2]
TRXD lines switched as output if TXEN activity is the initiator for Star-transmit mode.
[3]
TRXD lines are switched as input if TRXD activity is the initiator for Star-transmit mode.
[4]
Pin BGE must be HIGH in order to enable the transmitter via pin TXEN. If pin BGE is
LOW, it is not possible to activate the transmitter via pin TXEN. If pin TXEN is not used (no
controller connected to the transceiver), it has to be connected to pin GND in order to
prevent TXEN activity detection.
In all normal modes pin RXD is connected to the output of the normal mode receiver and
therefore represents the data on the bus lines.
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FlexRay transceiver
STAR LOCKED
INH1 = HIGH
INH2 = HIGH
TXEN activity detected for
longer than tto(tx-locked)
STAR TRANSMIT
idle detected on
TRXD0, TRXD1,
TXEN and the
bus lines
idle detected on
TRXD0, TRXD1,
TXEN and the
bus lines
STAR IDLE
INH1 = HIGH
INH2 = HIGH
INH1 = HIGH
INH2 = HIGH
INH1 = HIGH
INH2 = HIGH
TRXD0, TRXD1,
TXEN activity detected
wake
flag 1
time in star
locked longer
than tto(locked-sleep)
STAR RECEIVE
bus activity
detected
wake flag 1 or
UVVCC signal 0
no acivity on TRXD0,
TRXD1, TXEN and the
bus lines for longer
than tto(idle-sleep)
STAR SLEEP
STAR STANDBY(1)
INH1 = floating
INH2 = floating
INH1 = HIGH
INH2 = HIGH
001aae441
(1) At the first battery connection the transceiver will enter the Star-standby mode.
Fig 6.
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FlexRay transceiver
star transmit
star idle
star receive
star idle
star transmit
star idle
TRXD0
TRXD1
TXEN
TXD
TRXDOUT
BP
BM
RXEN
RXD
001aae440
TRXDOUT is a virtual signal that indicates the state of the TRXD lines. TRXDOUT HIGH means TRXD lines switched as
output. TRXDOUT LOW means TRXD lines switched as input.
Fig 7.
From Star-receive mode and Star-transmit mode if idle is detected on the bus lines, on
pin TXEN and on pins TRXD0 and TRXD1.
If the transceiver is in Star-locked mode and idle is detected on the bus lines and pin
TXEN for longer than tto(locked-idle).
If the transceiver is in Star-standby mode and the wake flag is set or no undervoltage
is present.
If the transceiver is in Star-sleep mode and the wake flag is set, the transceiver enters
Star-idle mode in order to obtain a stable starting point (no glitches on the bus lines
etc.).
In Star-idle mode the transceiver monitors pins TXEN, TRXD0 and TRXD1 and the bus
lines for activity. In this mode the transmitter is disabled.
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If activity is detected on the TRXD lines, the transceiver transmits data from pins
TRXD0 and TRXD1 to the bus.
If activity is detected on the TXEN, the transceiver transmits data from pin TXD to the
bus and to the TRXD lines.
From Star-idle, Star-transmit or Star-receive modes if the wake flag is set and an
undervoltage on pin VCC is present for longer than tto(uv)(VCC).
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From any mode if an undervoltage on pin VCC is present for longer than tdet(uv)(VCC).
If the transceiver is in Star-idle mode and no activity is detected on the bus lines and
pins TXEN, TRXD0 and TRXD1 for longer than tto(idle-sleep).
If the transceiver is in Star-transmit mode and activity on pin TXEN is detected for
longer than tto(tx-locked).
If the transceiver is in Star-receive mode and activity is detected on the bus lines for
longer than tto(rx-locked).
This mode is a fail-silent mode and in this mode the transmitter is disabled.
6.4 Start-up
The TJA1080A initialization is independent of the way the voltage supplies VBAT, VCC and
VIO ramp up. A dedicated power-up sequence is not necessary.
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tdet(wake)tot
0V
Vdif
425 mV
tdet(wake)Data_0
tdet(wake)idle
tdet(wake)Data_0
tdet(wake)idle
001aae442
Fig 8.
6.5.3.2
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Vdif
130 ns
wake-up
870 ns 870 ns
+1500
0V
1500
770 870 870
ns ns
ns
130 130
ns
ns
5 s
5 s
5 s
5 s
015aaa043
Fig 9.
pull-up
twake(WAKE)
pull-down
pull-up
twake(WAKE)
VBAT
WAKE
0V
RXD and
RXEN
INH1 and
INH2
VBAT
0V
001aae443
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Node configuration: If the UVVBAT flag is set the transceiver will enter Sleep mode
(pins INH1 and INH2 are switched off) regardless of the voltage present on pins EN
and STBN. If the undervoltage recovers the wake flag will be set and the transceiver
will enter the mode determined by the voltages on pins EN and STBN.
Star configuration: The TJA1080A in star configuration is able to transmit and receive
data as long as VCC and VIO are within their operating ranges, regardless of the
undervoltage on VBAT.
Node configuration: If the UVVCC flag is set the transceiver will enter the Standby
mode (pin INH2 is switched off) regardless of the voltage present on pins EN and
STBN. If the undervoltage recovers or the wake flag is set mode switching via pins EN
and STBN is possible.
Star configuration: If the UVVCC flag is set the transceiver will enter the Star-sleep
mode.
Node configuration: If the voltage on pin VIO is lower than Vuvd(VIO) (even if the UVVIO
flag is reset) pins EN, STBN, TXD and BGE are set LOW (internally) and pin TXEN is
set HIGH (internally). If the UVVIO flag is set the transceiver will enter Sleep mode
(pins INH1 and INH2 are switched off). If the undervoltage recovers or the wake flag is
set, mode switching via pins EN and STBN is possible.
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Star configuration: If an undervoltage is present on pin VIO (even if the UVVIO flag is
reset) pins EN, STBN, TXD and BGE are set LOW (internally) and pin TXEN is set
HIGH (internally). If the UVVIO flag is set, pin INH1 is switched off. If an undervoltage
is present on pin VIO and VCC is within the operating range, the TJA1080A will forward
the received data on TRXD or bus lines to all other branches.
6.7 Flags
6.7.1 Local wake-up source flag
The local wake-up source flag can only be set in a low power mode. When a wake-up
event on pin WAKE is detected (see Section 6.5.4) it sets the local wake-up source flag.
The local wake-up source flag is reset by entering a low power mode.
In node configuration the wake flag is reset by entering Normal mode, a low power mode
or setting one of the undervoltage flags. In star configuration the wake flag is reset by
entering a low power mode or by recovery of the UVVCC signal (without trec(uv)(VCC)).
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UVVIO flag is not set and the voltage on pin VIO is between 4.75 V and 5.25 V
UVVCC flag is not set and the voltage on pin VIO is between 2.2 V and 4.75 V
After reading the status register, if no edge is detected on pin EN for longer than tdet(EN),
the status bits (S4 to S12) will be cleared if the corresponding flag has been reset. Pin
ERRN is LOW if the corresponding status bit is set.
Table 10.
Status bits
Description
S0
LOCAL WAKEUP
S1
REMOTE WAKEUP
S2
NODE CONFIG
S3
PWON
status bit set means PWON flag has been set previously
S4
BUS ERROR
status bit set means bus error flag has been set previously
S5
TEMP HIGH
status bit set means temperature high flag has been set previously
S6
TEMP MEDIUM
status bit set means temperature medium flag has been set previously
S7
TXEN_BGE CLAMPED
status bit set means TXEN_BGE clamped flag has been set previously
S8
UVVBAT
status bit set means UVVBAT flag has been set previously
S9
UVVCC
status bit set means UVVCC flag has been set previously
S10
UVVIO
status bit set means UVVIO flag has been set previously
S11
STAR LOCKED
S12
TRXD COLLISION
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receive
only
normal
0.7VIO
STBN
tdet(EN)
0.7VIO
EN
TEN
td(EN-ERRN)
0.7VIO
ERRN
0.3VIO
S0
S1
S2
001aag896
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7. Limiting values
Table 11. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). All voltages are referenced to GND.
Symbol
Parameter
Conditions
Min
Max
Unit
VBAT
no time limit
0.3
+60
VCC
supply voltage
no time limit
0.3
+5.5
VBUF
no time limit
0.3
+5.5
VIO
no time limit
0.3
+5.5
VINH1
0.3
VBAT + 0.3
mA
0.3
VBAT + 0.3
mA
0.3
VBAT + 0.3
IO(INH1)
VINH2
IO(INH2)
VWAKE
no time limit
no time limit
Io(WAKE)
15
mA
VBGE
no time limit
0.3
+5.5
VTXEN
no time limit
0.3
+5.5
VTXD
no time limit
0.3
+5.5
VERRN
no time limit
0.3
VIO + 0.3
VRXD
no time limit
0.3
VIO + 0.3
VRXEN
no time limit
0.3
VIO + 0.3
VEN
voltage on pin EN
no time limit
0.3
+5.5
VSTBN
no time limit
0.3
+5.5
VTRXD0
no time limit
0.3
+5.5
VTRXD1
no time limit
0.3
+5.5
VBP
voltage on pin BP
no time limit
60
+60
VBM
voltage on pin BM
no time limit
Vtrt
transient voltage
on pins BM and BP
60
+60
[1]
100
[2]
75
[3]
150
[4]
100
55
+150
[5]
40
+150
[6]
8.0
+8.0
kV
[6]
4.0
+4.0
kV
MM on all pins
[7]
200
+200
[8]
1000
+1000
storage temperature
Tstg
Tvj
VESD
[1]
[2]
According to ISO7637, test pulse 2a, class C; verified by an external test house.
[3]
According to ISO7637, test pulse 3a, class C; verified by an external test house.
[4]
According to ISO7637, test pulse 3b, class C; verified by an external test house.
[5]
In accordance with IEC 60747-1. An alternative definition of virtual junction temperature Tvj is: Tvj = Tamb + P Rth(j-a), where Rth(j-a) is a
fixed value to be used for the calculation of Tvj. The rating for Tvj limits the allowable combinations of power dissipation (P) and ambient
temperature (Tamb).
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[6]
[7]
[8]
CDM: R = 1 .
8. Thermal characteristics
Table 12.
Thermal characteristics
Symbol
Parameter
Conditions
Typ
Unit
Rth(j-a)
in free air
126
K/W
9. Static characteristics
Table 13. Static characteristics
All parameters are guaranteed for VBAT = 6.5 V to 60 V; VCC = 4.75 V to 5.25 V; VBUF = 4.75 V to 5.25 V; VIO = 2.2 V to 5.25 V;
Tvj = 40 C to +150 C; Rbus = 45 ; RTRXD = 200 unless otherwise specified. All voltages are defined with respect to
ground; positive currents flow into the IC.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
55
Star-sleep mode
55
150
mA
2.75
4.5
Pin VBAT
IBAT
undervoltage detection
voltage on pin VBAT
Pin VCC
ICC
supply current
+10
15
mA
35
mA
15
mA
Vuvd(VCC)
[1]
Star-transmit mode
62
mA
Star-receive mode
42
mA
undervoltage detection
voltage on pin VCC
2.75
3.7
4.5
+1
+10
1000
1.5
Pin VIO
IIO
Vuvd(VIO)
TJA1080A
undervoltage detection
voltage on pin VIO
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Parameter
Vuvr(VIO)
Vuvhys(VIO)
Conditions
Min
Typ
Max
Unit
undervoltage recovery
voltage on pin VIO
1.6
2.2
25
200
mV
+10
40
20
+1
+15
35
mA
Star-transmit mode
62
mA
Star-receive mode
42
mA
15
mA
Pin VBUF
IBUF
[1]
VBUF(on)
VCC 0.25 -
VCC
VBUF(off)
4.5
5.25
Pin EN
VIH(EN)
0.7VIO
5.5
VIL(EN)
0.3
0.3VIO
IIH(EN)
11
IIL(EN)
+1
VIH(STBN)
0.7VIO
5.5
VIL(STBN)
0.3
0.3VIO
IIH(STBN)
11
IIL(STBN)
+1
Pin STBN
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Parameter
Conditions
Min
Typ
Max
Unit
Pin TXEN
VIH(TXEN)
0.7VIO
5.5
VIL(TXEN)
0.3
0.3VIO
IIH(TXEN)
+1
IIL(TXEN)
15
IL(TXEN)
+1
Pin BGE
VIH(BGE)
0.7VIO
5.5
VIL(BGE)
0.3
0.3VIO
IIH(BGE)
11
IIL(BGE)
+1
VIH(TXD)
0.7VIO
VIO + 0.3
VIL(TXD)
0.3
0.3VIO
IIH(TXD)
70
230
650
IIL(TXD)
+5
+1
+1
10
pF
Pin TXD
Ci(TXD)
[2]
Pin RXD
IOH(RXD)
HIGH-level output
current on pin RXD
20
mA
IOL(RXD)
LOW-level output
current on pin RXD
VRXD = 0.4 V
20
mA
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Parameter
Conditions
Min
Typ
Max
Unit
HIGH-level output
current on pin ERRN
node configuration;
VERRN = VIO 0.4 V; VIO = VCC
1500
600
100
star configuration;
VERRN = VIO 0.4 V; VIO = VCC
+1
LOW-level output
current on pin ERRN
VERRN = 0.4 V
300
700
1500
IOH(RXEN)
HIGH-level output
current on pin RXEN
1.7
0.5
mA
IOL(RXEN)
LOW-level output
current on pin RXEN
VRXEN = 0.4 V
3.2
mA
Pin ERRN
IOH(ERRN)
IOL(ERRN)
Pin RXEN
0.7VBUF
VBUF + 0.3 V
VIL(TRXD0)
0.3
0.3VBUF
VOL(TRXD0)
LOW-level output
voltage on pin TRXD0
0.3
+0.8
VIH(TRXD1)
0.7VBUF
VBUF + 0.3 V
VIL(TRXD1)
0.3
0.3VBUF
VOL(TRXD1)
LOW-level output
voltage on pin TRXD1
Rpu = 200
0.3
+0.8
0.4VBUF
0.5VBUF
0.6VBUF
0.1
+0.1
0.4VBUF
0.5VBUF
0.6VBUF
0.1
+0.1
Rpu = 200
Pins BP and BM
Vo(idle)(BP)
Vo(idle)(BM)
Io(idle)BP
7.5
+7.5
mA
Io(idle)BM
7.5
+7.5
mA
Vo(idle)(dif)
25
+25
mV
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Parameter
Conditions
Min
Typ
Max
Unit
VOH(dif)
differential HIGH-level
output voltage
40 Rbus 55 ;
VCC = VBUF = 5 V;
Cbus = 100 pF
600
850
1500
mV
VOL(dif)
differential LOW-level
output voltage
40 Rbus 55 ;
VCC = VBUF = 5 V;
Cbus = 100 pF
1500
850
600
mV
VIH(dif)
differential HIGH-level
input voltage
150
210
300
mV
VIL(dif)
differential LOW-level
input voltage
300
210
150
mV
400
210
100
mV
Vi(dif)(H-L)
10
Vi(dif)det(act)
activity detection
normal power modes
differential input voltage
(absolute value)
150
210
300
mV
IO(sc)
short-circuit output
on pin BP; 0 V VBP 60 V
current (absolute value) on pin BM; 0 V V 60 V
BM
35
mA
35
mA
35
mA
Ri(BP)
10
18.5
40
Ri(BM)
10
18.5
40
Ri(dif)(BP-BM)
differential input
resistance between pin
BP and pin BM
20
37
80
ILI(BP)
10
+10
ILI(BM)
10
+10
Vcm(bus)(DATA_0)
DATA_0 bus
common-mode voltage
Rbus = 45
0.4VBUF
0.5VBUF
0.6VBUF
Vcm(bus)(DATA_1)
DATA_1 bus
common-mode voltage
Rbus = 45
0.4VBUF
0.5VBUF
0.6VBUF
Vcm(bus)
bus common-mode
voltage difference
Rbus = 45
25
+25
mV
Ci(BP)
15
pF
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Parameter
Conditions
Min
Typ
Max
Unit
15
pF
pF
Ci(BM)
[2]
Ci(dif)(BP-BM)
differential input
capacitance between
pin BP and pin BM
[2]
VOH(INH1)
HIGH-level output
voltage on pin INH1
IINH1 = 0.2 mA
IL(INH1)
Sleep mode
+5
IOL(INH1)
LOW-level output
current on pin INH1
VINH1 = 0 V
15
mA
VOH(INH2)
HIGH-level output
voltage on pin INH2
IINH2 = 0.2 mA
IL(INH2)
Sleep mode
+5
IOL(INH2)
LOW-level output
current on pin INH2
VINH2 = 0 V
15
mA
Vth(det)(WAKE)
detection threshold
voltage on pin WAKE
2.5
4.5
IIL(WAKE)
11
IIH(WAKE)
11
Pin INH1
Pin INH2
Pin WAKE
Temperature protection
Tj(warn)(medium)
medium warning
junction temperature
155
165
175
Tj(dis)(high)
180
190
200
Power-on reset
Vth(det)POR
power-on reset
detection threshold
voltage
3.0
3.4
Vth(rec)POR
3.1
3.5
Vhys(POR)
power-on reset
hysteresis voltage
100
200
mV
[1]
Current flows from VCC to VBUF. This means that the maximum sum current ICC + IBUF is 35 mA.
[2]
These values are based on measurements taken on several samples (less than 10 pieces). These measurements have taken place in
the laboratory and have been done at Tamb = 25 C and Tamb = 125 C. No characterization has been done for these parameters. No
industrial test will be performed on production products.
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Parameter
Conditions
Min
Typ
Max
Unit
50
ns
50
ns
ns
DATA_0
50
ns
DATA_1
50
ns
ns
DATA_0
50
ns
DATA_1
50
ns
ns
50
ns
50
ns
ns
Pins BP and BM
td(TXD-bus)
[1]
DATA_0
DATA_1
td(TXD-bus)
[1]
td(TRXD-bus)
Star-transmit mode
[2]
td(TRXD-bus)
td(bus-RXD)
[2][3]
td(bus-RXD)
td(bus-TRXD)
td(bus-TRXD)
td(TXEN-busidle)
46
100
ns
td(TXEN-busact)
Normal mode
39
75
ns
td(BGE-busidle)
Normal mode
47
100
ns
td(BGE-busact)
Normal mode
40
75
ns
[3]
td(bus)(idle-act)
30
ns
td(bus)(act-idle)
30
ns
tr(dif)(bus)
10 % to 90 %
Rbus = 45 ; Cbus = 100 pF
17
25
ns
tf(dif)(bus)
90 % to 10 %
Rbus = 45 Cbus = 100 pF
17
25
ns
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Parameter
Conditions
Min
Typ
Max
Unit
50
115
tdet(wake)idle
tdet(wake)tot
Undervoltage
tdet(uv)(VCC)
100
670
ms
trec(uv)(VCC)
5.2
ms
tdet(uv)(VIO)
100
670
ms
tto(uv)(VCC)
432
900
tdet(uv)(VBAT)
ms
Activity detection
tdet(act)(TXEN)
star configuration
100
200
ns
tdet(act)(TRXD)
star configuration
100
200
ns
tdet(act)(bus)
Vdif: 0 mV 400 mV
100
250
ns
tdet(idle)(TXEN)
star configuration
100
200
ns
tdet(idle)(TRXD)
star configuration
50
100
ns
tdet(idle)(bus)
Vdif: 400 mV 0 mV
100
250
ns
Star modes
tto(idle-sleep)
640
2660
ms
tto(tx-locked)
2600
10400
tto(rx-locked)
2600
10400
tto(locked-sleep)
64
333
ms
tto(locked-idle)
1.4
5.1
Node modes
td(STBN-RXD)
td(STBN-INH2)
12
th(gotosleep)
20
35
50
Status register
tdet(EN)
20
80
TEN
20
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Parameter
Conditions
Min
Typ
Max
Unit
td(EN-ERRN)
28
100
25
75
175
2600
10400
20
ns
WAKE
twake(WAKE)
Miscellaneous
tdetCL(TXEN_BGE) TXEN_BGE clamp detection
time
tdet(col)(TRXD)
[1]
[2]
[3]
The worst case asymmetry from one branch to another is the sum of the delay difference from TRXD0 and TRXD1 to DATA_0 and
DATA_1 plus the delay difference from DATA_0 and DATA_1 to TRXD0 and TRXD1.
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td(TXD-bus)
td(TXD-bus)
td(BGE-busact)
td(TXEN-busidle)
td(BGE-busidle)
0.7VIO
TXD
0.3VIO
0.7VIO
TXEN
0.3VIO
0.7VIO
BGE
0.3VIO
BP and BM
90 %
+300 mV
0V
300 mV
150 mV
300 mV
150 mV
300 mV
10 %
0.7VIO
RXEN
0.3VIO
0.7VIO
RXD
0.3VIO
td(bus-RXD)
td(bus-RXD)
td(bus-RXD) + td(bus-RXD) +
tdet(idle)(bus) tdet(act)(bus)
td(bus-RXD) + td(bus-RXD) +
tdet(idle)(bus) tdet(act)(bus)
tr(dif)(bus)
tf(dif)(bus)
015aaa143
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Vdif
(mV)
22.5 ns
22.5 ns
400
300
37.5 ns
300
400
60 ns
td(bus-RXD)
RXD
Vdif
(mV)
td(bus-RXD)
22.5 ns
22.5 ns
400
300
37.5 ns
300
400
60 ns
td(bus-RXD)
RXD
td(bus-RXD)
015aaa044
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22 F
10 F
4
VIO
19
VCC
14
20
VBAT
VBUF
BP
18
Rbus
TJA1080A
BM
RXD
Cbus
17
7
15 pF
015aaa053
ISO 7637
G
12 V or 42 V
+5 V
100
nF
10 F
4
VIO
19
VCC
10 F
14
20
VBAT
VBUF
BP
1 nF
18
ISO 7637
TJA1080A
Rbus
BM
Cbus
17
1 nF
015aaa054
The waveforms of the applied transients are in accordance with ISO 7637, test pulses 1, 2, 3a and
3b.
Test conditions:
Normal mode: bus idle
Normal mode: bus active; TXD at 5 MHz and TXEN at 1 kHz
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SOT339-1
A
X
c
HE
v M A
Z
20
11
Q
A2
(A 3)
A1
pin 1 index
Lp
L
1
10
w M
bp
detail X
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A1
A2
A3
bp
D (1)
E (1)
HE
Lp
Z (1)
mm
0.21
0.05
1.80
1.65
0.25
0.38
0.25
0.20
0.09
7.4
7.0
5.4
5.2
0.65
7.9
7.6
1.25
1.03
0.63
0.9
0.7
0.2
0.13
0.1
0.9
0.5
8o
o
0
Note
1. Plastic or metal protrusions of 0.2 mm maximum per side are not included.
OUTLINE
VERSION
SOT339-1
REFERENCES
IEC
JEDEC
JEITA
MO-150
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-19
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Through-hole components
Leaded or leadless SMDs, which are glued to the surface of the printed circuit board
Not all SMDs can be wave soldered. Packages with solder balls, and some leadless
packages which have solder lands underneath the body, cannot be wave soldered. Also,
leaded SMDs with leads having a pitch smaller than ~0.6 mm cannot be wave soldered,
due to an increased probability of bridging.
The reflow soldering process involves applying solder paste to a board, followed by
component placement and exposure to a temperature profile. Leaded packages,
packages with solder balls, and leadless packages are all reflow solderable.
Key characteristics in both wave and reflow soldering are:
Board specifications, including the board finish, solder masks and vias
Package footprints, including solder thieves and orientation
The moisture sensitivity level of the packages
Package placement
Inspection and repair
Lead-free soldering versus SnPb soldering
Process issues, such as application of adhesive and flux, clinching of leads, board
transport, the solder wave parameters, and the time during which components are
exposed to the wave
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Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to
higher minimum peak temperatures (see Figure 17) than a SnPb process, thus
reducing the process window
Solder paste printing issues including smearing, release, and adjusting the process
window for a mix of large and small components on one board
Reflow temperature profile; this profile includes preheat, reflow (in which the board is
heated to the peak temperature) and cooling down. It is imperative that the peak
temperature is high enough for the solder to make reliable solder joints (a solder paste
characteristic). In addition, the peak temperature must be low enough that the
packages and/or boards are not damaged. The peak temperature of the package
depends on package thickness and volume and is classified in accordance with
Table 15 and 16
Table 15.
350
< 2.5
235
220
2.5
220
220
Table 16.
350 to 2000
> 2000
< 1.6
260
260
260
1.6 to 2.5
260
250
245
> 2.5
250
245
245
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temperature
peak
temperature
time
001aac844
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14. Appendix
14.1 EPL 3.0.1 requirements implemented in the TJA1080A
Table 17.
Description
RDCLoad
dBDTx10, dBDTx01
transmitter delay: 75 ns
uData0_LP
dBDRxai
dBDActivityDetection
dBDRxia
uData1 uData0
dBDRx10, dBDRx01
receiver delay: 75 ns
dBusRx0BD, dBusRx1BD
C_StarTxD, C_BDTxD
iBPBMShortMax,iBMBPShortMax
iBPGNDShortMax,iBMGNDShortMax
iBP-5ShortMax,iBM-5ShortMax
iBPBAT48ShortMax,iBMBAT27ShortMax
iBPBAT48ShortMax,iBMBAT27ShortMax
iBPBAT60ShortMax,iBMBAT60ShortMax
dBDRVCC
uINH1Not_Sleep
iINH1Leak
uESDExt
uESDInt
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15. Abbreviations
Table 18.
Abbreviations
Abbreviation
Description
BSS
CAN
CDM
EMC
ElectroMagnetic Compatibility
EME
ElectroMagnetic Emission
EMI
ElectroMagnetic Immunity
ESD
ElectroStatic Discharge
FES
HBM
MM
Machine Model
PWON
Power-on
TSS
16. References
TJA1080A
[1]
[2]
[3]
[4]
[5]
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Revision history
Document ID
Release date
Change notice
Supersedes
TJA1080A v.6
20121128
TJA1080A v.5
Modifications:
Section 6.2, Section 6.3: text revised; VBAT, VCC, VBUF and VIO operating ranges added
Table 11: parameter values revised: VBAT, VCC, VBUF and VIO
Table 13: parameter values revised: VIL(dif)
TJA1080A v.5
20110224
TJA1080A v.4
TJA1080A v.4
20090219
TJA1080A v.3
TJA1080A v.3
20090115
TJA1080A v.2
TJA1080A v.2
20080826
TJA1080A v.1
TJA1080A v.1
20071029
TJA1080A
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Product status[3]
Definition
Development
This document contains data from the objective specification for product development.
Qualification
Production
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
18.2 Definitions
Draft The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
18.3 Disclaimers
Limited warranty and liability Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
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18.4 Licenses
This NXP product contains functionality that is compliant with the FlexRay
specifications.
18.5 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
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20. Contents
1
2
2.1
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Optimized for time triggered communication
systems . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2.2
Low power management . . . . . . . . . . . . . . . . . 2
2.3
Diagnosis (detection and signalling) . . . . . . . . . 2
2.4
Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
2.5
Functional classes according to FlexRay
electrical physical layer specification
(see Ref. 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
3
Ordering information . . . . . . . . . . . . . . . . . . . . . 3
4
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 4
5
Pinning information . . . . . . . . . . . . . . . . . . . . . . 5
5.1
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
5.2
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5
6
Functional description . . . . . . . . . . . . . . . . . . . 6
6.1
Operating configurations . . . . . . . . . . . . . . . . . 6
6.1.1
Node configuration . . . . . . . . . . . . . . . . . . . . . . 6
6.1.2
Star configuration . . . . . . . . . . . . . . . . . . . . . . . 6
6.1.3
Bus activity and idle detection . . . . . . . . . . . . . 7
6.2
Operating modes in node configuration . . . . . . 7
6.2.1
Normal mode . . . . . . . . . . . . . . . . . . . . . . . . . 14
6.2.2
Receive-only mode . . . . . . . . . . . . . . . . . . . . . 14
6.2.3
Standby mode. . . . . . . . . . . . . . . . . . . . . . . . . 14
6.2.4
Go-to-sleep mode . . . . . . . . . . . . . . . . . . . . . . 14
6.2.5
Sleep mode . . . . . . . . . . . . . . . . . . . . . . . . . . 15
6.3
Operating modes in star configuration . . . . . . 15
6.3.1
Star-idle mode. . . . . . . . . . . . . . . . . . . . . . . . . 17
6.3.2
Star-transmit mode . . . . . . . . . . . . . . . . . . . . . 18
6.3.3
Star-receive mode. . . . . . . . . . . . . . . . . . . . . . 18
6.3.4
Star-standby mode . . . . . . . . . . . . . . . . . . . . . 18
6.3.5
Star-sleep mode . . . . . . . . . . . . . . . . . . . . . . . 19
6.3.6
Star-locked mode . . . . . . . . . . . . . . . . . . . . . . 19
6.4
Start-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
6.4.1
Node configuration . . . . . . . . . . . . . . . . . . . . . 19
6.4.2
Star configuration . . . . . . . . . . . . . . . . . . . . . . 19
6.5
Wake-up mechanism . . . . . . . . . . . . . . . . . . . 20
6.5.1
Node configuration . . . . . . . . . . . . . . . . . . . . . 20
6.5.2
Star configuration . . . . . . . . . . . . . . . . . . . . . . 20
6.5.3
Remote wake-up . . . . . . . . . . . . . . . . . . . . . . 20
6.5.3.1
Bus wake-up via wake-up pattern. . . . . . . . . . 20
6.5.3.2
Bus wake-up via dedicated FlexRay
data frame. . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
6.5.4
Local wake-up via pin WAKE . . . . . . . . . . . . . 21
6.6
Fail silent behavior . . . . . . . . . . . . . . . . . . . . . 22
6.6.1
VBAT undervoltage . . . . . . . . . . . . . . . . . . . . . 22
6.6.2
VCC undervoltage . . . . . . . . . . . . . . . . . . . . . . 22
6.6.3
6.7
6.7.1
6.7.2
6.7.3
6.7.4
6.7.5
6.7.6
6.7.7
6.7.8
6.7.9
6.7.10
6.7.11
6.7.12
6.7.13
6.8
6.9
7
8
9
10
11
12
13
13.1
13.2
13.3
13.4
14
14.1
15
16
17
18
18.1
18.2
18.3
18.4
18.5
19
20
VIO undervoltage . . . . . . . . . . . . . . . . . . . . . .
Flags . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Local wake-up source flag . . . . . . . . . . . . . . .
Remote wake-up source flag . . . . . . . . . . . . .
Wake flag . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power-on flag. . . . . . . . . . . . . . . . . . . . . . . . .
Node configuration flag . . . . . . . . . . . . . . . . .
Temperature medium flag . . . . . . . . . . . . . . .
Temperature high flag . . . . . . . . . . . . . . . . . .
TXEN_BGE clamped flag . . . . . . . . . . . . . . .
Bus error flag . . . . . . . . . . . . . . . . . . . . . . . . .
UVVBAT flag . . . . . . . . . . . . . . . . . . . . . . . . . .
UVVCC flag . . . . . . . . . . . . . . . . . . . . . . . . . . .
UVVIO flag. . . . . . . . . . . . . . . . . . . . . . . . . . . .
Error flag . . . . . . . . . . . . . . . . . . . . . . . . . . . .
TRXD collision . . . . . . . . . . . . . . . . . . . . . . . .
Status register . . . . . . . . . . . . . . . . . . . . . . . .
Limiting values . . . . . . . . . . . . . . . . . . . . . . . .
Thermal characteristics . . . . . . . . . . . . . . . . .
Static characteristics . . . . . . . . . . . . . . . . . . .
Dynamic characteristics. . . . . . . . . . . . . . . . .
Test information . . . . . . . . . . . . . . . . . . . . . . .
Package outline. . . . . . . . . . . . . . . . . . . . . . . .
Soldering of SMD packages . . . . . . . . . . . . . .
Introduction to soldering. . . . . . . . . . . . . . . . .
Wave and reflow soldering. . . . . . . . . . . . . . .
Wave soldering . . . . . . . . . . . . . . . . . . . . . . .
Reflow soldering . . . . . . . . . . . . . . . . . . . . . .
Appendix . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
EPL 3.0.1 requirements implemented
in the TJA1080A . . . . . . . . . . . . . . . . . . . . . .
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . .
References. . . . . . . . . . . . . . . . . . . . . . . . . . . .
Revision history . . . . . . . . . . . . . . . . . . . . . . .
Legal information . . . . . . . . . . . . . . . . . . . . . .
Data sheet status . . . . . . . . . . . . . . . . . . . . . .
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . .
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . .
Licenses. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . .
Contact information . . . . . . . . . . . . . . . . . . . .
Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
22
23
23
23
23
23
23
23
24
24
24
24
24
24
24
25
25
27
28
28
34
39
40
41
41
41
41
42
44
44
45
45
46
47
47
47
47
48
48
48
49
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section Legal information.