You are on page 1of 8

NTD4863N

Power MOSFET
25 V, 49 A, Single N-Channel, DPAK/IPAK
Features

Trench Technology
Low RDS(on) to Minimize Conduction Losses
Low Capacitance to Minimize Driver Losses
Optimized Gate Charge to Minimize Switching Losses
These are Pb-Free Devices

http://onsemi.com

V(BR)DSS

RDS(ON) MAX

ID MAX

9.3 mW @ 10 V
25 V

49 A

Applications

14 mW @ 4.5 V

VCORE Applications
DC-DC Converters
High Side Switching

MAXIMUM RATINGS (TJ = 25C unless otherwise stated)


Symbol

Value

Unit

Drain-to-Source Voltage

VDSS

25

Gate-to-Source Voltage

VGS

20

ID

11.3

Continuous Drain
Current RqJA
(Note 1)

TA = 25C

Power Dissipation
RqJA (Note 1)

TA = 25C

PD

1.95

Continuous Drain
Current RqJA
(Note 2)

TA = 25C

ID

9.2

TA = 85C
PD

1.27

Continuous Drain
Current RqJC
(Note 1)

TC = 25C

ID

49

Power Dissipation
RqJC (Note 1)

TC = 25C

PD

36.6

TA = 25C

IDM

98

TC = 85C

tp=10ms

Current Limited by Package

TA = 25C

Operating Junction and Storage


Temperature
Source Current (Body Diode)

3
CASE 369AA
DPAK
(Bent Lead)
STYLE 2

2 3

2
3
CASE 369AC
CASE 369D
3 IPAK
IPAK
(Straight Lead) (Straight Lead
DPAK)

38

IDmaxPkg

35

TJ,
TSTG

-55 to
+175

IS

30.5

Drain to Source dV/dt

dV/dt

V/ns

Single Pulse Drain-to-Source Avalanche


Energy (TJ = 25C, VDD = 50 V, VGS = 10 V,
IL = 11 Apk, L = 1.0 mH, RG = 25 W)

EAS

60.5

mJ

TL

260

Lead Temperature for Soldering Purposes


(1/8 from case for 10 s)

1 2

7.1

TA = 25C

Pulsed Drain
Current

Stresses exceeding Maximum Ratings may damage the device. Maximum


Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.

MARKING DIAGRAMS
& PIN ASSIGNMENTS
4
Drain

4
Drain

4
Drain
YWW
48
63NG

Steady
State

8.8

YWW
48
63NG

Power Dissipation
RqJA (Note 2)

TA = 85C

S
N-CHANNEL MOSFET

YWW
48
63NG

Parameter

2
1 2 3
1 Drain 3
Gate Source Gate Drain Source 1 2 3
Gate Drain Source
Y
WW
4863N
G

= Year
= Work Week
= Device Code
= Pb-Free Package

ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.

 Semiconductor Components Industries, LLC, 2007

December, 2007 - Rev. 0

Publication Order Number:


NTD4863N/D

NTD4863N
THERMAL RESISTANCE MAXIMUM RATINGS
Symbol

Value

Unit

Junction-to-Case (Drain)

Parameter

RqJC

4.1

C/W

Junction-to-TAB (Drain)

RqJC-TAB

3.5

Junction-to-Ambient Steady State (Note 1)

RqJA

77

Junction-to-Ambient Steady State (Note 2)

RqJA

118

1. Surface-mounted on FR4 board using 1 sq-in pad, 1 oz Cu.


2. Surface-mounted on FR4 board using the minimum recommended pad size.

ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise specified)


Symbol

Test Condition

Min

Drain-to-Source Breakdown Voltage

V(BR)DSS

VGS = 0 V, ID = 250 mA

25

Drain-to-Source Breakdown Voltage


Temperature Coefficient

V(BR)DSS/
TJ

Parameter

Typ

Max

Unit

OFF CHARACTERISTICS

Zero Gate Voltage Drain Current

Gate-to-Source Leakage Current

IDSS

V
23

VGS = 0 V,
VDS = 20 V

mV/C

TJ = 25C

1.0

TJ = 125C

10

IGSS

VDS = 0 V, VGS = 20 V

VGS(TH)

VGS = VDS, ID = 250 mA

mA

100

nA

2.5

ON CHARACTERISTICS (Note 3)
Gate Threshold Voltage
Negative Threshold Temperature
Coefficient

VGS(TH)/TJ

Drain-to-Source On Resistance

RDS(on)

Forward Transconductance

gFS

1.45
5.0

mV/C

VGS = 10 V

ID = 30 A

8.4

9.3

VGS = 4.5 V

ID = 30 A

12.8

14

VDS = 1.5 V, ID = 15 A

mW
S

CHARGES AND CAPACITANCES


Input Capacitance

CISS

Output Capacitance

COSS

Reverse Transfer Capacitance

CRSS

144

Total Gate Charge

QG(TOT)

9.0

Threshold Gate Charge

QG(TH)

Gate-to-Source Charge
Gate-to-Drain Charge
Total Gate Charge

QGS

990
VGS = 0 V, f = 1.0 MHz, VDS = 12 V

pF

13.5

1.0
VGS = 4.5 V, VDS = 15 V, ID = 30 A

QGD
QG(TOT)

253

3.4

nC

4.1
VGS = 10 V, VDS = 15 V, ID = 30 A

17.8

nC

SWITCHING CHARACTERISTICS (Note 4)


Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time

td(ON)
tr
td(OFF)

11.5
VGS = 4.5 V, VDS = 15 V,
ID = 15 A, RG = 3.0 W

19.7
13.5

tf

3.6

td(ON)

7.0

tr
td(OFF)

VGS = 11.5 V, VDS = 15 V,


ID = 15 A, RG = 3.0 W

tf

16.5
20.2
2.0

3. Pulse Test: pulse width v 300 ms, duty cycle v 2%.


4. Switching characteristics are independent of operating junction temperatures.

http://onsemi.com
2

ns

ns

NTD4863N
ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise specified)
Parameter

Symbol

Test Condition

Min

Typ

Max

TJ = 25C

0.96

1.2

TJ = 125C

0.83

Unit

DRAIN-SOURCE DIODE CHARACTERISTICS


Forward Diode Voltage

Reverse Recovery Time


Charge Time
Discharge Time
Reverse Recovery Charge

VSD

VGS = 0 V,
IS = 30 A

tRR
ta
tb

10.9
VGS = 0 V, dIS/dt = 100 A/ms,
IS = 30 A

5.4

ns

5.5

QRR

2.7

nC

Source Inductance

LS

2.49

nH

Drain Inductance, DPAK

LD

0.0164

Drain Inductance, IPAK

LD

PACKAGE PARASITIC VALUES

TA = 25C

1.88

Gate Inductance

LG

3.46

Gate Resistance

RG

0.5

3. Pulse Test: pulse width v 300 ms, duty cycle v 2%.


4. Switching characteristics are independent of operating junction temperatures.

http://onsemi.com
3

NTD4863N
TYPICAL PERFORMANCE CURVES

ID, DRAIN CURRENT (AMPS)

60

TJ = 25C

4.2 V

10V

VDS 10 V

4V

50

ID, DRAIN CURRENT (AMPS)

60

3.8 V

40
3.6 V
30

3.4 V

20

3.2 V

10

3.0 V

50
40
30
20

TJ = 125C

10

TJ = 25C

2.8 V
0

0.01

10

11

RDS(on), DRAIN-TO-SOURCE RESISTANCE (W)

Figure 2. Transfer Characteristics

0.02

0.020
TJ = 25C

0.018
0.016

VGS = 4.5 V

0.014
0.012
0.010

VGS = 11.5 V

0.008
0.006
0.004
0.002
0
10

20

30

40

50

60

VGS, GATE-TO-SOURCE VOLTAGE (VOLTS)

ID, DRAIN CURRENT (AMPS)

Figure 3. On-Resistance vs. Gate-to-Source


Voltage

Figure 4. On-Resistance vs. Drain Current and


Gate Voltage

1.8

10000
VGS = 0 V

ID = 30 A
VGS = 4.5 V
IDSS, LEAKAGE (nA)

1.6

Figure 1. On-Region Characteristics

0.03

VGS, GATE-TO-SOURCE VOLTAGE (VOLTS)

ID = 30 A
TJ = 25C

TJ = -55C
0

VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)

0.04

RDS(on), DRAIN-TO-SOURCE RESISTANCE


(NORMALIZED)

RDS(on), DRAIN-TO-SOURCE RESISTANCE (W)

1.4
1.2
1.0

TJ = 150C
1000

TJ = 125C

100

0.8
0.6
-50

10
-25

25

50

75

100

125

150

175

10

15

20

TJ, JUNCTION TEMPERATURE (C)

VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)

Figure 5. On-Resistance Variation with


Temperature

Figure 6. Drain-to-Source Leakage Current


vs. Drain Voltage

http://onsemi.com
4

25

NTD4863N
TYPICAL PERFORMANCE CURVES

Ciss

VGS = 0 V
TJ = 25C

1000
C, CAPACITANCE (pF)

VGS , GATE-TO-SOURCE VOLTAGE (VOLTS)

1200

800
600
Coss
400
200
Crss
0
0

10

15

25

20

DRAIN-TO-SOURCE VOLTAGE (VOLTS)

10
QT
8

2
ID = 30 A
TJ = 25C
0
0

IS, SOURCE CURRENT (AMPS)

t, TIME (ns)

100

tr
td(off)
td(on)
tf
10
RG, GATE RESISTANCE (OHMS)

10

12

14

16

20

VGS = 0 V
25
20
15
10
5

1 ms
10 ms
dc

RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
10

100

VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)

EAS, SINGLE PULSE DRAIN-TO-SOURCE


AVALANCHE ENERGY (mJ)

100 ms

0.6

1.0

0.8

Figure 10. Diode Forward Voltage vs. Current

10 ms

VGS = 20 V
SINGLE PULSE
TC = 25C

0.4

VSD, SOURCE-TO-DRAIN VOLTAGE (VOLTS)

100

10

TJ = 25C

0
0.2

100

1000
I D, DRAIN CURRENT (AMPS)

QG, TOTAL GATE CHARGE (nC)

Figure 9. Resistive Switching Time


Variation vs. Gate Resistance

0.1
0.1

30
VDD = 15 V
ID = 30 A
VGS = 11.5 V

Figure 8. Gate-To-Source and Drain-To-Source


Voltage vs. Total Charge

1000

1
1

Q2

Figure 7. Capacitance Variation

10

VGS
Q1

60
ID = 11 A
50
40
30
20
10
0
25

Figure 11. Maximum Rated Forward Biased


Safe Operating Area

50

75

100

125

150

TJ, JUNCTION TEMPERATURE (C)

Figure 12. Maximum Avalanche Energy vs.


Starting Junction Temperature

http://onsemi.com
5

175

NTD4863N

r(t), EFFECTIVE TRANSIENT THERMAL RESISTANCE


(NORMALIZED)

TYPICAL PERFORMANCE CURVES

1.0
D = 0.5

0.2
0.1
0.1

0.05

P(pk)

0.02
0.01
SINGLE PULSE

0.01
1.0E-05

1.0E-04

t1
t2
DUTY CYCLE, D = t1/t2
1.0E-03

1.0E-02
t, TIME (ms)

RqJC(t) = r(t) RqJC


D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t1
TJ(pk) - TC = P(pk) RqJC(t)

1.0E-01

1.0E+00

1.0E+01

Figure 13. Thermal Response

ORDERING INFORMATION
Package

Shipping

NTD4863NT4G

DPAK
(Pb-Free)

2500 / Tape & Reel

NTD4863N-1G

IPAK
(Pb-Free)

75 Units / Rail

NTD4863N-35G

IPAK Trimmed Lead


(3.5 " 0.15 mm)
(Pb-Free)

75 Units / Rail

Device

For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.

http://onsemi.com
6

NTD4863N
PACKAGE DIMENSIONS

DPAK (SINGLE GAUGE)


CASE 369AA-01
ISSUE A

-TC

B
V

NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.

SEATING
PLANE

R
4

A
S

DIM
A
B
C
D
E
F
H
J
L
R
S
U
V
Z

J
L
D

STYLE 2:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN

2 PL

0.13 (0.005)

INCHES
MIN
MAX
0.235 0.245
0.250 0.265
0.086 0.094
0.025 0.035
0.018 0.024
0.030 0.045
0.386 0.410
0.018 0.023
0.090 BSC
0.180 0.215
0.024 0.040
0.020
--0.035 0.050
0.155
---

SOLDERING FOOTPRINT*
6.20
0.244

2.58
0.101

5.80
0.228

3.0
0.118

1.6
0.063

6.172
0.243

SCALE 3:1

mm
inches

*For additional information on our Pb-Free strategy and soldering


details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.

http://onsemi.com
7

MILLIMETERS
MIN
MAX
5.97
6.22
6.35
6.73
2.19
2.38
0.63
0.89
0.46
0.61
0.77
1.14
9.80 10.40
0.46
0.58
2.29 BSC
4.57
5.45
0.60
1.01
0.51
--0.89
1.27
3.93
---

NTD4863N
PACKAGE DIMENSIONS

3 IPAK, STRAIGHT LEAD


CASE 369AC-01
ISSUE O

B
V

NOTES:
1.. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2.. CONTROLLING DIMENSION: INCH.
3. SEATING PLANE IS ON TOP OF
DAMBAR POSITION.
4. DIMENSION A DOES NOT INCLUDE
DAMBAR POSITION OR MOLD GATE.

C
E

DIM
A
B
C
D
E
F
G
H
J
K
R
V
W

A
SEATING PLANE

W
F

J
G

H
D

3 PL

0.13 (0.005) W

INCHES
MIN
MAX
0.235 0.245
0.250 0.265
0.086 0.094
0.027 0.035
0.018 0.023
0.037 0.043
0.090 BSC
0.034 0.040
0.018 0.023
0.134 0.142
0.180 0.215
0.035 0.050
0.000 0.010

MILLIMETERS
MIN
MAX
5.97
6.22
6.35
6.73
2.19
2.38
0.69
0.88
0.46
0.58
0.94
1.09
2.29 BSC
0.87
1.01
0.46
0.58
3.40
3.60
4.57
5.46
0.89
1.27
0.000
0.25

IPAK (STRAIGHT LEAD DPAK)


CASE 369D-01
ISSUE B
C

B
V

NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.

R
4

Z
A

-TSEATING
PLANE

H
D
G

DIM
A
B
C
D
E
F
G
H
J
K
R
S
V
Z

INCHES
MIN
MAX
0.235 0.245
0.250 0.265
0.086 0.094
0.027 0.035
0.018 0.023
0.037 0.045
0.090 BSC
0.034 0.040
0.018 0.023
0.350 0.380
0.180 0.215
0.025 0.040
0.035 0.050
0.155
---

MILLIMETERS
MIN
MAX
5.97
6.35
6.35
6.73
2.19
2.38
0.69
0.88
0.46
0.58
0.94
1.14
2.29 BSC
0.87
1.01
0.46
0.58
8.89
9.65
4.45
5.45
0.63
1.01
0.89
1.27
3.93
---

3 PL

0.13 (0.005)

STYLE 2:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN

ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including Typicals must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

PUBLICATION ORDERING INFORMATION


LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada
Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada
Email: orderlit@onsemi.com

N. American Technical Support: 800-282-9855 Toll Free


USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81-3-5773-3850

http://onsemi.com
8

ON Semiconductor Website: www.onsemi.com


Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative

NTD4863N/D