I still remember the childlike elation I felt upon successfully developing the Cat and Mouse

game on LED Matrix for my course project in Digital Logic Circuits. Admittedly, it was not the
finest piece of digital logic hardware that I would build but it was a starting point for my
academic aspirations towards Embedded Systems. I have been actively engaged in research
work, and only recently I submitted a paper on A Framework for Code-Level Power estimation
of Embedded Processors` at renowned journal, IET Computers and Digital Techniques.
My first, hands on experience in microcontroller programming, was in my sophomore year
course on Microcontrollers and Interfacing for which I built a maze solving robot on a PIC
platform. An opportunity to further nurture my aptitude for embedded systems came in the form
of my course project for EE 421: Digital System Design while working with field
programmable gate arrays (FPGA). I implemented a digital signal synthesizer (DSS) which
generated variable magnitude and frequency output signals of various waveforms. I found this
project fascinating as I learnt how any analog waveform could potentially be generated using
samples. I also opted for a graduate level course EE 522: Embedded Systems, which gave me
an insight in the workings of real time operating system (RTOS) and its role in mission-critical
embedded applications.
To understand the rigors of research and to enhance my theoretical skills in the field of
embedded systems, I have been working as Research Associate with Dr. Adeel Pasha for the past
six months. My work is based on Code-level Power estimation of Embedded Soft-core
Microprocessors. In this research, I developed a tool to calculate the average power consumed by
an assembly code for a specific target machine. The tool comprises of a high-level power
estimation module that uses a custom made assembly code parser. It takes assembly code
description of an algorithm to be run on the target processor as input and returns the estimated
cumulative computation power for the MIPS R2000, LEON3, and openMSP430 soft-core
processors. The second part of our tool consists of an instruction-level power estimation module
that creates databases of average power consumptions of different instructions from the MIPS,
LEON3 and openMSP430 Instruction Set Architectures (ISAs) which can be easily extended to
other soft-core processor ISAs making our framework scalable. The advantage of our proposed
tool is that it gives the estimated power without low-level calculations for each instruction
execution, rendering a faster and more programmer-friendly solution when compared to the
actual power estimation at hardware level. I have gained considerable insight on the architecture
and power optimizations of soft core processors on FPGA. This has led me to develop a power
aware compiler for MIPS which is underway.
I feel that the MASc program in Electrical and Computer Engineering at Waterloo University
would be conducive to my goals, not only because of the breadth of the coursework but because
the current research at Waterloo is in line with my own interests . In particular I am interested in
the ongoing projects in computer hardware by the Real-time Embedded Systems Lab such as the
Tracing Software Through Power Consumption as it is quite similar to my own research
experience in hardware power consumption patterns.
On the whole I feel that my undergraduate academics and research experience have provided me
with the right motivation and sufficient background to pursue a masters in degree in embedded
systems and so I hope that you will give my application a sincere consideration.