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C
Control
l Al
Algorithms
ih
Anton Cervin
Cer in
Lund University
Outline
A-D and D-A Quantization
Computer arithmetic
Floating-point arithmetic
Fixed-point arithmetic
Controller realizations
Finite-Wordlength Implementation
Control analysis and design usually assumes innite-precision
arithmetic, parameters/variables are assumed to be real numbers
Error sources in a digital implementation with nite wordlength:
Quantization in A-D converters
Quantization of parameters (controller coefcients)
Round-off and overow in addition, subtraction, multiplication,
division, function evaluation and other operations
Quantization in D-A converters
Linear analysis
Model quantization as a stochastic disturbance
Sampling period:
h=1
Controller (PID):
0.715z2 1.281z + 0.580
C( z) =
( z 1)( z + 0.188)
50
100
150
50
100
150
50
100
150
Output
1.02
0.98
Input
0.05
0.05
Time
50
100
150
50
100
150
50
100
150
Unquantized
0.05
0.05
Input
0.05
0.05
Time
Im
(b)
H (z )
NL
Re
1 /Yc (A)
H e ih
H (e
1
)=
Yc ( A1 )
n
X
A
i =1
2i 1
2A
2
2n 1
2n + 1
<A<
2
2
Yc(A)
Yc ( A) =
4
A/
Imaginary axis
2
6
Real axis
a
y
y
Q
ea
1.5
1
Output
0.5
0
0.5
1
1.5
0
10
Time
12
14
16
18
20
Floating-Point Arithmetic
Hardware-supported on modern high-end processors (FPUs)
Number representation:
f $ 2 e
f : mantissa, signicand, fraction
2: base
e: exponent
The binary point is variable (oating) and depends on the value of
the exponent
Dynamic range and resolution
Fixed number of signicant digits
Remarks:
The result depends on the order of the operations
Finite-wordlength operations are neither associative nor
distributive
Fixed-point arithmetic
often manual implementation
fast and compact
Fixed-Point Arithmetic
Represent all numbers (parameters, variables) using integers
Use binary scaling to make all numbers t into one of the integer
data types, e.g.
8 bits (char, int8_t):
[128, 127]
Challenges
Must select data types to get sufcient numerical precision
Must know (or estimate) the minimum and maximum value of
every variable in order to select appropriate scaling factors
Must keep track of the scaling factors in all arithmetic
operations
Must handle potential arithmetic overows
Fixed-Point Representation
In xed-point representation, a real number x is represented by an
integer X with N = m + n + 1 bits, where
N is the wordlength
m is the number of integer bits (excluding the sign bit)
n is the number of fractional bits
0
Sign bit
Integer bits
Fractional bits
Interpretation
00000000
00000001
..
.
01111111
10000000
10000001
..
.
0
1
..
.
127
-128
-127
..
.
1111111
-1
Fixed-Point Addition/Subtraction
Two xed-point numbers in the same Qm.n format can be added
or subtracted directly
The result will have the same number of fractional bits
z= x+y
Z = X +Y
z= xy
Z = X Y
X = 98
y = 14.75
Y = 118
Z = X + Y = 216
z = 5.0
Z = ( X Y )/2n
z = x/ y
Z = ( X 2n )/ Y
Example: Multiplication
Two numbers in Q5.2 format are multiplied:
x = 6.25
X = 25
y = 4.75
Y = 19
Intermediate result:
X Y = 475
Final result:
Z = 475/22 = 118
z = 29.5
Implementation of Multiplication in C
Assume Q4.3 operands and Q4.3 result
#include <inttypes.h>
#define n 3
int8_t X, Y, Z;
int16_t temp;
...
temp = (int16_t)X * Y;
temp = temp >> n;
Z = temp;
/*
/*
/*
/*
*/
*/
*/
*/
/*
/*
/*
/*
*/
*/
*/
*/
/*
/*
/*
/*
*/
*/
*/
*/
/*
/*
/*
/*
*/
*/
*/
*/
/*
/*
/*
/*
*/
*/
*/
*/
Description
ADD
SUB
MULS
ASR
LSL
# clock cycles
1
1
2
1
1
POWER
0,8
Moment
Reference
SAT.
0,5
OVL.RESET
0,5
0,5
POS.RESET
0,65
0,65
Int
0,8
0,8
Off
Ext.
Off
Int.
k
Js +d
0,8
x0,1
Ref out
FRICTION
COMPENSATION
ON
08
x0,1
0,65
095
Ext. in
1
s
0,8
0,95
x0,2
0,3
0,65
095
x0,2
0,3
0,3
0,65
-1
-1
-1
4V/A
08
gnd
LTH Reglerteknik RB 88
08
Current
magnitude
0.8
0.8
0,8
0,8
0.8
0.8
LTH ReglerteknikR/B 88
where
l1 = 5.0693,
l2 = 5.6855,
l3 = 0.6054
L2 = 23288,
L3 = 2480
L1
L2
L3
QF
-20764
-23288
2480
12
/*
/*
/*
/*
Q4.12 */
Q4.12 */
Q4.12 */
number of fractional bits in L1,L2,L3 */
Controller Realizations
A linear controller
b0 + b1 z1 + . . . + bn zn
H ( z) =
1 + a1 z1 + . . . + an zn
can be realized in a number of different ways with equivalent inputoutput behavior, e.g.
Direct form
Companion (canonical) form
Series (cascade) or parallel form
Direct Form
The input-output form can be directly implemented as
u( k) =
n
X
i =0
bi y( k i)
n
X
ai u( k i)
i =1
Companion Forms
E.g. controllable or observable canonical form
a1 a2 an1 an
1
0
0
0
0
1
0
0
x( k + 1) =
x( k) +
y( k)
.
.
0
0
0
1
0
u( k) = b1 b2 bn x( k)
Same problem as for the Direct form
Pole Sensitivity
How sensitive are the poles to errors in the coefcients?
Assume characteristic polynomial with distinct roots. Then
A( z) = 1
n
X
a k z k
n
Y
(1 p j z1 )
=
j =1
k=1
Pole sensitivity:
pi
a k
Direct Form
H1 ( z)
H2 ( z)
H2 ( z)
Series Form
Parallel Form
Try to balance the gain such that each subsystem has about
the same amplication
1.712z + 0.81
z2
1.488z + 0.64
5.396z + 6.302
6.466z 4.907
=1+ 2
+ 2
z 1.712z + 0.81
z 1.488z + 0.64
(Direct)
(Series)
(Parallel)
Magnitude (dB)
40
20
C(z)
C(z) direct form N=8
20
0
Phase (deg)
45
90
135
180
225
3
10
10
Frequency (rad/sec)
10
PoleZero Map
1
0.8
0.6
0.4
Imag Axis
0.2
0
0.2
0.4
0.6
0.8
1
1
0.5
0.5
Real Axis
30
Magnitude (dB)
20
10
0
10
C(z)
C(z) series form N=8
20
0
Phase (deg)
45
90
135
180
225
3
10
10
Frequency (rad/sec)
10
PoleZero Map
Imag Axis
0.5
C(z)
C(z) cascade form N=8
0.5
1
1
0.5
0.5
Real Axis
i i
i1
vi ( k + 1) =
vi ( k) +
y( k)
i2
i i
nc
nr
X
X
u( k) = D y( k) +
i zi ( k) +
iT vi ( k)
i =1
i =1
i = 1, . . . , nr
i = 1, . . . , nc
0.9
0.9
0.8
0.8
0.7
0.7
0.6
0.6
Imag
Imag
0.5
0.5
0.4
0.4
0.3
0.3
0.2
0.2
0.1
0.1
0
0
0.2
0.4
0.6
0.8
0
0
0.2
Real
0.4
0.6
Real
0.8
Possible solutions: