Introduction to RTL Modeling of an I2C Interface and Introduction to Digital

Design Verification
A Narrative Report
I.

Background of the Seminar-Workshop

A. Title of the Seminar-Workshop
Introduction to RTL Modeling of an I2C Interface and Introduction to Digital Design
Verification
B. Sponsor
The comprehensive training is sponsored by the Philippine Institute of Integrated Circuits.
C. Venue and Date
The training is held at the NEC Building (Juinio Hall) of the University of the Philippines Diliman, Quezon City last January 5-16, 2014.
D. Objectives
The main objective of the training is the promotion of the microelectronic industry in the
Philippines through the different partner schools and companies of the PIIC.
E. General Participants
The participants are students, faculty and engineers of the different partner schools and
companies of the PIIC.
F. BatState-U Participants
The delegates of Batangas State University are faculty members of the College of Engineering,
Architecture and Fine Arts and a researcher of the university
Dr. Gil B. Barte
- Asso. Dean, CEAFA
Engr. Ralph Gerard B. Sangalang - Faculty, CEAFA
Mr. Eugene M. Ereo
- University Research Associate I

II. Program and Highlights of Activities

A. Brief Overview of the Seminar-Workshop
The training is a two-week comprehensive training about the tools used in the first-steps in the
design of an integrated circuit. The examples used in the training are the modeling of an I2C
interface, Vendo Flow and APB-AMBA interface.
B. Speakers, their Profile and Highlights of their discussion
The PIIC Trainers and Lecturers
Christian Vincent Densing, ECE
Faculty Member, EEI-UPD
Jonathan Delarmente, ECE
ASIC Engineer, BitMicro Inc.

The speakers are members of the Philippine Institute of Integrated Circuit.

The Highlight of the Seminar-Workshop
Week 1
The first week of training started on January 5, 2014 and ended January 9, 2015. The training
for this week is the Introduction to RTL Coding of an I2C Interface. The trainer for this week is
Engr. Christian Vincent Densing, a faculty member of the University of the Philippines-Diliman.
He started the lecture in the review of RTL coding using the Verilog syntax. The afternoon of the
first day, he then introduced the software to be use in the entire training which is the Synopsys
software. He discussed different techniques in the design of digital systems. Different laboratory
exercises were given to the participants to practice the techniques that were given.
On January 8, 2015, the officers of the PIIC met up with the participants of the university to
discuss the plans for the upcoming partnership with the university.
Week 2
Week 2 of the training is entitled Introduction to Digital Design Verification and was held on
January 12- 16, 2015. The lecturer for this module is Engr. Jonathan Delarmente, an ASIC
Engineer from BitMicro Inc. The training for this week is an introduction to becoming a
verification engineer. The participants were given overview of the works of a verification
engineer. During the whole week the participants were given lectures together with several
laboratory exercises, this laboratory exercises were focused on the verification of an I2C and
APB-AMBA interfaces.
C. BatState-U Participants Level/Nature of Participation
Batangas State University delegates are participants to the training.
III. Implication to Professional Development and Support to the University
A. Contribution to Attendees Professional Development
1.

In relation to their specific discipline

The attendance to the training added an additional Continuing Professional Education to the
participants. They learned so much about the new trends in their profession which aims to
strengthen the research and developmental works of Filipino professionals and students.
2.

In relation to the nature of their work

The attendance to the seminar-workshop has made the participants more lined with the
researches and innovations related to integrated circuit design.
B. Action Plan to Re-Echo/Cascade Learning Skills Acquired
1.

Plan of Action on the cascading of competencies acquired, with focus on

a) Time table for the conduct of re-echo

The BatState-U delegates planned to conduct the re-echo before February 2015.
b) Contribution to professional development of colleagues
The re-echo will be of additional knowledge for the professional development of the faculty
members and other researchers; the training will provide a wide variety of knowledge for the
participants as well as to the contributors of the re-echo.

c) Contribution to the University in general

The researchers and faculty members that will attend the re-echo will gain additional knowledge
on the design on microelectronics, while the ones to conduct the re-echo will gain additional
experience in preparing seminars and will be additional assets of the university.

Prepared by:
Mr. Eugene M. Ereo
University Research Associate I
Noted:
Dr. Shirley G. Cabrera
Director for Research

Mr. Eugene M. Ereo, Dr. Gil B. Barte and Engr. Raplh Gerard B. Sangalang during the last day of the first week of
training

Meeting with the officials and members of the Philippine Institute for Integrated Circuits

Engr. Sangalang, Dr. Barte and Mr. Ereo along with the officials, Engr. Christian Raymund K. Roque and Dr. John
Richard E. Hizon and member of the PIIC