New Interview Questions1

Hope you all have started the planning for the DRDO test.
This is a golden
opportunity to clear the test. Why? You have all the resources and books in your
hand. Any way many of you have asked how to apply for ISRO? Organizations
like ISRO, VSSC etc dont conduct tests as DRDO do. They give ad in
newspaper. They short list based on the percentage and call forinterview. Or they
directly go to the premier institutes and recruit directly from there.
I am giving a pattern of questions asked for an ECE guy in ISRO-SAC interview.
Once again I have to stress that if ur basics are strong you will get thru
theinterview. Now from very long time I am telling learn the basics. What are the
basics?
Here are examples:
1. In radar we may know how a CW radar works and what are its applications.
Thats not enough! You should know why the CW can be used in
thoseapplications and what types of radar can be used in
those applications other than CW radar.
2. In digital we know how to reduce a Boolean expression using K-map. But do
you know difference between looping 1s and 0s in K-map? Do you know there is
a limitation in Kmap? Do you know any other method to reduce the expressions?
Is there any limitation for that?
3. In mechanical we have heard a lot about 100cc or 150 cc bikes. What actually
cc here means? Is there any relationship with that with performance if so how
and why?
Is there any 100% efficient Carnot cycle? Why?
4. In electrical we have heard a lot about transmission loss why it is caused? Can
we prevent it ?
5. In Computer you know methods of sorting? Which is the most efficient and
why?
6. In Physics do you know what is the cause of hall effect?
Now have a first hand experience of an ISRO interview.
SAC (Ahmedabad) panel comprised of 6 members, very senior scientists. They
asked about B.E project, subject questions were picked up from the B.E project.
Like if your project is on Commn, they asked questions from Commn.
At NIT, Trichy ISRO dropped in for campus recruitment, panel members were
from ISRO Trivandrum and ISRO Bangalore with some 20 years of experience in
ISRO.
3 people on the whole were in the panel. 1 was an expert in microwaves another
person in DSP, Digital Commn, VLSI, third person was chairman, I believe
They first made the usual formalities like doc verification and the
usual questions like Did u appear for GATE? How did u come 2 NIT, Trichy for
PG (GATE / NON GATE)?? What was your rank in the entrance test conducted
by NITT to get in for PG?
Then they asked abt my M.E project. Here at NITT, we have phase-1 project and
phase-2 project at 3rd and 4th semester course.
So i told that I am working with IP over WDM networks. They asked me from
WDM technology, to compare microwave and fiber optics, guided and unguided
commn differences? WDM components, about IPv6.
2nd member asked me from microwaves. Some questions raised by him
- Eqvt ckt of transmission line and explain all the primary
and secondary constants?
- losses associated with transmission line
-antenna gain, isotropic antenna?, antenna applns at different freq
-microwave sources - klystron, magnetron etc.
3rd member asked me from digital commn
- Sampling theorem, aliasing effects, digital modulation (compare BPSK and
BFSK), what is FFSK?, line coding (compare Manchesterand NRZ scheme),
turbo codes??, trellis coded modulation??, advantage of cyclic codes
some questions from spread spectrum also - like how anti jamming is achieved??
Altogether only basic fundas here also. Confidence is the key and it,s better to
have a firm grasp on the subjects related to project.
Since the panel members were old people, questions from microwaves,
antennas, trans lines are sure to come forth.
In fact questions from microwave engineering, antennas and transmission lines
were asked for all people.
NOTE: this recruitment drive is also recruiting scientist for NTRO(National

Technical Research Org, a newly started private R&D in same field). NTRO has
requested ISRO to recruit some candidates for it. Toppers will be absorbed by
ISRO and later students will be offered NTRO. before interview you will be asked
about whether you want yourself to be considered for NTRO also or not.
1. There were 8 person in panel and only one panel was there. there was a
long round table between candidate and interviewers so we have to
explain everything on board.
2. They asked about GATE score card ,percentile, why did not went for
M.Tech. If you are doing M.Tech. or Job they may ask questions in your
specialization
3. Tell about your project
4. Then some questions regarding project
5. Favourite subjects ( I said DSA, C and DBMS . I didn,t said OS because
for OS they were asking w.r.t. Linux. In CN they may also ask general
about Network Security ,firewall, encryption etc. CA include Digital,
Microprocessor etc)
6. They are giving everybody a question from mathematics to solve on
board, mostly to find the rank of matrix, solving linear equation (some
tricky which can be answered without solving it properly) or probability.
7. They may give a K - Map to solve on board
8. In C(i told C as My favourite subject) they ask me about extern, static,
linking, global variables, run time library , exit etc.
9. In DSA they ask me about ex-pression evaluation infix ,postfix, how expression is evaluated etc
10. Solve the equation x+y=5 ; 4x+4y=12; x+2y+3Z=20 .Answer:
no solutionsince first two are contradicting so not possible
11. Some Other info about Interview
Mostly interview is on basics not deep into subject
1.In CS at Ahmedabad On 12 Sept only one out of 37 was asked about
the project but on 13 everybody was asked about project
2.They are asking some very basic questions from Digital like K-map solving ,
gates etc
3.Generally DBMS was not asked
ISRO SAMPLE TEST PAPER ON 15th JULY2006 AT DELHI

Hi to all,
. If sampling frequency doubles then
a) Quantization noise decreases
b) Quantization density decreases
c) Quantization noise increases
d) Quantization density increases
2. Two signals of 2GHz and 4GHz are frequency modulated on same carrier 10 GHz.
Find the ratio of frequency deviation if band widths of both are equal.
a) 1:2 b)2:1 c) 1:1 d) 1:4
3. Gray code of 111 is
4. 3X512+7X64+5X8+3 then value in binary form contains _______ number of 1s.
a) 7 b) 6 c) 9 d) none
5. The 2s compliment of decimal number 19 in 8-bit system is
a) 11101101
6) The high gain codes are
a) Turbo codes b) BCH codes c) R-S codes
7) BCH codes are of the type________
a) Convolutional type b) c)
8) Time constant of LC circuit is
a) L/R b) L/R2 c) RL
9) If R is doubled and C is halved then frequency of series RLC

circuit is
10) The solution for the equation (D2+4) y=sin2x is
11) Laplace Tramsform of sin3x is
12) The Z-transform for the series is
X [n] = { 7; n= -1
{5 n=0
{ 1 n=1
{0 else
13) The magic Tee is a
a) 4 port tee b) c)
14) The register which holds the address of the next instruction is
a) Program counter b) c)
15) The antenna gain is given by...............?

a16) The satellite is in 630km orbit and transmitting at a frequency 5 MHz, when satellite is on your head the
Doppler shift is--------
a) b) c) 0 d)
17) The impedance of a lossless transmission line is
a) (L/C)
18) A 50line with load impedance 100 the VSWR is
19) In a waveguide measurement, the forward power is 10mW,

the reverse power is 1mW then VSWR is _____________
20) Transmitted power is 100W, gain of the transmitter
antenna is 30 dB and the path loss is 50 dB then received power
is
21) When transmitted power is 100mW and the path loss 100
dBm then received power is
a) -80 dBm
22) When a em wave is incident normally on a
perfect conductor then
a) Totally reflected b) partially reflected
c) Totally transmitted d) none.
23) Zsc =100 Zoc =1 then Zo is
a) 1 b) 10 c)___d)__
24) When the operating wavelength of line is /4<</2, the

impedance is
a) Capacitive b) inductive c) ____ D) none
25) The value of L if source is 50V AC of 10 KHz frequency and

current is 7.96 A.
a) ____
26) The resonant frequency is 50MHz bandwidth 100 KHz then Q factor is
a) ______ b)_______ c)..
27)The Q factor of a series RLC circuit is
a)b)
28) Q value of a parallel RLC circuit is ________
a)b).
29) If the lines x+y+3=0, x-2y+7=0, 2x+ky+5=0 are required to be concurrent then the
value of k is___ a) ___ b)..
30) The vectors i-2j+k, 2i+3j-k,R are the complete, then r is given by ______
31) If a satellite revolving with angular velocity w and the velocity is v then
Curl v is _______
a) w b) 2w c) w 2 d) ..
32) If each stage amplifier contains 10dB gain the figure of

merit of 2-stages is
Given by
33) The maximum rate possible in kbps if F=15 and bandwidth

is 4 KHz is.
34) The maximum time allowed for each flip flop for a ripple
counter of mod-1024 , if clock given to it is 1MHz is ..
35) The maximum time allowed time for each flip flop for a
mod 10 synchronous counter if each flip flop delay is 25ns.
a) 25 ns b) 50 ns c) 100 ns d) none
36) The high speed for CML gate is due to operating it in

--------- region.
a) non saturation
37)In a micro processor the wait states are inserted to
a) make the processor to wait during DMA operation
b) make the processor to wait during an interrupt processing
c) make the processor wait during a power shutdown.
d) interface the slow peripherals to the processor.
38) In a digital voltmeter the ADCs used are of type
1. successive 2.flash type 3. Dual slope
in ascending order of time is
1. a) 2,1,3 b) 1,2,3 c) 3,1,2 d) none
39) The number of NAND gates are required to implement AB (XOR), assuming
compliments
not available .
40) The resolution for a DAC is given by 0.4% then no. of bits of DAC is
a) 8- bits
41) The chip capacity is 256 bits, then the no.
of chips required to build 1024 B memory
Is.
1. a) 32 b) 16 c) 15)
42) Which of the following are correct?
1. A flip-flop is used to store 1-bit of information
2. Race around condition occurs in JK flip flop when both the inputs are 1
3. Master slave flip flop is used to store 2 bits of information
4. A transparent latch consists of a D- flip flop
a) 1, 2,3 b) 1,3,4 (ANS) c)1,2,4 d) 2,3,4
43) The bit rate of a QPSK compared to BPSK is
a)half b) double c) same
44) There are 5 red balls and 5 black balls in a box. The probability to select 2 balls one
after other without reputting is,
a) 2/9 b) 1/90 c) 11/90 d) none
45) The rms voltage is obtained by multiplying peak by a factor
a) 1/2
46) H(s)=S/(S+a) is a transfer function of ______
a) LPF b) Notch c) BPF d) HPF
47) Resistance of a 2 parallel resistors is 12 and the effective resistance when one resistor broke is 18
then the value of resistance in another is_________
48)The output of a phase modulator when input applied is integrating signal is
a)FM b) AM c) PM d) none
49) For a transformer the losses which vary with load are
a) core losses b) copper losses c) Hysterises losses d) none.
50) The waves which cannot be transmitted in waveguide are
a) TE b) TEM c) TM d) none
51) Diplexer is a
a) circulator only b)only transmitter filter c) only receiver filter
d) both transmitter and receiver filter
52) (t) represents impulse then ( (t) cos 2t )dt with limits 0
to infinity is
a) 1, b) -1 c) infinity d ) 0
53) 1/(x(x2-a2)) dx is
A)
cosec2x
---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
ISRO Model Interview

Hope you all have started the planning for the DRDO test. This is a golden
opportunity to clear the test. Why? You have all the resources and books in your
hand. Any way many of you have asked how to apply for ISRO?
Organizations like ISRO, VSSC etc dont conduct tests as DRDO do. They
give ad in newspaper. They short list based on the percentage and call
forinterview. Or they directly go to the premier institutes and recruit directly from
there.
I am giving a pattern of questions asked for an ECE guy in ISRO-SAC interview.
Once again I have to stress that if ur basics are strong you will get thru
theinterview. Now from very long time I am telling learn the basics. What are the
basics?
Here are examples:
1. In radar we may know how a CW radar works and what are its applications.
Thats not enough! You should know why the CW can be used in those
applications and what types of radar can be used in those applications other than
CW radar.
2. In digital we know how to reduce a Boolean expression using K-map. But do
you know difference between looping 1s and 0s in K-map? Do you know there is
a limitation in Kmap? Do you know any other method to reduce the expressions?
Is there any limitation for that?
3. In mechanical we have heard a lot about 100cc or 150 cc bikes. What actually
cc here means? Is there any relationship with that with performance if so how
and why?
4. In electrical we have heard a lot about transmission loss why it is caused? Can
we prevent it ?
5. In Computer you know methods of sorting? Which is the most efficient and
why?
asked about B.E project, subject questions were picked up from the B.E project.
Like if your project is on Commn, they asked questions from Commn.
ISRO.
3 people on the whole were in the panel. 1 was an expert in microwaves another
person in DSP, Digital Commn, VLSI, third person was chairman, I believe
They first made the usual formalities like doc verification and the
usual questions like Did u appear for GATE? How did u come 2 NIT, Trichy for
PG (GATE / NON GATE)?? What was your rank in the entrance test conducted
by NITT to get in for PG?
Then they asked abt my M.E project. Here at NITT, we have phase-1 project and
phase-2 project at 3rd and 4th semester course.
BFSK), what is FFSK?, line coding (compare Manchester and NRZ scheme),
turbo codes??, trellis coded modulation??, advantage of cyclic codes
some questions from spread spectrum also - like how anti jamming is achieved??
Altogether only basic fundas here also. Confidence is the key and it,s better to
were asked for all people.
------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------Frequently Asked Questions - Electronics Engg.
1. Insights of an inverter. Explain the working?
2. Insights of a 2 input NOR gate. Explain the working?
3. Insights of a 2 input NAND gate. Explain the working?
4. Implement F= not (AB+CD) using CMOS gates?
5. Insights of a pass gate. Explain the working?
6. Why do we need both PMOS and NMOS transistors to implement a
pass gate?
7. What does the above code synthesize to?
8. Cross section of a PMOS transistor?
9. Cross section of an NMOS transistor?
10. What is a D-latch? Write the VHDL Code for it?
11. Differences between D-Latch and D flip-flop?
12. Implement D flip-flop with a couple of latches? Write a VHDL Code
for a D flip-flop?
13. What is latchup? Explain the methods used to prevent it?
14. What is charge sharing?
15. While using logic design, explain the various steps that r followed
to obtain the desirable design in a well defined manner?
16. Why is OOPS called OOPS? (C++)
17. What is a linked list? Explain the 2 fields in a linked list?
18. Implement a 2 I/P and gate using Tran gates?
19. Insights of a 4bit adder/Sub Circuit?
20. For f = AB+CD if B is S-a-1, what r the test vectors needed to
detect the fault?
21. Explain various adders and diff between them?
22. Explain the working of 4-bit Up/down Counter?
23. A circuit has 1 input X and 2 outputs A and B. If X = HIGH for 4

clock ticks, A = 1. If X = LOW for 4 clock ticks, B = 1. Draw a state
diagram for this Spec?
24. Advantages and disadvantages of Mealy and Moore?
25. Id vs. Vds Characteristics of NMOS and PMOS transistors?
26. Explain the operation of a 6T-SRAM cell?
27. Differences between DRAM and SRAM?
28. Implement a function with both ratioed and domino logic and
merits and demerits of each logic?
29. Given a circuit and asked to tell the output voltages of that
circuit?
30. How can you construct both PMOS and NMOS on a single
substrate?
31. What happens when the gate oxide is very thin?
32. What is setup time and hold time? 33. Write a pseudo code for
sorting the numbers in an array?
34. What is pipelining and how can we increase throughput using
pipelining?
35. Explain about stuck at fault models, scan design, BIST and IDDQ
testing?
36. What is SPICE?
37. Differences between IRSIM and SPICE?
38. Differences between netlist of HSPICE and Spectre?
39. What is FPGA?
40. Draw the Cross Section of an Inverter? Clearly show all the
connections between M1 and poly, M1 and diffusion layers etc?
41. Draw the Layout of an Inverter?
42. If the current thru the poly is 20nA and the contact can take a max
current of 10nA how would u overcome the problem?
43. Implement F = AB+C using CMOS gates?
44. Working of a 2-stage OPAMP?
45. 6-T XOR gate?
46. Differences between blocking and Non-blocking statements in
Verilog?
47. Differences between Signals and Variables in VHDL? If the same
code is written using Signals and Variables what does it synthesize to?
48. Differences between functions and Procedures in VHDL?
49. What is component binding?
50. What is polymorphism? (C++)
51. What is hot electron effect?
52. Define threshold voltage?
53. Factors affecting Power Consumption on a chip?
54. Explain Clock Skew?
55. Why do we use a Clock tree?
56. Explain the various Capacitances associated with a transistor and

which one of them is the most prominent?
57. Explain the Various steps in Synthesis?
58. Explain ASIC Design Flow?
59. Explain Custom Design Flow?
60. Why is Extraction performed?
61. What is LVS, DRC?
62. Who provides the DRC rules?
63. What is validation?
64. What is Cross Talk?
65. Different ways of implementing a comparator?
66. What r the phenomenon which come into play when the devices
are scaled to the sub-micron lengths?
67. What is clock feed through?
68. Implement an Inverter using a single transistor?
69. What is Fowler-Nordheim Tunneling?
70. Insights of a Tri-state inverter?
71. If an/ap = 0.5, an/ap = 1, an/ap = 3, for 3 inverters draw the
transfer characteristics?
72. Differences between Array and Booth Multipliers?
73. Explain the concept of a Clock Divider Circuit? Write a VHDL code
for the same?
74. Which gate is normally preferred while implementing circuits using
CMOS logic, NAND or NOR? Why?
75. Insights of a Tri-State Inverter?
76. Basic Stuff related to Perl?
77. Have you studied buses? What types?
78. Have you studied pipelining? List the 5 stages of a 5 stage
pipeline. Assuming 1 clock per stage, what is the latency of an
instruction in a 5 stage machine? What is the throughput of this
machine ?
79. How many bit combinations are there in a byte?
80. For a single computer processor computer system, what is the
purpose of a processor cache and describe its operation?
81. Explain the operation considering a two processor computer
system with a cache for each processor.
82. What are the main issues associated with multiprocessor caches
and how might you solve them?
83. Explain the difference between write through and write back
cache.
84. Are you familiar with the term MESI?
85. Are you familiar with the term snooping?
86. Describe a finite state machine that will detect three consecutive
coin tosses (of one coin) that results in heads.
87. In what cases do you need to double clock a signal before

presenting it to a synchronous state machine?
88. You have a driver that drives a long signal & connects to an input
device. At the input device there is either overshoot, undershoot or
signal threshold violations, what can be done to correct this problem?
89. What are the total number of lines written by you in C/C++? What
is the most complicated/valuable program written in C/C++?
90. What compiler was used?
91. What is the difference between = and == in C?
92. Are you familiar with VHDL and/or Verilog?
93. What types of CMOS memories have you designed? What were
their size? Speed?
94. What work have you done on full chip Clock and Power
distribution? What process technology and budgets were used?
95. What types of I/O have you designed? What were their size?
Speed? Configuration? Voltage requirements?
96. Process technology? What package was used and how did you
model the package/system? What parasitic effects were considered?
97. What types of high speed CMOS circuits have you designed?
98. What transistor level design tools are you proficient with? What
types of designs were they used on?
99. What products have you designed which have entered high
volume production?
100. What was your role in the silicon evaluation/product ramp? What
tools did you use?
101. If not into production, how far did you follow the design and why
did not you see it into production?
their size? Speed? Configuration Process technology?
Speed? Configuration? Voltage requirements? Process technology?
What package was used and how did you model the package/system?
What parasitic effects were considered?
107. What products have you designed which have entered high
volume production?
tools did you use?
The following questions are used for screening the candidates during
the first interview. The questions apply mostly to fresh college grads
pursuing an engineering career at Intel.
1. Have you studied buses? What types?
2. Have you studied pipelining? List the 5 stages of a 5 stage pipeline.
Assuming 1 clock per stage, what is the latency of an instruction in a 5
stage machine? What is the throughput of this machine ?
3. How many bit combinations are there in a byte?
4. For a single computer processor computer system, what is the
purpose of a processor cache and describe its operation?
5. Explain the operation considering a two processor computer system
with a cache for each processor.
6. What are the main issues associated with multiprocessor caches
and how might you solve them?
7. Explain the difference between write through and write back cache.
8. Are you familiar with the term MESI?
9. Are you familiar with the term snooping?
10. Describe a finite state machine that will detect three consecutive
coin tosses (of one coin) that results in heads.
11. In what cases do you need to double clock a signal before
presenting it to a synchronous state machine?
12. You have a driver that drives a long signal & connects to an input
device. At the input device there is either overshoot, undershoot or
signal threshold violations, what can be done to correct this problem?
13. What are the total number of lines written by you in C/C++? What
is the most complicated/valuable program written in C/C++?
14. What compiler was used?
15. What is the difference between = and == in C?
16. Are you familiar with VHDL and/or Verilog?
their size? Speed?
Speed? Configuration? Voltage requirements?
20. Process technology? What package was used and how did you
model the package/system? What parasitic effects were considered?
23. What products have you designed which have entered high volume
production?
tools did you use?
Read
more: http://wiki.answers.com/Q/Interview_questions_electronics_an
d_communication_engineering#ixzz1BjuFrbeN
---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------Electronic engineer interview questions
By admin | February 5, 2006
1. What is D-FF?
2. What is the basic difference between Latches and Flip flops?
3. What is a multiplexer?
4. How can you convert an SR Flip-flop to a JK Flip-flop?
5. How can you convert an JK Flip-flop to a D Flip-flop?
6. What is Race-around problem? How can you rectify it?
7. Which semiconductor device is used as a voltage regulator and why?
8. Explain an ideal voltage source?
9. Explain zener breakdown and avalanche breakdown?
10. What are the different types of filters?
11. What is the need of filtering ideal response of filters and actual response of
filters?
12. What is sampling theorem?
13. What is impulse response?
14. Explain the advantages and disadvantages of FIR filters compared to IIR
counterparts.
15. What is CMRR?
16. Explain half-duplex and full-duplex communication?
17. Which range of signals is used for terrestrial transmission?
18. Why is there need for modulation?
19. Which type of modulation is used in TV transmission?
20.Why we use vestigial side band (VSB-C3F) transmission for picture?
21. When transmitting digital signals is it necessary to transmit some
harmonics in addition to fundamental frequency?
22. For asynchronous transmission, is it necessary to supply some
synchronizing pulses additionally or to supply or to supply start and stop
bit?
23. BPFSK is more efficient than BFSK in presence of noise. Why?
24. What is meant by pre-emphasis and de-emphasis?
25. Explain 3 dB cutoff frequency? Why is it 3 dB, not 1 dB?
26. Explain ASCII, EBCDIC?
---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------ISRO tech Placement Paper
Paper Type : Whole Testpaper

Test Date : 11 June 2008
Posted By : Nisha
ISRO PAPER ON 11th JUNE 2008
Paper Pattern
1. How many NAND gates required to implement AB+CD+EF
ANS. 4
2. Transparent latch is seen in which type of flip flop
ANS. D flip-flop.
3. Odd parity generator uses which logic?
1. Digital 2.Analog 3. Sequential 4.none
4. One question based on Ripple counter.
5. Which diagram corresponds to D-flip-flop?
6. Which type of ADC is fastest?
ANS-flash/Parallel
7. Which one of the following is fastest read/writable memory?
1. PROM 2. EEPROM 3. Flash 4.none
8. In array programming which one is used
1. SISD 2. PISD 3. MISD 4. None
9. DSP uses the computer architecture derived from- 4 options. I don?t remember.
10. Solve ?(t2?(t-2)dt ?
11. they given the Bargraph and asked to find the voltage from it?
12.find laplace transform of e-2t?
ANS- 1/s+2.
13. Which one of the following is correct-4 options i dont remember?
14. Given VSWR=2 find reflection coefficient?
ANS-1/3
15.There are 2 seats to fill in a office a wife and husband came for the interview. For
overall competition the probability of a wife to get selected is 1/7. The probability of
husband to be selected is 1/5. Then find the probability of either wife/husband to get
selected?
16.given matrix 4 -3 -3
101
-5 -5 x find x?
17. Find the differential equation of y=Ae3x+Be2x ?
18. one problem based on determination of resistance and one on inverting and non
inverting Amplifier.
19. two Questions based on capacitor and one question based on inductance?
20. The Unit step signal is given to inductance what is the output?
21. what is the difference b/w switch and HUB?
1. switch avoids flooding
2. HUB stops broadcasting.
22. one question related to Energy signal and time signal (Depending on ampitude and
Phase)?
23.a question related to switch to find resistance if switch is closed?
24.Aquestion based on SI and GE?
25.one question based on Enhancement MOSFET?
26. problem to find Iceo?
27.what is the advantage of using 4 diodes in Bridge rectifier compared to full wave
rectifier?
28. Question related to PIV of bridge rectifier compared to Full wave rectifier?
29.Which one of the following has high I/p impedance
1. CC 2. CB 3. CE 4. None
30. one question based on FET And JFET?

31. where does operating point located in B type power amplifier?
32. which type of power amplifier is used in satellite communication
1.Amplitron 2. Klystron 3. Magnetron 4. TWT
33. de-emphasis is used to
1. Attenuate low signals.
2. Attenuate High signals.
3.Attenuate middle signals.
4. none.
34. Envelope detector is an .....? Ans- Asynchronous detector.
35.which one of the following produce modulated signal as i/p signal?
1. FM 2. PM 3. AM 4. None
36. they asked to find the gain? Given o/p power and i/p power.-4 options
37. Asked a question from EMfield on HEBD something.. i dont rem...?
38. find the modulous of 1+cosA+isinA?
ISRO Model Interview
Hope you all have started the planning for the DRDO test. This is a
golden opportunity to clear the test. Why? You have all the resources
and books in your hand. Any way many of you have asked how to
apply for ISRO? Organizations like ISRO, VSSC etc don?t conduct tests
as DRDO do. They give ad in newspaper. They short list based on the
percentage and call for interview. Or they directly go to the premier
institutes and recruit directly from there.
I am giving a pattern of questions asked for an ECE guy in ISRO-SAC
interview. Once again I have to stress that if ur basics are strong you
will get thru the interview. Now from very long time I am telling
learn the basics. What are the basics?
Here are examples:
1. In radar we may know how a CW radar works and what are its
applications. That?s not enough! You should know why the CW can be
used in those applications and what types of radar can be used in
those applications other than CW radar.
2. In digital we know how to reduce a Boolean expression using K-map.
But do you know difference between looping 1s and 0s in K-map? Do
you know there is a limitation in Kmap? Do you know any other method
to reduce the expressions? Is there any limitation for that?
3. In mechanical we have heard a lot about 100cc or 150 cc bikes.
What actually cc here means? Is there any relationship with that with
performance if so how and why?
4. In electrical we have heard a lot about transmission loss why it is
caused? Can we prevent it ?
5. In Computer you know methods of sorting? Which is the most
efficient and why?
SAC (Ahmedabad) panel comprised of 6 members, very senior
scientists. They asked about B.E project, subject questions were picked
up from the B.E project. Like if your project is on Commn, they asked
questions from Commn.
At NIT, Trichy ISRO dropped in for campus recruitment, panel members
were from ISRO Trivandrum and ISRO Bangalore with some 20 years of
experience in ISRO.
3 people on the whole were in the panel. 1 was an expert in
microwaves another person in DSP, Digital Commn, VLSI, third person
was chairman, I believe
They first made the usual formalities like doc verification and
the usual questions like Did u appear for GATE? How did u
come 2 NIT, Trichy for PG (GATE / NON GATE)?? What was your
rank in the entrance test conducted by NITT to get in for PG?
Then they asked abt my M.E project. Here at NITT, we have phase1 project and phase-2 project at 3rd and 4th semestercourse.
So i told that I am working with IP over WDM networks. They asked me
from WDM technology, to compare microwave and fiber optics, guided
and unguided commn differences? WDM components, about IPv6.
2nd member asked me from microwaves. Some questions raised by
him

- Sampling theorem, aliasing effects, digital modulation (compare BPSK
and BFSK), what is FFSK?, line coding (compare Manchester and NRZ
scheme), turbo codes??, trellis coded modulation??, advantage of
cyclic codes
some questions from spread spectrum also - like how anti jamming is
achieved??
Altogether only basic fundas here also. Confidence is the key and its
better to have a firm grasp on the subjects related toproject.
In fact questions from microwave engineering, antennas
and transmission lines were asked for all people.
----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------Interview : ISRO Model Interview Pattern
Here are examples:
1. In radar we may know how a CW radar works and what are
its applications. That?s not enough! You should know why the CW can be
used in those applications and what types of radar can be used in
those applicationsother than CW radar.
2. In digital we know how to reduce a Boolean expression using K-map. But
do you know difference between looping 1s and 0s in K-map? Do you know
there is a limitation in Kmap? Do you know any other method to reduce the
expressions? Is there any limitation for that?
3. In mechanical we have heard a lot about 100cc or 150 cc bikes. What
actually cc here means? Is there any relationship with that with
performance if so how and why?
4. In electrical we have heard a lot about transmission loss why it is caused?
Can we prevent it ?
5. In Computer you know methods of sorting? Which is the most efficient

and why?
asked about B.E project, subject questions were picked up from the B.E
project. Like if your project is on Commn, they asked questions from Commn.
ISRO.
3 people on the whole were in the panel. 1 was an expert in microwaves
another person in DSP, Digital Commn, VLSI, third person was chairman, I
believe
They first made the usual formalities like doc verification and the usual
questions like Did u appear for GATE? How did u come 2 NIT, Trichy for PG
(GATE / NON GATE)?? What was your rank in the entrance test conducted by
NITT to get in for PG?
Then they asked abt my M.E project. Here at NITT, we have phase-1 project
and phase-2 project at 3rd and 4thsemester course.
BFSK), what is FFSK?, line coding (compare Manchester and NRZ scheme), turbo
codes??, trellis coded modulation??, advantage of cyclic codes
some questions from spread spectrum also - like how anti jamming is
achieved??
Altogether only basic fundas here also. Confidence is the key and its better to

were asked for all people

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Hope you all have started the planning for the DRDO test.

NOTE: this recruitment drive is also recruiting scientist for NTRO(National

ISRO SAMPLE TEST PAPER ON 15th JULY2006 AT DELHI

. If sampling frequency doubles then

a) Quantization noise decreases

b) Quantization density decreases

c) Quantization noise increases

d) Quantization density increases

a) 1:2 b)2:1 c) 1:1 d) 1:4

3. Gray code of 111 is

4. 3X512+7X64+5X8+3 then value in binary form contains _______ number of 1s.

5. The 2s compliment of decimal number 19 in 8-bit system is

6) The high gain codes are

a) Turbo codes b) BCH codes c) R-S codes

7) BCH codes are of the type________

8) Time constant of LC circuit is

9) If R is doubled and C is halved then frequency of series RLC

10) The solution for the equation (D2+4) y=sin2x is

11) Laplace Tramsform of sin3x is

12) The Z-transform for the series is

13) The magic Tee is a

15) The antenna gain is given by...............?

18) A 50line with load impedance 100 the VSWR is

19) In a waveguide measurement, the forward power is 10mW,

a) Totally reflected b) partially reflected

c) Totally transmitted d) none.

23) Zsc =100 Zoc =1 then Zo is

24) When the operating wavelength of line is /4<</2, the

a) Capacitive b) inductive c) ____ D) none

25) The value of L if source is 50V AC of 10 KHz frequency and

a) ______ b)_______ c)..

27)The Q factor of a series RLC circuit is

28) Q value of a parallel RLC circuit is ________

32) If each stage amplifier contains 10dB gain the figure of

33) The maximum rate possible in kbps if F=15 and bandwidth

36) The high speed for CML gate is due to operating it in

37)In a micro processor the wait states are inserted to

a) make the processor to wait during DMA operation

b) make the processor to wait during an interrupt processing

c) make the processor wait during a power shutdown.

d) interface the slow peripherals to the processor.

38) In a digital voltmeter the ADCs used are of type

1. successive 2.flash type 3. Dual slope

in ascending order of time is

1. a) 2,1,3 b) 1,2,3 c) 3,1,2 d) none

41) The chip capacity is 256 bits, then the no.

of chips required to build 1024 B memory

42) Which of the following are correct?

1. A flip-flop is used to store 1-bit of information

3. Master slave flip flop is used to store 2 bits of information

4. A transparent latch consists of a D- flip flop

a) 1, 2,3 b) 1,3,4 (ANS) c)1,2,4 d) 2,3,4

43) The bit rate of a QPSK compared to BPSK is

a)half b) double c) same

a) 2/9 b) 1/90 c) 11/90 d) none

45) The rms voltage is obtained by multiplying peak by a factor

46) H(s)=S/(S+a) is a transfer function of ______

a) LPF b) Notch c) BPF d) HPF

48)The output of a phase modulator when input applied is integrating signal is

a) core losses b) copper losses c) Hysterises losses d) none.

50) The waves which cannot be transmitted in waveguide are

a) circulator only b)only transmitter filter c) only receiver filter

d) both transmitter and receiver filter

ISRO Model Interview

a) b)_ c)..