Analog Lab Manual

ANALOG ELECTRONICS CIRCUIT LAB
Subject Index
Lab Experiments
1.
2.
3.
4.
5.
To study the static input characteristics of Common Emitter transistor.

To study the static output characteristics of Common Emitter transistor.
To study the static input characteristics of Common Base transistor.
To study the static output characteristics of Common Base transistor.
To plot the frequency response curve of double stage RC coupled CE transistor
6.
amplifier.
To plot the frequency response curve of double stage RC coupled CE transistor
7.
8.
9.
amplifier with voltage feedback.

To study Wien Bridge Oscillator.
To determine the frequency of RC phase shift oscillator.
To measure the maximum signal handling capacity and the value of distortion in
output of transistorized push pull amplifier.

10. To study the Darlington Pair amplifier using transistor.
11. To determine the feedback factor and frequency of oscillation of Colpitts Oscillator
12. To determine the feedback factor and frequency of oscillation of Clapps Oscillator.
13.To design and study a transistor series voltage regulator circuit

14.To design a two stage RC coupled common emitter transistor (NPN) amplifier
circuit and to study its frequency response curve.
15.To construct Hartley oscillator using a transistor, to find out the frequency of
oscillation and comparing it to that of theoretical frequency.
[Type the company name] | Department of Electronics & Telecommunication Engineering
Page 1
EXPERIMENT NO.1
AIM: To study /plot the I/P characteristics of BJT in CE configuration
APPARATUS REQUIRED:(a) Ammeter 0-10A (1no.) 0-25mA (1no.), Voltmeter 0-5V (1no.) & 0-15V (1no.)
(b) Component values: - Transistor, NPN BC148, PNP BC157, V1 =12V variable,
Vcc=12V variable.
CIRCUIT DIAGRAM:-
Page 2
THEORY:Transistor has a three terminal (emitter base &collector) two junction. (Emitter
junction & collector junction).
When both the junctions are forward biased then it is called saturation region.
When both the junction is reversed biased then it is called as cut-off region of
transistor. If emitter junction is F.B. & collector junction is R.B. is called as Active
region.
Transistor can be used as an amplifier in any one of the configuration. Any of
its terminals can be made common to input & output. This common terminal is
usually grounded. The connection is then described in terms of common terminal. By
observing the characteristics of the transistor that relates transistor currents and
voltages behaviors of the transistor can be studied. This characteristics curve is known
as static characteristics curve.
Input characteristics:It relates the input current IB with input voltage VBE for a given constant output
voltage VCE .
In CE configuration, IB & VBE are input variables. The output variables are IC&
VCE . Fig.1 shows the typical input characteristics for CE configuration. It is plotted
between IB &VBE for different values of VCE.
We can find out the dynamic input resistance (ri) of the transistor at a given
values of VBE . It is defined as the reciprocal of the slope of curve at operating point
(P).
VBE
Page 3
ri = ---------at VCE = CONSTANT

IB
The value of ri is typically 1k, but can range from 800 to 3k.
Note:Input characteristics can be plotted for NPN transistor. Only connection of all voltage
sources, milli-ammeters, &voltmeters will be reversed for the PNP transistor.
PROCEDURE:1. Make the circuit for CE configuration.
2. Connect all the Voltmeter & Ammeter.
3. Input characteristics:- Keep VCE constant, change P1 note IB & VBE. Repeat the
same procedure for different values of VCE. Plot the I/p curve between IB & V BE
for different values of VCE. Find out dynamic input resistance from curve
plotted.
PRECAUTIONS:1. Connect the circuit properly.
2. Loose connection must be avoided.
3. Take the reading carefully.
OBSERVATION TABLE:VCE= 2V
VBE
IB
VCE=5V
VBE
IB
VCE=10V
VBE
IB
1) From input characteristics dynamics input resistance is given by

VBE
ri = ---------- at VCE =constant
IB
RESULT:
Page 4
CONCLUSION:By changing P1 (VBB), forward biasing of emitter junction can be change. Also by
changing P2 (VCC) reverse biasing of collector junction can be changed. So by
changing VBB & VCC transistor can be operates in active, saturation or cut off region.
GRAPH:-
VIVA QUESTION:1. What is mean by saturation region of transistor?

Page 5
2.
3.
4.
5.
6.
7.
Define dc current gain?

What is mean by cutoff region of transistor?
State the range of ?
What is meant by input resistance Ri?
Why emitter is heavily dopped?
Why it is called CE configuration
Page 6
EXPERIMENT NO. 2
OUTPUT CHARACTERISTICS OF CE CONFIGURATION.
AIM:- To study /plot the O/P characteristics of BJT in CE configuration.
APPARATUS REQUIRED:(a)Ammeter 0-10A(1no.) 0-25mA(1no.), Voltmeter 0-5V(1no.) & 0-15V (1no.)
(b)Component values:- Transistor, NPN BC148,PNP BC157,V1 =12V variable,
Vcc=12V variable
CIRCUIT DIAGRAM:-
THEORY:Transistor has a three terminal (emitter base &collector) two junction (emitter
junction & collector junction).
When both the junctions are forward biased then it is called saturation region.
When both the junction are reversed biased then it is called as cut-off region of
region.
usually grounded. The connection is then described in terms of common terminal. By
Page 7
observing the characteristics of the transistor that relates transistor currents and
voltages behaviors of the transistor can be studied. This characteristics curve is known
as static characteristics curve.
Output Characteristics:The curve plotted between I C and VCE for given values of IB is called as output
characteristics.
We can find out the following.
1. Dynamic output resistance,
VCE
ro = ---------at IB = constant
ic
2. DC current gain,
IC
dc = ---------- at VCE = constant
IB
3. AC current gain
iC
ac = ---------iB
at VCE = constant
Note:Output characteristics can be plotted for NPN transistor. Only connection of all
voltage sources, millimeters, & voltmeters will be reversed for the PNP transistor.
PROCEDURE:1. Make the circuit for CE configuration.
2. Connect all theVoltmeter&Ammeter.
3. Output characteristics:Keep IB constant,(BY SETTING P1) change P2 note IC & VCE.
a)
Repeat the same procedure for different values of IB.
b)
Plot the o/p curve between IC & V CE for different values of IB.
c)
Find out dynamic output resistance, dc current gain and ac current
d)
explained in theory section.
gain as

OBSERVATION TABLE:[Type the company name] | Department of Electronics & Telecommunication Engineering
Page 8
FOR IB = 0
VCE
IC
FOR IB = 2mA
VCE
IC
FOR IB =5mA
VCE
IC
CALCULATION:
1.
Dynamics output resistance is given by

VCE
ro = ---------- at IB =constant
IC
= --------
a) From output characteristics = -------------------

b) DC current gain,
IC
dc= ----------- at VCE = constant
IB
= ---------c) AC current gain,
iC
= ---------iB
at VCE = constant
= ----------RESULT:-
Page 9
CONCLUSION:By changing P 1 (VBB) , forward biasing of emitter junction can be change.

Also by changing P2 (VCC) reverse biasing of collector junction can be changed . So
by changing VBB & VCC transistor can be operates in active , saturation or cut off
region.
GRAPH:
VIVA QUESTION:1. Define transistor?

2. What is mean by active region of transistor?
3. Why it is called as CE configuration?
4. What is meant by output resistance Ro?
5. Define ac current gain ac?
6. What is the function of Emitter in the junction transistor?
7. Draw symbol of NPN transistor.
Page
10
EXPERIMENT NO.3
INPUT CHARACTERISTICS IN CB CONFIGURATION
AIM: To study /plot the I/P characteristics of BJT in CB configuration
APPARATUS REQUIRED:(a) Ammeter 0-10A (1no.) 0-25mA (1no.), Voltmeter 0-5V (1no.) &
0-15V (1no.)
(b) Component values:Transistor, NPN BC148, PNP BC157,V1 =12V variable, Vcc=12V
(Variable)
CIRCUIT DIAGRAM:-
THEORY:Transistor has a three terminal (emitter base &collector) two junction. (Emitter
junction & collector junction)
When both the junction is forward biased then it is called saturation
region. When both the junction is reversed biased then it is called as cut-off region of
region.
Page 11

usually grounded. The connection is then described in terms of common terminal.
In this configuration emitter current IE is the input current &collector current I C
is the output current. The input voltages applied between the emitter and base.
Whereas output is taken out from the collector and base.
Input characteristics:The input characteristics are plotted between emitter current I E and emitter base
voltage VEB for constant value of VCB. I/P characteristics shows that if VEB is less cut
in voltage or knee /threshold voltage then I E is negligibly small. After this as V EB
increases its value is 0.3V for Ge transistor & about 0.5V for Si transistor.
For a given operating point input or dynamic resistance is given by
VEB
Ri = ----------at VCB = constant
IE
It may be noted that input char is linear in the upper region but Non linear
(i.e. curved) in the lower region. Therefore the A.C. input resistance (Dynamic
resistance) depends on the location of the operating point selected along the curve. Its
value in the linear region of the curve is about 50
PROCEDURE:1) Make the circuit for CB configuration. Connect all the voltmeter & Ammeter.
2) Check the VCC and VEE voltages by using voltmeter.
3) It is plotted between VEB(x-axis) and IE (y-axis) for constant values of VCB 4)Keep
VCB const. say at 2V vary the VEB by plot P1 and note the corresponding IE in steps
5) Repeat step (4) for different values of VCB say 5V, 10V, 12V etc.
6) Plot the graph between VEB(x-axis) and IE (y-axis) for VCB= -2V, 5V, 10V etc.
7) Select a suitable operating point say point P , on the graph plotted having
VCB=10V, draw a small incremental triangle ABC on static char the dynamic input
resistance is given by
Ri =
VEB
---------- IE
at VCB=10V

3. Connection should be tight.
Page
12
OBSERVATION TABLE:VCB= 2V
VEB
VCB=5V
IE
VEB
VCB=10V
IE
VEB
IE
CALCULATION:
VEB
Ri = --------------- at VCB=10V
IE
RESULT: - from this we calculated the input resistance of the transistor in CB
configuration.
Ri = -----------------------
CONCLUSION:By changing (V EB), forward biasing of emitter junction can be
change. Also by changing (VCC) reverse biasing of collector junction can be changed.
So by changing VEB & VCC transistor can be operates in active, saturation or cut off
region.
GRAPH:
Page
13
VIVA QUESTION:1.
2.
3.
4.
5.
6.
7.
Define .
Why base is made thin?
Why it is called as CB configuration?
What is mean by input resistance Ri?
Define transistor.
Define ICBO.
What is the function of emitter in transistor function?
Page
14
EXPERIMENT NO.4
OUTPUT CHARACTERISTICS IN CB CONFIGURATION
AIM: To study /plot the O/P characteristics of BJT in CB configuration
APPARATUS REQUIRED:(a)Ammeter 0-10A (1no.) 0-25mA (1no.), Voltmeter 0-5V (1no.) & 0-15V (1no.)
(b)Component values:- Transistor, NPN BC148, PNP BC157, V1 =12V variable,
Vcc=12V variable
CIRCUIT DIAGRAM:-
THEORY:Transistor has a three terminal (emitter base &collector) two junction.

(Emitter junction & collector junction) When both the junctions are forward biased
then it is called saturation region. When both the junction is reversed biased then it is
called as cut-off region of transistor. If emitter junction is F.B. & collector junction is
R.B. is called as Active region.
usually grounded. The connection is then described in terms of common terminal
In this configuration emitter current IE is the input current &collector current I C
is the output current. The input voltages applied between the emitter and base.
Whereas output is taken out from the collector and base.
Output characteristics:-
Page
15
The output characteristics is plotted between VCB (x-axis) and collector current
IC(y-axis) for constant value of IE. In the active region, emitter to base junction JE is
forward biased while collector to base junction is reverse biased.
In active region curves are almost horizontal. This shows that O/P dynamic
resistance Ro is very high.
VCB
Ro = --------- at IE = constant
IC
At given operating point, AC & DC current gain is given by
a) DC current gain, dc = IC/IE
b) AC current gain, ac = IC/IE with VCB constant
PROCEDURE:1. Make the circuit for CB configuration. Connect all the voltmeter & Ammeter.
2. Check the VCC and VEE voltages by using voltmeter.
3. It is plotted between VCB (x-axis) and IC (y-axis) for constant values of IE.
4. Keep IE= 0 by adjusting pot P1 vary the VCB voltage in regular steps by Pot P 2
and note the corresponding value of IC. Plot the graph between VCB & IC. Now
keep IE =5mA by using pot P1 again vary the VCB voltage in regular Steps and
note the corresponding values of IC. Plot the graph between VCB (x-axis) and IC
(y-axis).
5. Repeat step 5 for different values of IE
6. Select a suitable operating point on the graph plotted. Draw an incremental
Triangle ABC see fig. find incremental (dynamic) O/P resistance.
VCB
DB
Ro = ---------- at IE = const. = ------------ = -------
IC
CB
dc = IC/IE where IC and IE are the
7. Find DC current gain at this point by
currents at the selected operating point
8. To determine ac, draw a vertical line through the operating point P.
Therefore,
ac = IC/IE

3. Connect the voltmeter and ammeter carefully.
4. Also check the errors of voltmeter and ammeter.
Page
16
OBSERVATION TABLE:
FOR IE = 0
-VCB
IC
-VCB
FOR IE = 2mA
IC
FOR IE =5mA
-VCB
IC
CALCULATION:
VCB
Ro = -------------at IE = Constant
I
CB
= --------- = ---------
AB
DC Current gain, dc = IC/IE
=-------AC Current gain, ac = IC/IE
=
RESULT: The values of different parameters for CB are found to be,
Ro = -------------
dc = ----------------ac = ---------------CONCLUSION:By changing (VEB), forward biasing of emitter junction can be change. Also by
changing (VCC) reverse biasing of collector junction can be changed. So by changing
VEB & VCC transistor can be operates in active, saturation or cut off region.
GRAPH:
Page
17
VIVA QUESTION:1. Explain transistor as a switch?

2. What is the value of in CB configuration?
3. What is mean by output resistance Ro?
4. Which parameter is constant for output characteristic?
5. State that why ICEO is greater than ICBO.
6. Explain the term thermal runaway .
7. State the difference between CB & CE configuration.
Page
18
EXPERIMENT NO.5
RC COUPLED DOUBLE STAGE CE TRANSISTOR AMLIFIER
AIM:-To study the frequency response of RC coupled double stage CE transistor
amplifier.
APPARATUS REQUIRED:
Training module type:EE-22 with CRO , signal generator , patch chords and
instructions manuals.
CIRCUIT DIAGRAM:-
THEORY:One of the most used circuits in the transistor applications is the common emitter
audio amplifier. This circuit performs a variety of functions, is fairly easy to design
and gives good performance.
Stages are capacitance coupled for AC operation and DC stability. Class A
biasing is the most often used, because it allows the output to follow the input.
Fig shows the transistorized RC coupled amplifier. The emitter resistances are shunted
by a bypass capacitor to cause a short circuit for AC. The alternating emitter current
does not cause any drop across emitter resistance. So there is no feedback in the
circuit.
RC coupled amplifier is popularly used for the following reasons:
1. It is the stable in operation.
2. It may be design & constructed for a good frequency response.
Page
19
3. It is comparatively inexpensive because both the load resistance & coupling

capacitor are simple & cheap elements.
PROCEDURE:1. Draw the circuit diagram on the note book. Compare the circuit diagram drawn
with that on the actual setup board and write down the values and no of the
components neatly on the diagram.
2. With no input signal connected, measure the biasing conditions at emitters,
collectors & bases of both the transistors, tabulate them and write down on the
circuit diagram.
3. The gain of the amplifier is about 1000; therefore a potential divider attenuator is
used as shown in fig.
R2
V2 = V1 ------------------(R1+R2)
R2
= V1 ------------(since R1>>R2)
R1
4. Connect points C and D using the patch chords and the points A and B using
another patch chords.
5. Connect an audio oscillator at the input terminals and CRO at the output
terminals and adjust a small and constant value of input voltage. Note down i/p
and o/p voltage using CRO at different frequencies in the observation table. This
is the amplified o/p without any feedback.
6. Plot a graph between voltage gains and frequencies for without feedback.
3. Trace the all waveforms from the CRO carefully.
OBSERVATION:Without feedback arrangement Vi =___________ volts
Sr.No
Vo(V)
Voltage gain (dB)

A = 20log(Vo/Vi)
Frequency
(KHz)
Page
20
Voltage Gain (A)=Vo/Vin

RESULT:
From above formula we calculated the value of voltage gain
Without feedback__________________
CONCLUSION:The frequency response curve between voltage gain & frequency without feedback
arrangement are drawn.
GRAPH:
VIVA QUESTION:1. What are the lower & upper cut off frequencies?
1. What is the need of bypass capacitor in circuit diagram?
2. Why we use coupling between two stages of an amplifier?
Page
21
3.
4.
5.
6.
In an amplifier circuits intermediate stages are CE configured, why?

What is meant by multistage amplifier?
Give the formula for overall power gain for three stage amplifier.
Define Bandwidth.
Page
22
EXPERIMENT NO.6
RC COUPLED VOLTAGE FEEDBACK AMPLIFIER
AIM: To study the frequency response of RC coupled double stage CE transistor
amplifier.
APPARATUS REQUIRED:
Training module type:EE-22 with CRO , signal generator , patch chords and
instructions manuals.
CIRCUIT DIAGRAM:THEORY:One of the most
used circuits in
the
transistor
applications is the
common emitter
audio amplifier.
This
circuit
performs
a
variety
of
functions, is fairly easy to design and gives good performance.
Stages are capacitance coupled for AC operation and DC stability. Class A
biasing is the most often used, because it allows the output to follow the input.
Fig shows the transistorized RC coupled amplifier. The emitter resistances are shunted
by a bypass capacitor to cause a short circuit for AC. The alternating emitter current
does not cause any drop across emitter resistance. So there is no feedback in the
circuit. If we remove the shunt capacitor then the AC voltage developed across the
emitter resistance will be added negatively causing a negative feedback.
RC coupled amplifier is popularly used for the following reasons:
1. It is the stable in operation.
2. It may be design & constructed for a good frequency response.
It is comparatively inexpensive because both the load resistance & coupling capacitor
are simple & cheap elements
PROCEDURE:[Type the company name] | Department of Electronics & Telecommunication Engineering
Page
23
1.
2.
3.
4.
5.
6.
7.
8.
Draw the circuit diagram on the note book. Compare the circuit diagram drawn
with that on the actual setup board and write down the values and no of the
components neatly on the diagram.
With no input signal connected, measure the biasing conditions at emitters,
collectors & bases of both the transistors, tabulate them and write down on the
circuit diagram.
The gain of the amplifier is about 1000, therefore a potential divider attenuator is
used as shown in fig.
R2
V2 = V1 ----------(R1+R2)
R2
= V1-----(since R1>>R2)
R1
Connect points C and D using the patch chords and the points A and B using
another patch chords.
Connect an audio oscillator at the input terminals and CRO at the output
terminals and adjust a small and constant value of input voltage. Note down i/p
and o/p voltage using CRO at different frequencies in the observation table. This
is the amplified o/p without any feedback. In case of feedback arrangement
change the value of R11 to vary feedback fraction.
Now for obtaining negative current feedback, disconnect points A and B and
repeat step 5.
An alternative method of obtaining feedback is to connect point E at the output to
input using the patch chords and repeat step 5.
Plot a graph between voltage gains and frequencies for without feedback and
with feedback arrangement.

3. Trace the all waveforms from the CRO carefully
OBSERVATION:1. without feedback arrangement
Vi =___________ volts
S.No. Vo(V)
Voltage gain (dB)

A = 20log(Vo/Vi)
Frequency
(KHz)
Page
24
2. with feedback arrangement

3. Vi =___________ volts
S.No. Vo(V)
Voltage gain (dB)
Afb = 20log(Vo/Vi)
Frequency
(KHz)
RESULT:
From this we calculated the value of voltage gain
without feedback__________________
with feedback_____________________
CONCLUSION:When negative feedback is used the voltage gain is reduces but output waveforms
improves and stability increases. When frequency response curve between voltage
gain and frequency for feedback and without feedback arrangement are plotted the
curve resemble as shown in fig.
VIVA QUESTION:[Type the company name] | Department of Electronics & Telecommunication Engineering
Page
25
1.
2.
3.
4.
5.
6.
7.
What are the types of feedback?

What is the need of bypass capacitor in circuit diagram?
Why we use coupling between two stages of an amplifier?
Define voltage gain.
Differentiate between positive & negative feedback.
Give the advantages of negative feedback.
Why positive feedback amplifier is used in oscillator.
Page
26
EXPERIMENT NO.7
WEIN BRIDGE OSCILLATOR
AIM: To study the circuit of Wein Bridge Oscillator & measure the frequency of
oscillation.
APPARATUS REQUIRED:
(a) CRO, Digital multimeter, Patch cords.
(b) Components Value:- R1 = R4 = 10K, C1A = C2A = 0.1. f, C1B = C2B = 0.22. f,
R5 = 100K,R6 = 10K, R7 = 100K, R8 = 10K, R9 = 1K. R10 = 1K, R2 = 3K,
R3 = 6K, C0 = 0.1. f, Q1 = Q2 = BC548
CIRCUIT DIAGRAM:
THEORY:
Wien Bridge oscillator is sine wave AF oscillator. Fig. Shown on the front panel
of the kit circuit diagram of the Wien - bridge oscillator
The circuit consist of two stage RC coupled amplifier, which provide an
approximately 360 or 0 phase - shift between I/P & O/P signal. so the feed back
network has no need to induce any additional phase shift. The feedback network
consists of R1 - C1, R4 C2 called as lead - lag network and R3 - R2 called a voltage
divider. The lead - lag network provides a positive feedback to the input of the first
stage & the voltage divider provides the negative feedback to the emitter of Q 1
transistor which controls the gain of transistor Amplifier Q1.
Page
27
The operation of Wien Bridge Oscillator is as follows:

When the circuit is energized by switching on the supply a small random oscillations
appearing at the base of Q1 transistor are amplified, at its collector. These oscillations
are further amplified by the collector of Q 2 transistor. Since the oscillations at the
collector of Q2 transistor has been inverted twice, therefore these oscillations are in
phase with the input signal. The part of the output signal is feedback to the base of Q 1
through a Wien - bridge network. This is further amplified. The process continues, till
sustained oscillations are produced finally it produces sine wave O/P, having
frequency in Audio Range so it is also called as AF Oscillator.
The frequency of oscillations for the wien - bridge oscillator is given by the
relation.
Fo 1 / 2
R1 R4 C1C 2
If R1=R4=R &
Then
C1=C2=C
1
Fo = ---------------
------------ (2)
and the ratio of the resistor R3 to R4 is given by

R3
------------
C
or
R3 > 2R2
Thus a ratio of R3 to R4 greater than 2 will provide a sufficient gain for the
circuit to oscillate at the desired frequency.
The frequency of oscillation can be changed by varying the values of R 1, R4 , C1
or C2.
PROCEDURE:
1. Study the circuit provided on the front panel of the kit.
2. Connect Capacitors C1A & C2A in the Circuit. Note this values & determine its
Theoretical frequency by using equation (1) Fo = ------ Hz.
3. Connect the CRO at O/P terminal.
4. Switch ON the power supply.
5. Observe & Note the practical frequency of oscillation compare it with theoretical
value.
6. Now Connect Capacitors C1B & C2B in the Circuit & Repeat the above steps.
7. Draw the O/P on graph.
OBSERVATIONS:
Page
28
R1 = ________________ K,
R2 = __________________K
C1A = _______________ f ,
C1B = _________________ f
C2A = _______________ f ,
C2B = _________________ f
R4 = ________________ K,
1)
R4 = __________________ K
Theoretical Frequency of Oscillation:

Fo 1 / 2
R1 R4 C1C 2
= ---------Hz
As R1 = R4 = R & C = C1A = C2A,

1
Therefore,
Fo = ------------ = ----------Hz.
2RC
2) Practical Frequency of Oscillation
Fo = _________________ Hz
RESULT:As the Wien bridge transistor amplifier Q 1 & Q2 produces oscillations which
are in AF range. So the circuit used as Wien bridge oscillator.
CONCLUSION:
Theoretical & practical frequency of oscillation (Fo) for Wein bridge oscillator is
nearly equal.
PRECAUTIONS:
1.
2.
3.
Take the trace of all waveform from CRO screen carefully

No variation in value of resistant ad capacitance.
Connect the all connections carefully.
VIVA QUESTION:
1. What is the oscillator?
Page
29
2.
3.
4.
5.
6.
7.
Define the frequency of oscillation?

What is the advantage of wein bridge oscillator as compare to other oscillators?
Give the range of frequency in Wein bridge oscillator?
Give the difference between amplifier & oscillator.
Define Barkhausein criterion.
Where wein bridge oscillator is commonly used.
Page
30
EXPERIMENT NO.8
RC PHASE SHIFT OSCILLATOR
AIM: To study the RC phase shift oscillator.
APPARATUS REQUIRED:
1. CRO
2. Training module of RC phase shift oscillator.
3. Patch cords.
CIRCUIT DIAGRAM:
THEORY:
The basic phase shift oscillator, as the name implies, is a conventional amplifier ad a
phase shifting RC feedback network. It is typically used in fixed frequency
applications. As in the conventional LC oscillator, the collector output signal must be
shifted 180 to produce the required regenerative feedback. The phase shift oscillator
accomplishes this with a series of RC networks connected in the collector-to-base
feedback loop. In a purely capacitive circuit, current leads voltage by 90. In a RC
network the phase difference between current and voltage falls between 0 and 90,
because resistance affect the phase relationship. By carefully selecting the resistance
and capacitive values, the amount f phase shift across an RC network can be
controlled. It is easy to cascade identical networks. To obtain the 180 phase shifts
requires filters that are even multiple of 180. N this case 90,60, 45, and 30 are all
multiple of 180.resistance does not vary with frequency, however the capacitor is
frequency sensitive, since its reactance changes with frequency. As X C changes, the
phase shift of the RC network also varies. When three 60 phase shift network are
Page
31
cascaded the combined phase shift is 180. Each network contributes 60 to the total
phase shift of 180.
The phase shift network comprised of R1C1, R2C2, and R3C3 is connected
between the collector and base of Q1, provides the 180 phase shift that make the
circuit regenerative. To compensate the losses use the high gain of transistor (30 and
50).
The approximate frequency of oscillation can be determined using the formula
Fo 1 / 2
6 RC
Stability can be improved by increasing the no of RC networks, there by

reducing the phase shift across each network.
PROCEDURE:
1. Switch on the trainer and check the power supply to be +15V.
2. Connect A cannel CRO terminal to the output of oscillator.
3. Adjust 470K potentiometer (P1) to get 1 KHz sin wave.
4. Connect B cannel CRO terminal to the feedback path marked A.
5. Observe the phase difference between output and input.
6. At point A the phase difference should be 60.
7. At point B the phase difference is 120.
8. At point C the phase difference is 180.
OBSERVATION:
Trace the all wave forms from the CRO a compare the all waveform with each others
and observe the phase shift between output and input.
CALCULATION:
Fo 1 / 2
6 RC
=-----------Hz.
RESULTS:
Frequency of oscillation (Fo) =-------------Hz.
Phase of input signal -----------------------Phase of output signal----------------------CONCLUSION:
The phase shift oscillator functions best at fixed frequencies, since any variation of
resistance or capacitance upsets the phase shift.
PRECAUTIONS:
1. Connect the all connections carefully.
2. No variation in value of resistance and capacitance.
Page
32
3. Take the trace of all waveform from CRO screen carefully.
VIVA QUESTION:
1. In RC phase shift oscillator variation in R& C value what effect on the
output signal phase shift?
2. What is the oscillator?
3. What happened if the number of RC network increases in RC phase shift
network?
4. Give the types of an oscillator.
5. What is meant by undamped oscillation?
6. How can an amplifier are converted into oscillator.
7. What is difference between signal generator & oscillator?
Page
33
EXPERIMENT NO.9
TRANSISTORISED PUSH PULL AMPLIFIER
AIM: General study of push pull audio power amplifier.
APPARATUS REQUIRED:
1. Training module of push pull amplifier type: EE-24 analog with its instruction
manual and patch chords.
2. Audio signal generator.
3. Output power meter.
4. Distortion-factor meter.
5. CRO
6. 8 speaker.
CIRCUIT DIAGRAM:
THEORY:
The push pull connection is the most widely used in power amplifier. It has less
distortion and much efficiency. The resistor R 1, R2 & RE fix up the operating point; as
in any other transistor amplifier. The out put transformer has center-tapped primary
and it serves to match the load with the output impedance of transistors.
The input transformer has a center-tap secondary. It provide input signal to the
two transistors. These signals are equal in magnitude but opposite in phase. On
applying the input signal, the collector current of one transistor is pulled down.
Hence the name push pull amplifier. The out put voltage is proportional to net current
(IC1-IC2) flowing through the primary of the output transformer.
Page
34
We may connect load resistor to measure the out put power.

PROCEDURE:
1. Find the transistor type numbers from the experimental board & also find the
transistor are n-p-n or p-n-p.
2. Trace the circuit of the amplifier a write down the values of the components used.
3. Switch ON the instrument. Measure voltage VCE for both the transistor. For a
matched pair of transistor, the voltage VCE for both should be the same. Measure
voltage drops across RE gives the sum of the two emitter-currents. Half of this
current will be approximately the collector current of each transistor.
4. Feed the AC signal at the input. Keep the frequency at 1 KHz (midband
frequency). Connect the loudspeaker as a load resistor at the out put. If you hear
a sound, the circuit is working.
5. Replace the loudspeaker with power meter. Select a typical value of the load
impedance (say, 8) in the power meter. Also connect the output to a CRO. See
the wave shape of the output voltage on the CRO. Increase the input signal
voltage tilt h output wave shape starts getting distorted. Note this input signal
voltage. Now reduce the input signal to a value slightly below this voltage.
6. Change the impedance (in the power meter) in steps. For each value of
impedance, not down the output power. Plot the graph between output power and
load impedance. From this graph, find the impedance for which the output power
is maximum. This is the value of the optimum load. Select load impedance (in
the power meter) which is equal to or near the optimum load. See the output on
the CRO. Increases the input
7. Signal till the wave shapes just show distortion. Note the value of this input
voltage. This gives the maximum signal handing capacity of the amplifier.
8. Slightly increase the input voltage connects a distortion-factor meter at the output
and measure the distortion.
OBSERVATION:
1. Operating point:
VCC=..V; VCE1=.V; VCE2=V
VE=. mV; IC1=IC2= (VE/RE) =.mV
2.
Typical load connected:

Input signal frequency = 1 KHz
Maximum input signal giving undistorted output =..
3.
Optimum load :
Page
35
Input signal =..mV

Signal frequency =1 KHz
S. No.
Load impedance(in )
4.
Out put power

(in mW)
Maximum signal handling capacity:

Selected value of optimum load =
Frequency of the input signal =
% distortion in output=..mV
RESULTS:
1. Optimum LOAD impedance =
2. Maximum signal handling capacity =..mV
3. Distortion=..%
CONCLUSION:
PRECAUTIONS:
1. Connect the circuit properly.
2. Trace the all waveforms from the CRO carefully.
3. Take the reading from Audio signal generator, Output power meter &
Distortion-factor meter carefully.
VIVA QUESTION:
1.
2.
3.
4.
5.
6.
7.
What is the advantage of push-pull amplifier as compare to class-B amplifier?

What is the mean of power amplifier?
Which types of distortion are occurs in push-pull amplifier?
What is the function of the center tapped transformer in push-pull amplifier?
Give the type of power amplifier.
Why a step down transformer is used in output circuit of output transformer.
Why power amplifier is called large signal amplifier.
Page
36
EXPERIMENT NO.10
DARLINGTON PAIR AMPLIFIER CIRCUIT
AIM: Experiment with Darlington pair amplifier.
APPARATUS REQUIRED:
1. Training module of Darlington pair amplifier.
2. Voltmeter.
3. DC supply
CIRCUIT DIAGRAM:
THEORY:
DARLINGTON CIRCUIT: In the diagram shown with common-base configuration,
for transistor T1, we have
IC1 = 1iE1 and iB1 = iE1- iC1 = iE1(1-1)
For the transistor T2,
iC2 = 2iB1= 2iE1(1-1)
And
iCT = iC1 + iC2 = iE1(1+2-12)
If
1 = 2 = 0.98
If two common Then
eff = iCT / iE1 = (1+2-12)= 0.9996
A value almost equal to 1. Also

hfe = = /(1-) = 0.9996/(1-0.9996) = 2499
Emitter stages are cascaded, the current amplification factor would be h fe2 = 2401. So
a Darlington pair circuits gives a high current gain and also helps to eliminate a
number of circuit component.
Page
37
In fig the input impedance T2 is given by

Rin = hie + (1+hfe) RL
Where RL is the load in the emitter circuit. The impedance of transistor T2 will be
Zi2 = hie2 + (1+hfe2)Zi1
Where Zi1 is the load in the emitter circuit of T2. In this way the input impedance is
increased.
Difference amplifier:
Another effective method of improving the performance is by the use of difference
amplifier shown in fig.
Figure 3 & 4:
Page
38
If the transistors and circuit components are completely matched, there will be
complete cancellation of effects of supply voltages, etc. The configuration will be
very effective especially if the emitter circuit resistance is equal to, or larger than, the
value of load resistance. However, the circuit gain for the common mode signal is
much smaller than for the conventional circuit.
PROCEDURE:
1. The base terminal of TR1 and TR2 are grounded. The DC collector voltages VO1
and VO2 with respect to ground are measured so as t find the difference VO1-VO2.
The operating points for the two devices are noted as well as current through RE.
2. VS1 adjusted to be VS2 = 10mV at a single source frequency of 1 KHz; then V O1
and VO2 are measured and noted so as to calculate Ad.
3. VS1 is adjusted to be VS2 = 20m V at a single source frequency of 1 KHz ; the VO1
AND VO2 measured and noted so as t calculate AC. The value of CMRR can be
computed from the measured values of Ad and AC.
RESULTS:
CONCLUSION:
2. Check the connection before switch on the power supply.
VIVA QUESTION:[Type the company name] | Department of Electronics & Telecommunication Engineering
Page
39
1.
2.
3.
4.
5.
6.
What is mean by Darlington pair?

Why we use Darlington pair?
Define and ?
What is the relation between and ?
What are the advantages of Darlington amplifier?
Give application of Darlington amplifier.
Page
40
EXPERIMENT NO.11
COLPITTS OSCILLATOR
AIM: To determine the feedback factor and frequency of oscillation of Colpitts
Oscillator.
APPARATUS REQUIRED: Madras-83 Kit,connecting wires,multimeter ,CRO etc.
CIRCUIT DIAGRAM:
THEORY:
The colpitt is essentially shunt-fed, so DC collector current does not pass through the
choke. Since the colpitts is more stable, it is used in many signal generators.
Bias networks, eliminated for simplicity, are similar to other transistor
oscillator. The tapped capacitor arrangement identifies the Colpitts oscillator. As with
all LC oscillators, frequency is determined by inductor L 1 and the series combination
of capacitors C1 &C2.Capacitor C3 couples AC collector voltage to the tank, while
blocking DC.
Since the oscillator is a common-emitter configuration, collector voltage is 1800
Page
41
The arrangement of capacitor C1 &C2 in a voltage-divider network produces the

desired 1800 phase shift across capacitor C1, resulting in regenerative or positive
feedback.
FIG-1
Figure 2 shows the tank circuit with negative potential at the bottom plate of C 2.This
negative potential is felt across the entire tank, charging the top plate of C 1 to a
positive potential through inductor L1.The result is that the feedback voltage across
C1 is phased shifted 1800, producing regenerative feedback. Q1 is further forward
biased and quickly saturates.
With Q1 saturated, there is no voltage drop across RFC, because current is no
longer changing as shown in below fig1.The flywheel effect of the tank then takes
over (fig-3) as C1 &C2 act as one capacitor discharging through L 1 & building up the
magnetic field.
Fig-2&fig-3
Page
42
Fig.2
Fig3
When the capacitors are completely discharged, the field collapses & charges
the top plate of C1 negative, reverse biasing Q1.Q1 is driven into cutoff. When
feedback capacitor C1 is fully charged, it discharges through L1.
Again a field is built up around L1 that subsequently collapses and charges C1 in
the opposite direction (fig-4).
Page
43
Fig.4.
Transistor Q1 is now forward biased and conducts. Thus, energy lost in the tank is
replaced .a similar action occurs each cycle as positive feedback replenishes energy
expanded. The series combination of C1 & C2 determines oscillator frequency. C1, the
feedback capacitor, controls the amount of feedback. This is result of the series
voltage-divider arrangement of C1 & C2.If the capacitances of C1 decreased the
amount of feedback is increased. This can be illustrated by reviewing the formula for
capacitive reactance (Xc).
Xc=1/2FC
A decrease in capacitances C, result in opposition (Xc).Therefore, a larger feedback
voltage is developed across this increased opposition. The feedback factor is
determined by the ratio of the capacitors.
Feedback Factor (B)=C2/C1
The feedback factor for the Colpitts is typically 0.1 to 0.5, or 10 to 50%. Too much
feedback distorts the output waveform, as a transistor Q1 is saturated for long periods
of time.A feedback factor of less than 10% may not be sufficient to sustain the
oscillation.
PROCEDURE:
1] Patch the circuit as shown in wiring diagram.
2] Switch on the trainer and measure the power supply to be +15.
3] Observe the output at the collector of transistor on CRO.
4] Vary the 1M Potentiometer and 10K Potentiometer to get a sine wave.
Page
44
5] Measure the frequency of the output with C1=0.1F and C2=0.01F.

6] Disconnect C1 & C2 & select C1=0.01F 7 C2=0.001F and measure the output
frequency.
PRECAUTION:
1. Connect the circuit properly.
2. Check the connection before switch on the power supply.
OBSERVATION TABLE:
Sr.No.
C1 (F)
C2
1
2
3
0.1 (F)
0.01 (F)
0.001 (F)
0.01(F)
0.001(F)
(50-500)pF
Frequency
(inKHz)
RESULT:
CONCLUSION:
VIVA-VOICE QUESTION:
1] What is meant by tank circuit?
2] Define Oscillator.
3] Give the application of colpitts oscillator
4] Define Feedback Factor.
5] What is meant by RFC?
Page
45
EXPERIMENT NO.12
CLAPP OSCILLATOR
AIM: To construct clap oscillator and determine oscillator stability.
APPARATUS REQUIRED: Connecting wires, millimeters, CRO etc
CIRCUIT DIAGRAM:
THEORY:
The colpitts is essentially shut-fed, so DC collector current doesnt pass through the
choke. Since the colpitts is more stable, it is used in many signal generators.
(Fig 1)
Page
46
Bias network eliminated for simplicity, are similar to other transistor oscillators.
The tapped capacitor arrangement identifies the colpitts oscillator. As with all LC
oscillators frequency is determined by inductor L 1 and the series combination of
capacitors C1 and C2. Capacitor C3 couples AC collector voltage to the tank, while
blocking DC.
Since the oscillator is a common emitter configuration, collector voltage is out
of phase with base voltage.
The arrangement of capacitors C1 and C2 in a voltage divider network produces
the desired 1800 phase shift across capacitor C1, resulting in regenerative or positive
feedback. The feedback factor, usually 0.1 to 0.5 is determined by the ratio of C 1to C2.
Feedback increases if the value of C1 is lowered. Although the combination of C1 and
C2 determines oscillator frequency, C2 has most pronounced effect on frequency.
The colpitts is shock-excited into oscillation much like the other oscillator.
Initial forward bias is furnished by the bias network and Q1 begins to conduct. The
DC collector current path is from emitter to collector, through the RFC, returning to
the power supply. This initial surge of current causes a negative voltage drop across
the RFC, since the change is rapid. Capacitor C 3 couples this negative voltage to the
lower plate of capacitor C2. For simplicity, the following discussion will cover only
the AC current path in the tank circuit.
Fig 2 shows the tank circuit with negative potential at the bottom plate of C 2.
This negative potential is felt across the entire tank, charging the top plate of Q1 to a
positive potential through indicator L1. The end result is that the feedback voltage
across C1 is phase shifted 180o producing regenerative feedback. Q1 is farther forward
biased and quickly saturates.
Page
47
With Q1 saturated, there is no voltage drop across RFC, because current is no

longer changing as shown in below fig1.The flywheel effect of the tank then takes
over (fig-3) as C1 &C2 act as one capacitor discharging through L 1 & building up the
magnetic field.
Fig-2&fig-3
Fig.2
Fig.3
When the capacitors are completely discharged, the field collapses & charges the top
plate of C1 negative , reverse biasing Q1.Q1 is driven into cutoff. When feedback
capacitor C1 is fully charged, it discharges through L1.
Again a field is built up around L1 that subsequently collapses and charges C1
in the opposite direction (fig-4)
Page
48
CIRCUIT DESCRIPTION:
The clapp oscillator shown in fig 5 is a variation of the colpitts oscillators. The
only difference is the addition of variable capacitor C 3. Capacitor C3 forms a seriesresonant circuit with inductor L1 and allows capacitor tuning without affecting the
feedback ratio. C3 is small, in relation to C 1 & C2 due to the relationship of capacitors
in series and parallel circuit configuration, C3 effectively determines the oscillators
frequency.
Transistor Q1 is now forward biased and conducts. Thus, energy lost in the tank
is replaced .a similar action occurs each cycle as positive feedback replenishes energy
expanded. The series combination of C1 & C2 determines oscillator frequency C1, the
feedback capacitor, controls the amount of feedback. This is result of the series
voltage-divider arrangement of C1 & C2.If the capacitances of C1 decreased the
amount of feedback is increased. This can be illustrated by reviewing the formula for
capacitive reactance (Xc).
XC=1/2FC
A decrease in capacitances C, result in opposition (Xc).Therefore, a larger
feedback voltage is developed across this increased opposition. The feedback factor is
determined by the ratio of the capacitors.
Feedback Factor (B) =C2/C1
Page
49
The feedback factor for the Colpitts is typically 0.1 to 0.5, or 10 to 50%. Too
much feedback distorts the output waveform, as a transistor Q1 is saturated for long
periods of time. A feedback factor of less than 10% may not be sufficient
PROCEDURE:
1] Patch the circuit as shown in wiring diagram.
2] Switch on the trainer and measure the power supply to be +9.
3] Observe the output at the collector of transistor on CRO.
4] Measure the frequency on CRO at about 80 KHz.
5] Compare the practical frequency with the theoretical frequency by given formula
Fo 1 / 2
LC
RESULT:
CONCLUSION:
VIVA QUESTION:
1. What is oscillator?
2. What is the difference between clapp & colpitts oscillator?
3. Define capacitive reactance.
4. What is meant by sustain oscillation?
5. Give the advantage & disadvantage of clapp oscillator.
Page
50
EXPERIMENT NO.13
Transistor series voltage regulator circuit
AIM: To design and study a transistor series voltage regulator circuit
Apparatus Required :
Full wave bridge rectifier circuit components (Not shown in figure): Transformer, 4
Diodes, filter capacitor, C = 470 F, Transistor: SL100 (or equivalent general purpose
npn), Zener diode: 6V2, Resistors: Limiting resistor R1= 330 _, shunt resistor, R2=
4.7 K_, Load resistors: ranging from 500 _ and above or a variable load in the same
range, Bredboard, connecting wires.
Theory:
A regulated power supply provides an output voltage which is maintained or regulated
within certain predefined limits. To regulate small amounts of current the cheapest
approach is to use a zener diode. The efficiency of Zener regulated power supply
becomes very low when the load current is high. Under such conditions a Zener
controlled transistor is always used for maintaining output voltage constant. Basically
there are two types of Zener controlled transistor voltage regulators: series voltage
regulators and shunt volatage regulators.
We will study the first one in this experiment. A simple series voltage regulator using
an NPN transistor and a Zener diode is shown in figure. This circuit is called a series
regulator because the transistor is connected in series with the load. This circuit is also
called an emitter follower voltage regulator because transistor Q is connected in
emitter follower configuration. The unregulated dc supply (or filtered output from the
rectifier) is fed to the input terminals and regulated output voltage V out is obtained
across the load resistor RL. from the circuit one can obtain the output voltage as
Vout = Vz VBE = ILRL
Here, the zener diode provides the reference voltage whose value is chosen according
to the output desired from the power supply. The transistor acts as a variable resistor,
whose resistance varies with the operating conditions (base current I B). The principle
of operation of such a regulator is based on the fact that a large proportion of the
change in supply (or input) voltage appears across the transistor and, therefore output
voltage tends to remain constant.
Page
51
Circuit Diagram :
Procedures :
1.Measure all the values of resistors using multimeter. In case of a pot, measure its
value for a given setting by disconnecting it before/after measuring the corresponding
output across it.
2. Identify various terminals of the transistor. Measure its gain.
3. Note down the break down voltage of the zener diode.
4. Construct a full wave rectifier circuit (not shown in circuit diagram). Then, add the
rest part of the circuit across the filter capacitor as per the diagram. Measure the
unregulated dc input voltage across the filter capacitor of the full wave rectifier
circuit.
Note that you have to set an input voltage relatively higher than the zener
voltage so that the break down condition is satisfied.
5. Keeping the input voltage constant, vary the load resistance and record the
corresponding output voltage and load current.
6. Plot VL~ IL graph and do a straight line fit to determine load regulation in the
above
range of load and find the supply resistance from its slope.
7. To estimate line regulation, set a suitable value of load. Keeping the load constant,
vary input voltage and record the corresponding output voltage and current.
8.Plot VL~Vin graph and do a straight line fit to determine load regulation in the
above range of input.
Observations:
Estimated output Vout = Vz VBE = ____________
Page
52
Table(I):
Load Regulation for Vin = _________
Sr.no
RL ()
VZ(volt)
VBE (volt)
Vz VBE (Volt)
Vout
(measured)
(Volt)
Output
current IL
1.
2.
3.
4.
Table(II):
Line Regulation for RL = _________
Estimated Output current IL = (Vz VBE)/RL = _______
Sr.no
Vin
(volt)
VZ(volt)
VBE (volt)
Vz VBE (Volt)
Vout
(measured)
(Volt)
Output
current IL
1.
2.
3.
4.
Graphs:
(I)
Plot VL (Y-axis) ~ IL (X-axis).
Load regulation (%) = __________

Supply resistance = _____________
(II) Plot VL (Y-axis) ~ Vin (X-axis).
Line regulation (%) = ____________
Page
53
EXPERIMENT NO.14
Two Stage RC Coupled Transistor Amplifier
AIM: To design a two stage RC coupled common emitter transistor (NPN) amplifier
circuit and to study its frequency response curve.
Apparatus Required :
1. Transistor: CL100 (or equivalent general purpose npn, 2 nos)
2. Resistors: R1, R3= 26 (27) K_, R2, R4= 5 (4.7+0.22) K_, RC 1, RC2= 4 (3.9) K_,
RE1,
RE2= 1k_ (RE11, RE21=470 _; RE12, RE22=560 _) (2 nos. of each resistance value)
3. Capacitors: C1= C3= C5= 1 F (3 nos.), C2= C4= 100F (2 nos.)
4. Power Supply (VCC = 12V)
5. Oscilloscope
6. Function Generator (~ 100-200 mV pp, sinusoidal for input signal)
7. Breadboard
8. Connecting wires.
Theory :
A single stage of amplification is often not enough for a particular application. The
overall gain can be increased by using more than one stage, so when two amplifiers
are connected in such a way that the output signal of the first serves as the input signal
to the second, the amplifiers are said to be connected in cascade. The most common
arrangement is the common-emitter configuration. Resistance-capacitance (RC)
coupling is most widely used to connect the output of first stage to the input (base) of
the second stage and so on. It is the most popular type of coupling because it is cheap
and provides a constant amplification over a wide range of frequencies. These R-C
coupled amplifier circuits are commonly used as voltage amplifiers in the audio
systems.
Circuit Diagram :
Page
54
The circuit diagram above shows the 2-stages of an R-C coupled amplifier in CE
configuration using NPN transistors. Capacitors C1 and C3 couple the input signal to
transistors Q1 and Q2, respectively. C5 is used for coupling the signal from Q2 to its
load. R1, R2, RE1 and R3, R4, RE2 are used for biasing and stabilization of stage 1
and 2 of the amplifier. C2 and C4 provide low reactance paths to the signal through
the emitter.
Overall gain:
The total gain of a 2-stage amplifier is equal to the product of individual gain of each
stage. (You may refer to the handout for single stage amplifier to calculate individual
gain of the stages.) Once the second stage is added, its input impedance acts as an
additional load on the first stage thereby reducing the gain as compared to its no load
gain. Thus the overall gain characteristics is affected due to this loading effect.
The loading of the second stage i.e. input impedance of second stage,
Zi2 = R3 II R4 IIre2
The overall gain of the 2 stage amplifier is Av= Av1 A v2.
Frequency Response Curve :
The performance of an amplifier is characterized by its frequency response curve that
shows voltage gain (often expressed in dB units) plotted versus frequency. The
frequency response begins with the lower frequency region designated between 0 Hz
and lower cutoff frequency. At lower cutoff frequency, fL , the gain is equal to 0.707
Amid. Amid is a constant mid-band gain obtained from the mid-band frequency region.
The third, the upper frequency region covers frequency between upper cutoff
frequency and above. Similarly, at upper cutoff frequency, fH, the gain is equal to
0.707 Amid. Beyond the upper cutoff frequency, the gain decreases as the frequency
increases and dies off eventually.
Procedure :
1. Measure and record all the values of resistance and capacitance and _ of the
transistor
using a multimeter. Configure the circuit as per the diagram. Make a provision so that
the two stages can either be separated or connected as and when required.
2. Apply supply voltage to the circuit. Measure and record all the dc parameters of
each
individual stage separately as listed in Table 1 in absence of the ac signal.
Page
55
3. Next, set the function generator at 20kHz by putting the frequency knob in
20KHz range and adjusting the variable knob. Also, set the Attenuation button
at 40dB. Connect the output to the oscilloscope and adjust the Amplitude knob till
you get a sinusoidal input signal, Vi _ 100-200 mV peak-to-peak value. DO NOT
CHANGE THIS SETTING THROUGHOUT THE EXPERIMENT.
4. To fill up first row of Table 2 the two stages should be separated. Now apply the
input signal to the circuit at the first stage keeping the connection to oscilloscope
intact. Feed the output of the first stage to the other channel of oscilloscope. Take
care to make all the ground pins common. Measure the output and calculate unloaded
gain of stage 1.
5. Similarly by applying input at the second stage measure the output and calculate the
unloaded gain of second stage.
6. For the second row of Table 2, connect the two stages. Apply the input signal at the
first stage Measure the output of first stage and calculate its loaded gain.
7. Now, with the input signal at the first stage, measure the output at the second stage
and calculate the total gain of the two stage amplifier and complete Table-2.
8. To study the frequency response of the two stage amplifier, vary the input signal
frequency in the range 20 Hz 2 MHz, keeping the input signal amplitude always
constant. Observe measure and record the output voltage, Vo at the second stage.
(You may have to measure Vi and take the ratio Vo/Vi each time in case input
fluctuation is too large to hold constant.) Calculate voltage gain for each frequency.
9. Plot the frequency response curve, i.e. voltage gain in dB versus frequency on a
semilog graph-sheet.
10.Estimate the mid-frequency gain and also the lower and higher cut off frequencies
and hence the bandwidth.
Observations:
_1 = _____________ , _2 = _____________
Stage 1: R1= ____, R2= ____, RC= ____, RE= ____+___; C1= ___, C2= ___, CE=
___
Stage 2: R1= ____, R2= ____, RC= ____, RE= ____+___; C1= ___, C2= ___, CE=
___
Page
56
Graphs: Plot the frequency response curve and determine the cut-off frequencies,
bandwidth and mid-band gain.
Precautions:
3. Vary the input signal frequency slowly.
4. Connect electrolytic capacitors carefully.
Page
57
EXPERIMENT NO.15
Hartley Oscillator
Aim :- To construct Hartley oscillator using a transistor, to find out the frequency of
oscillation and comparing it to that of theoretical frequency.
Apparatus :- n-p-n transistor, Carbon resistors (as shown in circuit), two inductors,
capacitors, dc power supply, CRO and connecting terminals.
Formulae :- The frequency of oscillation of the oscillator f = 1/2 LC Hz
Where L = L1 + L2 = Resultant inductance of the series combination.
L1, L2 = Self inductances of the two coils (H)
C = Capacitance of the condenser (F)
Theory :-The Hartley oscillator is designed for generation of sinusoidal
oscillations in the R.F range (20 KHz - 30 MHz). It is very popular and used in radio
receivers as a local oscillator. The circuit diagram of Hartley oscillator (parallel or
shunt-fed) using BJT is shown in Figure. It consists of an R-C coupled amplifier using
an n-p-n transistor in CE configuration. R1 and R2 are two resistors which form a
voltage divider bias to the transistor. A resistor RE is connected in the circuit which
stabilizes the circuit against temperature variations. A capacitor CE is connected in
parallel with RE, acts as a bypass capacitor and provides a low reactive path to the
amplified ac signal. The coupling capacitor CC blocks dc and provides an ac path
from the collector to the tank circuit. The L-C feedback network (tank circuit) consists
of two inductors L1, and L2 (in series) which are placed across a common capacitor C
and the centre of the two inductors is tapped as shown in fig. The feedback network
(L1, L2 and C) determines the frequency of oscillation of the oscillator.
Circuit Diagram :
Page
58
When the collector supply voltage Vcc is switched on, collector current starts rising
and charges the capacitor C. When this capacitor is fully charged, it discharges
through coils L1 and L2, setting up damped harmonic oscillations in the tank circuit.
The oscillatory current in the tank circuit produces an a.c. voltage across L1 which is
applied to the base emitter junction of the transistor and appears in the amplified form
in the collector circuit. Feedback of energy from output (collector emitter circuit) to
input (base-emitter circuit is) accomplished through auto transformer action. The
output of the amplifier is applied across the inductor L1, and the voltage across L2
forms the feedback voltage. The coil L1, is inductively coupled to coil L2, and the
combination acts as an auto-transformer. This energy supplied to the tank circuit
overcomes the losses occurring in it. Consequently the oscillations are sustained in the
circuit. The energy supplied to the tank circuit is in phase with the generated
oscillations. The phase difference between the voltages across L1 and that across L2 is
always 180 because the centre of the two is grounded. A further phase of 180 is
introduced between the input and output voltages by the transistor itself. Thus the total
phase shift becomes 3600 (or zero), thereby making the feedback positive or
regenerative which is essential for oscillations. So continuous undamped oscillations
are obtained.
Procedure :1.The circuit is connected as shown in figure.
2.Connect the CRO across theoutput terminals of the oscillator. Switch on the power
supply to both the oscillator and CRO.
3.Select proper values of C, L1 and L2 in the oscillator circuit and get the sine wave
form on the screen of CRO.
Page
59
4.The voltage (deflection) sensitivity band switch (Y-plates) and time base band
switch (X-plates) are adjusted such that a steady and complete picture of one or two
sine waveform is obtained on the screen.
5.The horizontal length (l) between two successive peaks is noted. When this
horizontal length (l), is multiplied by the time base (m) i.e. sec/div , we get the timeperiod (T = l x m).The reciprocal of the time-period(1/T) gives the frequency (f).
6.This can be verified with the frequency, calculated theoretically by using the above
formula.
7.The experiment is repeated by changing C or L1 or L2 or all. The readings are noted
in the table given.
Precautions :1) Check the continuity of the connecting terminals before going to
connect the circuit.
2) Identify the emitter, base and collector of the transistor properly before connecting
it in
the circuit.
3) The horizontal length between two successive peaks should accurately be
measured.
Page
60

Analog Lab Manual

Uploaded by

Document Information

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

Analog Lab Manual

Uploaded by

Copyright:

Available Formats

ANALOG ELECTRONICS CIRCUIT LAB

To study the static input characteristics of Common Emitter transistor.

amplifier with voltage feedback.

output of transistorized push pull amplifier.

13.To design and study a transistor series voltage regulator circuit

[Type the company name] | Department of Electronics & Telecommunication Engineering

ANALOG ELECTRONICS CIRCUIT LAB

[Type the company name] | Department of Electronics & Telecommunication Engineering

ANALOG ELECTRONICS CIRCUIT LAB

ANALOG ELECTRONICS CIRCUIT LAB

ri = ---------at VCE = CONSTANT

1) From input characteristics dynamics input resistance is given by

ANALOG ELECTRONICS CIRCUIT LAB

VIVA QUESTION:1. What is mean by saturation region of transistor?

ANALOG ELECTRONICS CIRCUIT LAB

Define dc current gain?

[Type the company name] | Department of Electronics & Telecommunication Engineering

ANALOG ELECTRONICS CIRCUIT LAB

ANALOG ELECTRONICS CIRCUIT LAB

PRECAUTIONS:1. Connect the circuit properly.

ANALOG ELECTRONICS CIRCUIT LAB

Dynamics output resistance is given by

a) From output characteristics = -------------------

[Type the company name] | Department of Electronics & Telecommunication Engineering

ANALOG ELECTRONICS CIRCUIT LAB

CONCLUSION:By changing P 1 (VBB) , forward biasing of emitter junction can be change.

VIVA QUESTION:1. Define transistor?

[Type the company name] | Department of Electronics & Telecommunication Engineering

ANALOG ELECTRONICS CIRCUIT LAB

ANALOG ELECTRONICS CIRCUIT LAB

Transistor can be used as an amplifier in any one of the configuration. Any of

PRECAUTIONS:1. Connect the circuit properly.

ANALOG ELECTRONICS CIRCUIT LAB

[Type the company name] | Department of Electronics & Telecommunication Engineering

ANALOG ELECTRONICS CIRCUIT LAB

[Type the company name] | Department of Electronics & Telecommunication Engineering

ANALOG ELECTRONICS CIRCUIT LAB

THEORY:Transistor has a three terminal (emitter base &collector) two junction.

[Type the company name] | Department of Electronics & Telecommunication Engineering

ANALOG ELECTRONICS CIRCUIT LAB

PRECAUTIONS:1. Connect the circuit properly.

ANALOG ELECTRONICS CIRCUIT LAB

[Type the company name] | Department of Electronics & Telecommunication Engineering

ANALOG ELECTRONICS CIRCUIT LAB

VIVA QUESTION:1. Explain transistor as a switch?

[Type the company name] | Department of Electronics & Telecommunication Engineering

ANALOG ELECTRONICS CIRCUIT LAB

ANALOG ELECTRONICS CIRCUIT LAB

3. It is comparatively inexpensive because both the load resistance & coupling

Voltage gain (dB)

[Type the company name] | Department of Electronics & Telecommunication Engineering

ANALOG ELECTRONICS CIRCUIT LAB

Voltage Gain (A)=Vo/Vin

ANALOG ELECTRONICS CIRCUIT LAB

In an amplifier circuits intermediate stages are CE configured, why?

[Type the company name] | Department of Electronics & Telecommunication Engineering

ANALOG ELECTRONICS CIRCUIT LAB

ANALOG ELECTRONICS CIRCUIT LAB

PRECAUTIONS:1. Connect the circuit properly.

Voltage gain (dB)

[Type the company name] | Department of Electronics & Telecommunication Engineering

ANALOG ELECTRONICS CIRCUIT LAB

2. with feedback arrangement

ANALOG ELECTRONICS CIRCUIT LAB