Reduction of State and Flow Tables

ReductionofStatesandFlowTables
How to reduce the number of internal states in an asynchronous

sequential circuit ????
The algorithm, that was used in chapter 5 for state reduction of a
complete state table in synchronous sequential circuits, will be modified
to cover the state reduction of asynchronous sequential circuits.
Implication Table
Merging of the Flow Table
Compatible Pairs
Maximal Compatibles
Closed Covering Condition
2010Dr.AshrafArmoush,AnNajahNationalUniversity
40
ImplicationTable
Twostatesinastatetablecanbecombinedintoone,aslongas
theycanbeshowntobeequivalent
EquivalentStates:Twostatesareequivalentif,foreachpossible
Equivalent States: Two states are equivalent if, for each possible
input,they giveexactlythesameoutputandgotothesamenext
statesortoequivalentnextstates.
a andb havethesameoutputforthesameinput,theirnextstatesare
c andd forx=0 andb anda forx=1
Ifwecanshowthat(candd)areequivalent,then(aandb)are
(
)
(
)
equivalent. [(a,b)imply(c,d)]
41
ImplicationTable(cont.)
The checking of each pair of states for possible equivalence in a
table with a large number of states can be done systematically by
means of an implication table.
It is a chart that consists of squares, one for every possible pair of
states.
On the left side along the vertical are listed all the states defined in the
state table except the last.
Across the bottom horizontally are listed all the states except the last.
The states that are not equivalent are marked with (X) in the
corresponding squares.
The states that are equivalent are marked with (9) in the
corresponding squares.
Some of the squares
q
have entries of implied
p
states that must be
further investigated to determine whether they are equivalent or not.
42
1.
2.
3.
4.
Place a cross in any square corresponding to a pair whose outputs are not equal
q
the p
pairs of states that are implied
p
byy the p
pair of
Enter in the remainingg squares
states representing the squares. (Start form the top square in the left column
and going down and then proceeding with the next column to the right).
Make successive passes through the table to determine whether any additional
squares should be marked with a x
x.
Finally, all the squares that have no crosses are recorded with check marks.
43
The equivalent states are:
(a, b), (d, e), (d, g), (e, g).

Combine pairs of states into larger groups of
equivalent states.
(a, b), (d, e, g)
The final partition consists of:
The equivalent states found from the
implication table [(a, b) (d, e, g)]
All the remaining states in the state table
that are not equivalent to any other state.
[(c) , (f)]
(a b) (c) (d,
(a,
(d e,
e g) (f)
{4 states}
The original flow table can be reduced from

7 states into 4 states:
2010Dr.Ashraf Armoush ,AnNajah NationalUniversity
Present NextState
State
x=0
0 x=1
1
Output
x=0
0
x=1
1
0
44
Merging of the Flow Table

When certain combinations of inputs or input sequences may never
occur because of external and internal constrains The state table
is incompletely
p
y specified.
p
Incompletely specified states can be combined to reduce the
number of states in the flow table.
Such states cannot be called equivalent, but, instead they are said
to be compatible.
In order to find a suitable group of compatibles for the purpose of
merging a flow table, the following steps must be applied:
1.
2.
3.
Determine all compatible pairs by using the implication table.

Find the maximal compatibles using a merger diagram.
Find a minimal collection of compatibles that covers all the states
and is closed.
45
Compatible Pairs
Compatible States: Two states are compatible if in every column of
the corresponding rows in the flow table, they are identical or
compatible states and if there is no conflict in the output values.
values
Thecompatible
pairsare:
i
(a,b)
(a,c)
( d)
(a,d)
(b,e)
(b,f)
(c,d)
(e,f)
46
Maximal Compatibles
Maximalcompatible: isagroupofcompatiblesthatcontainsall
thepossiblecombinations ofcompatiblestates.
Amergerdiagramcanbeusedtoobtainthemaximalcompatible.
A merger diagram can be used to obtain the maximal compatible
All possible compatibles can be found from the geometrical

patterns in which states are connected to each other.
47
Closed Covering Condition

Theconditionthatmustbesatisfiedforrowmergingisthattheset
ofchosencompatiblesmust:
1.
1
2.
Coverallstates.
Cover
all states
Beclosed:(theclosureconditionissatisfiediftherearenoimpliedstatesor
iftheimpliedstatesareincludedwithintheset)
Inthelastexample,the maximalcompatiblesare(a,b)(a,c,d)(b,e,f)
ifweremove(a,b),wegetasetoftwocompatibles:(a,c,d)(b,e,f)
Allthesixstatesareincludedinthisset.9
Therearenoimpiled states for(a,c);(a,d);(c,d);(b,e);(b,f)and(e,f)[you
canchecktheimplicationtable] . thecloserconditionissatisfied 9
Theoriginalprimitiveflowtablecanbemergedintotworows,onefor
g
p
f
g
,
f
eachofthecompatibles.
48
Ex: (Closed Covering Condition)
From the given implication table, we have the following

compatible pairs:
(a,b)(a,d)(b,c)(c,d)(c,e)(d,e)
From the merger diagram,
diagram we determine the maximal
compatibles:
(a,b) (a,d)(b,c)(c,d,e)
If we choose the two compatibles
(a,b) (c,d,e)
All the 5 states are included in this set. (9)

The implied states for (a,b) are (b,c). But (b,c) are not
include in the chosen set This set is not closed. (X)
A set of compatibles that will satisfy the closed
covering condition is ( a , d ) ( b , c ) ( c , d , e )
49
Notes
The same state can be repeated more than once.
There may be more than one possible way of merging rows
when reducing a primitive flow table.
50
RaceFreeStateAssignment
Once a reduced flow table has been derived, the next step in the
design is to assign binary variables to each stable state.
The main objective in choosing a proper binary state assignment is
the prevention of critical races.
Adjacent Binary Values: 2 binary values are said to be adjacent if
they differ in only one variable ( e.g.
e g 010 and 011 are adjacent)
2Row FlowTable:
The assignment of a single variable to a flow table with two rows
does not impose critical race problems.
[two adjacent values 0 and 1]
51
3RowFlowTableExample
A flow table with 3 states requires an assignment of 2
variables.
We have the following transitions:
ab , ac, ba , bc&ca
(seethetransitiondiagram)
If we take the following assignment:

State
Value
00
01
11
This assignment will cause a critical race during the

transition from a to c (2 changes in the binary state ),
and also from c to a
52
3RowFlowTableExample(cont.)
Aracefreeassignmentcanbeobtainedbyaddinganextrarowtotheoriginal
flowtable:
The
Th use off an extra
t row will
ill nott increase
i
the number of binary state variables (2
variables), but it allows the formation of
cycles
y
between two stable states.
The added row (d) is assigned the binary
value (10), which is adjacent to both a & c.
The transition from a to c must go
through d, thus avoiding a critical race.
The two squares with dashes in row d
represent unspecified states (dont care).
These squares must not be assigned to 01
in order to avoid the possibility of stable
state being established in the 4th row.
53
Thenewflowtableisconvertedtoatransitiontabletocompletethedesign
process.
54
4RowFlowTableExample
A flow table with 4 states requires an assignment

of two state variables.
If there were no transitions in the diagonal

direction (from a to c or from b to d), it would be
possible to find adjacent assignment for the
remaining 4 transitions.
In order to satisfy the adjacency requirement,

requirement
at least 3 binary variables are needed.
55
The following state assignment map is suitable for any 4row flow table.
a, b, c, and d are the original states.
e,
e ff, and g are extra states.
states
States placed in adjacent squares in the map will have adjacent assignments
56
To produce cycles:
The transition from a to d must be directed through the extra state e
The transition from c to a must be directed through the extra state g
The transition from d to c must be directed through the extra state f
Although the flow

table has 7 rows,
there are only 4
stable states.
57
MultipleRowMethod forracefreeassignment
It is less efficient than the previous method (shared row method).
Each state in the original flow table is replaced by two or more
combinations of state variables.
e.g.:
g
a is replaced with a1 and a2, where a1 is the logical complement of a2
Each
E h stable
bl state has
h two binary
bi
assignments
i
with
i h exactly
l the
h
same output
e.g.:
The output values must be the same in a1 and a2
At any given
i
ti
time,
only
l one off the
th assignments
i
t is
i in
i use.
58
MultipleRowMethod(cont.)
e.g. a1 is adjacent to b1, c2, and d1 where a2 is adjacent to c1, b2, d1

When choosing the next state for a given present state, a state that is
adjacent to the present state is selected from the map.
59
Hazards
In order to ensure the proper operation in asynchronous circuits , the
circuits must be:
1. Operated in fundamental mode with only one input changing at any time.
1
time
2. Free of critical races.
3. Checked for hazards .
Hazards are unwanted switching transients that may appear at the

output of a circuit because different paths exhibit different
propagation delay.
Hazards occur in in combinational and asynchronous circuits:
In combination circuits, they may cause a temporarily false output value.
In asynchronous circuits, they may result in a transition to a wrong stable state.
60
HazardsinCombinationalCircuits
x2
x3
AND1
AND 2
Thedelayintheinvertermaycausetheoutputofgate1tochangeto0
The
delay in the inverter may cause the output of gate 1 to change to 0
beforetheoutputofgate2changesto1.
Inthatcase,theoutputgoesto0forshortintervaloftime.
Y = x1 x2 + x2 ' x3
(sum of products)
x1
or Y = ( x1 + x2 ' )( x2 + x3 )
(product of sums)
Thefirstimplementationmaycausetheoutputtogoto0whenitshould
remainat1(Static1
remain
at 1 (Static 1hazard),
hazard),whilethesecondimplementationmaycause
while the second implementation may cause
theoutputtogoto1whenitshouldremainat0(Static0hazard).
61
HazardsinCombinationalCircuits(cont.)
The dynamic hazard causes the output to change three or four

times when it should change from 1 to 0 or from 0 to 1.
1
The occurrence of the hazard can be detected by inspecting the
map of a particular circuit.
62
HazardFreeCircuit
The change in x2 from 1 to 0 moves the circuit
from minterm 111 to minterm 101.
The hazard exists because the change of input
results in a different product term covering the
two minterms.
minterms
Whenever the circuit must move from one
product term to another, there is a possibility
of a momentary interval when neither term is
equal to 1, giving rise to undesirable 0 output.
The solution is to enclose the minterms with
another product term that overlaps both
groupings.
63
HazardFreeCircuit(cont.)
The removal of hazards requires the addition of

redundant gates to the circuit.
64
HazardsinSequentialCircuits
Momentary erroneous signals are not generally troublesome in normal

combinationalcircuits associated with synchronous sequential circuit. Thus,
hazard are not of concern in these circuits.
Conversely, if a momentary incorrect signal is fed back in an asynchronous
sequential circuit, it may cause the circuit to go to a wrong stable state.
o If the circuit is in total state yx1x2 = 111 and input x2 changes from 1 to 0, the
next total state should be 110. However, because of the hazard, output Y
may go 0 momentarily.
o If this false signal feeds back into gate 2, the output of gate 2 will remain at
0 and the circuit will switch to the incorrect total state 010.
This problem can be eliminated by adding an extra gate.
65
HazardsinSequentialCircuits
ImplementationwithSRLatches
Another way to avoid static hazards in asynchronous sequential circuits is
to implement the circuit with SR latches.
A momentary 0 signal applied to the S or R inputs of a NOR latch will have no
effect on the state of the latch.
Similarly, a momentary 1 signal applied to the S or R inputs of a NAND latch
will also have no effect on the state of the latch.
Ex:
This implementation
Thi
i l
t ti may have
h
a static
t ti 1hazard
1h
d if both
b th inputs
i
t off gate#3
t #3 go
to 1, changing the output from 1 to 0 momentarily.
But if gate 3 is part of a NANDlatch, the momentarily 1 signal will have no
effect
ff t because
b
another
th input
i
t will
ill come from
f
Q that
th t will
ill be
b equall to
t 0 and
d
thus maintain the output at 1
66
Ex:
ConsideraNANDSRlatchwiththefollowingBooleanfunctionsforSandR
S=AB+CD
R AC
R=AC
SincethisisaNANDlatchwemustusethecomplementvalueforSandR
S=(AB+CD)=(AB)(CD)
R=(AC)
67
Ex(cont.):
TheBooleanfunctionforoutputis
Q=(QS)=[Q(AB)(CD)]
TheoutputisgeneratedwithtwolevelsofNANDgates:
If output Q is equal to 1, then Q is equal to 0. If two of the three inputs

go momentarily to 1, the NAND gate associated with output Q will
remain at 1 because Q is maintained at 0.
68
EssentialHazards
AnEssentialHazard: iscausedbyunequaldelaysalongtwoor
morepathsthatoriginatefromthesameinput.
Essentialhazardscannotbecorrectedbyaddingredundant
gates as in static hazards
gatesasinstatichazards.
Theproblemcanbecorrectedbyadjustingtheamountof
p
y j
g
delayintheaffectedpaths.
69
DESIGNEXAMPLE
The recommended procedural steps for the design of a complete
asynchronous sequential circuit are:
1 State the design specifications.
1.
specifications
2. Derive a Primitive Flow Table.
3. Reduce the Flow Table by merging rows.
4. Make
k a racefree
f
bi
binary
state assignment.
i
5. Obtain the transition table and output map.
6. Obtain the logic diagram using SR latches.
1) Design Specification:
It is necessary to design a negativeedgetriggered T flipflop.
flipflop The
circuit has two inputs T (toggle) and C (clock) and one output Q.
The output state is complemented if T=1 and the clock changes
from 1 to 0 ((negativeedgetriggering).
g
g
gg
g) Otherwise,, under all input
p
condition, the output remains unchanged.
70
Designexample(cont)
2) Primitive flow table.
Inputs
Output
State
Comments
I iti l t t i 0
Initialoutputis0
Afterstatea
Initialoutputis1
Afterstate
f
c
Afterstatedorf
Afterstateeora
Afterstateborh
AfterStategorc
71
Designexample(cont)
3) Merging of the Flow Table
Th maximal
The
i l compatibles
tibl pairs
i are:
(a,f)(b,g,h)(c,h)(d,e,f)
72
Designexample(cont)
In this particular example, the minimal collection of compatibles
is also the maximal compatibles set:
( f) (b
(a,f)(b,g,h)(c,h)(d,e,f)
h) ( h) (d
f)
73
Designexample(cont)
4) State Assignment and Transition Table
From the transition diagram, it is clear that there are no diagonal lines.
Therefore,, it is p
possible to find a suitable adjacent
j
assignment
g
without
the need of extra states.
74
Designexample(cont)
5) Logic Diagram
There are two state variables Y1 and Y2, and one output Q. The
previous output map shows that Q is equal to y2.
75
Designexample(cont)
76

Reduction of State and Flow Tables

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ReductionofStatesandFlowTables

How to reduce the number of internal states in an asynchronous

(a, b), (d, e), (d, g), (e, g).

The original flow table can be reduced from

2010Dr.Ashraf Armoush ,AnNajah NationalUniversity

Merging of the Flow Table

Determine all compatible pairs by using the implication table.

All possible compatibles can be found from the geometrical

Closed Covering Condition

Ex: (Closed Covering Condition)

From the given implication table, we have the following

All the 5 states are included in this set. (9)

If we take the following assignment:

This assignment will cause a critical race during the

2010Dr.Ashraf Armoush ,AnNajah NationalUniversity

A flow table with 4 states requires an assignment

If there were no transitions in the diagonal

In order to satisfy the adjacency requirement,

Although the flow

e.g. a1 is adjacent to b1, c2, and d1 where a2 is adjacent to c1, b2, d1

Hazards are unwanted switching transients that may appear at the

The dynamic hazard causes the output to change three or four

2010Dr.Ashraf Armoush ,AnNajah NationalUniversity

The removal of hazards requires the addition of

Momentary erroneous signals are not generally troublesome in normal

If output Q is equal to 1, then Q is equal to 0. If two of the three inputs

2010Dr.Ashraf Armoush ,AnNajah NationalUniversity

2010Dr.Ashraf Armoush ,AnNajah NationalUniversity

2010Dr.Ashraf Armoush ,AnNajah NationalUniversity

2010Dr.Ashraf Armoush ,AnNajah NationalUniversity

2010Dr.Ashraf Armoush ,AnNajah NationalUniversity

2010Dr.Ashraf Armoush ,AnNajah NationalUniversity

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