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DATE OF PUBLICATION 26 NOV 2013

ISSN: 2348-4098

DishaMalik
Volume:1Issue:1

32bitArithmeticLogicalUnit(ALU)usingVHDL
DishaMalik1,RichaSinghRathore2
1

M.TechScholar,DepartmentofECE,JayotiVidyapeethWomensUniversity,Rajasthan,INDIA,
dishamalik26@gmail.com
2

M.TechScholar,DepartmentofECE,JayotiVidyapeethWomensUniversity,Rajasthan,INDIA,
richasinghkgi@gmail.com

ABSTRACT
Thispaperinvolvestheconstructionof32bitALU(ArithmeticLogicalUnit)usingVHDLusingXilinx
Synthesis tool ISE 9.2i and implementation them on FPGA (Field Programmable Gate Array) using
Spartan 3E. The ALU is a fundamental building block of the central processing unit (CPU) of a
computer, and even the simplest microprocessors contain one for purposes such as maintaining
timers. The processors found inside modern CPUs and graphics processing units (GPUs)
accommodateverypowerfulandverycomplexALUs;asinglecomponentmaycontainanumberof
ALUs.TheALUperformsmathematical,logical,anddecisionoperationsinacomputerandisthefinal
processingperformedbytheprocessor.

AnArithmeticunitdoesthefollowingtask:
Addition
Additionwithcarry
Subtraction,
Subtractionwithborrow,
Decrement
Increment
Transferfunction.
ALogicunitdoesthefollowingtask:
LogicalAND
LogicalOR
LogicalXOR
LogicalNOToperation.

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DATE OF PUBLICATION 26 NOV 2013

ISSN: 2348-4098

DishaMalik
Volume:1Issue:1
Here,ALUisdesignedusingVHDL(VHSIChardwaredescriptionlanguage)isahardwaredescription
languageusedinelectronicdesignautomationtodescribedigitalandmixedsignalsystemssuchas
fieldprogrammablegatearraysandintegratedcircuits.

KEYWORDSFPGA,ALU,XILINX

complex ALUs; a single component may

1. INTRODUCTION

containanumberofALUs.
ArithmeticLogicUnit,ALUisoneofthemany
components within a computerprocessor.

In the present day technology, there is an

The ALU performs mathematical, logical, and

immense need of developing suitable data

decision operations in a computer and is the

communication interfaces for real time

final processing performed by the processor.

embeddedsystems.FieldProgrammableGate

After the information has been processed by

Array (FPGA) offers various resources, which

theALU,itissenttothecomputermemory.In

can be programmed for building up an

somecomputerprocessors,theALUisdivided

efficient

into two distinct parts, the AU (Arithmetic

programmable Gate Array (FPGA) is an

Unit) and the LU (Logical Unit). The AU

integrated circuit designed to be configured

performs the arithmetic operations and the

by

LU

operations.

manufacturinghence it is named as "field

and

programmable". The FPGA configuration is

performs

Incomputing,
unit(ALU)

the

logical

anarithmetic
is

adigital

logic

circuitthat

the

generally

embedded

customer

specified

system.

or

designer

using

Field

after

hardware

performsintegerarithmeticandlogicaloperat

description language (HDL) VHDL (VHSIC

ions.TheALUisafundamentalbuildingblock

hardwaredescriptionlanguage)isahardware

of thecentral processing unitof a computer,

descriptionlanguageusedinelectronicdesign

and

the

automation to describe digital and mixed

for

signal systems such as field programmable

even

simplestmicroprocessorscontain

one

purposes such as maintaining timers. The

gatearraysandintegratedcircuits.

processors found inside modern CPUs and


graphics

processing

units

(GPUs)

accommodate very powerful and very

The key advantage of VHDL, when used for


systems design, is that it allows the behavior
of the required system to be described

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DATE OF PUBLICATION 26 NOV 2013

ISSN: 2348-4098

DishaMalik
Volume:1Issue:1
(modeled) and verified (simulated) before

code, which all run sequentially, one

synthesis tools translate the design into real

instruction at a time. VHDL project is

hardware (gates and wires). Another benefit

multipurpose and portable. Being created for

is that VHDL allows the description of a

oneelementbase,acomputingdeviceproject

concurrent system. VHDL is a dataflow

can be ported on another element base, for

language,

exampleVLSIwithvarioustechnologies.

unlike

procedural

computing

languages such as BASIC, C, and assembly

1.1BLOCKDIAGRAM

Figure1:BlockDiagramof32BitALU

2. DESIGNOF32BITALU

a modular design that consists of smaller,

When designing the ALU we will follow the

more manageable blocks, some of which can

principle"DivideandConquer"inordertouse

bereused.Insteadofdesigningthe4bitALU

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DATE OF PUBLICATION 26 NOV 2013

ISSN: 2348-4098

DishaMalik
Volume:1Issue:1
as one circuit we will first design one bit

Carry Adder. Then designed thirty two

ADDER, SUBTRACTOR, OR, AND, NOT, XOR,

numbers of singlebit 4:1 Multiplexer. The

LEFTSHIFT,RIGHTSHIFTUNIT.Thesebitslices

circuit has a 32bit parallel adder and thirty

can then be put together to make a 32bit

two multiplexers for 32bit arithmetic unit.

ADDER, SUBTRACTOR, OR, AND, NOT, XOR,

Therearetwo32bitinputsAandBand33bit

LEFTSHIFT,RIGHTSHIFTUNIT.

outputisRESULT.Thesizeofeachmultiplexer

is 4:1. The two common selection lines for all

3. MODULESDESIGNOF32BITALU

thirty two multiplexers are S0 and S1.Cin is

3.132BITARITHMETICUNITS

the carry input of the parallel adder and the

carry out is Cout. The thirty two inputs to

An Arithmetic unit does the following task:

each multiplexerare B value,Complemented

Addition, Addition with carry, Subtraction,

Bvalue, logic0 and logic1.The output of the

Subtraction

circuit is calculated from the following

with

borrow,

Decrement,

Increment and Transfer function. At first we

arithmeticsum:

startwithmakingonebitFullAdder,thena4

RESULT=A+Y+Cin

bit Ripple Carry Adder using four numbers of

Where A is a 32bit number, Y is the 32bit

Full Adder and at last a 32bit Ripple Carry

output of multiplexers and Cin is the carry

Adder using eight numbers of 4bit Ripple

inputbittotheparalleladder.

Figure2:32BitArithmeticUnit

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DATE OF PUBLICATION 26 NOV 2013

ISSN: 2348-4098

DishaMalik
Volume:1Issue:1
4. SIMULATEDTIMINGDIAGRAMOFARITHMETICUNIT

Figure3:TimingDiagram

4.132BITLOGICUNIT

4.2SIMULATEDDIAGRAMOFLOGICUNIT

A Logic unit does the following task: Logical

AND,LogicalOR,LogicalXORandLogicalNOT
operation. We design a logic unit that can
performthefourbasiclogicmicrooperations:
OR, AND, XOR and Complement, because
from these four microoperations, all other
logic microoperations can be derived. The
logic unit consists of four gates and a 4:1
multiplexer. The outputs of the gates are
applied to the data inputs of the multiplexer.
Using to selection lines S0 and S1 one of the
data inputs of the multiplexer is selected as
the output. For a logic unit of 32bit, the

Figure4:SimulatedDiagramofLogicUnit

output will be of 33bit with 33th bit to be


Highimpedance. The common selection lines
areappliedtoallthestages.

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DATE OF PUBLICATION 26 NOV 2013

ISSN: 2348-4098

DishaMalik
Volume:1Issue:1

Figure5:TimingDiagram

4.332BITSHIFTERUNIT

first placed onto common bus. This circuit

uses no clock pulse. When the shifting unit is

Shifter unit is used to perform logical shift

activated the register is shifted left or right

microoperation. The shifting of bits of a

accordingtotheselectionunit.Forashiftunit

registercanbeineitherdirectionleftorright.

of32bit,theoutputwillbeof33bitwith33th

Thecontentofaregisterthathastobeshifted

bittobetheoutgoingbit.

Figure6:BlockDiagramofShiftUnit

4.4SIMULATEDTIMINGDIAGRAMOFSHIFTERUNIT

Figure7:TimingDiagramofShifterUnit

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DATE OF PUBLICATION 26 NOV 2013

ISSN: 2348-4098

DishaMalik
Volume:1Issue:1
4.5FUNCTIONOFALU:

S3

S2

S1

S0

Cin

RESULT

Operation

A+B

Addition

A+B+1

Additionwithcarry

A+B

Subtractionwithborrow

A+B+1

Subtraction

A1

Decrement

Transfer

Transfer

A+1

Increment

AB

AND

A+B

OR

AB

XOR

NOTA

Complement

LSRA

ShiftRight

LSAA

ShiftLeft

5. SPARTAN3EFPGAFEATURESAND
EMBEDDEDPROCESSINGFUNCTIONS
TheSpartan3EStarterKitboardhighlights
theuniquefeaturesoftheSpartan3E

FPGAfamilyandprovidesaconvenient
developmentBoardforembeddedprocessing

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DATE OF PUBLICATION 26 NOV 2013

ISSN: 2348-4098

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Volume:1Issue:1
7. RERERENCES

applications.Theboardhighlightsthese
features:

[1]. T. K. Ghosh and A. J. Pal, Computer

Spartan3EFPGAspecificfeatures:

Organization and Architecture, Tata McGraw

ParallelNORFlashconfiguration

Hill

MultiBoot FPGA configuration from

PublishingCompanyLimited,NewDelhi,2009.

ParallelNORFlashPROM

[2]. Douglas L. Perry, VHDL Programming by

SPIserialFlashconfiguration

Example,4thed.,TataMcGrawHillPublishing
CompanyLimited,NewDelhi,2002.

Embeddeddevelopment
MicroBlaze 32bit embedded RISC

[3].Xilinx,Spartan3EFPGAFamily:DataSheet,
DS312(v3.8)August26,2009.

processor
PicoBlaze

8bit

embedded

[4]. Xilinx, Spartan3E Starter Kit Board User


Guide,UG230(v1.0)March9,2006.

controller
DDRmemoryinterfaces

[5]. VHDL Tutorial, Ardent Computech, PVT.


LTD.,2011.

6. CONCLUSION

InourpaperDesignandImplementationofa
32bit ALU on Xilinx FPGA using VHDL we

8. BIOGRAPHY

havedesignedandimplementeda32bitALU.

Disha Malik did her B.tech in


ECE from G.L.Bajaj Institute of
Technology and Management
Greater Noida. She is pursuing
M.techinVLSIfromJVWU.Her
area of interest are Digital
Image processing, Digital
Computer Networking, VHDL
etc.

ArithmeticLogicUnitisthepartofacomputer
that performs all arithmetic computations,
such as addition and subtraction, increment,
decrement, shifting and all sorts of basic
logicaloperations.TheALUisonecomponent
oftheCPU(CentralProcessingUnit).

Richa SinghRathore did her


B.techinECEfromKrishnaGirls
Engineering College Kanpur.
She is pursuing M.tech in VLSI
from JVWU. Her areas of
interest are Digital Image
Processing, Microelectronics,
IntergatedCircuitetc.

Here, using VHDL we have designed a 32 bit


ALUwhichcanperformthevariousarithmetic
operations

of

Addition,

Subtraction,

Increment, Decrement, Transfer, logical


operations such as AND, OR, XOR, NOT and
alsotheshiftoperation.

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