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ISSN: 2348-4098
DishaMalik
Volume:1Issue:1
32bitArithmeticLogicalUnit(ALU)usingVHDL
DishaMalik1,RichaSinghRathore2
1
M.TechScholar,DepartmentofECE,JayotiVidyapeethWomensUniversity,Rajasthan,INDIA,
dishamalik26@gmail.com
2
M.TechScholar,DepartmentofECE,JayotiVidyapeethWomensUniversity,Rajasthan,INDIA,
richasinghkgi@gmail.com
ABSTRACT
Thispaperinvolvestheconstructionof32bitALU(ArithmeticLogicalUnit)usingVHDLusingXilinx
Synthesis tool ISE 9.2i and implementation them on FPGA (Field Programmable Gate Array) using
Spartan 3E. The ALU is a fundamental building block of the central processing unit (CPU) of a
computer, and even the simplest microprocessors contain one for purposes such as maintaining
timers. The processors found inside modern CPUs and graphics processing units (GPUs)
accommodateverypowerfulandverycomplexALUs;asinglecomponentmaycontainanumberof
ALUs.TheALUperformsmathematical,logical,anddecisionoperationsinacomputerandisthefinal
processingperformedbytheprocessor.
AnArithmeticunitdoesthefollowingtask:
Addition
Additionwithcarry
Subtraction,
Subtractionwithborrow,
Decrement
Increment
Transferfunction.
ALogicunitdoesthefollowingtask:
LogicalAND
LogicalOR
LogicalXOR
LogicalNOToperation.
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ISSN: 2348-4098
DishaMalik
Volume:1Issue:1
Here,ALUisdesignedusingVHDL(VHSIChardwaredescriptionlanguage)isahardwaredescription
languageusedinelectronicdesignautomationtodescribedigitalandmixedsignalsystemssuchas
fieldprogrammablegatearraysandintegratedcircuits.
KEYWORDSFPGA,ALU,XILINX
1. INTRODUCTION
containanumberofALUs.
ArithmeticLogicUnit,ALUisoneofthemany
components within a computerprocessor.
embeddedsystems.FieldProgrammableGate
theALU,itissenttothecomputermemory.In
somecomputerprocessors,theALUisdivided
efficient
by
LU
operations.
and
performs
Incomputing,
unit(ALU)
the
logical
anarithmetic
is
adigital
logic
circuitthat
the
generally
embedded
customer
specified
system.
or
designer
using
Field
after
hardware
performsintegerarithmeticandlogicaloperat
ions.TheALUisafundamentalbuildingblock
hardwaredescriptionlanguage)isahardware
descriptionlanguageusedinelectronicdesign
and
the
for
even
simplestmicroprocessorscontain
one
gatearraysandintegratedcircuits.
processing
units
(GPUs)
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ISSN: 2348-4098
DishaMalik
Volume:1Issue:1
(modeled) and verified (simulated) before
oneelementbase,acomputingdeviceproject
language,
exampleVLSIwithvarioustechnologies.
unlike
procedural
computing
1.1BLOCKDIAGRAM
Figure1:BlockDiagramof32BitALU
2. DESIGNOF32BITALU
principle"DivideandConquer"inordertouse
bereused.Insteadofdesigningthe4bitALU
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as one circuit we will first design one bit
LEFTSHIFT,RIGHTSHIFTUNIT.Thesebitslices
Therearetwo32bitinputsAandBand33bit
LEFTSHIFT,RIGHTSHIFTUNIT.
outputisRESULT.Thesizeofeachmultiplexer
3. MODULESDESIGNOF32BITALU
3.132BITARITHMETICUNITS
Subtraction
with
borrow,
Decrement,
arithmeticsum:
startwithmakingonebitFullAdder,thena4
RESULT=A+Y+Cin
inputbittotheparalleladder.
Figure2:32BitArithmeticUnit
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4. SIMULATEDTIMINGDIAGRAMOFARITHMETICUNIT
Figure3:TimingDiagram
4.132BITLOGICUNIT
4.2SIMULATEDDIAGRAMOFLOGICUNIT
AND,LogicalOR,LogicalXORandLogicalNOT
operation. We design a logic unit that can
performthefourbasiclogicmicrooperations:
OR, AND, XOR and Complement, because
from these four microoperations, all other
logic microoperations can be derived. The
logic unit consists of four gates and a 4:1
multiplexer. The outputs of the gates are
applied to the data inputs of the multiplexer.
Using to selection lines S0 and S1 one of the
data inputs of the multiplexer is selected as
the output. For a logic unit of 32bit, the
Figure4:SimulatedDiagramofLogicUnit
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Figure5:TimingDiagram
4.332BITSHIFTERUNIT
accordingtotheselectionunit.Forashiftunit
registercanbeineitherdirectionleftorright.
of32bit,theoutputwillbeof33bitwith33th
Thecontentofaregisterthathastobeshifted
bittobetheoutgoingbit.
Figure6:BlockDiagramofShiftUnit
4.4SIMULATEDTIMINGDIAGRAMOFSHIFTERUNIT
Figure7:TimingDiagramofShifterUnit
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4.5FUNCTIONOFALU:
S3
S2
S1
S0
Cin
RESULT
Operation
A+B
Addition
A+B+1
Additionwithcarry
A+B
Subtractionwithborrow
A+B+1
Subtraction
A1
Decrement
Transfer
Transfer
A+1
Increment
AB
AND
A+B
OR
AB
XOR
NOTA
Complement
LSRA
ShiftRight
LSAA
ShiftLeft
5. SPARTAN3EFPGAFEATURESAND
EMBEDDEDPROCESSINGFUNCTIONS
TheSpartan3EStarterKitboardhighlights
theuniquefeaturesoftheSpartan3E
FPGAfamilyandprovidesaconvenient
developmentBoardforembeddedprocessing
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7. RERERENCES
applications.Theboardhighlightsthese
features:
Spartan3EFPGAspecificfeatures:
ParallelNORFlashconfiguration
Hill
PublishingCompanyLimited,NewDelhi,2009.
ParallelNORFlashPROM
SPIserialFlashconfiguration
Example,4thed.,TataMcGrawHillPublishing
CompanyLimited,NewDelhi,2002.
Embeddeddevelopment
MicroBlaze 32bit embedded RISC
[3].Xilinx,Spartan3EFPGAFamily:DataSheet,
DS312(v3.8)August26,2009.
processor
PicoBlaze
8bit
embedded
controller
DDRmemoryinterfaces
6. CONCLUSION
InourpaperDesignandImplementationofa
32bit ALU on Xilinx FPGA using VHDL we
8. BIOGRAPHY
havedesignedandimplementeda32bitALU.
ArithmeticLogicUnitisthepartofacomputer
that performs all arithmetic computations,
such as addition and subtraction, increment,
decrement, shifting and all sorts of basic
logicaloperations.TheALUisonecomponent
oftheCPU(CentralProcessingUnit).
of
Addition,
Subtraction,
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