Professional Documents
Culture Documents
by
Mark Dixon
Manager of Market & Project Development for Control Products & Systems, Beckwith Electric Co., Inc.
ABSTRACT
Distribution system losses can be significantly
reduced by efficient and effective automated
management of VArs through coordinated,
intelligent, adaptive control of capacitor controls,
transformer LTC controls and regulator controls.
The reduction in IR and IX losses, tap change
operations and maintenance all significantly
impact system efficiency and performance, as well
as reducing operating costsall of which increase
utility revenue and can defer capital expenditure.
An intelligent, automatically-adaptive solution
utilizes an innovative method of achieving these
objectives with virtually no human intervention.
Typical field performance data has shown that
voltage profiles from the substation to the end of
radial feeders remain flat and that variations are
reduced to within 1.5 volts or better, and that
power factors average between .98 lead and .98 lag
consistently. Tap operations are also reduced on
the magnitude of 10:1 after implementation.
I. INTRODUCTION
In the dynamic utility company environment in the
United States today, the inevitability of
deregulation has placed an emphasis on system
efficiencies, costs reductions, power quality, and
overall profitability. Mergers and acquisitions
abound, and due to the climate of the industry as a
whole, many utility companies are performing
economic evaluations and studies to see where
changes can be made to achieve these goals. Very
often, volt/VAr management and distribution
system automation are becoming hot topics.
The focal point for volt/VAr management and
control tends to be at the distribution level, and
generally contains some sort of automation. At the
distribution level, there are several major system
components that can affect the management of
volts and VArs. These components are: LTC (load
tap changing) transformers, LTC (load tap
changing) line regulators and capacitor bank
controls (pole-top and substation step-bank), all of
G = G (G
/ 1024)
Square Law
Integrating
(Incrementing)
Square Law
Integrating
(Incrementing)
Integrating
Linear
Decrementing
-Error VAr
(accumulating
values of G)
Integrating
Linear
Decrementing
BandCenter
+ Error VAr
(accumulating
values of G)
Threshold
Values of G'
Upper Bandedge
+3/4 C size
Lower Bandedge
-3/4 C size
Integrating timer
G increases
VAR Upper
Bandedge
Bandcenter
VAR Lower
Bandedge
Integrating timer
G is cleared and
VAR Bias is
removed
Average Mode
In the averaging mode, the internal average
voltage tracks toward the measured voltage. After
the first switching operation, (a CLOSE), the
average voltage becomes the known reference
voltage. From this point on, the control uses this
reference voltage for the basis of all calculations.
The ACC calculates its average voltage over a
weeks time period to use as its band center
reference voltage for comparison to the measured
voltage.
Fixed Voltage Setpoint Mode
If the control has been programmed with a fixed
voltage setpoint (which overrides voltage
averaging) for operation, the ACC does not seek
out, or perform, the calculation for the average
voltage at the site. Instead, the fixed voltage
setpoint becomes the controls permanent
reference voltage from which all calculations are
made. The fixed voltage setpoint is extremely
useful if the feeder circuit to which the ACC is
being applied does not have sufficient capacitance
to achieve unity power factor. An independent
control in the average mode will flatten the voltage
profile at the site but, because of the lack of
sufficient capacitance, the voltage profile will be
below unity. Using the fixed voltage setpoint can
force the capacitor banks on more than just 50% of
UVL = +5%
above reference
voltage
Bandwidth =
Av. change in
Meas. Voltage,
last 8 switch
operations
B. ACC Timing
In the paragraphs above, we have mentioned the
progression of time towards a switch operation.
The timing circuit of the ACC is, in essence, a nonlinear integrating timer that adjusts the progression
of time towards a switch operation based on a
comparison of the difference between the
measured line voltage and the internal reference
voltage. The larger the difference between the two
quantities, the faster the timing progresses to a
switch operation. Likewise, the smaller the
difference between the two quantities, the slower
the progression of time to a switch operation.
Throughout normal operation, the ACC timing
circuit is continually counting. The timing circuit
of the ACC is looking to match an accumulated
value of this counter (designated H) to an adapted
threshold value (designated H ). H and H are
actually data value locations within the
microprocessors RAM and are utilized as part of
the timing circuitry and are effected according to
the associated algorithm. Fundamentally, when the
values in both data locations match, a switch
operation is initiated.
The algorithm for timing is given in the following
example:
Bandcenter,
Average or Fixed Voltage
Customer Set
Lower Voltage
Limit
Customer Set
Upper Voltage
Limit
Band Edge
Band Edge
Timing
Rate
Timing
Rate
g
tin
en ting
em ra g
cr g in
in inte im
t
- Delta V
decrementing
linear
timing
decrementing
linear
timing
g
tin
en ing
em at
cr egr ing
n
i nt m
i ti
Bandwidth
+ Delta V