Sect 6

Section 6: Static Switch Operation & Control
Chapter 1 - Static Switch Principles

1.1 Introduction .............................................................................................. 6-1
1.2 Static switch construction ......................................................................... 6-2
1.3 Static switch control system ..................................................................... 6-4
1.3.1 Control system overview ............................................................. 6-4
1.3.3 Control power supplies ................................................................ 6-7
Chapter 2 - Static Switch Driver Board (4542043 Z)
2.1 Chapter overview ..................................................................................... 6-9
2.2 General description ................................................................................... 6-9
2.2.1 Circuit board functions ................................................................ 6-9
2.2.2 Input/Output connections ............................................................. 6-9
2.2.3 Block Diagram ........................................................................... 6-10
2.3 Detailed circuit description .................................................................... 6-11
2.3.1 Introduction ................................................................................ 6-11
2.4 Summary information ............................................................................. 6-15
Chapter 3 - Static Switch Driver Board (4542041 X)
3.1 Chapter overview .......................................................................................17
3.2 General description .....................................................................................17
3.2.1 Circuit board functions ..................................................................17
3.2.2 Input/Output connections ...............................................................17
3.2.3 Block Diagram ...............................................................................18
3.3 Detailed circuit description ........................................................................19
3.3.1 Introduction ....................................................................................19
3.4 Summary information .................................................................................23
S-6.FM5 - Issue 2 Dated 21/08/97
SECTION 6 - Static Switch Operation & Control
ii
7200 Series UPS Service Manual
S-6.FM5 - Issue 2 Dated 21/08/97
Section 6:
Chapter 1 - Static Switch Principles
1.1
Introduction
The static switch assembly is responsible for controlling the transfer of critical
load power between the bypass mains supply and the inverter output supply.
Figure 6-1: Static switch power block
Static Switch
Assembly
Static Switch
Bypass
Mains
Supply
Bypass-Side
Static Switch
Driver
Board
UPS Logic
Board
Inverter
Output
Supply
Static Switch
Inverter-Side
Critical
Load
Supply
In order to perform this function, the static switch assembly contains two 3-phase
switching circuits; one is connected between the UPS output switch and the
bypass mains supply, and the other between the UPS output switch and the inverter supply (See Figure 6-1). For reasons of clarity, these are referred to in this
manual as the bypass-side and inverter-side static switches respectively.
Bypass-side static switch
The bypass-side static switch comprises a pair of inverse-parallel-configured

SCRs connected in series with each bypass mains supply line (See Figure 6-2).
Figure 6-2: Bypass-side static switch
U
Bypass
Mains
Supply
To
Critical
Load
V
W
Static Switch Driver Board
s6-c1.fm5 - Issue 2 Dated 21/08/97
6-1

CHAPTER 1 - Static Switch Principles
When the static switch control logic decides to connect the load to the bypass
mains supply it signals the Static Switch Driver Board to trigger all six SCRs simultaneously; thus allowing passage of the bypass supply a.c. mains through to
the critical load i.e. all six SCRs receive a gate drive signal for the whole time
that the bypass-side is required to be turned on.
Inverter-side static switch
The term static switch might be considered a misnomer when describing the
inverter-side circuit; as in a standard 7200 module this normally comprises a
straightforward three-phase circuit breaker connected in series with the inverter
output. If necessary, provision has been made to allow this contactor to be replaced with a solid state circuit (as used in the bypass-side static switch) as the
product is developed.
The contactor is controlled by the Static Switch Driver Board.
1.2
Static switch construction

The static switch power components and the rectifier power components are assembled on the same heatsink , as illustrated below.
Figure 6-3: Static switch assembly wiring details
4542043Z
6-2

Figure 6-4: Static switch construction
Connections to snubber boards

and gate drivers
RECTIFIER 3-Ph
MAINS FEED
STATIC BYPASS
MAINS FEED
Bypass SCRs
RECTIFIER OUTPUT
Gate Driver (trigger)
board
Snubber board
4542043Z
6-3

Figure 6-5: System control overview
Load
U-Phase
Mains
U-Phase
Inverter
ON
ON
Transfer Logic
PCB Logic Boards
Mains-side switch enable
Transfer Control
Inverter-side switch enable
a) Bypass voltage OK (10%)
Transfer Mains-to-Inverter
a) Inverter voltage OK (10%)
b) No bypass frequency error
a) Sync OK (Inv/Mains 9 with

respect to each other
b) No inverter frequency error
c) No Open-circuit bypass SCR

d) Bypass Disable Switch enabled i.e. not in inhibit position.
e) Permission to close static
bypass gained from Parallel
Logic Board (in 1+1 system only)
c) No Overload timeout
150% (1 min)
125% (10 min)
110% (1 Hr)
101% (9 Hrs)
b) Inverter voltage OK (10%)

c) Parallel condition satisfactory
(1+1 system only)
(a) + (b) + (c) = OK to transfer
d) Inverter Disable Switch enabled i.e. not in inhibit position.
Transfer Inverter-to-Mains
a) Critical bus volts fail (10%)
e) Permission to close output

contactor gained from Parallel
Logic Board (in 1+1 system only)
b) Sync OK = No break
Sync not OK = 1 cycle break
Transfer Lockout
a) More than 8 transfer attempt in
1 minute = load locked on bypass
1.3
1.3.1
Static switch control system

Control system overview
Figure 6-6 illustrates the basic static switch control circuit.
The decision making logic which determines whether to close the bypass-side
or inverter-side static switch is contained on the UPS Logic Board under software control (see chart 7-12 on page 7-183) and provides the Static Switch
Driver Board with independent load on bypass and load on inverter command signals. The Static Switch Driver Board processes these signals and provides suitable outputs to control the bypass-side SCRs and inverter-side
contactor.
6-4

Figure 6-6: Static switch control system

Bypass-side
Static Switch
Bypass
Supply
Output voltage sense
sense
Bypass voltage
Bypass
Mains
Supply
Output current sense
High Voltage
Interface Board
UPS Logic
Board
Static Switch
Driver Board
K1 Auxiliary sense
Operator Control
Panel
Inverter voltage sense
Inverter current sense
Operator Logic Board
3 Phase
Power
Inverter
Critical Load
DC Bus Pos
Output
Tfrmr
DC Bus Neg
Inverter-side
Contactor (K1)
1.3.1.1
Analogue control signals

Inverter voltage sense
The 3-phase inverter voltage is sensed at a point between the output transformer
and inverter-side static switch (contactor), and should therefore be at the nominal
UPS output voltage whenever the inverter is operating. The three independent
line-to-neutral sense signals are attenuated to 1% on the High Voltage Interface
Board and then passed to the UPS Logic Board where they are converted to a digital form and monitored by the boards microprocessor system.
Note: these same signals also pass straight through the UPS Logic Board to the
Inverter Logic Board where they serve as the output voltage feedback signals.
Bypass mains voltage sense
The 3-phase bypass mains voltage is sensed at a point between the bypass supply
isolator and the bypass-side static switch, and should therefore be at the nominal
mains voltage whenever the bypass switch is closed. The three independent lineto-neutral sense signals are attenuated to 1% on the High Voltage Interface Board
and then passed to the UPS Logic Board where they are converted to a digital
form and monitored by the boards microprocessor system.
6-5

Output (critical load) voltage sense
The 3-phase UPS output voltage is sensed immediately ahead of the output isolator (on the hot side of the output contactor K1) and therefore accurately represents
the voltage offered to the critical load. The three independent line-to-neutral sense
signals are attenuated to 1% on the High Voltage Interface Board and then passed
to the UPS Logic Board where they are converted to a digital form and monitored
by the boards microprocessor system.
Output (critical load) current sense
The output current is sensed by three individual current transformers (CTs) located immediately ahead of the output isolator (on the hot side of the output current
transformers) and therefore monitors the critical load current. These current sense
signals are calibrated by jumpers fitted to the High Voltage Interface Board and
then passed to the UPS Logic Board where they are summed and converted to a
digital form and monitored by the boards microprocessor system.
1.3.1.2
Digital control signals

UPS Logic Board
Various digital signals affecting the static switch operation are passed between
the UPS Logic Board and the other boards connect to it. These can broadly be categorised as:
static switch status and alarm data generated on the UPS Logic Board and
passed to the Operator Control Panel via the Operator Logic Board also
to the Alarms Interface Board (for remote indication) where fitted.
transfer control logic signals passed to the Static Switch Driver Board.
metering data generated on the UPS Logic Board and passed to the Operator Control Panel.
control data entered at the Operator Control Panel which is stored by the
UPS Logic Board e.g. manual load transfer selection.
external control options e.g. emergency shutdown, on-generator syncinhibit, isolator status.
Static Switch Driver Board
In addition to the transfer control signals obtained from the UPS Logic Board, the
Static Switch Driver Board also receives a status signal from auxiliary contacts of
the inverter-side contactor to detect its operational status.
1.3.2
Transfer control philosophy

Under normal circumstances the UPS Logic Board will request the Static Switch
Driver Board to connect the load to the inverter supply i.e. bypass-side open
and inverter-side closed.
This situation will be maintained unless an inverter fault renders it incapable of
providing the required load supply parameters (e.g. low battery voltage, inverter
over/under voltage, inverter overload shutdown) or it is manually selected OFF
(from Operator Control Panel or UPS Logic Board inverter enable switch) etc.
Note: if the cause of the transfer clears when the load is on-bypass the load will
automatically transfer back to the inverter-side after a brief period to allow the inverter control time to re-establish itself. For example, a fault on an inverter phase
may cause an erroneous overload to be detected, or the output volts to dip below
the undervoltage threshold, and initiate a load transfer to bypass. However, once
6-6

the load is removed from the inverter its output will return to normal and request
the load to be returned to the inverter.
This type of fault could cause the load to tick-tock between the inverter and bypass; and to overcome this problem the transfer control logic permanently transfers the load to bypass if more than 8 transfers occur within 60 seconds.
Bypass-to-inverter transfer mechanism
When the load is transferred from bypass to inverter the signal to close the inverter-side contactor is applied 150ms before the bypass-side SCR drive signals are removed. This is to allow time for the contactor to close before the bypass
SCRs are turned OFF. In practice the contactor should close well within 50ms.;
consequently, there will be an overlap period where both sides of the static
switch are closed simultaneously, and the inverter and bypass voltages are effectively connected in parallel. Once the contactor is closed an auxiliary contact signals the bypass SCRs to open immediately. This type of transfer is referred to as
a closed transfer as the load is transferred without a supply break.
Note: if the contactor does not close, as indicated by the auxiliary contact, the
UPS Logic Board will re-establish the load-on-bypass command before the
150ms time-out period, keeping the load on bypass.
Before the transfer control logic will allow a closed transfer from bypass to inverter it must verify that the inverter voltage is synchronised to the bypass supply. If
this condition is not met then the transfer action is prohibited. Also, as this is a
controlled transfer (i.e. not initiated by a fault condition) the inverter voltage
regulation circuit is momentarily increased to matched the bypass voltage while
the transfer takes place once the load is on-inverter the inverter reverts to its
nominal voltage. This is to limit any volts difference across the inverter-side
contactor while it is being closed, and so prolong contactor life.
Inverter-to-bypass transfer mechanism
A load transfer from inverter to bypass can be initiated by manual selection (controlled transfer) or by a fault condition (uncontrolled); however the results are
similar in that a closed transfer, as described above, will take place providing
the two supplies are synchronised. That is, the bypass-side SCRs are requested
to turn ON before the inverter-side contactor is de-energised, thus effecting a
no-break transfer.
If the inverter is not synchronised to the bypass supply when the load transfer is
requested then the inverter-side contactor is opened before the bypass-side
SCRs are turned ON and the load will experience a slight power-break of up to 1
cycle. This type of transfer is referred to as an open transfer, and protects the
load from out-of-phase voltage differences which could put twice the phase voltage potential on the critical load busbar.
1.3.3
Control power supplies

All circuit boards concerned with the static switch control function are powered
from either the AC-DC Power Supply Board or the DC-DC Power Supply Board
and are active when either supply is live.
6-7

6-8
Section 6:
Chapter 2 - Static Switch Driver Board (4542043 Z)
2.1
Chapter overview
This chapter contains a circuit description of the Static Switch Driver Board currently used across the whole 7200 Series UPS model range, and should be read in
conjunction with circuit diagram SE-4542043-Z (1 page).
Part N SE-4542043-Z is a direct replacement for Part N SE-4542041-X which
may be fitted to units manufactured prior to February 1997. Although there are
only minor differences between the two boards a full explanation of the Static
Switch Driver Board Part N SE-4542041-X can be found in Section 19 Chapter
3.
2.2
2.2.1
General description
Circuit board functions
This board is responsible for providing the bypass-side static switch SCRs with
their gate drive signals when the UPS Logic Board requests Load-on-bypass, and
for energising the inverter-side contactor when it requests Load-on-inverter. In
so doing, the board contains interlocking controls to prevent simultaneous operation of both circuits: thereby controlling the load transfer characteristics.
It also provides the necessary galvanic signal isolation between the low-voltage
environment of the control electronics and the high-voltage environment surrounding the bypass SCR devices and inverter-side contactor.
2.2.2
Input/Output connections
The Static Switch Driver Board has eleven connectors, all of which are described
below:
X1 to X6 Output gate drive signals to static switch SCRs

X7 Not used
X8 DC supply for the inverter-side contactor
X9 Switched energising supply for the inverter-side contactor
X10 inverter-side contactor auxiliary contacts (used for contactor status monitoring)
X13 Ribbon cable to the UPS Logic Board: carrying control logic signals and power supplies etc.
WARNING
TAKE EXTREME CARE WHEN WORKING ON THIS BOARD IN SITU.

The inverter-side contactor energising supply at connectors X8 and X9 is obtained from the DC Busbar and is at a potentially dangerous DC voltage whenever
the rectifier is operating or the UPS battery circuit breaker is closed.
Similarly, mains a.c. voltage is present on the SCR drive connectors at all times
when the load is on inverter or bypass.
6-9

CHAPTER 2 - Static Switch Driver Board (4542043 Z)
2.2.3
Block Diagram
The following illustration shows the Static Switch Driver Board at its most basic
functional block diagram level the function of each of the blocks shown is described in the following text.
Figure 6-7: Static Switch Driver Board basic block diagram
Contactor
Switching
Logic
Inverter
Contactor
switch
control
DC Bus
Volts
Contactor
Auxiliary
Transfer
Interlock
Logic
Load-on-inverter
Load-on-bypass
Modulator
Oscillator
Mixer
Gate
Supply
Monitor
Output
Driver
Circuit
Static
Switch
SCR
Gates
+12V
Control Power 12V
Supply
Power
Supply
+12V
+5V
Transfer interlock logic
The transfer interlock logic is at the heart of the boards operation. It determines
whether the inverter-side contactor is closed or the static bypass SCRs are
turned on; and in so doing, it controls the load transfer operation between the inverter and bypass supplies.
There are three inputs to this static logic block. The load-on-inverter and loadon-bypass signals are produced on the UPS Logic Board and are the primary load
transfer request inputs. The interlocking function also employs a signal derived
from auxiliary contacts of the inverter-side contactor which confirms the contactors status.
Contactor switching logic
The contactor switching logic block contains a solid-state switching circuit

which is controlled by the transfer interlock logic and connects the DC busbar
(battery) voltage through to the inverter-side contactors closing coil.
Mixer gate
The mixer gate combines the load-on-bypass command signal from the transfer
interlock logic with a 30kHz modulating signal to provide the output driver circuit with a modulated drive waveform. This type of drive signal is used to mini-
6-10

mise the size of the transformers in the output driver circuit, which are necessary
to provide signal isolation.
Note that the mixer gate output is inhibited by the supply monitor circuit if it
detects a low control power supply voltage: this also provides a reset pulse on
initial power-up.
Modulation oscillator
This is a free running oscillator of approximately 30kHz which provides a modulating signal to the mixer gate as described immediately above.
Output driver circuit
This circuit contains three pairs of power drivers which are all driven by the modulated signal from the mixer gate. Each pair of drivers is connected in a pushpull configuration across the output transformers primary windings to provide
adequate drive power.
Supply monitor
The supply monitor senses the voltage on the +12V control power rail and
serves two functions: first, it provides reset signal to the mixer gate to prevent it
turning on the static switch SCRs during power-up, until the supply rail has had
chance to stabilise. Second, it inhibits the mixer gate if it detects that the +12V
rail falls below 8V.
Power Supply
12V power rails are connected to this board from the UPS Logic Board via X13
pins 1-12. These are connected to a voltage regulator circuit which provides a stabilised +5V rail which is required by the boards electronic devices.
2.3
2.3.1
Detailed circuit description

Introduction
This description, which refers to the circuit blocks shown in Figure 6-7, should
be read in conjunction with diagram SE-4542043-Z.
inverter-side contactor control
The inverter-side contactor is energised by the high DC voltage present on the

DC busbar. The full bus voltage is applied to X8 pins 1-3 and the coil is connected
to X9 pins 1-3. Note that the positive supply is directly connected via pins 3 and
the contactor is controlled by switching the bus negative supply to X9 pin 1.
The contactor is energised by a logic high [INV-L> signal applied to X13 pin 15
from the UPS Logic Board. This signal turns on V32 which, via opto-isolator
V41, then turns on V31 and thus connects the contactor coil negative side to the
negative DC busbar supply at X8-1. The contactor should close within 50ms.
Note: the supply to V31 gate is obtained from the positive DC bus (battery) voltage present at X8 pins 3 via V41, R23 and R24; however it is limited to 13V by
zener V21. V12 and V13 are flywheel diodes to protect V41 and V31.
When the contactor closes, its auxiliary contacts short out X10 pins 1-2 which
then pulls D5-8 to a logic low and informs the transfer interlock logic of the
contactors status. The contactor should take between 60-100ms to open.
6-11

Static switch SCR control
The bypass-side SCRs are controlled by the transfer interlock logic circuit
output at D5 pin 12 (best monitored at X11: 0-3 which should be made). When
this point goes high it drives N2 pin 7 high which then takes D2 pin 2 and 3
high, which triggers the SCRs, vi the driver FETs V2 and V11.
D2 is annotated mixer gate in the block diagram (See Figure 6-7) and turns on
the static switch SCRs when its outputs (D2 pins 6 & 9) are high. The input to D2
pin 2 and 3 is connected to the output of N3, which is a power supply monitor,
and goes low to inhibit the SCR drive signal in the event of a power failure (and
during initial power-up). The input to D2 pin 1 and 5 is a 30kHz square wave
signal provided by D1, which is a free running oscillator: thus, provided there is
no problem with the power rails, when the output from N2 pin 7 goes high it enables D2 to pass the 30kHz modulating signal through to the output driver gates
of V2 and V11.
Note: V2 and V11 are supplied from the -12V rail to provide suitable output
switching levels to the isolating pulse transformers driving the power SCRs.
The 30kHz output from the mixer gate (D2 pins 6 & 9) are connected to the
gates of V2 & V11, which are the output line driver devices. Taking V2 as an example: when the 30kHz drive signal to D2 pin 6 is high FET V2 turns on. This
connects the -12V through to T1, T3 and T5 primaries with the +12V rail. When
the 30kHz drive signal is low D2 outputs go to a high impedance state; thus the
12V output at V2 is switched on and off at a 30kHz rate.
As can be seen on the circuit diagram, V2 and V11 output is connected to the
SCRs gate drive connectors via pulse transformers T1 to T6 which provide the
necessary signal isolation. Suppression capacitors C34 and C35 protect the driver
FETs from the transformers reactive currents.
Figure 6-8: Transfer interlock logic

D6
1
3
V10
[MNS-L>
1 = Load
on
Bypass
[INV-L>
1 = Load
on
Inverter
Contactor
Aux Fdbk
1 = Contactor
Open
R48
D5
3
D5
1
12
11
470k
R28
D6
2
C6
330n
13
470k
U5
5
U5
6
11
10
D6
D6
D5
D5
10 13
12
1 = Turn on
bypass SCRs
4 9
9
1 = Close
Output
Contactor
As explained in the previous paragraphs, the transfer interlock logic controls the
signal which initiates the static switch SCR driver circuit i.e. the output from
D5-12 turns on the static switch when high and vice versa.
6-12

This circuit is controlled by three inputs shown in the diagram above. These are:
[INV-L> which goes high when the UPS Logic Board is requesting loadon-inverter (i.e. contactor closed).
[MNS-L> which goes high when the UPS Logic Board is requesting loadon-bypass (i.e. static switch SCRs turned on).
Auxiliary contacts from the inverter-side contactor which is logic low
when the contactor is closed and vice versa.
The [INV-L> and [MNS-L> signals are mutually exclusive i.e. the control system
on the UPS Logic Board prevents it from requesting both conditions simultaneously. The following paragraphs described the circuit action when the load is
transferred between one power source and the other.
Load transfer from bypass to inverter - When the UPS Logic Board requires a load transfer to inverter it simultaneously drives the [MNS-L> low and
the [INV-L> high.
1. Prior to the transfer, the load is on the bypass supply, which means that D6
pin 10 is low (turning on the bypass SCRs).
2. The low [MNS-L> signal is inverted to a high at D5 pin 4 which takes D6
pin 1 high.
3. The same high [MNS-L> signal is also inverted to a low at D5-2, however
R28/C6 applies a 150ms time delay on this signal before it reaches D6 pin 12.
This is to hold on the bypass SCRs until the inverter-side contactor has had
time to close (contactor should close within 50ms).
4. After 150ms D6 pins 1 & 2 will both be high and this will drive D6 pin 3
low which drives D6 pin 10 high and D5 pin 12 low turning off the
bypass SCRs.
5. The high [INV-L> signal:
a) is inverted twice, at D5-6 and D5-10, and applies a high at D6 pin 5.
However this has no immediate effect on the circuit.
b) turns on V32, which switches on the inverter-side contactor energising
supply (see earlier output contactor control earlier in this section).
6. When the inverter-side contactor closes it applies a low to D5-9 which is
inverted to a high at D5-8 and D6 pin 6.
7. With D6 pins 5 and 6 now both high, the output at D6 pin 4 goes low
which drives D6 pin 10 high and D6 pin 11 low, which then turns off the
bypass SCRs. That is, if the inverter-side contactor has closed it will open
the bypass SCRs immediately and doesnt wait 150ms.
Note 1: the above description shows that when transferring normally from bypass to inverter the bypass SCRs are held on until the inverter-side contactor
is closed (auxiliary contacts closed), therefore the load is transferred without a
supply break i.e. closed transfer.
Note 2: Once the UPS Logic Board software decides to transfer to inverter, the
bypass SCRs are held on for a 150ms period. The contactor, if OK, should close
within 50ms. If this is the case, as indicated by the contactor auxiliary contacts,
the bypass SCRs are opened immediately. If this is NOT the case then the UPS
6-13

Logic Board software will re-establish the load on bypass command and remove
the load on inverter request to close the inverter-side contactor.
Note 3: The load on inverter request is given 5 seconds to achieve its objective,
otherwise the micro will annunciate an alarm (#41) [Output: No Voltage] on the
Operator Control Panel and will not attempt further transfers.
Load transfer from inverter to bypass - When the UPS Logic Board requires a load transfer to bypass it simultaneously drives the [MNS-L> high and
the [INV-L> low.
1. Prior to the transfer, the load is on the inverter supply, which means that D5
pin 12 is low (turning off the bypass SCRs).
2. The high [MNS-L> signal is:
a) inverted to a low at D5 pin 4 which takes D6 pin 1 low.
b) inverted to a high at D5 pin 2 which takes D6 pin 2 low.
Note: that in this instance there is no delay on the signal reaching D6 pin 2
as the time delay is bypassed by V10.
3. A logic low at either of D6 pins 1 or 2 will drive D6 pin 8 high; however
this has no immediate effect on the circuit (step 4a below).
4. The low [INV-L> signal:
a) is inverted twice, at D5-6 and D5-10, and applies a low at D6 pin 5
which results in a high at D6 pin 9.
b) turns off V32, which switches off the inverter-side contactor energising
supply (see output contactor control earlier in this section).
5. With logic highs at D6 pin 8 (step 3) and pin 9 (step 4a), the output from D8
pin 10 now switches low and D5 pin 12 high which is the state necessary
to turn on the bypass SCRs.
6. When the inverter-side contactor opens it applies a high to D5-9 which is
inverted to a low at D5-8 and D6 pin 6 which then holds D6 pin 9 high and
reinforces (overrides) the effect of the [INV-L> signal on D6 pin 5.
Note: the above description shows that when transferring normally from inverter to bypass the bypass SCRs are turned on immediately the [INV-L> signal requests the inverter-side contactor to open, therefore the load is transferred
without a supply break i.e. closed transfer. The contactor should open within 60100ms.
Power supplies
The devices on this board require various operating voltages. The main 12V
supply rails are provided by the UPS Logic Board and connected via X13 pins 1
to 12. +12V and 0V are then connected to a simple three-terminal regulator which
provides a +5V supply rail, as shown.
Note that D1 and D2 are both 5V operating devices but are fed from the -12V and
0V power rails. This is to shift their output signal levels to that required to switch
the output drivers (V2 and V11).
6-14

Power supply monitor
N3 monitors the +12V rail and -12V rail and its output pin 5 goes low if the
+12V falls below approximately 6.8V or the -12 falls below approximately
-10.6V. This inhibits the mixer gate D2 and the output line driver devices and
so prevents the bypass SCRs from being turned on. Power supply failure could
cause intermittent SCR triggering and, in the worst case, present a half-wave load
supply. The power supply monitor avoids such occurrences.
2.4
Summary information
Table 6-1: Static Switch Driver Board configuration jumpers
Jumper
Link
Positio
n
Function
open
Enable load on inverter command (Standard)
closed
Disable load on inverter command
open
Enable load on bypass command(Standard)
closed
Disable load on bypass command
open
Disables bypass fire command
closed
Enable bypass fire command (Standard)
N/A
Not used
open
Test static switch temperature monitor
closed
Inhibit static switch temperature monitor

(standard)
0-1
0-2
X11
0-3
0-4
0-5
6-15

6-16
Section 19:
Chapter 3 - Static Switch Driver Board (4542041 X)
3.1
Chapter overview
This chapter contains a circuit description of the Static Switch Driver Board
4542041X which was used across the whole 7200 Series UPS model range prior
to February 97, when it was superseded by Part No. 4542043Z (see Chapter 2).
This chapter should be read in conjunction with circuit diagram SE-4542041-X
(1 page).
3.2
3.2.1
General description
Circuit board functions
This board is responsible for providing the bypass-side static switch SCRs with
their gate drive signals when the UPS Logic Board requests Load-on-bypass, and
for energising the inverter-side contactor when it requests Load-on-inverter. In
so doing, the board contains interlocking controls to prevent simultaneous operation of both circuits: thereby controlling the load transfer characteristics.
It also provides the necessary galvanic signal isolation between the low-voltage
environment of the control electronics and the high-voltage environment surrounding the bypass SCR devices and inverter-side contactor.
3.2.2
Input/Output connections
The Static Switch Driver Board has eleven connectors, all of which are described
below:
X1 to X6 Output gate drive signals to static switch SCRs

X7 Not used
X8 DC supply for the inverter-side contactor
X9 Switched energising supply for the inverter-side contactor
X10 inverter-side contactor auxiliary contacts (used for contactor status monitoring)
X13 Ribbon cable to the UPS Logic Board: carrying control logic signals and power supplies etc.
WARNING
TAKE EXTREME CARE WHEN WORKING ON THIS BOARD IN SITU.

The inverter-side contactor energising supply at connectors X8 and X9 is obtained from the DC Busbar and is at a potentially dangerous DC voltage whenever
the rectifier is operating or the UPS battery circuit breaker is closed.
Similarly, mains a.c. voltage is present on the SCR drive connectors at all times
when the load is on inverter or bypass.
s6-c2OLD.fm - Issue 2 Dated 21/08/97
19-285

CHAPTER 3 - Static Switch Driver Board (4542041 X)
3.2.3
Block Diagram
The following illustration shows the Static Switch Driver Board at its most basic
functional block diagram level the function of each of the blocks shown is described in the following text.
Figure 19-9: Static Switch Driver Board basic block diagram
Contactor
Switching
Logic
Inverter
Contactor
switch
control
DC Bus
Volts
Contactor
Auxiliary
Transfer
Interlock
Logic
Load-on-inverter
Load-on-bypass
Control Power
Supply
Modulator
Oscillator
Mixer
Gate
Supply
Monitor
Output
Driver
Circuit
Power
Supply
Static
Switch
SCR
Gates
12V
+5V
-7V
The transfer interlock logic is at the heart of the boards operation. It determines
whether the inverter-side contactor is closed or the static bypass SCRs are
turned on; and in so doing, it controls the load transfer operation between the inverter and bypass supplies.
There are three inputs to this static logic block. The load-on-inverter and loadon-bypass signals are produced on the UPS Logic Board and are the primary load
transfer request inputs. The interlocking function also employs a signal derived
from auxiliary contacts of the inverter-side contactor which confirms the contactors status.
Contactor switching logic
The contactor switching logic block contains a solid-state switching circuit

which is controlled by the transfer interlock logic and connects the DC busbar
(battery) voltage through to the inverter-side contactors closing coil.
Mixer gate
The mixer gate combines the load-on-bypass command signal from the transfer
interlock logic with a 30kHz modulating signal to provide the output driver circuit with a modulated drive waveform. This type of drive signal is used to mini-
19-286

mise the size of the transformers in the output driver circuit, which are necessary
to provide signal isolation.
Note that the mixer gate output is inhibited by the supply monitor circuit if it
detects a low control power supply voltage: this also provides a reset pulse on
initial power-up.
Modulation oscillator
This is a free running oscillator of approximately 30kHz which provides a modulating signal to the mixer gate as described immediately above.
This circuit contains three pairs of power drivers which are all driven by the modulated signal from the mixer gate. Each pair of drivers is connected in a pushpull configuration across the output transformers primary windings to provide
adequate drive power.
Supply monitor
The supply monitor senses the voltage on the +12V control power rail and
serves two functions: first, it provides reset signal to the mixer gate to prevent it
turning on the static switch SCRs during power-up, until the supply rail has had
chance to stabilise. Second, it inhibits the mixer gate if it detects that the +12V
rail falls below 8V.
Power Supply
12V power rails are connected to this board from the UPS Logic Board via X13
pins 1-12. These are connected to two voltage regulator circuits which provide
stabilised +5 and -7V supply rails which are required by several of the boards devices.
3.3
3.3.1
Detailed circuit description

Introduction
This description, which refers to the circuit blocks shown in Figure 19-9, should
be read in conjunction with diagram SE-4542041-X.
inverter-side contactor control
The inverter-side contactor is energised by the high DC voltage present on the

DC busbar. The full bus voltage is applied to X8 pins 1-3 and the coil is connected
to X9 pins 1-3. Note that the positive supply is directly connected via pins 3 and
the contactor is controlled by switching the bus negative supply to X9 pin 1.
The contactor is energised by a logic high [INV-L> signal applied to X13 pin 15
from the UPS Logic Board. This signal turns on V32 which, via opto-isolator
V41, then turns on V31 and thus connects the contactor coil negative side to the
negative DC busbar supply at X8-1. The contactor should close within 50ms.
Note: the supply to V31 gate is obtained from the positive DC bus (battery) voltage present at X8 pins 3 via V41, R23 and R24; however it is limited to 13V by
zener V21. V12 and V13 are flywheel diodes to protect V41 and V31.
When the contactor closes, its auxiliary contacts short out X10 pins 1-2 which
then pulls D5-8 to a logic low and informs the transfer interlock logic of the
contactors status. The contactor should take between 60-100ms to open.
19-287

Static switch SCR control
The bypass-side SCRs are controlled by the transfer interlock logic circuit
output at D6 pin 11 (best monitored at X12-3 which should be made). When this
point goes high it drives N3 pin 7 high which then takes D2 pin 4 and D3/D4
pins 7 and 16 high, which triggers the SCRs.
D2 is annotated mixer gate in the block diagram (See Figure 19-9) and turns on
the static switch SCRs when its output (D2 pin 6) is high. The input to D2 pin 3
is connected to the output of N4, which is a power supply monitor, and goes low
to inhibit the SCR drive signal in the event of a power failure (and during initial
power-up). The input to D2 pin 5 is a 30kHz square wave signal provided by D1,
which is a free running oscillator: thus, provided there is no problem with the
power rails, when the output from N3 pin 7 goes high it enables D2 to pass the
30kHz modulating signal through to the output driver gates of D3 and D4.
Note: D1 and D2 are supplied from the -7V and -12V power rails to shift their
output switching levels to that required for driving the output line drivers D3/D4.
The 30kHz output from the mixer gate (D2-8) is connected to the gates of Q3/
Q4, which are the output line driver devices. Taking D4a as an example: when the
30kHz drive signal to D4-1 is high the two drivers within D4a turn on. This connects the -12V at D4-2 through to D4-3 and +12V (from N3 output) at D4-7
through to D4-6. When the 30kHz drive signal is low D4 outputs go to a high
impedance state; thus the 12V outputs at D4 pins 3 and 6 are switched on and
off at a 30kHz rate.
As can be seen on the circuit diagram, D4 outputs are connected to the SCRs gate
drive connectors via pulse transformers T1 and T2 which provide the necessary
signal isolation. V3 to V4 are flywheel diodes and protect the driver devices from
the transformers reactive currents.
Figure 19-10: Transfer interlock logic

D5
1
[MNS-L>
1 = Load
on
Bypass
D6
1
3
V10
2
D5
3
R29
C6
330n
470k
D6
8
D6
10 12
[INV-L>
1 = Load
on
Inverter
D5
5
11
11
13
D5
10
1 = Turn on
bypass SCRs
D6
5
4
6
D5
Contactor
Aux Fdbk
1 = Contactor
Open
19-288
1 = Close
Output
Contactor

As explained in the previous paragraphs, the transfer interlock logic controls the
signal which initiates the static switch SCR driver circuit i.e. the output from
D6-11 turns on the static switch when high and vice versa.
This circuit is controlled by three inputs shown in the diagram above. These are:
[INV-L> which goes high when the UPS Logic Board is requesting loadon-inverter (i.e. contactor closed).
[MNS-L> which goes high when the UPS Logic Board is requesting loadon-bypass (i.e. static switch SCRs turned on).
Auxiliary contacts from the inverter-side contactor which is logic low
when the contactor is closed and vice versa.
The [INV-L> and [MNS-L> signals are mutually exclusive i.e. the control system
on the UPS Logic Board prevents it from requesting both conditions simultaneously. The following paragraphs described the circuit action when the load is
transferred between one power source and the other.
Load transfer from bypass to inverter - When the UPS Logic Board requires a load transfer to inverter it simultaneously drives the [MNS-L> low and
the [INV-L> high.
1. Prior to the transfer, the load is on the bypass supply, which means that D6
pin 11 is high (turning on the bypass SCRs).
2. The low [MNS-L> signal is inverted to a high at D5 pin 2 which takes D6
pin 1 high.
3. The low [MNS-L> signal is also inverted to a high at D5-4, however R29/
C6 applies a 150ms time delay on this signal before it reaches D6 pin 2. This
is to hold on the bypass SCRs until the inverter-side contactor has had time
to close (contactor should close within 50ms).
4. After 150ms D6 pins 1 & 2 will both be high and this will drive D6 pin 3
low which drives D6 pin 10 high and D6 pin 11 low turning off the
bypass SCRs.
5. The high [INV-L> signal:
a) is inverted twice, at D5-6 and D5-10, and applies a high at D6 pin 5.
However this has no immediate effect on the circuit.
b) turns on V32, which switches on the inverter-side contactor energising
6. When the inverter-side contactor closes it applies a low to D5-9 which is
inverted to a high at D5-8 and D6 pin 6.
7. With D6 pins 5 and 6 now both high, the output at D6 pin 4 goes low
which drives D6 pin 10 high and D6 pin 11 low, which then turns off the
bypass SCRs. That is, if the inverter-side contactor has closed it will open
the bypass SCRs immediately and doesnt wait 150ms.
Note 1: the above description shows that when transferring normally from bypass to inverter the bypass SCRs are held on until the inverter-side contactor
is closed (auxiliary contacts closed), therefore the load is transferred without a
supply break i.e. closed transfer.
19-289

Note 2: Once the UPS Logic Board software decides to transfer to inverter, the
bypass SCRs are held on for a 150ms period. The contactor, if OK, should close
within 50ms. If this is the case, as indicated by the contactor auxiliary contacts,
the bypass SCRs are opened immediately. If this is NOT the case then the UPS
Logic Board software will re-establish the load on bypass command and remove
the load on inverter request to close the inverter-side contactor.
Note 3: The load on inverter request is given 5 seconds to achieve its objective,
otherwise the micro will annunciate an alarm (#41) [Inverter: No Voltage] on the
Operator Control Panel and will not attempt further transfers.
Load transfer from inverter to bypass - When the UPS Logic Board requires a load transfer to bypass it simultaneously drives the [MNS-L> high and
the [INV-L> low.
1. Prior to the transfer, the load is on the inverter supply, which means that D6
pin 11 is low (turning off the bypass SCRs).
2. The high [MNS-L> signal is:
a) inverted to a low at D5 pin 2 which takes D6 pin 1 low.
b) inverted to a low at D5-4 which takes D6 pin 2 low.
Note: that in this instance there is no delay on the signal reaching D6 pin 2
as the time delay is bypassed by V10.
3. A logic low at either of D6 pins 1 or 2 will drive D6 pin 8 high; however
this has no immediate effect on the circuit (step 4a below).
4. The low [INV-L> signal:
a) is inverted twice, at D5-6 and D5-10, and applies a low at D6 pin 5
which results in a high at D6 pin 9.
b) turns off V32, which switches off the inverter-side contactor energising
5. With logic highs at D6 pin 8 (step 3) and pin 9 (step 4a), the output from D8
pin 10 now switches low and D6 pin 11 high which is the state necessary
to turn on the bypass SCRs.
6. When the inverter-side contactor opens it applies a high to D5-9 which is
inverted to a low at D5-8 and D6 pin 6 which then hold D6 pin 9 high and
reinforces (overrides) the effect of the [INV-L> signal on D6 pin 5.
Note: the above description shows that when transferring normally from inverter to bypass the bypass SCRs are turned on immediately the [INV-L> signal requests the inverter-side contactor to open, therefore the load is transferred
without a supply break i.e. closed transfer. The contactor should open within 60100ms.
Power supplies
The devices on this board require various operating voltages. The main 12V
supply rails are provided by the UPS Logic Board and connected via X13 pins 1
to 12. These are then connected to two simple three-terminal regulators which
provide +5V and -7V supply rails, as shown.
Note that D1 and D2 are both 5V operating devices but are fed from the -12V and
-7V power rails. This is to shift their output signal levels to that required to switch
19-290

the output drivers (D3 and D4). The -7V rail also offsets the output from N3 to
the mixer gate input.
Power supply monitor
N4 monitors the +12V rail and -12V rail and its output pin 6 goes low if the
+12V falls below approximately 6.8V or the -12 falls below approximately
-10.6V. This inhibits the mixer gate and the output line driver devices (via V11)
and so prevents the bypass SCRs from being turned on. Power supply failure
could cause intermittent SCR triggering and, in the worst case, present a halfwave load supply. The power supply monitor avoids such occurrences.
3.4
Summary information
Table 19-2: Static Switch Driver Board configuration jumpers
Jumper
Link
Position
X11
1-2
Inhibit static switch temperature monitor
2-3
Enable static switch temperature monitor (Standard)
X12
Function
0-1
OPEN
0-1
CLOSED
0-2
OPEN
0-2
CLOSED
0-3
OPEN
0-3
CLOSED
Enable load on inverter command (Standard)

Disable load on inverter command
Enable load on bypass command(Standard)
Disable load on bypass command
Disables bypass fire command
Enable bypass fire command (Standard)
19-291

19-292

Sect 6

Uploaded by

Document Information

Original Title

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

Sect 6

Uploaded by

Copyright:

Available Formats

Section 6: Static Switch Operation & Control

Chapter 1 - Static Switch Principles

S-6.FM5 - Issue 2 Dated 21/08/97

SECTION 6 - Static Switch Operation & Control

7200 Series UPS Service Manual

S-6.FM5 - Issue 2 Dated 21/08/97

Chapter 1 - Static Switch Principles

The bypass-side static switch comprises a pair of inverse-parallel-configured

Static Switch Driver Board

s6-c1.fm5 - Issue 2 Dated 21/08/97

SECTION 6 - Static Switch Operation & Control

7200 Series UPS Service Manual

Static switch construction

s6-c1.fm5 - Issue 2 Dated 21/08/97

7200 Series UPS Service Manual

SECTION 6 - Static Switch Operation & Control

Figure 6-4: Static switch construction

Connections to snubber boards

s6-c1.fm5 - Issue 2 Dated 21/08/97

SECTION 6 - Static Switch Operation & Control

7200 Series UPS Service Manual

Figure 6-5: System control overview

Mains-side switch enable

Inverter-side switch enable

a) Bypass voltage OK (10%)

a) Inverter voltage OK (10%)

b) No bypass frequency error

a) Sync OK (Inv/Mains 9 with

b) No inverter frequency error

c) No Open-circuit bypass SCR

b) Inverter voltage OK (10%)

d) Inverter Disable Switch enabled i.e. not in inhibit position.

e) Permission to close output

Static switch control system

s6-c1.fm5 - Issue 2 Dated 21/08/97

7200 Series UPS Service Manual

SECTION 6 - Static Switch Operation & Control

Figure 6-6: Static switch control system

Output voltage sense

Output current sense

Inverter voltage sense

Inverter current sense

Operator Logic Board

Analogue control signals

s6-c1.fm5 - Issue 2 Dated 21/08/97

SECTION 6 - Static Switch Operation & Control

7200 Series UPS Service Manual

Output (critical load) voltage sense

Digital control signals

Transfer control philosophy

s6-c1.fm5 - Issue 2 Dated 21/08/97

7200 Series UPS Service Manual

SECTION 6 - Static Switch Operation & Control

Control power supplies

s6-c1.fm5 - Issue 2 Dated 21/08/97

SECTION 6 - Static Switch Operation & Control

7200 Series UPS Service Manual

s6-c1.fm5 - Issue 2 Dated 21/08/97

Chapter 2 - Static Switch Driver Board (4542043 Z)

X1 to X6 Output gate drive signals to static switch SCRs

TAKE EXTREME CARE WHEN WORKING ON THIS BOARD IN SITU.

s6-c2.fm5 - Issue 2 Dated 21/08/97

SECTION 6 - Static Switch Operation & Control