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FPGA Night

Class #1
Unallocated Space, Severn MD
fpga@unallocatedspace.org
Presenter: David Protzman

Agenda

Instructor Intro
Class History
Things That Will Be Covered

Instructor Intro
Name: Dave / Proto
Job: Cloud Software Developer
Electronics Background:
Arduino
PIC
VHDL
Xilinx

Class History

Started May 7th, 2013


Ended March X, 2014
Covered:
7 Segments
LCD 16x2 Displays
Computer Monitor Displays
Custom 8-bit CPU
SRAM Interface With SPI
Why Restart?
Too in depth, too quickly
Became very focused

What to Expect

Basics of FPGA fabric


Using Xilinx ISE
Introduction to VHDL
Simple IO (buttons, leds, etc)
Clocking
Combinatorial and sequential logic
State machines
Interface with SRAM and 16x2 LCD screens
VGA interface (easier than you might think!)
Requests!

Tonights Plan

What is an FPGA?
A word about CPLDs
How does it compare to microcontrollers/CPUs?
Why use an FPGA?
How are FPGAs programmed?
What is an FPGA made of?
What are the different Xilinx FPGAs?
Why not Xilinx and Altera mix?
What do I need to start programming?
Live demo of ISE
Upload Hello World blinky light example bit file

What is an FPGA?

FPGA: A field-programmable gate array (FPGA) is an integrated circuit


designed to be configured by a customer or a designer after
manufacturinghence "field-programmable" (Wikipedia)
Almost any digital circuit
Made of LOTS of gates
Screwed up? No worries, just reprogram it!

A Word About CPLDs

Complex Programmable Logic Devices


Sort of baby FPGAs
Consist of macro cells
Nowhere near as many gates as an FPGA
Much cheaper
Still programmable like an FPGA
Can also replicate digital circuits
Can be used for smaller, simpler designs
Ethernet
Just need lots of IO, but not a lot of speed
Level shifter
PWM driver
We will not be covering anything else about CPLDs

FPGAs and Microcontrollers

Microcontrollers:
Good for quick turnaround development
Lots of already baked in functionality (serial, I2C, SPI, etc)
Cheap
Breadboardable (sometimes)
Moderately fast
Programmed in C/C++/assembly
Generally low pin count
Mostly single threaded

FPGAs and Microcontrollers

FPGAs:
Can be anything you want
Programmed with VHDL/Verilog
Need to develop your own peripherals
Parallel by default
Not breadboardable
Expensive compared to microcontrollers
Takes a while to program
Completely different way of thinking about a problem
Need a 200 MHz sine generator and 2 FFT modules? No Problem!

FPGAs and Microcontrollers

FPGAs seem difficult right?


Why use them at all?
Need lots of IO?
FPGAs have a high pin count
Real time processing?
FPGAs can run over 200MHz in parallel
Lots of things happening at the same time?
Everything can happen at once on an FPGA
Want one chip with 64 SPI interfaces?
Create as many instances of a module as you want!

FPGA - Programming

Our boards use JTAG


JTAG:
Joint Test Action Group IEEE 1149.1
Provides debugging, programming, and user access
Most FPGA development boards have onboard USB to JTAG
No need for JTAG programmers
Even so, most boards expose the JTAG header anyway
Activity: Find the JTAG header on your board

FPGA - Programming

An FPGAs program is volatile


Once the power goes off, the program is lost
EEPROMs to the rescue!
Most FPGA boards will have some kind of EEPROM to store the
program
These EEPROMs are also sometimes JTAG devices
In this case, they will either be daisy chained, or have a separate
JTAG header

FPGA - What is Inside?

This varies chip to chip


Here are some of the things we should all have
Flip-Flops
Slices
CLBs (Configurable Logic Blocks)
RAM (Random Access Memory)
DSPs (Digital Signal Processors)
DCMs (Digital Clock Managers)
IO Buffers

FPGA Parts - Flip-Flop

Flip-flop: A 1 bit circuit that has two stable states and can be used to store
state information (Wikipedia)
An FPGA can be thought of as a massive array of flip-flops.
Flip-flops can be connected together to store larger amounts of
information.

FPGA Parts - Flip-Flop

We are interested in the D Flip-Flop


Clocked on the rising edge (there are no falling edge flip-flops in an
FPGA)
Has a reset pin that clears sets Q to zero
Has a set pin that will set Q to one
Cannot use set and reset together!!!
Forms the basis for the shift register

FPGA Parts - Lookup Table

Lookup Table: Basically a small RAM block that can be used to implement
logic functions
Example: You want to make sure that when inputs A and B are
pressed that C goes high.
A

FPGA Parts - Slices

Slices: Xilinx term for groupings of logic in the FPGA


Spartan 6 slice types (http://www.xilinx.
com/support/documentation/user_guides/ug384.pdf page 7)
SLICEX: 6-input LUT, 8 Flip-flops
SLICEL: 6-input LUT, 8 Flip-flops, wide muxes, carry logic
SLICEM: 6-input LUT, 8 Flip-flops, wide muxes, carry logic, distributed
RAM, shift registers
Spartan 6
2 Slices = 8 lookup tables + 16 Flip Flops
Spartan 3
4 Slices = 4 lookup tables + ? Flip Flops

FPGA Parts - CLB

CLB: Configurable Logic Block


These are the main logic resources
Spartan 6
1 CLB = 2 Slices
Spartan 3
1 CLB = 4 Slices
Arranged in a grid on the physical FPGA chip

FPGA - RAM

2 types of RAM
Distributed
Uses FPGA fabric
Takes up logic resources
Distributed RAM is made of
LUTs
Block
Dedicated blocks of memory on
the die
Does not take up logic resources

FPGA - DSP

DSP: Digital Signal Processing


Common DSP functions in FPGAs
Digital signal filters (FIR, CIC, DDC)
Complex numbers
CORDIC (sine, cos, tan, etc)
DFT, FFT
DDS
Multiply accumulate
Floating point
Dedicated space on the die

FPGA - DCM

DCM: Digital Clock Manager


Used to create various clock rates and phases
Ex: You have a base clock of 100 MHz, but need 150 MHz
DCM with a multiply of 3 and divide of 2
100 MHz * 3 = 300 MHz
300 MHz / 2 = 150 MHz
Not able to synthesize all frequencies
Limited number available
Dedicated space on the die
Generally able to multiply and divide by up to 32
We will be using these a lot!
Note: Not able to go very low in frequency!!!

FPGA Parts - IO

Connect to the physical pins on the FPGA


Several Types:
Clocks
JTAG
Differential
Tri-State
Wake
Init
Others

FPGA Parts - IO Cont.

Class activity:
Spartan 6 (Mojo and Nexys3)
http://www.xilinx.com/support/documentation/user_guides/ug385.
pdf
Find your chip
Mojo - TQG144 Package--LX4 and LX9 page 272
Nexys 3 - CSG324 Package--LX16 page 279
Spartan 3 (Basys2)
http://www.xilinx.com/support/documentation/data_sheets/ds099.
pdf
Find your chip
Basys2 - CP132 Footprint page 140

FPGA Parts - IO Cont.

Locate the following:


User IO
CCLK
VREF
GCLK
A##
TCK, TDI, TDO, TMS
VCCINT, VCCAUX, VCCO, GND

FPGA Parts - IO Cont.

IO is divided into Banks


Locate Bank 1
Each bank has one or more VCCO inputs
VCCO determines the input and output voltage of the bank
Allows each bank to have different voltage input and output
Most boards have all banks tied together, or have jumpers to select voltage
for certain banks

Xilinx

We use Xilinx FPGAs for this class


There are two main FPGA vendors
Xilinx
Have the majority share, and are more expensive
Altera
Not as much of the market, but cheap and effective
There is a third, not so well known vendor
Lattice Semiconductor
Small, low power FPGAs

Xilinx - Types of FPGAs

Two main series of FPGAs from Xilinx (6 series only)


Spartan
Aimed at educational institutions
Not as full featured as Virtex and a little slower
MUCH cheaper - Most expensive on Digikey: $317.50
Not as many pins (Largest is 900 pins)
Virtex
About 1.5x faster
More logic elements available
More resources
VERY expensive - Most expensive on Digikey: $39,452.40
Lots and lots of pins (Largest is 1925 pins)
Some have embedded PowerPC processors

Xilinx - Series Numbers

Spartan:
1-6
Virtex:
1-7
Artix
7
Kintex
7
Easy Path
6

Mixing FPGA Brands

This class only focuses on Xilinx


Xilinx and Altera both have IDEs (Integrated Development Environments)
These are not the same!
They are not compatible
Different IP Cores
IP Cores are Xilinxs name for pre-built modules
DDR interface
Ethernet MII interface
Various math modules
Not sure what Altera calls them
Teaching both would be difficult
Mainly: Your instructor only knows Xilinx!!

FPGA - Writing Programs

Most important thing:


You do NOT program an FPGA!!!
You describe a digital circuit for an FPGA
Pick an HDL (Hardware Description Language)
Verilog
Popular in USA, Asia, India, and South America
Very C-like
VHDL (VHSIC Hardware Description Language)
Developed by the US govt
Based on Ada and Pascal
Very verbose and strict
Popular in Europe

VHDL - Why?

Why are we using VHDL?


Short answer: Its all I know
Other answers:
VHDL is more strict than Verilog
Builds character!
VHDL is more verbose
Leads to a better understanding
You can still use Verilog code
Xilinx tools convert for you!

Xilinx - Getting started

ISE
Stands for Integrated Software Environment
Requires a license (free for us!)
We will be using the Web Pack
Only supports the lower end FPGAs
Does not have all the bells and whistles
You can get a 30 day license for the Design Suite
Has all the cool stuff!
Consists of many different programs
Project Navigator
Simulator
Floor Planner
Others

ISE Project Navigator

Youll spend most of your time here


Some of the things to do:
Create new VHDL files
Add Xilinx IP Cores
Create test benches
Build your bitstream
1. Synthesize
2. Translate
3. Map
4. Place and route
5. Generate bitstream

Xilinx - ISE

Project Navigator - Design


Current project
FPGA chip package

Means this is the main VHDL file


VHDL file called class_cpu.vhd

Xilinx IP Core cpu_divider *


ChipScope instance **

Xilinx IP Core memory *


VHDL file called
cpu_instructor_copy.vhd

Constraints file

* : This is not the name of the IP Core,


just the instance of this IP Core

** : We will not cover this for a while

Xilinx - ISE

Project Navigator - Processes


Make a symbol for the
schematic editor
Add timing requirements
View/Edit the actual layout
of FPGA resources
Runs Translate, Map, and
Place & Route
Converts netlist and constraints
to FPGA resources
Generates bit file for
programming the FPGA

Display reports about FPGA


utilization, timing, etc
Show VHDL code for creating
an instance of this design
GUI for defining what pins
connect to what in your design
Ensure design can be run in FPGA
Prepares netlist and
constraints for Map process
Places FPGA resources and
routes connections

Project Navigator - Console

Shows just warnings


Shows just errors
Shows all output (includes errors and warnings too)

Project Navigator - Summary

This page will show information about how your design


fits on the FPGA and what resources were used to fit
your design to the FPGA.
We will go more in depth later on!

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