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Publication 687
Mikko Hankaniemi
Tampere 2007
Mikko Hankaniemi
Abstract
This thesis proposes a dynamical profile for a switched-mode DC-DC converter. The
developed concept and definition of the dynamical profile is independent of the
topology, conduction mode and control principle, as long as the regulated quantity
remains the same. The profile consists of certain transfer functions that describe the
dynamical properties of a single converter. The basis of the dynamical profile for the
voltage-output converter is the modified g-parameter set and for the current-output
converter the modified y-parameter set, respectively. In addition, two special
admittance parameters that are important in the interaction analysis are also
introduced. These parameters, forming the dynamical profile, mainly define how a
switched-mode converter would behave as a part of an interconnected system and
how it would affect the other subsystems. Consistent formalisms for evaluating the
stability and performance of a converter imposed by the load and supply interactions
are provided. It is shown that the interactions are mainly reflected via the open-loop
parameters. The dynamical profile can be derived in two distinct ways; analytical
modeling methods can be used or the transfer functions that characterize the profile
can be measured.
The existence of the dynamical profile, for the voltage-output converters, is
demonstrated by developing the profile for a buck converter with different control
principles. Operations in discontinuous and continuous conduction modes are also
discussed. It is noticed that the control method and operation mode strongly affect the
dynamical properties. It is verified both analytically and experimentally that these
properties can be easily deduced by studying the parameters of the profile. The
dynamical profile for the current-output converters is also proposed. The profile can
be derived by using conventional modeling methods or from the corresponding
voltage-output-converter profile by applying duality. It is discovered that the
dynamics of a current-output converter are totally different than in the corresponding
voltage-output converter. The prevailing assumption has been that the current-output
converter has a peculiar characteristic of increased gain crossover frequency, when
using a low impedance load. This phenomenon is addressed to be due to a wrong
control design and the use of a resistive load as the initial load.
The prevailing method seems to be to use the resistive load in modeling and
analyzing switched-mode converters. However, the true nominal load for the voltageoutput converter is a constant current sink and for the current-output converter a pure
voltage source. Illustrative examples are provided, which explicitly show the adverse
effect of the resistive load hiding the real dynamical profile.
As a conclusion, the introduced concept of the dynamical profile provides valuable
tool and framework in analyzing and ensuring the performance and stability of a
switched-mode converter, or any electrical device, as a part of a larger system. Its use
can significantly save the design and prototype testing times and peculiar phenomena
can usually be avoided. Several examples and aspects presented in the thesis
explicitly prove that the unique dynamical profile of any given converter is a fact not
a fiction.
iii
iv
Preface
This work was carried out at the Institute of Power Electronics at Tampere University
of Technology (TUT) during the years 2004 2007. The research was funded by
TUT, Finnish Funding Agency for Technology and Innovation (TEKES), Efore Oyj,
Salcomp Oyj and Patria Oyj. Their contributions are greatly appreciated. Financial
supports in the form of personal grants from Nokia Foundation, Foundation of
Technology, Emil Aaltonen Foundation and Ulla Tuominen Foundation are also
greatly acknowledged.
I want to express my deepest gratitude to Professor Teuvo Suntio for supervising the
thesis and providing interesting research topics. It has been a pleasure to work under
his guidance and many fruitful conversations with him on the topic (and also off the
topic) have inspired me. Matti Karppanen, M.Sc., deserves special thanks for the help
in the lab and answering numerous questions. Professor Mummadi Veerachary and
Dr. Vesa Tuomainen reviewed the thesis and their constructive comments and
recommendations that improve the quality of the text in this thesis are greatly
acknowledged. I would also like to thank Antti Hankaniemi, Lic.Phil., for finding and
correcting the grammatical errors in the manuscript of this thesis.
I wish to thank my parents and sisters for their support and love, not only during my
studies, but throughout my whole life. A year ago, when I was starting to write this
thesis, I faced an unpredictable event in my own family. Without the help of my
parents, sisters, other relatives, friends and colleagues it would not have been possible
to complete this thesis in such a disciplined manner as I have now done. Thanks for
being there for me! Above all, my beloved daughter Amilia deserves very special
thanks. Playing with you at home and the sunshine in your eyes always make me feel
happy, even if the skies are gray!
Mikko Hankaniemi
vi
Contents
Abstract........................................................................................................................ iii
Preface ...........................................................................................................................v
Contents ...................................................................................................................... vii
List of Publications ...................................................................................................... ix
Authors Contribution....................................................................................................x
List of Notations, Symbols and Abbreviations............................................................ xi
1
Introduction .............................................................................................................1
1.1 Background and Motivation ................................................................................1
1.2 Voltage-Output Converter ...................................................................................5
1.3 Current-Output Converter....................................................................................6
1.4 A Review of Existing Methods to Analyze the Performance and Stability and
Model Switched-Mode Converters............................................................................7
1.5 Structure of the Thesis .......................................................................................12
1.6 Summary of Scientific Contributions ................................................................14
Dynamical Profile..................................................................................................16
2.1 Definition of the Dynamical Profile ..................................................................16
2.1.1 Two-Port Representation ............................................................................17
2.1.2 Load and Supply Interaction Formalisms...................................................23
2.2 Internal and Input-Output Stability....................................................................27
2.3 Discussion..........................................................................................................29
Dynamical Review.................................................................................................32
3.1 Modeling of Switched-Mode Converter............................................................32
3.1.1 Steady-State Operation ...............................................................................33
3.1.2 State-Space Averaging................................................................................35
3.2 Effect of Control Principle.................................................................................41
3.3 Interaction Analysis ...........................................................................................61
3.3.1 Load Interactions ........................................................................................62
3.3.2 Supply Interactions .....................................................................................66
3.3.3 Double Interactions.....................................................................................72
3.4 Effect of Load Resistance..................................................................................74
Experimental Evidence..........................................................................................78
4.1 Mixed-Data Method...........................................................................................79
4.1.1 Mixed-Data Control Design .......................................................................80
4.1.2 Mixed-Data Nominal Model.......................................................................81
4.2 Measured Internal Loop-Gain............................................................................82
4.3 Load Interactions ...............................................................................................84
4.4 Supply Interactions ............................................................................................87
vii
4.5 Discussion..........................................................................................................91
5
Conclusions .........................................................................................................107
6.1 Summary of Papers..........................................................................................107
6.2 Final Conclusions and Main Contributions .....................................................110
6.3 Future Topics ...................................................................................................114
References..................................................................................................................115
Appendices ................................................................................................................123
Appendix A............................................................................................................123
Appendix B............................................................................................................126
Appendix C............................................................................................................127
Appendix D............................................................................................................128
Publications ...............................................................................................................131
viii
List of Publications
The thesis is based on the following publications, which are referred to as P1, P2, P3,
P4, P5, P6, P7, P8, P9, P10 and P11 in the text.
[P1]
[P2]
[P3]
[P4]
[P5]
[P6]
[P7]
[P8]
[P9]
ix
[P10]
[P11]
Authors Contribution
The author planned and carried out the experimental tests, and was responsible for
finding the internal profile in [P1]. The modelling of the peak-current-mode
controlled converter in [P1] is done by the first author. In [P2], the author participated
in the theoretical analysis and was responsible for performing the experimental
evidence together with the co-authors.
Publications [P3] - [P11] were mainly contributed by the author of this thesis. The
author performed the theoretical analysis as well carried out the measurements.
Professor Teuvo Suntio, the supervisor of the thesis, gave valuable and constructive
comments regarding publications [P3] - [P11]. M.Sc. Matti Karppanen helped with
the experiments and measurements.
Small-signal component of x
dx
dt
Time derivate of x
Gy
Gx
Angle of x
arg x
Argument of x
Vector x
Degree
SYMBOLS
A
B
C
System matrix
Input matrix
Capacitor
Output matrix
Control variable
c
D
x1 ... xn
D
D
Dc
Input-output matrix
Diode
Averaged duty-ratio
Averaged complementary duty-ratio (i.e. 1 D )
Instantaneous duty-ratio
dc
Perturbed duty-ratio
eo
Fm
Duty-ratio gain
xi
Frequency vector
fc
Crossover frequency
f res
Resonant frequency
Ga
Control gain
Gcc
Gci
Gco
Gio
Gse
Sensor gain
G ( s)
Transfer function
Hi
Output-current-feedback gain
Average current
I in
IL
I o MAX
Io
Instantaneous current
iin
iL
io
Imaginary unit
jo
Inductor
Lij
Subsystem (matrix)
L( s )
Loop gain
LCO
LVO
Mc
Compensation ramp
M ( D)
Conversion ratio
Q
r
Switch
Magnitude of a complex number
rC
xii
rd
rE
Equivalent resistance
rds ( on )
Resistor
Req
Rs
Rs1
Rs 2
Sij
Subsystem (matrix)
Laplace variable
Toi
Ts
toff , toff 1
Switch off-time
toff 2
ton
Switch on-time
Instantaneous voltage
uc
uc ,CO
uC
uin
uL
uo
ur
Average voltage
U in
UL
Uo
UE
Equivalent voltage
Um
U o MAX
xiii
U ref
Reference voltage
Yin
Input admittance
Yin oc
Yin sc
Yin f
z, z
Intermediate parameters
Z f 1, Z f 2 , Z f 3
Z L , Z L1 , Z L 2 , Z L 3
Load impedances
Zo
Output impedance
ZS
Source impedance
Infinity
Damping factor
Zn
Phase in radians
SUBSCRIPTS
n
off
-c
-dcm
-o
-ocf
-pcmc
Integer number
Off-time
Closed-loop
Refers to the VMC-DCM converter
Open-loop
Refers to the PCMC-OCF converter
Refers to the PCMC converter
SUPERSCRIPTS
L
S
-i
-v
ABBREVIATIONS
AC
AC-DC
CC
CCM
CO
Alternative current
AC-to-DC rectifier
Constant current
Continuous conduction mode
Current-output
xiv
CST
DC
DC-DC
DCM
DPA
DPS
EET
EMI
FRA
GM
IEEE
IVFF
LTI
NRO
OCF
PCMC
PI
PID
PM
POL
PWM
RHP
S1
S2
TUT
SSA
VMC
VO
xv
xvi
1 Introduction
This chapter provides the basis for the thesis. Essential background information and
fundamental issues behind the topic of the thesis are presented. The basic operating
principles of switched-mode converters are also discussed. An extensive literature
review of the previous work related to the topic is presented, pointing out several
prevailing ambiguities. Finally, the main contributions and short summaries of the
following chapters are presented.
Chapter 1
Introduction
_______________________________________________________________________________________________________
in modeling and analyzing the dynamics and input-filter interactions are still quite
relevant and important, although scientific research has been carried out for more
than 30 years. Although the evolution of design and modeling of switched-mode
converters, and power electronics in general, have been rapid since the 70s there are
still some open questions and misunderstandings waiting for an answer and a
correction.
IBA
POL-converters
1-12V
Supply system
48V
8-16V
uin
In a modern electronic device (e.g. telecom power supply) various DC-voltage and
DC-current levels are usually required. To power these devices distributed power
systems/architectures (DPSs/DPAs) are widely employed [6]-[9]. An intermediate
bus architecture (IBA), shown in Fig. 1.1 inside the dashed line, has become the most
used DPA in new applications [10]. The IBA consists of an isolated bus converter,
which produces an intermediate bus voltage (8 16 V) and several point-of-load
(POL) converters. Usually, an EMI filter has to be placed before every power stage
and a storage battery may be connected to the system after the front-end rectifier in
order to provide energy to the load system during the power outages. It is obvious,
that the system shown in Fig. 1.1 is complicated both from a dynamical and design
viewpoint. In order to design a stable system with adequate performance margins the
functioning of each building block in the system has to be known.
Each DC-DC converter in a DPS, or in any application, is always a part of an
interconnected system. This actually means that the source and/or load system may
Chapter 1
Introduction
_______________________________________________________________________________________________________
significantly affect the stability of an individual converter, and hence, the stability of
the entire system. Therefore, an important and interesting question arises: How to
perform the interaction analysis to ensure stability and adequate performance of the
converter and the whole system? The canonical dynamical profile and interaction
formalism presented in this thesis will answer this question and provide a powerful
facility to analyze the performance and stability of DC-DC converters.
The terms performance, stability and also the crossover frequency or the bandwidth
continuously appear in this thesis. Therefore, it is necessary to define the meaning of
these terms in the scope of the thesis in order to avoid confusion. The terms
performance and stability can be addressed to both the time and frequency domains.
The time domain performance is typically studied by means of a step response (i.e. a
transient response in switched-mode converters), where a step change is introduced
into the reference signal and the output of the system is monitored. Typical
characteristics of the step response are the rise time, over shoot and settling time.
However, the classical step response analysis incorporates the disturbance signal (i.e.
the step) into the reference signal, which is typically constant and even physically
unavailable in the modern converters. The transient response analysis of the switchedmode converters is typically done by introducing the step change e.g. into the load
current or input voltage and the output voltage is monitored. From a dynamical
viewpoint, this approach does not give the same performance characteristics as the
classical step response method. The time domain performance is not discussed in this
thesis, but the frequency domain performance is often considered. The frequency
domain performance relates to the loop gain L( s ) of the converter. The performance
of the converter is judged by means of the gain margin (GM) and phase margin (PM).
In the bode plot, the GM can be expressed as the vertical distance of the loop gain
magnitude from the unity gain (i.e. 0 dB) at the frequency, where the phase is -180.
Consequently, the PM is defined as the phase of the loop gain at the unity gain
frequency added with 180. To guarantee adequate performance the GM and PM are
typically required to be at least 6 dB and 45, respectively. The instability occurs if
the GM < 0 dB or the PM < 0. The bandwidth of the system and the (gain) crossover
frequency f c are sometimes confusingly defined in power electronics. According to
the system theory, the bandwidth is related to the sensitivity or complementary
sensitivity function providing two different definitions of the bandwidth. The gain
crossover frequency f c is naturally the frequency, where the gain of the system is
unity (i.e. 0 dB). In this thesis, the gain crossover frequency f c is used, when
comparing the properties of different loop gains and transfer functions in order to
avoid confusion.[11]
Chapter 1
Introduction
_______________________________________________________________________________________________________
An extensive review of the existing methods to analyze and model the dynamics of a
switched-mode converter will be given in Section 1.3. However, it is worth
mentioning already at this point that most of the existing modeling and analyzing
methods do not reveal the true internal dynamics of a single converter. This is mainly
due to the wrong initial modeling with a resistive load, which may hide the internal
dynamics of the converter. The internal dynamics for e.g. a voltage-output converter
can be derived by using a constant-voltage source at the supply side and a constantcurrent sink as a load. Illustrative examples of the effect of a wrong initial load will
be given later.
New converter topologies and control methods are continuously developed and
published in academia and industry, but the focus seems to be only on certain
advantages of these new topologies. The dynamical issues and sensitivities for
interactions are not usually discussed. So, usually the performance of these new
topologies or control methods as a part of an interconnected system, like one shown
in Fig. 1.1, is unknown.
It has been found out during the research that the true nature of switched-mode
converters relates to the frequency domain. By studying certain frequency responses
(i.e. transfer functions) it is easy to conclude the possible sensitivities for the load
and/or supply interactions as will be shown e.g. in Chapters 3 and 4. However, only
time domain simulations and measurements are usually presented e.g. in converter
manufacturers datasheets [12]-[15]. If frequency responses are presented like in [12]
only the magnitudes are shown but not the phase plots, which are just as important as
the magnitudes. Again, the performance of these commercial converters as a part of
an interconnected system, like one shown in Fig. 1.1, remains unknown.
The concept of the dynamical profile of the switched-mode power supply is
introduced in this thesis. It provides a straightforward method and a physical insight
into the converter internal or the nominal dynamics. By analyzing the dynamical
profile, the dynamical properties (i.e. load and supply sensitivities and insensitivities
and control-loop stability) can be concluded by analyzing certain transfer functions in
the frequency domain. Consequently, the stability and performance of a converter
with known and analyzed dynamical profile as a part of the interconnected system
can be easily derived. Chapters 2 and 3 will discuss more in detail the concept of
dynamical profile and how to derive it.
Chapter 1
Introduction
_______________________________________________________________________________________________________
Power stage
io
iL
ZS
u in
Load system
ZL
+
-
+
uo
uC
ton
+
uc
Um
controller
U ref
Control circuit
Fig. 1.2. Basic configuration of voltage-output converter.
jo
Chapter 1
Introduction
_______________________________________________________________________________________________________
VO
CO
I o - MAX
io
Chapter 1
Introduction
_______________________________________________________________________________________________________
power limiting, which is typically implemented in such a way that the reference of the
current loop is gradually increased along the decrease in the output voltage until the
maximum defined output current is reached after which the limiting scheme follows
the constant-current scheme [16], and [17]. The study of the cascade operation and
the modified-constant-power limiting are left out of this thesis and only the mode,
where the output current is used as the feedback signal, is considered.
The basic configuration of the current output converter is shown in Fig. 1.4. The only
difference compared to the voltage-output converters is the load system, which
consists of an ideal voltage source eo in series with the load impedance Z L . However,
the internal dynamical profile and system interactions are totally different in the
current-output converters. The corresponding dynamical profile, dynamics and
interactions are discussed in detail in Chapter 5.
Supply system
iin
Power stage
io
iL
ZS
uin
Load system
+
-
+
+
uC
ZL
+ eo
-
uo
Rs
ton
Um
uc ,CO controller
Rs io
U ref
Control circuit
Fig. 1.4. Basic configuration of current-output converter.
Chapter 1
Introduction
_______________________________________________________________________________________________________
state-space averaging (SSA) modeling technique, which produces both continuoustime steady state and dynamic linearized models. The basic idea behind the SSA is to
average the switch on- and off-time state-space equations over one switching period.
Circuit averaging and hybrid modeling were considered as alternative modeling
methods that give the same canonical circuit model as the SSA method. The SSA has
become popular since its introduction basically due to its simple and clear
methodology. It is commonly known that the SSA gives accurate open-loop models
up to half the switching frequency, when the converter operates in continuousconduction-mode (CCM) under direct-duty-ratio control or VMC [20]. The canonical
circuit model introduced in [4] was argued for being a useful tool for analyzing smallsignal dynamics of switched-mode converters regardless of the topology. However, it
contains a resistive load as well as parasitic loss elements in the duty ratio dependent
generators hiding the true internal dynamics.
In spite of the practicality and simplicity of the SSA, several other modeling
approaches have also been developed. In circuit averaging, the voltage and current
waveforms are averaged instead of averaging the state equations as in SSA [19], and
[21]. Average models for the PWM-switch were introduced in [22] and [23].
Linearization of the averaged circuit and PWM-switch yields appropriate small-signal
models of the converter. It is clear that the ripple information is lost in averaging.
However, the averaged models are also usable in time domain simulations and
transient analyses. Switched circuits can be equally used, if the ripple information is
needed [21]. Because the switching action is actually discrete, a sampled-data
modeling has been proposed. The basis of the sampled data modeling is presented in
[21]. The modeling is based on the continuous time state-space model and the
standard matrix exponential expression for linear time-invariant (LTI) systems.
According to [21], [24] and [25], the prevailing method is to derive the discrete-time
model from the continuous-time state and switching equations. In [26], the discretedomain model is derived from the corresponding model in the Laplace-domain by
using z-transformation. The sampled-data modeling is derived in [27]-[29] by using a
discrete-time state-space model. The sampled-data modeling typically involves
tedious calculations and therefore it is not widely adopted. However, the sampleddata models might become useful, when digital controllers replace the analog
controllers.
It should be clear that the true internal or nominal dynamics can be derived from the
power stage model and from the control circuit model. However, it seems that the
definition of the nominal power stage or model is not clear among the scientists and
engineers. There are numerous examples of modeling and analyzing switched-mode
8
Chapter 1
Introduction
_______________________________________________________________________________________________________
DC-DC converters with a resistive load (these are only example papers, not the
complete list: [4] , [18] and [30]-[35]). The actual load is very seldom a pure resistor
but should be treated as an external system not included in the nominal model. The
seminal paper [4] actually uses a resistive load when introducing the SSA method and
the canonical equivalent circuit. It is obvious that including the load resistor in the socalled canonical model might lose the information of the nominal dynamics. Even the
fundamental power electronics text books such as [36] and [18] use the resistive load
in their analyses and provide incorrect information for the reader. So, what type of
load should be used to get the nominal dynamics? A voltage-output DC-DC converter
is known to have current source input and voltage source output ports [P5], so the
natural nominal load connected to the voltage source output port is obviously a
current-sink. Consequently, the nominal load for a current-output converter with a
current source output port is a pure voltage-source. In spite of the prevailing
technique to use the resistive load, a few attempts to define the nominal or general
load have been presented. A general load impedance is treated as an alternative for
the resistive load in [37]. First it is stated that the load can be seen as a current source,
but later the load is replaced with the general load impedance. The idea of the general
load (impedance) is actually correct, but the authors seem to lack the understanding of
the true nominal dynamical behavior of switched-mode converters. It is explicitly
stated in [38] that the nominal load refers to the use of either a resistive or dc current
sink load. It is true that the internal output impedance can be measured either by using
a resistive or current sink load, but when measuring or analyzing e.g. the loop gain
this does not apply. It seems that the authors of [38] are confused with the
terminology of the nominal dynamics or nominal load and provide vague information.
An approach known as an unterminated modeling was introduced in [39] treating a
converter as a stand-alone module without considering the load impedance, but using
a current sink load. The unterminated modeling method has been applied in [40]-[42]
for studying the load interactions. In [43], the method was successfully used for
analyzing the input filter interactions. The unterminated model was derived in [44] by
first constructing the models with the load resistor R and then letting R o f .
However, the most convenient way of getting the unterminated model is to use the
constant-current-sink load as an initial load system as it was done e.g. in [P4] and
[P5]. As a significant contribution of this thesis, it was found that the derivation of the
nominal dynamics, and hence, the dynamical profile by using the correct initial load
is a starting point for understanding the behavior of switched-mode converters under
various conditions.
It is well known that the load and supply interactions can significantly affect the
converter dynamics. Typically, the converter is equipped with an input EMI filter,
9
Chapter 1
Introduction
_______________________________________________________________________________________________________
which may deteriorate the performance of the converter. The input filter interactions
were first studied by Middlebrook in the seminal paper [3]. A converter with an input
filter was modeled and design criteria for input filter were developed. The derivation
of the input-filter-affected transfer functions were based on the method known later as
an extra element theorem (EET) [18], and [45]-[47]. The EET provides a tool to
analyze the change of transfer functions, when impedance is added to the network.
However, the EET involves tedious calculations, and therefore, may not be suitable
for practical usage. The load and input filter interactions can be easily concluded from
a two-port linear circuit representation of the converter with load and supply (e.g.
filter impedance) impedances [48] and [43]. The two-port modeling technique based
on g-parameters [49] is reviewed and discussed more in detail in Chapter 2. The
input-filter interactions have been under extensive research since the Middlebrooks
paper. It has been noticed that different topologies and control methods have different
sensitivities for instability or performance degradation due to the input filter or supply
impedance [33], and [50]-[56]. Obviously, the converter dynamics are also affected
by the load. The load interactions have also been studied in various papers such as in
[38]-[42], [44], [57], and [58]. The load interaction formalism is simpler to
understand than the corresponding supply side formalism. In Chapter 2, it will be
shown that the performance of a converter may be deteriorated if the load impedance
and the open-loop output impedance of the converter overlap. Although, the supply
and load-side-interaction formalisms are different, the stability of the converter with
load and/or supply system can be concluded from the impedance ratio known as a
minor-loop gain [3], [39] and [41]. If studying the supply interactions, the minor-loop
gain is defined as the ratio of the supply impedance (e.g. input filter output
impedance) and the closed-loop input impedance of the converter. The corresponding
minor-loop gain at the load side is the ratio between the closed-loop output
impedance of the converter and the load impedance. In order to guarantee the
stability, the minor loop gain must satisfy the Nyquist stability criterion [3], and [59].
Various forbidden regions in the complex half plane, out of which the minor loop
gain should stay, have been presented in the literature [41], and [60]-[63]. It is
claimed that these forbidden regions provide certain phase (PM) and gain margins
(GM) for the interconnected system. However, the PM and GM of the minor loop
very seldom coincide with the corresponding margins in the load or supply-affected
loop gain of the converter [P3] and [P7]. This means that the performance of the
converter may be drastically deteriorated even if the corresponding margins of the
minor loop gain are adequate. The minor-loop-gain analysis is only suitable for
ensuring the stability but the performance and true margins should always be checked
from the true major loop gain of the converter.
10
Chapter 1
Introduction
_______________________________________________________________________________________________________
impedance by definition [11]. The peaking in the sensitivity function due to a low PM
or GM would naturally be observable in the transient response.
The first basic courses on power electronics at universities are typically based on
fundamental text books such as [18], [36] and [73]. They all present the fundamentals
of switched-mode power conversion, but in [18] the study is done more in detail.
Common to all these text books is that the modeling and even the basic operating
11
Chapter 1
Introduction
_______________________________________________________________________________________________________
principles are discussed with the resistive load. The text book [18] is maybe the most
often used introductory level book on switched-mode converters, but it loses the point
of presenting the true canonical model (both steady-state and small-signal) and
dynamical issues by incorporating the resistive load into the models. The contents of
these fundamental text books may explain the reason, why the prevailing technique
still strictly relies on the use of the resistive load in the analyses both among
academia and industry.
Chapter 5 of this thesis is solely dedicated to the current-output converters, which are
typically used in battery-powered applications. The modeling and analysis of the
current output converter in [74]-[76] are based on the use of resistive load, although
the real load typically consists of a back-up battery with low internal impedance [77].
The peculiar behavior of the increasing crossover frequency in the loop gain with
battery-type load observed e.g. in [74] and [79] was shown to be due to the use of
wrong initial load (i.e. resistive) in [P9].
12
Chapter 1
Introduction
_______________________________________________________________________________________________________
13
Chapter 1
Introduction
_______________________________________________________________________________________________________
It is shown that every converter has its unique dynamical profile which
characterizes its dynamical features.
The nominal loads of the voltage- and current-output converters, invoking the
nominal dynamics, are stated to be a constant-current sink and a pure voltage
source, respectively.
14
Chapter 1
Introduction
_______________________________________________________________________________________________________
The dynamical profile of the current-output converter is presented for the first
time. It fully explains the observed peculiar behavior.
The thesis will definitively show that the existence of the dynamical profile is a fact
not a fiction.
15
2 Dynamical Profile
The concept of dynamical profile is introduced and its capability of revealing the
internal dynamics of a switched-mode DC-DC converter is shown. The two-port
representation is reviewed and argued for being the most useful method for deriving
the dynamical profile, yielding the true internal and canonical model of a switchedmode converter. The load and supply interaction and internal stability formalisms of
an interconnected system are also presented in a consistent way. The focus of the
chapter is mainly on the voltage-output converters. The dynamical profile of currentoutput converters is discussed in Chapter 5.
For a given topology, the internal dynamical profile consists only of the
corresponding power stage components and the necessary control circuitry.
The dynamical profile can be derived by using an ideal voltage source at the
input and a constant-current sink load at the output in the case of voltage16
Chapter 2
Dynamical Profile
_______________________________________________________________________________________________________
output converters and an ideal voltage source both at the input and output in
the case of current-output converters.
Basically, there are two ways of extracting the internal dynamical profile; an
analytical model of the converter can be derived or the corresponding transfer
functions can be measured by using a frequency response analyzer (FRA). Typically,
a practical converter contains some non-idealities, which cannot be modeled
accurately. This implies that by measuring the transfer functions the real dynamical
profile could be obtained. However, sometimes it may be impossible to measure
every transfer function or the internal dynamics directly (i.e. a resistive load has to be
used). In these cases the measurement and analytical data can be used together to
compute the internal dynamical profile. This technique is known as a mixed-data
method and it will be introduced in Chapter 4. Obviously, if the model and
measurements are known to be in a good agreement, it is reasonable and convenient
to use the model to study the dynamical profile analytically and guarantee the
functioning, stability and performance of the converter before constructing the entire
prototype or starting the mass production. Measurements can be used to verify the
analytical results.
The rest of this chapter will concentrate on showing the capability of the internal
dynamical profile. It can be proven that every converter topology, conduction mode
and control method produces different dynamical profiles. The control method and
conduction mode may significantly change the dynamical properties, although the
chosen topology can retain some common dynamical features. However, if the
dynamical profiles under different control methods or conduction modes and the
source and load subsystems are known, the most suitable converter can be easily
chosen for the application as well as the stability and performance of the
interconnected system can be guaranteed.
17
Chapter 2
Dynamical Profile
_______________________________________________________________________________________________________
[43], [44], [48], [51], [52], [81] and [82], but the idea of describing the true internal
dynamical profile has not been explicitly presented earlier. A two-port model for a
voltage-output converter is shown in Fig. 2.1 inside the dashed line. The input port of
the model is a Norton equivalent circuit and the output port is a Thevenin equivalent
circuit implying that the two-port model constitutes of g-parameters [49]. The use of
g-parameters is well justified, because their existence is always guaranteed [49]. The
input port of the model in Fig. 2.1 corresponds to
iin
(2.1)
Yin o and iN
(2.2)
Z o o and uT
Z o oio is due to the direction of the output current. It is worth noting that here open
loop refers to a situation where the outer feedback loop is disconnected (i.e. the
output voltage feedback path is disconnected in the case of voltage-output
converters). Inner feedback or feed-forward loops are connected in the case of the
open loop. The hat over the variables represents the small-signal component of the
variable. The general control variable is denoted by c .
iin
io
ZT
uin
+
_
YN
+
_
iN
uT
uo
io
_
c
Fig. 2.1. Two-port model of voltage-output converter.
The equations for input in (2.1) and output in (2.2) can be equally presented in a
matrix form yielding
18
Chapter 2
Dynamical Profile
_______________________________________________________________________________________________________
iin
uo
Yin o
G
io o
Toi o
Z oo
Gci
Gco
uin
i
o
c
(2.3)
iin
io
Zo- o
uin
+
_
Gco c
io
uo
Yin - o
Toi - oio
+
_
Gci c
Gio - ouin
_
c
Fig. 2.2. Two-port model of open loop voltage-output converter with g-parameters.
It should be noted that the general form of the g-parameter set typically consists only
of four parameters (see e.g. [49]), but here the general control variable is also
included in the parameter set. The set in (2.3) is represented as the corresponding
two-port circuit in Fig. 2.2 and the corresponding open-loop parameters in (2.1), (2.2)
and (2.3) are denoted as follows:
iin
uin
Yin o
Toi o
Gci
Gio o
uo
uin
uo
io
Z o o
Gco
19
uo
c
iin
io
iin
c
Chapter 2
Dynamical Profile
_______________________________________________________________________________________________________
An equivalent way of representing (2.3) and the model in Fig. 2.2 is to use controlblock diagrams. The block diagrams for the open-loop voltage-output converter are
shown in Fig. 2.3 describing the output and input dynamics. The block diagrams are
useful, when deriving the closed-loop dynamical profiles as will be shown next.
io
Zo- o
uin
Gio - o
uo
io
Toi - o
uin
Yin - o
iin
Gco
Gci
a)
b)
Fig. 2.3. Control-block diagrams for voltage-output converter at open loop: a) output
dynamics and b) input dynamics.
iin
uo
Yin c
G
io c
Toi c
Z oc
Gci c
Gco c
uin
i
o
ur
(2.4)
iin
io
Zo- c
uin
+
_
Gco - c ur
uo
Yin - c
+
_
Toi - c io Gci - c ur
io
Gio - c uin
20
Chapter 2
Dynamical Profile
_______________________________________________________________________________________________________
The general description for the converter loop gain LVO is typically given by
LVO
GseGcc Ga Gco
(2.5)
where Gse is the output-voltage sensor gain, Gcc is the controller transfer function and
Ga is the control gain (note: Ga is the gain between uco and c as it is shown in Fig.
2.5. For the VMC converters it is the PWM generator gain, but for instance for the
PCMC converters it is 1/ Rs , where Rs is the current sensing resistor. Because Ga
might be different for certain converters (i.e. control modes), it is named as control
gain). The loop gain can be used to study the stability and performance of the
converter. It should be noted that the controller design and also the loop gain are
strongly affected by the behavior of Gco .
io
Zo- o
uin
Gio - o
uo
io
Toi - o
uin
Yin - o
iin
Gco
Gci
Open-loop
Open-loop
c
c
Ga
Gse
Ga
uco
Closed-loop
Gse
uo
uco
Gcc
ur
Closed-loop
a)
Gcc
ur
b)
Fig. 2.5. Control-block diagrams for voltage-output converter at closed loop: a) output
dynamics and b) input dynamics.
The control-block diagrams are efficient for computing the dynamical closed-loop
profile consisting of the open-loop parameters. According to Fig. 2.5 a) and [18], the
closed-loop output voltage uo can be given by
uo
Gio o
Z o o
Gcc Ga Gco
uin
io
ur
1 GseGcc Ga Gco
1 GseGccGa Gco
1 GseGccGa Gco
21
(2.6)
Chapter 2
Dynamical Profile
_______________________________________________________________________________________________________
uo
Gio o
Z
L
1
uin o o io
VO ur
Gse 1 LVO
1 LVO
1 LVO
(2.7)
According to Fig. 2.5 b), the closed-loop input current iin can be given by
iin
(2.8)
Substituting uo in (2.8) with (2.6) and applying the definition for the loop gain in
(2.5) yields
Yin o
1 LVO
Gco
Gci
L
VO ur
GseGco 1 LVO
iin
Z o oGci LVO
uin Toi o
Gco 1 LVO
io
(2.9)
The closed-loop parameters are shown separately in (2.10) - (2.15), where the
subscript c refers to the closed loop. As the voltage reference ur (i.e. ur o 0 ) is
typically constant in single-loop converters (which are considered in this thesis) the
closed-loop parameter set reduces to consist only of (2.10) - (2.13).
Yin c
Yin o
Gco
1 LVO
(2.10)
Toi c
Toi o
Z o oGci LVO
Gco 1 LVO
(2.11)
Gio c
Gio o
1 LVO
(2.12)
Z o c
Z o o
1 LVO
(2.13)
Gci c
Gci
L
VO
GseGco 1 LVO
(2.14)
22
Chapter 2
Dynamical Profile
_______________________________________________________________________________________________________
Gco c
L
1
VO
Gse 1 LVO
(2.15)
io
(2.16)
iin
uo
Gio oToi o
Yin o Z Z
L
o o
Gio o
Z
1 oo
ZL
Z LToi o
Z L Z oo
GcoToi o
Z L Z o o uin
jo
Gco
c
Z
1 oo
ZL
Gci
Z oo
Z
1 oo
ZL
23
(2.17)
Chapter 2
Dynamical Profile
_______________________________________________________________________________________________________
Y
in
c
Z L Z oc
iin
Gioc
uo
Z
1 oc
ZL
Z LToic
Z L Z oc
uin
Z oc
j
Z oc o
1
Z L
(2.18)
io
iin
Zs +
uins
+
_
Zo- o
+
_
uin
Yin - o
Toi - oio
+
_
Gci c
Gco c
Gio - ouin
uo
jo
ZL
_
c
Fig. 2.6. Two-port model of voltage-output converter with load and supply subsystems.
It is apparent that the load interactions on the output dynamics are directly reflected
via the open-loop output impedance. According to (2.17) and (2.18), the internal
output dynamics would stay intact if the open-loop output impedance is small.
The load interactions on the input dynamics are not as straightforward. The output
impedance clearly has an effect on the internal transfer functions, but the open-loop
forward (i.e. Gio o ) and reverse (i.e. Toi o ) transfer functions have to be considered
too. According to (2.17), a small open-loop output impedance would actually result
only in intact reverse transfer functions, because
Z LToi o
Z o o 0
o Toi o
Z L Z o o
(2.19)
24
Chapter 2
Dynamical Profile
_______________________________________________________________________________________________________
Gio o
or
Toi o
is close to zero
Gio oToi o
Gioo 0
o Yin o ).
and/or Toi o 0
Z L Z o o
GcoToi o
Toi o 0
o Gci ).
Z L Z o o
L
The load-affected loop gain LVO
is a combination of the load affected control-to-
output transfer function in (2.17) and the internal loop gain in (2.5), yielding
L
LVO
LVO
Z
1 oo
ZL
(2.20)
According to (2.20), the load interactions in the loop gain are reflected via the
nominal open-loop output impedance Z o o .
The supply or source interactions on the converter dynamics can be found by
computing uin at the presence of the impedance-type source Z S from Fig. 2.6, which
yields
uin
(2.21)
iin
uo
Yin o
1 Z Y
s in o
Gio o
1 Z Y
s in o
Toi o
1 Z sYin o
1 Z sYin sc
Z o o
1 Z sYin o
Gci
1 Z sYin o
1 Z sYin f
1 Z sYin o
uins
io
Gco c
(2.22)
25
Chapter 2
Dynamical Profile
_______________________________________________________________________________________________________
at closed loop, assuming that the voltage reference ur (i.e. ur o 0 ) is constant can be
given by
Yinc
iin 1 Z sYinc
uo Gioc
1 Z Y
s inc
Toic
1 Z sYinc
u
ins
i
1 Z sYinsc
Z oc o
1 Z sYinc
(2.23)
The special admittances Yin f and Yin sc are defined in (2.24) and (2.25), respectively.
They are the same at open and closed loop. Yin f is the input admittance in a special
condition, where both uo and io are zero. Equation (2.24) can be obtained by letting
uo and io zero in (2.1) and (2.2), and then solving c from (2.2) and replacing it in
(2.1) in order to compute iin / uin
Yin f
Yin o
Yin sc
Yin o
Yin sc .
Gio oGci
Gco
(2.24)
Gio oT ji o
(2.25)
Z o o
According to (2.22) and (2.23), the supply interactions on the input dynamics are
reflected via the open-loop input admittance (i.e. Yin o ). This applies also to the openloop forward transfer function (i.e. Gio o ). However, on the open- and closed-loop
output impedances the supply interactions are reflected via the open-loop input
26
Chapter 2
Dynamical Profile
_______________________________________________________________________________________________________
admittance (i.e. Yin o ) and the short circuit admittance Yin sc . On the control-to-output
transfer function (i.e. Gco ) the supply interactions are reflected via the open-loop
input admittance and the ideal input admittance Yin f .
The source affected loop gain can be presented as
S
LVO
1 Z sYinf
LVO
1 Z sYino
(2.26)
Obviously, the source interactions in the loop gain are also reflected via the nominal
open-loop input admittance Yin o and the ideal input admittance Yin f .
In order to have intact output impedance and loop gain, it is obvious (see (2.24) and
(2.25)) that Gio o must be zero. This would make Yin f and Yin sc to be the same as
Yin o and Yin c even if Yin o or Yin c exhibits a resonant behavior.
It is important to note that the load may also change the input-port parameters and
hence the supply interactions by changing the input impedances [P11]. It is also
evident that the source system may have effect on the load interactions by changing
e.g. the output impedances in (2.22) (via Yin o and Yin sc ) and, hence in (2.17).
It should also be noted that it is not always necessary to analyze all the transfer
functions of the profile. The four most meaningful and important transfer functions to
be analyzed are Yin o , Z o o , Gio o and Gco . These four parameters are the key
elements reflecting the load and source interactions as can be concluded e.g. from
(2.17) and (2.22). If a complete understanding and characterization of a converter is
needed, all the transfer functions in the dynamical profile are worth analyzing.
uin 2
iin 2
27
Chapter 2
Dynamical Profile
_______________________________________________________________________________________________________
developing the mappings from the input variables to the intermediate and output
variables, respectively. [P2], [P8], [84] and [85]
iin1
io1 ( z ) iin 2
uin1
uo1 ( z ) uin 2
io 2
uo 2
The cascaded system illustrated in Fig. 2.7 can be represented in a matrix form as
iin1
z
z
u
o2
(2.27)
The subsystems S and L can be both at open or closed loop. For the stability to exist,
all the transfer functions in the mapping have to be stable [P2] and [11]. The mapping
from the input to intermediate variables can be given by
S21 L11
z 1 S22 L11
z S
21
1 S L
22 11
L12
1 S22 L11 uin1
S 22 L12 io 2
1 S22 L11
(2.28)
and the mapping from the input to output variables can be expressed by
S S L
S11 12 21 11
1 S22 L11
iin1
S21 L21
uo 2
1 S L
22 11
S12 L12
1 S 22 L11
u
in1
S22 L12 L21 io 2
L22
1 S22 L11
(2.29)
28
Chapter 2
Dynamical Profile
_______________________________________________________________________________________________________
stability depends on the stability of 1/(1 S22 L11 ) , corresponding to apply the Nyquist
stability criterion [59] to S22 L11 .
According to (2.27), the transfer functions S 22 and L11 are the corresponding output
impedance and input admittance of the subsystems S and L (i.e. S 22
L11
Yin L
Z o S and
source profiles for a given converter to guarantee stability. For instance, if the
subsystem S is the converter and the subsystem L is a load system, the corresponding
minor-loop gain is Z o c / Z L and the stability is assured if
Z L ! Z o c
and
2.3 Discussion
The intention of this chapter was to introduce the dynamical profile of a switchedmode DC-DC converter. It was proposed that the profile consists of certain transfer
functions/parameters at open loop (i.e. (2.3)) or closed loop (i.e. (2.4)). It was also
observed that the supply interaction formalism introduces two special admittances
(i.e. Yin f and Yin sc ), which should be included in the dynamical profile. Actually,
without knowing the load and supply interaction formalisms the profile is useless.
The interaction formalisms evoke the usefulness of the profile by showing explicitly
the open-loop parameters, which reflect the load and supply interactions. It should be
29
Chapter 2
Dynamical Profile
_______________________________________________________________________________________________________
emphasized that the interactions are always reflected via the open-loop parameters,
even in the closed-loop interactions as can be seen after replacing the corresponding
definition in (2.18) and (2.23) with (2.10) - (2.15). However, it was proposed e.g. in
[38], [40], [42], [50] and [55] that the interactions and performance of the converter
loop gain can be studied via the closed-loop output and input impedances. The
prevailing method to include the closed-loop impedances in the equations for loadand source affected loop gains can be argued for being false, because it loses the
crucial information of the open-loop impedances. The closed-loop impedances only
act as a stability boundary, as will be shown later.
Z in - c
uin
+
-
Subsystem 1 uo1
uo , c
Converter
Z o1- c
Zo- c
Z o - o , LVO
Subsystem 2 uo 2
ZL
jout
Z in 2- c
Fig. 2.8. Interconnected system showing the parameters needed for load and supply
interaction analyses.
Fig. 2.8 shows an interconnected system with three subsystems connected in series
[P5]. The subsystem in the middle is assumed to be a DC-DC converter and the
Subsystems 1 (S1) and 2 (S2) can be composed of e.g. other converters, filters,
cablings, etc. The direction of the arrows pointing out of or into the block
Converter defines the parameter needed from other systems in order to study the
interactions. For instance, S1 needs the Z in c of the converter, because it represents
the load impedance Z L for S1. Consequently, Z o1c represents the supply impedance
Z S for the converter. The curved lines inside the Converter-block define the internal
parameters required for the interaction analysis.
According to Fig. 2.8, it is obvious that if a complete understanding of the converter
dynamical properties is desired, the whole parameter set of open-loop transfer
functions (2.3) has to be derived. This would also enable the derivation of the two
special admittances, i.e. Yin f and Yin sc . Sometimes it is not feasible to e.g. measure
all the open-loop g-parameters. However, at least Z o o , Yin o , Gio o and Gco should
30
Chapter 2
Dynamical Profile
_______________________________________________________________________________________________________
31
Dynamical Review
32
Chapter 3
Dynamical Review
_______________________________________________________________________________________________________
iL (Ts ) iL (0)
1 s
u L dt
L 0
(3.1)
Under steady-state conditions the net change of the averaged inductor current iL
over one switching period Ts is zero, i.e. the initial value iL (0) and the final value
iL (Ts ) are the same. Hence, according to the inductor volt-second balance:
Ts
u dt
(3.2)
Similarly, the net change of the capacitor voltage over one switching period Ts can be
expressed as
T
uC (Ts ) uC (0)
1 s
iC dt
C 0
(3.3)
Under steady-state conditions the net change of the averaged capacitor voltage uC
over one switching period Ts is zero, i.e. the initial value uC (0) and the final value
uC (Ts ) are the same. Hence, according to the capacitor amp-second balance:
Ts
i dt
(3.4)
A buck converter with the relevant parasitic elements from the modeling perspective
is illustrated in Fig, 3.1. The equivalent switch on- and off-time sub-circuits are
shown in Figs. 3.2 and 3.3, respectively.
33
Chapter 3
Dynamical Review
_______________________________________________________________________________________________________
rds ( on )
+ uL -
iin
uin
rL
iL L
rc
rd
+
_
ton
uo
UD
io
+
u
-C-
rds ( on ) i L
L
rL
+ uL -
iin
rc
uin
iC
uo
io
+
u
-C-
rL
iL L
+ uL -
iin
uin
rd
+
_
+
rc
iC
UD
uo
io
+
u
-C-
According to Fig. 3.2, the on-time inductor voltage and capacitor current can be
expressed as
u L ,on
iC ,on
iL io
(3.5)
34
Chapter 3
Dynamical Review
_______________________________________________________________________________________________________
According to Fig. 3.3, the off-time inductor voltage and capacitor current can be
expressed as
u L ,off
iC ,off
iL io
(3.6)
Averaging the on- and off-time equations (3.5) and (3.6) over one switching period
Ts by multiplying (3.5) with the duty-ratio D and (3.6) with its complement Dc (i.e.
1 D ) and then summing them together yields
UL
IC
I L Io
(3.7)
Note that in the above equation, the capital letters denote variables, which contain
only the DC-component (i.e. the large-signal component without the ripple
information). Applying the inductor volt-second and capacitor amp-second balances
to (3.7) yields
0
I L Io
(3.8)
The same procedure presented in this section can be applied to any converter
operating in the CCM. In the DCM, a slightly different procedure must be applied as
it is demonstrated e.g. in [44].
35
Chapter 3
Dynamical Review
_______________________________________________________________________________________________________
(3.9)
where x(t ) is the state vector, u(t ) the input vector and y (t ) the output vector. For
the voltage-output converter the state, input and output variables are typically chosen
as
iL
u , u(t )
C
x(t )
uin
i , y (t )
o
c
iin
u
o
(3.10)
The buck converter operating in the CCM and shown in Fig. 3.1 is used as a modeling
example. The control method is the traditional VMC. The construction of the statespace representation starts with solving the equations for uL , iC , iin and uo during
both sub-cycles. This yields for the on-time from Fig 3.2:
uL
iC
iL io
iin
iL
uo
uC rC iC
(3.11)
(rL rd )iL uo U D
iC
iL io
iin
uo
uC rC iC
(3.12)
The state space formalism requires the derivates of the current (i.e. iL ) and voltage
(i.e. uC ) of the storage elements. Recalling that uL
rearranging (3.11) and (3.12) yields for the on-time:
36
diL
, iC
dt
duC
dt
and
Chapter 3
Dynamical Review
_______________________________________________________________________________________________________
(r r r
)
u
u
r
diL
C L ds ( on ) iL C in C io
dt
L
L
L L
duC iL io
dt
C C
iin iL
uo
(3.13)
rC iL uC rC io
(3.14)
rC iL uC rC io
(3.15)
rC iL uC rC io
The obtained averaged state space is nonlinear due to products of two variables. The
state space can be linearized by computing the Jacobian matrix of the function
y
37
The
f (t , x) in respect
Chapter 3
Dynamical Review
_______________________________________________________________________________________________________
wy
wy
x1 ...
xn
wx1
wxn
x1
.
wf
wf
(
,
)
.
.
.
(
,
)
t
X
t
X
.
wxn
wx1
.
xn
(3.16)
Where X contains the steady-state values of the corresponding value at the given
operating point. The linearized small-signal state space obtained from applying the
partial derivation is
u
r
(r r )
diL
U
D
C E iL C uin C io E d
dt
L
L L
L
L
duC iL io
dt
C C
iin DiL I L d
uo rC iL uC rC io
(3.17)
where
rE
UE
rL rds ( on ) D rd Dc
(3.18)
U in U D (rd rds ( on ) ) I L
The hat over the variables represents the perturbed value around the corresponding
steady-state value (i.e. the small-signal component). The steady-state operating point
can be obtained from (3.15) by letting the derivates equal to zero and replacing the
variables with their steady-state values, yielding
0 (rC rE ) I L U C DU in rC I o U E Dc
IL
Io
I in
DI L
Uo
rC I L U C rC I o
(3.19)
The derivation of the steady-state duty ratio D from (3.19), when excluding the
parasites, yields the same as (3.8).
38
Chapter 3
Dynamical Review
_______________________________________________________________________________________________________
The output voltage in the linearized small-signal state space (i.e. (3.17)) is convenient
du
to replace with uo uC rC C C , because the interest is in frequency domain
dt
representation, which requires the use of Laplace transformation. The resulting final
state-space equations are
(r r )
u
r
diL
U
D
C E iL C uin C io E d
dt
L
L L
L
L
duC iL io
dt
C C
iin DiL I L d
du
uo uC rC C C
dt
(3.20)
(3.21)
where
iL
, u
uC
uin
io , y
d
iin
,
uo
(3.22)
rC rE
L
1
C
0
D
, D
0 1 r C duC
C
dt
1
L
, B
0
D
L
rC
L
1
C
UE
L
,
0
0 0 I L
0 0 0
39
(3.23)
Chapter 3
Dynamical Review
_______________________________________________________________________________________________________
AX(s) BU(s)
(3.24)
(3.25)
According to (3.25), solving ( sI A) 1 B gives the transfer functions from the input
variables to the state variables and solving C( sI A) 1 B D yields the transfer
functions from the input variables to the output variables. The input-to-output
description is actually the g-parameter representation of the converter dynamics and,
hence, forms the basis of the dynamical profile automatically.
The g-parameter set of the VMC buck converter, after solving C( sI A) 1 B D is
Yin o
Gio o
Gci
G
co
Toi o
Z o o
D2 s
D(1 srC C )
LC
D(1 srC C )
LC
LC
r r
1
s2 s E C
L
LC
sDU E
U E (1 srC C )
I
LC
L
r r
1
0
s2 s E C
L
LC
(3.26)
(3.27)
The converter dynamics can be analytically studied at the desired operating point by
means of the g-parameter set presented in (3.26) - (3.27) by using computational
software such as Matlab, Mable and Mathematica. The above presented
modeling example was based on the voltage-output VMC buck converter, but the
basic modeling idea is the same for the other topologies as well. Other control
40
Chapter 3
Dynamical Review
_______________________________________________________________________________________________________
methods (e.g. PCMC) may require a slightly different modeling approach, but as long
as the dynamical profile, and hence, the model is correct it is reasonable to say that
the dynamical analysis will produce accurate results.
400mW
ZS
uin
+
_
iL
UD
0.3V
rd
55mW
fs = 100kHz
rL
io
0.06mW
rC
33mW
316mF
Rs1iL
+
uo
10V
jo
ZL
Rs 2
VMC
PCMC
PCMC-OCF
uo
Control R i
system su2 o
R
PWM
10V
Fig. 3.4. Voltage-output buck converter with VMC, PCMC and PCMC-OCF control (CCM:
L = 105 H, DCM: L = 5 H).
41
Chapter 3
Dynamical Review
_______________________________________________________________________________________________________
The buck converter used in the analysis is shown in Fig. 3.4. The VMC forms the
basic control principle taking the output voltage ( uo ) as a feedback signal and
comparing the error voltage of the controller to the sawtooth ramp, making the dutyratio (d) as an independent variable. In PCMC, the sawtooth ramp is replaced with
the signal derived from the inductor current, which is typically sensed via a current
transformer and then converted into a voltage signal by means of a resistor Rs1 . In
PCMC-OCF the output current io is feedforwarded (i.e. added to the control signal)
by using a current sensing resistor Rs 2 [70] and [87].
The VMC control system is quite simple, including only an error amplifier producing
the control signal for the PWM generation. In PCMC, the up-slope of the inductor
current and the control signal is compared. The basic PCMC is prone to operate in
subharmonic mode at the duty ratios exceeding 0.5 and, therefore, an artificial
compensation ramp M c is typically summed to the control signal to extend the dutyratio range [P1]. The PCMC has become a popular control method mainly due to its
high input-noise attenuation and a feature to limit the switch current pulse-by-pulse
[P1]. However, the PCMC buck converter has large open-loop output impedance,
which makes the converter prone to load interactions. To overcome this disadvantage,
the output current can be taken as a feedforward signal and added to the control signal
forming the PCMC-OCF. Theoretically, this can make converter insensitive to both
the supply and load interactions [87].
The open-loop parameters are convenient to analyze first. The open-loop here means
that the feedback from the regulated signal is disconnected. In the voltage-output
converters, this signal is the output voltage and, consequently, in the current-output
converters the regulated signal is the output current. In other words, the control signal
is kept constant at a certain value that produces a duty ratio, which, in turn sets the
output as desired at the steady-state conditions.
The original SSA technique [4] results in reduced order models for converters
operating in DCM. The full-order model and g-parameter set for the VMC-DCM
converter can be obtained by applying a generalized modeling method described in
[44]. Before starting the modeling, it should be noticed that the time-averaged
inductor current iL
42
iL
iL
iL
iL
m1
- m2
iL
iL
- m2
m1
0
0
toff1
ton
toff1
ton
Ts
toff 2
Ts
b)
a)
According to Fig. 3.5 a), the average inductor current during the on-time iL
off-time iL
iL
iL
on
off
and
may be expressed as
ton
iL
ton toff 1
toff 1
off 1
on
ton toff 1
(3.28)
iL
For developing the averaged state space, the derivatives of the time-averaged state
variables (i.e. inductor current and capacitor voltage) have to be defined. According
to Fig. 3.5 a) or b), the derivative of the averaged inductor current iL is
d iL
dt
t
ton
m1 off 1 m2
Ts
Ts
(3.29)
where m1 and m2 are the corresponding up and down slopes of the inductor current,
respectively. It was noticed e.g. in [44] that the parasitic elements do not have
considerable effect on the converter dynamics in DCM. Therefore, only the ESR of
the output capacitor is considered hereafter. For a buck converter m1 and m2 can be
computed from Figs 3.2 and 3.3, yielding
43
Chapter 3
Dynamical Review
_______________________________________________________________________________________________________
m1
m2
uin uo
L
(3.30)
uo
L
This thesis concentrates only on the fixed-frequency operation modes. Therefore, the
cycle time Ts is constant and the dynamics associated with the on time ton and off
times toff 1 and toff 2 may be equally captured by using the duty ratio d
complements d1
toff 1 / Ts and d 2
ratio is denoted by d c (CCM), but here subscripts 1 and 2 are used in order to avoid
confusion between CCM and DCM. It should be noted that in CCM d d1 1 , but in
DCM d d1 1 . According to these assumptions, (3.29) can be represented as
d iL
dt
dm1 d1m2
(3.31)
The derivative of the time-averaged capacitor voltage can be computed e.g. from Fig.
3.2, yielding
d uC
dt
iL
i
o
C
C
'QC
Ts
iL
on
(3.32)
iin
iin
d
iL
d d1
(3.33)
According to the traditional SSA method (see Section 3.1), the time-averaged output
voltage uo
uo
can be presented as
uC rC C
d uC
dt
(3.34)
44
Chapter 3
Dynamical Review
_______________________________________________________________________________________________________
Equations (3.31)-(3.33) form the general averaged state space representation for the
buck converter. The small-signal model for VMC-CCM converter without the
parasitic elements (except the output capacitor ESR) can be computed by following
the same procedure presented in Section 3.1 (starting from (3.15)). When considering
the general state-space equations, the only unknown variable is the length of the offtime1 ( toff 1 ). The dynamics associated to toff 1 can be recovered by computing its
relation to iL according to the waveforms of Fig. 3.5 b), yielding
T
1 s
iL (t )dt
Ts 0
iL
1
m1ton ton toff 1
2Ts
(3.35)
1
m1d d d1 Ts
2
iL
(3.36)
d1
2 iL
d
dTs m1
(3.37)
d iL
dt
d uC
dt
iin
uo
d uin
2 iL uC
L
dTs uin uC
iL
i
o
C
C
2
d Ts uin uC
(3.38)
2L
uC rC C
d uC
dt
The steady-state operating point can be solved from (3.38) by setting the derivatives
to zero. This yields
45
Chapter 3
Dynamical Review
_______________________________________________________________________________________________________
IL
Io
I in
MI o
Uo
Uc
where M
(3.39)
K
1 M
U o / U in and the dimensionless value K 2 L / ReqTs . The equivalent load
resistor Req is defined as Req U o / I o . These notations are defined in order to simplify
the final equations.
The linearized small-signal state space without the losses can be computed from
(3.38) by applying (3.16). Applying the definitions for steady-state in (3.39) and the
notations M and K , the linearized small-signal state space can be written as
diL
dt
Req
L
1
K
K
iL
uC
1 M
L(1 M ) 1 M
2U
M (2 M )
K
uin in d
L(1 M ) 1 M
L
duC iL io
dt
C C
2U 1 M
M2
M2
iin
uC
uin o
d
Req (1 M )
Req (1 M )
Req
K
uo
uC rC C
(3.40)
duC
dt
1
0
M (2 M )
K
0
(1
)
1
L
M
M
B
0
C
1 M
2U in
46
(3.41)
Chapter 3
Dynamical Review
_______________________________________________________________________________________________________
M2
0
Req (1 M )
, D
duC
0 1 rC C
dt
M2
Req (1 M )
0
0
2U o 1 M
Req
K
(3.42)
Solving C( sI A) 1 B D yields the transfer functions from the input variables to the
output variables and gives the g-parameter representation of the converter dynamics
as it was discussed in Section 3.1.
The g-parameter set of the VMC-DCM buck converter [88], after solving
C( sI A) 1 B D is
Yin o dcm Toi o dcm
G
io o dcm Z o o dcm
Req
M 3 2 M
K
M2
K
s
2
CReq 1 M
L 1 M
LCReq 1 M 1 M
sL Req
1 srC C
M 2 M
1 M
K
1 srC C
LC
LC 1 M 1 M
R
K
K
1
1
s 2 s eq
L 1 M LC 1 M 1 M
M2
Req 1 M
Gci dcm
G
co dcm
s s
Req
L
(3.43)
2U in M 2
LCR 1 M
eq
2U 1 sr C
C
2U o 1 M
in
LC
Req
K
1
1
K
K
0
1 M LC 1 M 1 M
(3.44)
The PCMC is a direct extension of VMC. This means that under fixed-frequency
operation mode and in CCM the basic averaged and small-signal state space
equations (i.e. (3.15) and (3.17), respectively) are the same, but the duty ratio in
PCMC is not anymore independent, but dynamically dependent on the input and
47
Chapter 3
Dynamical Review
_______________________________________________________________________________________________________
output voltage, control current ico as well as other circuit elements [P1]. The
dynamical dependence is commonly known as duty-ratio constraints [18], and can be
expressed as
d
(3.45)
ico
- Mc
m1
iL
iL
DiL
- m2
t
d 'Ts
dTs
Ts
Fig. 3.6. Duty-ratio generation in PCMC based on the inductor current up-slope.
The state variable is the average inductor current iL . Therefore, the comparator
equation determining the duty-ratio can found from Fig. 3.6, yielding
ico M c dTs
iL 'iL
(3.46)
where 'iL is the dynamic distance between the peak inductor current and the average
inductor current as shown in Fig. 3.6 and M c is the compensation ramp [P1]. The
main task is to find expression for 'iL . In CCM, the time averaged inductor current is
always in the middle of the ripple band. The time-varying averaged inductor current
may also be expressed as a first-order function of time within the switching cycle Ts .
Therefore, iL can be expressed as
48
Chapter 3
Dynamical Review
_______________________________________________________________________________________________________
iL
dm1 d ' m2 t
dd ' Ts
m1 m2
2
(3.47)
'iL can be found by computing the difference between the inductor current up-slope
and the averaged inductor current iL in (3.47) at t
'iL
d iL (t )
Ts
m1dTs
dt
2
2
dd c m1 m2 Ts
2
(3.48)
dd c uin U D rd rds ( on ) iL (t ) Ts
2L
In (3.47) and (3.48) d ' denotes the duty-ratio complement in fixed-frequency and
CCM operation modes, i.e. d ' 1 d . m1 and m2 correspond to the up- and downslopes of the inductor current including the effect of the parasitic elements.
After replacing 'iL in (3.46) with (3.48) and linearizing the result by applying (3.16),
the duty-ratio constraints can be expressed as
D ' D U E
Ts M c
2L
DD ' Ts
ico iL
uin
2L
(3.49)
where the corresponding gains Fm , qc , qi and qo according to (3.45) are defined for a
buck converter as follows:
Fm
qc
qi
qo
Dc D U E
Ts M c
2L
(3.50)
DD ' Ts
2L
0
49
Chapter 3
Dynamical Review
_______________________________________________________________________________________________________
The linearized small-signal state space of the PCMC converter can be computed by
replacing the small-signal duty-ratio d in (3.20) with its definition shown in (3.49).
This procedure yields
(r r FmU E ) uC D FmU E qi
diL
E C
iL
uin
dt
L
L
L
r
FU
C io m E ico
L
L
duC iL io
dt
C C
iin ( D Fm I o )iL Fm qi I ouin Fm I oico
du
uo uC rC C C
dt
(3.51)
(rE rC FmU E )
L
0
D Fm I o
, D
du
0
1 rC C C
dt
1
L , B
D FmU E qi
Fm I o qi
0
rC
L
1
C
FmU E
L
,
0
0 Fm I o
0
0
(3.52)
The g-parameter set of the PCMC buck converter, after solving the transfer functions
from the input variables to the output variables (i.e. C( sI A) 1 B D ) is
Yin o pcmc Toi o pcmc
G
io o pcmc Z o o pcmc
D Fm qiU E D Fm I o s
D Fm I o 1 srC C
L
LC
rE FmU E sL 1 srC C
D Fm qiU E 1 srC C
LC
LC
r FmU E rC
1
s2 s E
L
LC
50
Chapter 3
Dynamical Review
_______________________________________________________________________________________________________
F q I
m i o
0
0
0
(3.53)
FmU E D Fm I o s
FmU E 1 srC C
LC
Fm I o
0
r FmU E rC
1
s2 s E
L
LC
Gci pcmc
Gco pcmc
(3.54)
The compensation ramp M c is typically chosen in such a way that a good inputoutput attenuation is accomplished. This can be achieved by having Gio o | 0 (i.e.
D Fm qiU E | 0 ) yielding
Mc
DU E DU in
|
2L
2L
(3.55)
PCMC
io
Zo- o
uin
Gio - o
PCMC
uo
io
Toi - o
uin
Yin - o
Gco
Gci
ico
ico
Ga
Rs 2
iin
Ga
Rs 2
H i (s)
H i (s)
uco
uco
a)
b)
Fig. 3.7. Block diagrams of the dynamics of PCMC-OCF converter. a) output dynamics. b)
input dynamics.
The PCMC-OCF is a direct extension of the PCMC. The g-parameter set for the
PCMC-OCF converter can be obtained by constructing the corresponding block
51
Chapter 3
Dynamical Review
_______________________________________________________________________________________________________
diagrams of the output and input dynamics, which are shown in Fig. 3.7 [70] and
[87]. The g-parameter set can then be computed from the block diagrams, yielding
Yin o ocf
Yin o pcmc
Toi o ocf
Gci ocf
Ga Gci pcmc
(3.56)
Gio o ocf
Gio o pcmc
Z o o ocf
Gco ocf
Ga Gco
It is obvious that the parameter set of the PCMC-OCF converter is mainly constructed
from the PCMC parameters. The control gain in Ga is equal to 1/ Rs1 , where Rs1 is
the equivalent inductor current sensing resistor. According to (3.56), the outputcurrent feedforward changes only Z o o ocf and Toi o ocf leaving the other parameters
virtually intact [P4], [70] and [87]. Therefore, the high input-noise attenuation of the
PCMC converter is maintained also in the PCMC-OCF converter. In order to obtain
the load invariance the open-loop output impedance Z o o ocf should be zero making
the loop gain stay intact, when the load Z L is connected (see (2.20)) . This can be
achieved by letting Z o o ocf to zero in (3.56) and solving the output-current-feedback
gain H i , yielding
Hi
1 Z o o pcmc
Rs 2Ga Gco pcmc
(3.57)
However, the practical implementation of such a gain would be difficult due to the
dependence of the nominal transfer functions (i.e. Z o o pcmc and Gco pcmc ) and, hence,
on the operation point of the PCMC converter [70]. For that reason, a unity-gain
feedforward scheme (i.e. H i
Z o o ocf
Z o o pcmc
Rs 2
Gco pcmc
Rs1
(3.58)
Substituting Z o o pcmc and Gco pcmc in (3.58) with their expressions in (3.53) and
(3.54) yields
52
Chapter 3
Dynamical Review
_______________________________________________________________________________________________________
Z o o ocf
Rs 2
rE 1
FmU E sL 1 srC C
Rs1
LC
r
F
1
mU E rC
s2 s E
L
LC
(3.59)
Generally, the ratio of the equivalent current sensing resistors (i.e. Rs 2 / Rs1 ) should
equal to 1 (the current sensing resistors Rs1 and Rs 2 in Fig. 3.4 are equal to 75 m).
This would make the numerator in (3.59) to resemble the corresponding numerator of
the open-loop output impedance of the VMC-CCM converter shown in (3.26),
because
1 Rs 2 / Rs1 FmU E
Z o o ocf
D
Rs 2 U E D
R D
R
1 s2
1 s2
rE
rC
R
Io
Rs1 Fm I O
Rs1
R
Fm I O
Fm I o s 2 s 2 s s1
Rs1
(3.60)
L
LC
rE FmU E rC
1
2
s s
L
LC
The unity ratio of the equivalent current sensing resistors (i.e. Rs 2 / Rs1 ) do not
introduce similar behavior in Toi o ocf than in Z o o ocf . Having Rs 2
Toi o ocf to resemble the corresponding Toi o of the VMC-CCM converter at lower
frequencies, but at higher frequencies the magnitude of Toi o ocf is increased due to
the additional zeros in (3.60) compared to (3.26). The increased magnitude can boost
the load interactions to the supply side and back to the load side according to the
load-affected input admittance (2.17) and supply-affected output impedance (2.22) &
53
Chapter 3
Dynamical Review
_______________________________________________________________________________________________________
Gio o | 0 .
Matlab with control system toolbox (CST) can be used to study the dynamics of the
converters presented above. The voltage-output converter shown in Fig. 3.4 is used to
evaluate the dynamics. The g-parameters at desired operating point can be found by
developing a specific program (m-file), which contains the component values and
symbolic representations of the parameters. The equations for the load and supply
interactions can also be included in the program. An example listing of the m-file
code for VMC-CCM converter is shown in Appendix A. Bode-plots and other
functions can be used by applying the CST commands. Simulink is not used in this
thesis for the time domain analysis, although it can be a valuable tool, when
simulating e.g. the transient responses. The reason for not using Simulink or any
other simulation tool is particularly the interest in the frequency domain behavior,
when considering the scope of the thesis.
Internal Gco Uo = 10 V
Magnitude (dB)
50 V
VMCCCM
40
20 V
20
50V
VMCDCM
20 V
PCMC &
PCMCOCF
20
0
10
10
10
10
10
50
VMCCCM
Phase (deg)
VMCDCM
50
PCMC &
PCMCOCF
100
150
200 0
10
10
10
10
Frequency (Hz)
10
The input voltage of the converter illustrated in Fig. 3.4 is assumed to be in the range
of 20 V 50 V in the analyses done in this chapter. The control-to-output transfer
functions of the three different control methods are shown in Fig. 3.8 at a low and
high line. It is apparent that the magnitude variation as a function of the input voltage
is different in VMC (both CCM and DCM) and PCMC (PCMC-OCF). Reason for
54
Chapter 3
Dynamical Review
_______________________________________________________________________________________________________
this can be concluded from the symbolical representation of Gco . The numerator of
the VMC-CCM converter Gco in (3.27) shows a strong dependency only on the input
voltage ( U in ). This implies that the input voltage variation will cause mainly a
constant magnitude variation and the poles and zeros are only slightly moved.
According to (3.44), the same dependency on the input voltage ( U in ) is also evident
in the VMC-DCM converter. In the PCMC (and hence, in PCMC-OCF), the input
voltage variation affects the product of the duty-ratio gain Fm and U E , which,
according to (3.54) is both in the numerator and denominator of Gco of the PCMC
converter. This affects the location of the poles in the denominator and produces
totally different behavior than observed in the VMC. However, the effects of the
input voltage variation are observable only at the low and high frequencies, which in
turn makes the controller design more straightforward, because the input voltage
variation is not needed to be considered in the design as is the case in the VMC. It is
also evident that without compensation (i.e. M c
infinite in the PCMC at the mode limit D
0.5 [P1].
According to Fig. 3.8, only the VMC-CCM converter exhibits resonant behavior. The
reason for this can be deduced from the denominator of the parameter set in (3.26)
and (3.27). The second order transfer function can be expressed as
G ( s)
Zn2
s 2 s 2Zn[ Zn2
(3.61)
where Zn is the undamped natural frequency and [ the damping factor [59]. The
converter will have resonant behavior if the damping factor [ is between 0 and 1 (i.e.
underdamped case). The coefficient of the first-order term in the VMC-CCM
denominator is actually rather small compared to 1/ LC (i.e. Zn2 ) resulting complex
conjugate roots and, hence, small [ . In the case of VMC-DCM, PCMC and PCMCOCF, the roots are well separated and real. This result in [ ! 1 and, consequently, the
converters are well damped (i.e. overdamped case) and no resonant behavior exists.
The intention of these short examples was to show that it is possible to draw certain
conclusion from the converter performance in frequency domain from the symbolical
transfer function equations. This method applies not only to the Gco but also to the
other parameters in the dynamical profile.
55
Chapter 3
Dynamical Review
_______________________________________________________________________________________________________
As it was discussed earlier the controller design and the resulting loop gain are based
on the behavior of Gco . Basically, the design is trivial; the poles and zeros of the
controller transfer function are placed in such a way that the desired crossover
frequency, phase and gain margins are achieved [89], [18] and [73]. In practice,
however, the design procedure may involve a few iteration steps. The most often used
controllers are a proportional-integral (PI) (i.e. Type-2) and proportional-integralderivative (PID) (i.e. Type-3). The PI compensator can theoretically boost the phase
up to 90, but sometimes this is not sufficient and the PID compensator, which can
have phase boost of 180, must be used. For instance, the phase of Gco (see Fig. 3.8)
in the VMC-CCM converter tends towards -180 near the resonant frequency,
implying the need of sufficient phase boost from the compensator, and hence, the PID
compensator is typically used in the VMC-CCM converters to assure stability and
adequate margins. Consequently, in the VMC-DCM and PCMC (PCMC-OCF)
converters the phase of Gco varies only between 0 and 90 and the PI compensator
can be used.
Loop gains for the VMC-CCM, VMC-DCM, PCMC and PCMC-OCF are plotted in
Fig. 3.9. The controllers were designed in such a way that minimum of 50 phase
margin is achieved and the crossover frequency f c was set near 10 kHz. The
prevailing understanding is that transient response in time domain strictly relates to
the loop-gain crossover frequency f c [64] and [65]. However, it was demonstrated
e.g. in [P2] that the converter open-loop output impedance is the key factor reflecting
the load changes. Actually, the open-loop impedance sets the limit for performance
changes and the closed-loop impedance stands for the boundary for the reduction of
the crossover frequency f c [P3] and [P7]. The measured transient responses for the
three control principles (i.e. VMC-CCM, PCMC and PCMC-OCF) are shown in Fig.
3.10 and the differences are obvious. Looking at the open- and closed-loop output
impedances in Figs. 3.11 and 3.12 reveal the reason; the impedance of the PCMCOCF converter is the smallest at f c causing only a small voltage dip. Consequently,
the impedances in the VMC-CCM and PCMC converters are close to equal at f c
making the voltage dip also equal. The longer set-up time in the PCMC transient
response can be addressed to the larger low-frequency impedance. The open-loop
output impedance of the VMC-DCM converter is also quite large at the lower
frequencies and, in general, its behavior is similar to the PCMC converter. The
different phase behavior of the output impedances might also reveal sensitivities to
certain load. As it was observed in [P3] the VMC-CCM converters are typically
56
Chapter 3
Dynamical Review
_______________________________________________________________________________________________________
sensitive to capacitive loads up to the resonant frequency f res , because the phase is
! 0q . The VMC-DCM and PCMC converters have this sensitivity only at low
frequencies.
Internal LVO Uin = 50 V Uo = 10 V
Magnitude (dB)
100
PCMC &
PCMCOCF
80
60
VMCCCM
VMCDCM
40
20
0
20 0
10
10
10
10
10
Phase (deg)
0
50
VMCCCM
VMCDCM
100
PCMC &
150
PCMCOCF
180
200 0
1
10
10
10
10
Frequency (Hz)
10
Fig. 3.9. Internal loop gains of VMC-CCM (solid line), VMC-DCM (dash-dot line) and
PCMC & PCMC-OCF (dashed line) converters at high line 50 V.
VMCCCM
10.2
U 169 mV
10.1
10.0
0
0.2
0.4
0.6
0.8
1.2
1.4
1.6
1.8
Voltage (V)
2
x 10
10.2
10.1
PCMC
10.0
Uo 178 mV
9.9
9.8
0
0.2
0.4
0.6
0.8
1.2
1.4
1.6
1.8
2
x 10
10.2
PCMCOCF
10.1
U 43 mV
10.0
9.9
9.8
0
0.2
0.4
0.6
0.8
1
Time (s)
1.2
1.4
1.6
1.8
2
x 10
Fig. 3.10. Measured transient responses of VMC-CCM, PCMC and PCMC-OCF converters.
The load is changed from 0.2 A to 2.5 A at the rate of 250 mA/s.
57
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_______________________________________________________________________________________________________
Magnitude (dB)
40
PCMC
20
VMCDCM
0
VMCCCM
20
PCMCOCF
40 0
10
10
10
10
10
100
VMCCCM
Phase (deg)
50
PCMCOCF
VMCDCM
50
PCMC
100 0
10
10
10
10
Frequency (Hz)
10
Magnitude (dB)
20
VMCDCM
40
60
PCMC
PCMCOCF
80
100
VMCCCM
120 0
10
10
10
10
10
150
Phase (deg)
VMCCCM
PCMCOCF
100
VMCDCM
50
PCMC
0
50
10
10
10
Frequency (Hz)
10
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Magnitude (dB1)
0
20
VMCCCM
PCMC &
PCMCOCF
40
VMCDCM
60
80 0
10
10
10
10
10
Phase (deg)
200
PCMC &
PCMCOCF
VMCCCM
100
VMCDCM
0
100 0
10
10
10
10
Frequency (Hz)
10
According to (2.22), the open-loop input admittance Yin o is the key parameter
reflecting the supply (source) interactions. However, in Z o o and Gco , the short
circuit input admittance Yin sc and ideal input admittance Yin f has to be taken into
account as well when studying the interactions and sensitivities. The common factor
in Yin sc and Yin f is the forward transfer function Gio o , and, as was discussed in
Chapter 2 the smaller it is the smaller are the reflected interactions. The internal openloop Yin o is shown in Fig. 3.13 for the VMC-CCM, VMC-DCM and PCMC &
PCMC-OCF converters. The resonant behavior of the VMC-CCM converter is
obvious, making the converter sensitive to supply interactions near the converter
output filter resonant frequency f res , because Yin o and Yin c are not equal.
Just by looking at Yin o one could say that the VMC-DCM and PCMC & PCMC-OCF
converters are sensitive to supply interaction because of the large admittance
elsewhere than at the vicinity of f res , if compared to the corresponding open-loop
input admittance of the VMC-CCM converter. However, if studying e.g. the supplyaffected Gco we must study also Gio o and/or Yin f . Gio o of the three different control
methods is shown in Fig. 3.14. It is clear that the PCMC and PCMC-OCF converters
have substantially smaller Gio o than the VMC converters. According to (2.22) the
supply interactions would be minimized if
59
Chapter 3
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Gio o o 0 .
I in / U E
U in
Yin f
for
buck
DI L / U E | I in / U in
50V ,U o
10V , I L
Io
converter
can
be
expressed
as
2.5 A and D
PCMC and PCMC-OCF converters shown in Fig. 3.13 it is evident that the
magnitude stays almost constant in the whole frequency range and is about -40 dB,
yielding Yin o | Yin f . The same behavior can be observed also in the VMC-DCM
converter. However, the condition Yin o | Yin f is obtained even if Gio o is larger than
in the VMC-CCM converter (elsewhere than at the vicinity of the resonant
frequency). It was explained in [88] that the reason for this is the smaller rightmost
part of Yin f (i.e. Gio oGci / Gco ). The supply interactions will be treated in the next
subsection more in detail. The closed-loop forward transfer function Gio c of the
VMC-CCM converter is also shown in Fig. 3.14. It is evident that Gio c is much
smaller than the corresponding open-loop transfer function up to the loop gain
crossover frequency (i.e. 10 kHz). This is due to the large loop gain, and hence, large
denominator in the definition of Gio c (i.e. Gio c
Magnitude (dB)
0
VMCCCM
VMCDCM
50
100
150 0
10
PCMC &
PCMCOCF
10
10
10
10
Phase (deg)
100
VMCCCM
100
200 0
10
PCMC &
PCMCOCF
10
VMCDCM
2
10
10
Frequency (Hz)
10
Fig. 3.14. Internal open-loop forward transfer functions of VMC-CCM (solid line), VMCDCM (dash-dot line) and PCMC & PCMC-OCF (dashed line) converters at high line 50 V.
Closed-loop forward transfer function of VMC-CCM is marked with dotted line.
60
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Magnitude (dB1)
30
VMCDCM
40
PCMC &
PCMCOCF
50
VMCCCM
60 0
10
10
10
10
10
200
Phase (deg)
150
VMCDCM
100
PCMC &
PCMCOCF
50
0
50 0
10
VMCCCM
1
10
10
10
Frequency (Hz)
10
Fig. 3.15. Internal closed-loop input admittances of VMC-CCM (solid line), VMC-DCM
(dash-dot line) and PCMC & PCMC-OCF (dashed line) converters at high line 50 V.
It was discussed in Chapter 2 that the closed-loop input impedance sets the limit for
the stability and crossover frequency reduction. However, according to the formalism
of the dynamical profile, the relation of the input current and voltage is presented as
admittance and can be easily transformed to impedance by taking the inverse of the
admittance. The closed-loop input admittance Yin c of the VMC-CCM, VMC-DCM
and PCMC & PCMC-OCF converters is shown in Fig. 3.15. The admittances seem to
be equal almost throughout the whole frequency range. It is important to notice that
even if the sensitivities for supply interactions might be totally different, the stability
boundaries can be the same or very near to equal as shown in Fig. 3.15.
61
Chapter 3
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supply impedances, Z L and Z S , respectively. The load and supply interactions are
studied separately, meaning that the internal dynamical profile is used in both cases.
Load
LL
CL
rC ,CL
f res , L
Z L1
1.08 mH
2.35 mF
300 m
100 Hz
Z L2
324 H
470 F
10 m
400 Hz
Z L3
216 H
470 F
100 m
500 Hz
Magnitude (dB)
40
PCMC
20
0
VMCDCM
VMCCCM
20
PCMCOCF
40 0
10
10
10
10
10
Phase (deg)
100
50
VMCDCM VMCCCM
PCMCOCF
0
50
100 0
10
PCMC
1
10
10
10
Frequency (Hz)
10
62
Chapter 3
Dynamical Review
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Magnitude (dB)
50
PCMC
0 VMCDCM
VMCCCM
50 PCMCOCF
100
0
10
10
10
10
10
Phase (deg)
100
50
0
VMCCCM
PCMCOCF
VMCDCM
PCMC
50
100 0
10
10
10
10
Frequency (Hz)
10
Z o o can be set as
63
Chapter 3
Dynamical Review
_______________________________________________________________________________________________________
of the load Z L 3 clearly implies affected loop gain, but no crossover frequency
reduction as it can also be seen from Fig. 3.18.
Load affected loop gains of VMCCCM converter at Uin = 50 V
Magnitude (dB)
80
60
40
20
0
20 0
10
10
10
10
10
Phase (deg)
0
50
100
150
180
200 0
10
10
10
10
Frequency (Hz)
10
Magnitude (dB)
80
60
40
20
0
20 0
10
10
10
10
10
50
Phase (deg)
0
50
100
150
180
200 0
10
10
10
10
Frequency (Hz)
10
The load-affected loop gains of the VMC-DCM converter are shown in Fig. 3.19.
Following the same procedure as in VMC-CCM converter for analyzing the load
64
Chapter 3
Dynamical Review
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interactions, the effects of the loads are obvious. However, a few interesting things
should be mentioned. The load Z L 2 introduces impedance overlapping also in the
closed-loop impedance, implying loop gain crossover reduction. According to Fig.
3.19, the crossover frequency is, indeed, reduced near 400 Hz. The increasing phase
behavior of the load-affected loop gain near the load resonant frequency actually
increases the phase margin e.g. in the case of the load Z L 2 . The opposite behavior can
be observed in the VMC-CCM converter due to the phase behavior of the open-loop
output impedance, which makes the VMC-CCM converter sensitive to capacitive
loads at lower frequencies.
The load-affected loop gains of the PCMC converter are shown in Fig. 3.20. Due to
the similar behavior of the PCMC and VMC-DCM converter output impedances the
load-affected loop gains have also analogous behavior to the VMC-DCM.
Magnitude (dB)
100
80
60
40
20
0
20 0
10
10
10
10
10
Phase (deg)
100
0
100
180
0
10
10
10
10
Frequency (Hz)
10
It is evident from Figs. 3.16 and 3.17 that the PCMC-OCF converter has the lowest
impedances at open and closed loop. It is also clear that no impedance overlapping
takes place. This implies that the loop gain would stay almost intact as it can be seen
from Fig. 3.21.
65
Chapter 3
Dynamical Review
_______________________________________________________________________________________________________
Magnitude (dB)
100
80
60
40
20
0
20 0
10
10
10
10
10
80
Phase (deg)
100
120
140
160
180 0
10
10
10
10
Frequency (Hz)
10
Filter
Lf
Cf
rLf
rCf
f res , S
Z f1
110 H
500 F
1 m
1 m
680 Hz
Zf2
200 H
130 F
50 m
100 m
990 Hz
Zf3
20 H
10 F
20 m
10 m
11 kHz
66
Chapter 3
Dynamical Review
_______________________________________________________________________________________________________
It was mentioned earlier that the supply interaction analysis is not as straightforward
as the load interaction analysis. It was found out that the supply affects the loop gain
performance through a combined effect of the open-loop input admittance/impedance
and the ideal input admittance/impedances. It is obvious (see (2.22)) that if these two
admittances/impedances are equal the supply system will not change the nominal
dynamics. The ideal input admittance/impedance for a buck converter can be
computed from (2.24) yielding a simple and general expression
Yin f
DI L
DI
| L
UE
U in
I in
U
o in | Z in f
U in
I in
(3.62)
In the example buck converter used in the thesis Yin f ( Z in f ) at high line is exactly
(when including the parasites) -39.4 dB (39.4 dB).
Magnitude (dB)
VMCCCM
VMCDCM
40
PCMC &
PCMCOCF
20
0
20
40
0
10
10
10
10
10
Phase (deg)
200
PCMC &
PCMCOCF
100
VMCDCM
0
VMCCCM
100 0
10
10
10
10
Frequency (Hz)
10
VMC-DCM (dash-dot line) and PCMC & PCMC-OCF (dashed line) converters at high line
50 V and supply impedances Z f 1 (circles), Z f 2 (stars) and Z f 3 (plus-sign).
67
Chapter 3
Dynamical Review
_______________________________________________________________________________________________________
with ideal input impedance. Filter Z f 2 interacts only with the VMC-CCM converter
open-loop input impedance and the filter Z f 3 has hardly any interaction on the openloop impedances being, however, very close to the VMC-DCM and PCMC &
PCMC-OCF impedances and Z in f .
The filter impedances are shown in Fig. 3.23 together with the closed-loop input
impedances. It is obvious that the impedance overlapping takes place when
considering the filter Z f 1 . The impedance of the filter Z f 2 stays well below the
closed-loop impedances and the filter impedance Z f 3 has hardly any interaction on
the impedances of the VMC-CCM and PCMC & PCMC-OCF converters. In the case
of the VMC-DCM converter the impedance overlapping due to the Z f 3 is obvious.
The stability of the converters with the different filters could be checked from Fig.
3.23, but let us first consider the stability via the loop gains.
Magnitude (dB)
60
VMCDCM
20
0
20
40 0
10
200
Phase (deg)
VMCCCM
40
100
10
10
10
10
PCMC &
PCMCOCF
0
100
VMCCCM
200 0
10
VMCDCM
1
10
10
10
Frequency (Hz)
10
68
Chapter 3
Dynamical Review
_______________________________________________________________________________________________________
Magnitude (dB)
10
10
Phase (deg)
400
200
0
180
2
10
10
10
Frequency (Hz)
Fig. 3.24. Supply-affected loop gains of VMC-CCM converter Z f 1 (circles), Z f 2 (stars) and
Z f 3 (plus-sign).
Magnitude (dB)
10
10
300
Phase (deg)
200
100
0
100
180
2
10
10
10
Frequency (Hz)
Fig. 3.25. Supply-affected loop gains of VMC-DCM converter Z f 1 (circles), Z f 2 (stars) and
Z f 3 (plus-sign).
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Chapter 3
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Magnitude (dB)
10
10
Phase (deg)
100
120
140
160
180 2
10
10
10
Frequency (Hz)
The loop gains of the supply-affected converters are plotted in Fig. 3.24 for the
VMC-CCM, in Fig. 3.25 for the VMC-DCM and in Fig. 3.26 for the PCMC &
PCMC-OCF converter, respectively. According to the loop gains in Fig. 3.24 and Fig.
3.25, the VMC-CCM and VMC-DCM converters are unstable with filter Z f 1 . This is
because of the positive gain margin as the phase starts to decrease towards 180 near
the filter resonant frequency. The instability could also be observed from Fig. 3.23,
relating to the minor loop gain
Z f1
Z in c
Z f1
Z in c
MZ MZ
f1
inc
(3.63)
The phase of the filter Z f 1 is 90 at the lower frequencies (i.e. from 100 Hz to the
filter resonant frequency) and the phase of the closed-loop impedance of the VMCCCM and VMC-DCM converters is near -180. According to (3.63), the resulting
phase of the minor loop gain is a bit lower than 270, where the impedance
overlapping takes place. This violates the stability boundaries derived in Chapter 2
and indicates an unstable converter. The supply-affected loop gains with filter Z f 2
clearly have no instability problems. The loop gain is only slightly changed near the
filter resonant frequency. This could be also verified from Figs. 3.22 and 3.23. The
VMC-CCM converter with filter Z f 3 also seems to be stable. The resonant frequency
of the filter Z f 3 is actually slightly beyond the converter crossover frequency,
70
Chapter 3
Dynamical Review
_______________________________________________________________________________________________________
indicating that the performance might not be changed at all. However, it is evident
that if the input voltage is increased the crossover frequency would be limited
because of the dip in the magnitude. According to Fig. 3.23, the output impedance of
the VMC-DCM converter and the filter impedance Z f 3 overlap. It can be seen from
Fig. 3.25 that the crossover frequency is slightly reduced, but the converter is still
stable, although PM is reduced a bit.
The supply-affected loop gains of the PCMC (PCMC-OCF) converter are shown in
Fig. 3.26. It is obvious that they are not changed at all by the filter. According to the
Bode-plots, the converters seem to be stable. However, the minor-loop study reveals
that the converter is unstable with filter Z f 1 . The reason is the same as in the case of
the VMC converters, but now the phase of the input impedance is -180. Explanation
for the unchanged loop gains is that in the PCMC (PCMC-OCF) the Gio o | 0 ,
making the open-loop input admittance (or impedance) Yin o and the ideal input
admittance (or impedance) Yin f equal. Therefore, according to the definition of the
supply-affected loop gain in (2.26), the loop gain will not change. This implies that
the stability should be verified from the minor-loop gain to accurately verify the
stability.
According to the supply interaction formalism in (2.22), the supply impedance Z s
changes the nominal output impedance via Yin o and the short circuit input admittance
( Yin sc ). Based on the definition in (2.25), Yin sc for the VMC-CCM, VMC-DCM,
PCMC and PCMC-OCF converters can be computed from the corresponding gparameters (i.e. (3.26), (3.43), (3.53) and (3.56) ) yielding
Yin sc
D2
rE sL
Yinscdcm M
Yin sc pcmc
(3.64)
Io
U in U o
(3.65)
D Fm qiU E D Fm I o F
rE FmU E sL
qI
m i o
71
(3.66)
Chapter 3
Dynamical Review
_______________________________________________________________________________________________________
Yin sc ocf
(3.67)
Magnitude (dB1)
in
10
VMCCCM
20
30
VMCDCM
40
PCMC&PCMCOCF
50
60 0
10
10
10
10
10
200
Phase (deg)
PCMC&PCMCOCF
100
VMCDCM
0
VMCCCM
100 0
10
10
10
10
Frequency (Hz)
10
It is evident from (3.64)-(3.67) that Yin sc is dependent on the control and also on the
conduction mode. Yin sc for the different converters is plotted in Fig. 3.27. According
to the supply interaction formalism the output impedance would stay intact if
Yin o
Yin sc . From Fig. 3.13 we can see that Yin o | Yin sc is obtained in VMC-DCM,
PCMC and PCMC-OCF converters. This is due to the small rightmost part of Yin sc
(i.e. Gio oToi o / Z o o ), which is obtained as a result of small Gio o in the case of PCMC
and PCMC-OCF converters. In VMC-DCM, Yin o | Yin sc is achieved due to the small
product of Gio oToi o [P6] and [88]. The VMC-CCM converter has a tendency to
change the nominal output impedance, because Yin o z Yin sc .
Chapter 3
Dynamical Review
_______________________________________________________________________________________________________
have assumed that the parameters (i.e. Z o o , Yin o , Yin sc and Yin f ) that reflect the
interactions are internal. However, it was found out that only Yin sc and Yin f are
independent of the load or supply. This implies that the particular interest is in the
Z o o and Yin o . So far, we have assumed that the load of the converter remains
nominal, when the supply interactions are discussed. Consequently, the supply system
is assumed to be nominal in the case of the load interaction analysis. However,
instead of using the nominal parameters (i.e. Z o o and Yin o ) in the analysis the supply
affected
input
admittance (i.e. YinLo ) should be used if the supply or load system is not ideal.
The impedance of the filter Z f 1 was used as the supply impedance Z S and the supply
affected open-loop output impedance Z oSo was computed according to (2.22) and is
plotted in Fig. 3.28. It is obvious that the supply-affected impedance has resonant
behavior at the resonant frequency (i.e. 680 Hz) of filter impedance Z f 1 making the
converter more prone to load interactions just before the resonant frequency, because
of the larger impedance compared to the nominal output impedance (i.e. dashed line).
Internal and supply affected openloop output impedances
Magnitude (dB)
10
S
Zoo
10
oo
20 2
10
10
Phase (deg)
100
50
ZS
0
50
oo
Zoo
100 2
10
10
Frequency (Hz)
Fig. 3.28. Internal (dashed line) and supply-affected (solid line) open-loop output
impedances of the VMC-CCM converter.
The impedance of the load Z L 3 was used as the load impedance Z L and the load
affected open-loop input admittance YoLo was computed according to (2.17) and is
73
Chapter 3
Dynamical Review
_______________________________________________________________________________________________________
plotted in Fig. 3.29. The load Z L 3 increases the admittance at the lower frequencies
making the converter more sensitive to the supply interactions. The resonant behavior
is also slightly different than in the corresponding nominal parameter, which may
introduce performance degradation if resonant-type supply impedance is present.
Internal and load affected openloop input admittances
Magnitude (dB1)
0
20
YL
ino
40
ino
60
80 1
10
10
10
10
100
Phase (deg)
ino
50
L
Yino
0
50
100 1
10
10
10
10
Frequency (Hz)
Fig. 3.29. Internal (dashed line) and load-affected solid line) open-loop input
admittances of the VMC-CCM converter.
Gco & Z o o with a current-sink load) and load affected ( GcoR & Z oRo , where superscript
R stands for the resistive load) transfer functions were introduced for the PCMC
converter. It was found out that the maximum gains of GcoR and Z oRo are equal to the
load resistor R. However, the maximum gains of the internal Gco and Z o o are equal
to FmU E , which is typically much higher than the load resistance R. Evidence of this
will be provided in Chapter 4, when the mixed-data method is introduced. As a
consequence, the use of the resistive load damps the maximum (low frequency) gains
74
Chapter 3
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_______________________________________________________________________________________________________
of the transfer-functions. Therefore, the nominal dynamics are hidden, and, if the
interaction analysis is based on the load affected parameters the true performance
cannot be verified, because the damping makes the converter more insensitive to the
interactions. The similar damping effect can also be observed in the VMC-DCM
converter.
In VMC-CCM converter, the denominator of load affected parameters equals to
s2 s
( Rrc RrE rc rE )C L
R rE
LC ( R rc )
LC ( R rc )
(3.68)
According to (3.26) and (3.61), the damping factor [ of the VMC-CCM converter
with the nominal current-sink load equals
rE rc C
(3.69)
2 LC
Consequently, according to (3.26) and (3.68), the damping factor [ R of the load
affected VMC-CCM converter equals
[R
( Rrc RrE rc rE )C L
LC ( R rc )
R rE
2
LC ( R rc )
(rc rE )C
|
2 LC
L
R
(3.70)
If we compare the damping factors [ and [ R , it is obvious that because of the term
L / R in the numerator of [ R , the resulting damping factor [ R is always larger than
75
Chapter 3
Dynamical Review
_______________________________________________________________________________________________________
Magnitude (dB)
int.
5
10
15
20 2
10
10
10
100
int.
Phase (deg)
50
R
0
50
100 2
10
10
Frequency (Hz)
10
Fig. 3.30. Internal (solid line) and load-affected (dashed line) open-loop output impedances
of the VMC-CCM converter.
Magnitude (dB)
20
in
co
GR
co
20
40 1
10
10
10
Frequency (Hz)
10
Phase (deg)
GRco
45
G
co
90
1
10
10
10
Frequency (Hz)
10
Fig. 3.31. Internal (solid line) and load-affected (dashed line) control-to-output transfer
functions of self-oscillating flyback converter.
Chapter 3
Dynamical Review
_______________________________________________________________________________________________________
phase of the loop gain would start at -90). However, the phase of the nominal Gco
starts at -90 implying that the converter would be conditionally stable if the PIcontroller is used (i.e. the phase of the loop gain would start at -180).
As it was discussed earlier, the input-output attenuation properties can be studied by
means of the forward transfer function Gio o . A certain 4th-order PCMC buck
converter (see [91]) was implemented and both internal and load-affected forward
transfer functions were measured and are plotted in Fig. 3.32. It is obvious that the
load-affected GioRo shows better attenuation properties at the lower frequencies than
the corresponding internal Gio o . Although the internal Gio o is also rather small, the
even smaller load-affected GioRo hides the correct information of the converter
dynamical properties.
Magnitude (dB)
th
Internal and loadaffected forward transfer functions of 4 order PCMC buck converter
0
G
ioo
20
40
60 1
10
GRioo
10
10
Frequency (Hz)
10
10
Phase (deg)
90
GRioo
Gioo
90
180 1
10
10
10
Frequency (Hz)
10
10
Fig. 3.32. Internal (dashed line) and load-affected (solid line) open-loop forward transfer
functions of 4th-order PCMC buck converter.
Although the above presented examples cover only a narrow introduction to the effect
of the resistive load, it should be clear that the internal parameters should be used in
order to systematically analyze the converter dynamical behavior. Generally, the
resistive load reduces the possible sensitivities for load and supply interactions,
which, in turn, may cause performance degradation or even instability if the internal
profile is recovered at a current-sink-type load. In the current-output converters, the
use of the resistive load as the initial load may cause even more peculiar
characteristics as it will be shown in Chapter 5.
77
Experimental Evidence
78
Chapter 4
Experimental Evidence
_______________________________________________________________________________________________________
r (cos M j sin M )
re jM
(4.1)
For operations like multiplication and division it is easier to use the polar form shown
rightmost in (4.1) (i.e. re jM ). Sometimes summing or subtraction operations are
required, and therefore the Cartesian form (i.e. r (cos M j sin M ) ) would make the
calculations easier. However, the software packages perform the different operations
automatically and only one form is actually required in the software environment.
After the necessary calculations are completed, the new magnitude rn and phase Mn
of the resulting complex number z can be calculated from
rn
Mn
(r cos M ) 2 (r sin M ) 2
arg z
tan 1
(4.2)
sin M
cos M
Note that the equations (4.1) and (4.2) represent the phase and magnitude only at a
certain frequency f. This is done only for the sake of simplification of the idea behind
the method. The true formation is actually a vector z composing of complex numbers
z at the frequencies in the vector f . Finally, the resulting frequency response is easy
to plot by using the derived phase and magnitude vectors and the corresponding
frequency vector f .
79
Chapter 4
Experimental Evidence
_______________________________________________________________________________________________________
Applying the presented method, the interaction analysis can be done beforehand
based e.g. on the measured power stage transfer functions and theoretical load and/or
supply system or vice versa. Also, the analog control design can be done accurately
based on the measured control-to-output transfer function and theoretical controller
circuit model. The resulting mixed-data loop gain corresponds very accurately to the
measured loop gain, as it will be shown in the next subsection. Other applications for
the presented method include e.g. recovering the nominal dynamics from load/source
affected measurements and including the effect of an error-amplifier bandwidth.
Magnitude (dB)
80
60
40
20
0
20
40
1
10
10
10
10
Phase (deg)
0
50
100
130
150
180
200 1
10
10
10
Frequency (Hz)
10
Fig. 4.1. Comparison of the measured (dashed line) and mixed-data (solid line) loop gains.
50 V ),
includes the effects of the modulator and sensor gains. The measurement data were
exported into Matlab and a specified program (i.e. m-file, see Appendix B) was
created to perform the control design by using the mixed-data. The desired phase
80
Chapter 4
Experimental Evidence
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margin (PM) was at least 50 deg and the gain margin (GM) more than 6 dB. The
desired crossover frequency fc was near 10 kHz. An analog Type-3 controller was
used and the component values of the control circuit were chosen from the
corresponding E-series [59] and [89]. The mixed-data loop gain is shown in Fig. 4.1
together with the measured loop gain matching well with each other. The advantage
of this method is that the measured Gco contains the non-idealities in the circuit,
which the model perhaps cannot predict. Consequently, the non-idealities in the
control circuit are usually negligible, so the mixed-data control design provides a very
accurate loop gain prediction, avoiding the time and money consuming redesign of
the controller. According to Fig. 4.1, the desired margins are well met. The mismatch
in the phase at the lower frequencies is due to the reduced dynamics of the
measurement equipment.
GcoL
Gco
Z
1 o o
ZL
(4.3)
Gco
Z
GcoL 1 o o
ZL
(4.4)
81
Chapter 4
Experimental Evidence
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According to Fig. 4.3, the measured and predicted GcoL match well with each other.
The predicted and measured nominal Z o o are shown in Figs. 3.11 and 4.4,
respectively, implying a good match. A Matlab program (see appendix B) was
created to calculate the nominal Gco from (4.4) by using the mixed-data (i.e.
measured GcoL and Z o o and theoretical 4- resistor). The resulting nominal Gco is
shown in Fig. 4.3 together with the prediction from the computed nominal model.
According to Fig. 4.3, it is obvious that the nominal dynamics can be accurately
recovered from the measurement data by using the introduced mixed-data method.
This method was successfully applied in [P1] to compute the nominal model.
50 V ). It
is obvious that the measured and predicted curves match well up to 10 kHz and
beyond that the measured phase starts to decrease. The reason for this mismatch is
most likely due to the combined effect of the phase lag of the modulator circuit and
the sinusoidal injection signal. The observed phase lag deserves a more detailed
analysis and it is addressed to be one of the future research topics. The measured and
predicted control-to-output transfer function of the PCMC converter is shown in Fig.
4.3. The internal open-loop behavior of the PCMC converter is impossible to measure
with a constant-current type load due to the constant-current nature of the converter at
open loop. Therefore a resistive load was used and the internal Gco was computed by
applying the mixed-data method, which was introduced in Section 4.1. According to
Fig. 4.3, there is a significant difference between the internal and load-affected Gco ,
especially at lower frequencies. This phenomenon was discussed in the previous
82
Chapter 4
Experimental Evidence
_______________________________________________________________________________________________________
chapter. It was discovered in [P1] that most of the previous models of the PCMC
converters are inaccurate because of the use of the resistive load as the initial load
hiding the internal dynamics. This is, again, a good example of the importance of
defining the true internal model, not the load-affected one.
Controltooutput transfer function. Uin = 50 V
Magnitude (dB)
60
DCM
40
20
0
CCM
20
40
0
10
10
10
10
10
10
Phase (deg)
CCM
50
DCM
100
150
0
10
10
10
10
Frequency (Hz)
10
10
Fig. 4.2. Measured and predicted control-to-output transfer functions of VMC converter. The
DCM and CCM curves are indicated with arrows. Dashed line represents the measurement
and solid line the prediction.
Controltooutput transfer functions of PCMC converter. Uin = 50 V
Magnitude (dB)
40
internal
20
0
R
20
40 0
10
10
10
10
10
Phase (deg)
R
50
internal
100
150 0
10
10
10
10
Frequency (Hz)
10
Fig. 4.3. Measured and predicted control-to-output transfer functions of PCMC converter
with resistive and nominal loads. Dashed line represents the measurement and solid line the
prediction
83
Chapter 4
Experimental Evidence
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The phase behavior of the control-to-output transfer functions reveal the type of the
controller that should be used, as it was already discussed in Chapter 3. For instance,
the phase of the VMC-CCM converter approaches -180 after the output filter
resonant frequency indicating a need of a Type-3 (i.e. a PID) controller to provide a
sufficient phase boost. In the VMC-DCM and PCMC the sufficient phase boost can
be achieved by using a Type-2 (i.e. a PI) controller. The measured loop gains of the
converters are shown in Fig. 4.4. The control loops were designed to have at least 50
deg of a phase margin and a crossover frequency near 10 kHz. According to Fig. 4.4,
these criteria are met. It is obvious that there are some non-idealities in the
measurement; the saturation of the magnitude at lower frequencies (i.e. f < 100 Hz) is
due to the reduced dynamics of the analyzer and the phase lag observed in Gco is
directly reflected into the loop gain. It is important to recognize the factors that can
have effect on the measurement in order to be sure of the validity of the obtained
frequency responses.
Internal loop gains. Uin = 50 V
Magnitude (dB)
60
40
20
0
20 1
10
10
10
10
Phase (deg)
0
50
100
150
180
200 1
10
10
10
Frequency (Hz)
10
Fig. 4.4. Measured internal loop gains of VMC-CCM (solid line), VMC-DCM (dotted line)
and PCMC (dashed line) converters.
84
Chapter 4
Experimental Evidence
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measured input impedance of the load and the internal open-loop output impedances
of the converters are shown in Fig. 4.5. It is obvious that the there is a good match
between the analytical (see Fig. 3.11) and measured curves of the VMC-CCM, VMCDCM and PCMC converters. The output impedance of the VMC-DCM converter has
a similar behavior to the PCMC converter making the converter prone to performance
degradation at lower frequencies due to the large output impedance [P6]. According
to the load interaction formalism, the resonant-type load in Fig. 4.5 would mostly
affect the magnitudes of the VMC-DCM and PCMC converters. However, the
positive phase behavior of the open-loop output impedance of the VMC-CCM
converter at lower frequencies shows sensitivity to a capacitive load and introduces a
phase lag into the load affected loop gain. If the crossover frequency is decreased, the
VMC-CCM converter may become unstable.
Measured LCload impedance and openloop output impedances
Magnitude (dB)
40
PCMC
20
VMCDCM
0
VMCCCM
20
40 0
10
500 Hz
1
10
10
10
Frequency (Hz)
10
100
Phase (deg)
50
PCMC
0
50
VMCDCM
VMCCCM
100
150 0
10
10
10
10
Frequency (Hz)
10
Fig. 4.5. Measured internal open-loop output impedances of VMC-CCM (solid line) VMCDCM (dotted line) and PCMC (dashed line) and LC-load impedance (dash-dot line).
It was shown in Chapter 3 that the crossover frequency of the converter loop gain will
be reduced if the nominal closed-loop output impedance and the load impedance
overlap. According to Fig. 4.6, this would not happen. Again, the measured and
analytically derived (see Fig. 3.12) output impedances are in good agreement.
However, the impedances are so small at lower frequencies that the resolution of the
current probe saturates the magnitude at some point (near -60 dB) making the
measurement unreliable at the frequencies lower than 100 Hz. The internal closedloop output impedance of the VMC-DCM converter exhibits similar behavior to the
PCMC converter. According to Fig. 4.6, the PCMC converter has the largest closed-
85
Chapter 4
Experimental Evidence
_______________________________________________________________________________________________________
loop output impedance at the low frequencies making it also prone to the crossoverfrequency reduction.
Magnitude (dB)
PCMC
40
VMCDCM
VMCCCM
60
2
10
10
10
Frequency (Hz)
100
VMCCCM
VMCDCM
Phase (deg)
50
0
PCMC
50
100 2
10
10
10
Frequency (Hz)
Magnitude (dB)
60
40
20
0
20 1
10
10
10
10
50
Phase (deg)
0
50
100
150
180
200 1
10
10
10
Frequency (Hz)
10
Fig. 4.7. Measured load-affected loop gains of VMC-CCM (solid line), VMC-DCM (dotted
line) and PCMC (dashed line).
is apparent that the magnitude of the PCMC converter loop gain is most affected if
86
Chapter 4
Experimental Evidence
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compared to the internal loop gain in Fig. 4.4. This is due to the largest output
impedances in Figs. 4.5 and 4.6. However, the output impedances and loop gain of
the PCMC buck converter are not sensitive to input voltage variation as it was
discussed in Chapter 3. This means that the impedances and loop gains at the low and
high lines are equal. The input voltage variation is evident e.g. in the VMC
converters, and generally, the variation should always be taken into account. In the
VMC-CCM and VMC-DCM converters studied here, the low line (i.e. U in
20V )
impedances are a bit larger than at the high line, but will not cause any severe
interactions or stability problems. As it was predicted above, the capacitive load
would lead the phase of the VMC-DCM and PCMC converters and lag the phase of
the VMC-CCM converter. This can also be verified from Fig. 4.7.
20 V ).
Magnitude (dB)
40
20
0
Z
20 1
10
10
10
Frequency (Hz)
10
200
Phase (deg)
100
0
100
200 1
10
10
10
Frequency (Hz)
10
Fig. 4.8. Measured internal open-loop input impedances of VMC-CCM (solid line), VMCDCM (dotted line) and PCMC converters (dashed line) and
EMI-filter impedance (dash-dot line).
87
Chapter 4
Experimental Evidence
_______________________________________________________________________________________________________
Magnitude (dB)
40
20
Zs
0
20 1
10
10
10
Frequency (Hz)
10
Phase (deg)
100
Zs
0
100
200 1
10
10
10
Frequency (Hz)
10
Fig. 4.9. Measured internal closed-loop input impedances of VMC-CCM (solid line), VMCDCM (dotted line) and PCMC converters (dashed line) and
The closed-loop input impedance Yin1c and the filter impedance are shown in Fig. 4.9
implying stable operation, because the impedance overlapping does not exist. The
input impedances of the three converters are the same up to about 1 kHz and beyond
that the VMC-DCM converter impedance has deteriorated behavior in the impedance.
88
Chapter 4
Experimental Evidence
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It was discussed in Chapter 2 that if the forward transfer function Gio o is small the
interactions into the loop gain and output impedance would be minimized, because
Yin o
Yin c
Yin f
Magnitude (dB)
20
VMCCCM
0
20
40
VMCDCM
VMCCCM at
closed loop
PCMC
60
80 0
10
10
Phase (deg)
100
200 0
10
10
0
100
10
10
Frequency (Hz)
PCMC
VMCDCM
1
10
10
10
Frequency (Hz)
10
Fig. 4.10. Measured open-loop forward transfer function of VMC-CCM (solid line), VMCDCM (dotted line) and PCMC converters (dashed line). Measured closed-loop forward
transfer function is marked with dash-dot line.
Yin f ( Z in f ) of the buck converter used in this thesis is at the low line about -23.5 dB
(23.5 dB). The computed Yin f is shown in Fig 4.11, experimentally confirming that.
According to Figs. 4.8 and 4.9, only the impedances of the PCMC converter are close
to 23.5 dB almost throughout the whole frequency range. This implies that the loop
gain should stay intact or has only a minor change. Consequently, the VMC-CCM
89
Chapter 4
Experimental Evidence
_______________________________________________________________________________________________________
converter should have quite a large change in the loop gain. The supply affected loop
gains are shown in Fig. 4.12. It is clear that the implications stated above are correct.
Ideal input admittance. Uin = 20 V
Magnitude (dB1)
0
10
20
30
40 1
10
10
10
10
Phase (deg)
250
200
150
100
50 1
10
10
10
Frequency (Hz)
10
Fig. 4.11. Computed ideal input admittances of VMC-CCM (solid line), VMC-DCM (dotted
line) and PCMC converters (dashed line). The prediction is marked with small circles.
Loop gains with EMIfilter
Magnitude (dB)
40
VMCCCM
20
VMCDCM
PCMC
0
20 2
10
10
10
Phase (deg)
0
50
VMCCCM
PCMC
100
VMCDCM
150
180
200 2
10
10
10
Frequency (Hz)
Fig. 4.12. Measured supply-affected loop gains of VMC-CCM (solid line), VMC-DCM
(dotted line) and PCMC converters (dashed line).
The transfer functions that define the short-circuit admittance Yin sc were measured
and Yin sc was computed in a similar manner as Yin f . Yin sc for the VMC-CCM,
VMC-DCM and PCMC converters are shown in Fig. 4.12. It is evident that the
90
Chapter 4
Experimental Evidence
_______________________________________________________________________________________________________
prediction and measurement-based computations match well with each other. The
assumptions that Yin f would be specific for certain topology, but independent on the
load, control- and operation modes and that Yin sc would be dependent on the controland operation mode are experimentally verified in Figs. 4.11 and 4.13.
Short circuit input admittance. Uin = 20 V
Magnitude (dB1)
0
VMCDCM
20
PCMC
40
VMCCCM
60
0
10
10
10
10
10
200
Phase (deg)
PCMC
100
VMCDCM
0
100
VMCCCM
0
10
10
10
10
Frequency (Hz)
10
Fig. 4.13. Computed short circuit input admittances of VMC-CCM, VMC-DCM and PCMC
converters. Dashed line represents the measurement and solid line the prediction.
4.5 Discussion
There are several important issues relating to the practical derivation of the dynamical
profile, and therefore, they are worth discussing. When defining the concept of the
dynamical profile in Chapter 2, it was stated that the supply system should be a pure
voltage source and the load should be composed of a constant-current sink in the
voltage-output converters and of a pure voltage source in the current-output
converters, respectively. However, in practical cases the supplying and loading
devices are never ideal. Consider, for instance, the supply of the converter, which
profile is under derivation. The supply is typically another power supply, producing a
constant steady state voltage. From the dynamical viewpoint the supply converter has
an output impedance, which according to the interaction formalism, may have an
effect on the internal dynamics. Consequently, the same applies also to the load side;
the electronic loads that are typically used to implement the constant-current load
(and also e.g. constant-resistance, -voltage and -power) might have peculiar
dynamical characteristics, which may affect the internal dynamics of the converter
being under study [P9]. To be sure of the possible impacts of the non-ideal supply and
91
Chapter 4
Experimental Evidence
_______________________________________________________________________________________________________
load systems their output and input impedances should be measured. In order to avoid
or at least minimize the effects of the supply and load, large capacitors can be placed
to the input and load side to dynamically isolate the converter that is under study.
As it has been discussed, a resistive load has to be used in some cases and the internal
dynamical profile can be then computed by using the mixed-data method. In Section
4.1, the mixed data method was only applied to the derivation of the control-to-output
transfer function. However, if the dynamical profile is measured with the resistive
load the effect of the resistor has to be removed from every parameter. If not doing
so, the inherent dynamical properties cannot be obtained and studied. It is also
evident that the long connector cables might introduce extra resistance (and also
inductance at higher frequencies), which is seen as a resistor (or inductance) even if
the non-ideal supply and load systems are used. However, this effect is typically
negligible but may be significant in converters with a high switching frequency.
The functioning of the frequency response analyzer should also be understood. The
general operating principle is that a sinusoidal signal is injected into a loop or signal
that is of interest and then the phase and magnitude of the sinusoidal signal is
measured at the desired point and compared to the injected reference signal in order
to compute the magnitude and phase of the loop gain or transfer function. Basically,
the procedure is simple. The analyzer is typically equipped with software, which
eases the use. However, there are a few important issues that should be pointed out.
The amplitude of the injected sinusoidal signal has to remain sinusoidal throughout
the whole frequency range. Otherwise, the measurements are not reliable, because of
the distorted reference signal. An oscilloscope can be used to verify the quality of the
signal. It is also important to define the physical locations of the loops and be sure
that a correct loop or transfer function is measured. In the modern converters, the
impedances can be very small, making the resolution of the voltage and current
measurement the limiting factor. Therefore, the magnitude of the measured response
can saturate to a certain level, which does not correspond to the true internal profile.
When measuring the loop gain of the converter, an injection transformer has to be
used and, as it was shown in this chapter, the dynamics of the injection transformer
reduces the frequency range that can be accurately measured. This affect should also
be understood.
92
Current-Output Converters
The dynamical issues of the current-output converters are discussed in this chapter.
The voltage-output converters regulate the output voltage and, consequently, in the
current-output converters the output current is regulated. A typical application, where
the current-output converter is needed, is a DPA system having a storage battery
connected in parallel to provide back-up power during the power outages. The need
for regulating or limiting the current may rise as the battery is charged. Generally, the
converter in these applications is in the voltage-output mode, but when the current
limit is activated, the converter will enter into the current-output mode as illustrated
in Fig. 1.3. The dynamical profile of the current-output converters can be easily
derived from the corresponding voltage-output converter profile by applying duality
or e.g. the basic SSA modeling method can be equally used. However, the dynamical
profile of the current-output converter differs significantly from the voltage-output
converter. This chapter provides the true dynamical profile of the current-output
converter and analyzes certain dynamical issues and revises the prevailing inadequate
knowledge.
93
Chapter 5
Current-Output Converters
_______________________________________________________________________________________________________
load only leads to wrong deductions of the converter dynamics as it was discussed in
[P9] and [P10].
A current-output buck converter is illustrated in Fig. 5.1. The power stage and source
system of the converter are naturally the same as in the corresponding voltage-output
converter, but the load is now a series connection of the pure voltage source eo and
the load impedance Z L . The output current has to be sensed and typically a voltage
across a small resistor ( Rs in Fig. 5.1) is measured to form the equivalent current
measurement signal. The control system and PWM blocks are similar to the
corresponding blocks of the voltage-output converter. The applied control principles
are a constant-current (CC) VMC and a CC-PCMC. The converter operates in CCM
in both control modes.
rds ( on )
400mW
ZS
uin
+
_
fs = 100kHz
rL
io =2.5 A
108mH 0.06mW
rC
UD
33mW
0.3V
rd
C
55mW
316mF
+
ZL
uo
+
_
eo
Rs
Rs1iL
CC-VMC
CC-PCMC
PWM
Control
system
Rs io
uR
2.5V
Fig. 5.1. Current-output buck converter with CC-VMC and CC-PCMC principles.
94
Chapter 5
Current-Output Converters
_______________________________________________________________________________________________________
diL
r
U
1
D
E iL uin uo E d
dt
L
L
L
L
duC
1
1
uC
uo
dt
rc C
rc C
i Di I d
in
(5.1)
1
1
iL uC uo
rC
rC
io
(5.2)
where
iL
, u
uC
uin
uo , y
d
iin
io
(5.3)
The frequency domain representation and, hence, the dynamical profile of the
current-output converter can be solved from the state-space representation by
applying the Laplace transformation in a similar way to what was shown in Chapter
3. In the case of voltage-output converters, we used modified g-parameters, but now
the representation constitutes of the modified y-parameters [49]. The general form of
the y-parameter set of the current-output converters is
iin
io
Yini o
i
Gio o
Toii o
Yoio
uin
Gcii
uo
Gcoi
c
(5.4)
where the general control variable is denoted by c . For the CC-VMC converter
shown in Fig. 5.1 the y-parameter set is
Yini o
i
Gio o
Toii o
Yoio
Gcii
Gcoi
D2
D
r r
1
)
LC ( s 2 s E c
L
LC
1 src C
(rE sL)
95
DU E
UE
0 0 I L
0 0 0 (5.5)
Chapter 5
Current-Output Converters
_______________________________________________________________________________________________________
corresponding voltage-output PCMC converter can also be achieved in the CCPCMC converter, because the term D Fm qiU E can be made to zero as it was
discussed in Chapter 3. Comparing the denominators of the CC-VMC and CC-PCMC
converters show that due to the term FmU E the pole is located at higher frequencies in
the CC-PCMC converter. According to (5.7), the low frequency magnitude of
Gcoi pcmc is close to unity, because FmU e !! rE . In the CC-VMC converter, the low
Toii o pcmc
Yoio pcmc
D Fm qiU E D Fm I o
D Fm I o
r FmU E rC
1
s2 s E
D Fm qiU E
L
LC Fm qi I o
rE FmU E sL
0
i
ci pcmc
i
co pcmc
FmU E D Fm I o
FmU E
Fm I o
0
rE FmU E sL
(5.6)
0
0
(5.7)
Chapter 5
Current-Output Converters
_______________________________________________________________________________________________________
dashed line. The modified y-parameter set constructed from the modified gparameters of the voltage-output converter is shown in (5.8). The use of the voltageoutput converter parameters in the current-output converter model is well justified,
because they are usually available and easy to obtain. This makes the dynamical
review easier. For instance, the open-loop input admittance of the current-output
converter is the short circuit admittance Yin sc , which is obvious because of the short
circuited converter. It is also clear from (5.8) that the open-loop output impedance is
the same as in the corresponding voltage-output converter.
iin
(Gci +
Zs +
GcoToi- o
)c
Z o- o
io
Yin - sc
+
uins
uin
uo
Gco c
Z o- o
- Toi - ouo
Z o- o
Gio - ouin Z o - o
Z o- o
ZL
+
_
eo
c
Fig. 5.2. Two-port model of a current-output converter with load and supply subsystems. The
transfer functions correspond to the model of voltage-output converter.
iin
io
Yin sc
Gio o
Z
o o
Toi o
Z o o
1
Z o o
GcoToi o
u
Z o o in
uo
Gco
c
Z o o
Gci
(5.8)
The most convenient way of deriving the closed-loop profile for the current-output
converters is to use the control-block diagrams. The control-block diagrams for the
output and input dynamics are shown in Fig. 5.3 a) and b), respectively. The Gsei is
the sensor gain (i.e. typically the current sensing resistor Rs ), Gcci is the controller
transfer function and Gai is the PWM-modulator gain (i.e. typically 1/ U m ).
Computing the output current io , and hence, the output dynamics, from Fig. 5.3 a)
yields
97
Chapter 5
Current-Output Converters
_______________________________________________________________________________________________________
Gioi o
Yoio
Gcci Gai Gcoi
uin
uo
uri
i
i
i i
i
i
i i
i
i
i i
1 GseGcc Ga Gco
1 GseGccGa Gco
1 GseGccGa Gco
io
(5.9)
LCO
(5.10)
io
Gioi o
Yi
L
1
uin o o uo i CO uri
1 LCO
1 LCO
Gse 1 LCO
(5.11)
Computing the input current iin and, hence, the input dynamics, from Fig. 5.3 b)
yields
iin
Yini ouin Toii o uo Gsei Gcci Gai Gcoi io Gcci Gai Gcoi uri
(5.12)
After substituting io in (5.12) with its definition in (5.11) the input dynamics can be
represented as
i
i
Gioi oGcii
LCO
YoioGcii
L
u
T
CO uo
Yin o
in
oi o
i
i
1 LCO
Gco
Gco 1 LCO
Gcii
L
CO uri
i
i
GseGco 1 LCO
iin
(5.13)
iin
io
Yini c
i
Gio c
Toii c
Yoic
uin
Gcii c
uo
Gcoi c
c
(5.14)
98
Chapter 5
Current-Output Converters
_______________________________________________________________________________________________________
i
in c
i
in o
Gioi oGcii
L
CO
i
Gco
1 LCO
(5.15)
YoioGcii
L
CO
i
Gco 1 LCO
(5.16)
Toii c
Toii o
Gcii
L
CO
i
i
GseGco 1 LCO
i
ri
Gioi c
(5.17)
Gioi o
1 LCO
(5.18)
Yoio
1 LCO
(5.19)
Groi
L
1
CO
i
Gse 1 LCO
(5.20)
i
o c
uo
Yoi- o
uin
Gioi - o
io
uo
Toii - o
uin
Yini - o
iin
Gcii
Gcoi
Open-loop
Open-loop
Gai
Gsei
Gai
io
uco
uco
Closed-loop
Gsei
i
cc
uri
Closed-loop
Gcci
b)
a)
Fig. 5.3. Control-block diagrams for current-output converter at open and closed loop: a)
output dynamics and b) input dynamics.
99
uri
Chapter 5
Current-Output Converters
_______________________________________________________________________________________________________
uo
(5.21)
1 Z LYoio
and then replacing it in (5.8). This procedure yields the load affected parameters as
iin
io
i
Z LToii oGioi o
Y
in o
1 Z LYoio
Gioi o
1 ZL
1
i
Y
o
o
Toii o
1 Z LYoio
1
ZL
1
Z L Gcoi Toii o
1 Z LYoio uin
e
Gcoi
o
ZL
c
1
1
i
Yo o
Gcii
Y
i
o o
1
(5.22)
Gioi o and
iin
io
Toi oGio o
Y
in
o
Z L Z o o
Gio o
Z Z
L
o o
Toi o
Z L Z o o
GcoToi o
u
Z L Z o o in
eo
Gco
c
Z L Z o o
Gci
1
Z L Z o o
(5.23)
Typically, the current-output converters are used in applications where the load is a
low impedance battery. Therefore and according to (5.23), the internal/nominal
behavior will be recovered (i.e. small or zero Z L ). This may set challenges to the
control design as will be shown in Section 5.2.
100
Chapter 5
Current-Output Converters
_______________________________________________________________________________________________________
uin
(5.24)
1 Z S Yini o
and then replacing it in (5.8). This procedure yields the supply-affected parameters as
iin
io
Yini o
i
1 Z S Yin o
Gi
io o
i
1 Z S Yin o
Toii o
1 Z S Yini o
1 Z S Yini oc i
Yo o
1 Z S Yini o
Gcii
1 Z S Yini o
1 Z S Yin f
1 Z S Yini o
uins
u
o
i
Gco c
(5.25)
Yini oc
Yini o
Gioi oToii o
Yoio
Yin o
(5.26)
The study of the dynamical profile of the voltage-output converter introduced a shortcircuit input admittance Yin sc , but again, due to the duality the special admittance
parameter is actually the open-circuit admittance Yini oc . It is interesting that Yini oc
corresponds to the internal open-loop input admittance Yin o of the voltage-output
converter. Consequently, the open-loop input admittance Yini o of the current-output
converter corresponds to the short-circuit input admittance Yin sc of the voltage-output
converter. The ideal input admittance Yin f can be shown to remain the same in both
converter types. If a good input-output attenuation exists i.e. Gioi o | 0 then it can be
concluded that if Gioi o | 0 o Yini o
YoioS
Yini c
Yini oc
Yin f
Gcoi ,
Yini o .
Expressing the supply affected parameters as a function of the corresponding voltageoutput converter parameters yields
iin
io
Yi
in o
i
1 Z S Yin o
G
io o
o o
1 Z Y i
S in o
Toi o
Z oo
1 Z S Yini o
1 Z S Yin o 1
1 Z S Yini o Z o o
GcoToi o
Z oo
1 Z S Yini o
Gci
1 Z S Yin f
1 Z S Yini o
101
uins
uo
c
Gco
Z o o
(5.27)
Chapter 5
Current-Output Converters
_______________________________________________________________________________________________________
It is apparent from above, that the supply interactions are reflected mostly via Yini o ,
which was found out to correspond to the short-circuit input admittance Yin sc of the
current-output converters. However, Yin sc was found out to be load independent in
Chapter 4. According to (5.23), the load can change Yini o . Therefore, the use of Yin sc
in (5.27) instead of using Yini o is not justified.
Magnitude (dB)
40
20
50
0
24.3 kHz
1.9 kHz
40 1
10
Phase (deg)
Gco (nom)
Gico (R = 50 m)
20
13.4 kHz
Gi (R = 4 )
co
10
10
Gco (R = 50 m)
Gi (R = 4 )
co
10
Gi (nom)
co
50
100
150
180
200 1
10
10
10
Frequency (Hz)
10
Fig. 5.4. Control-to-output transfer functions of CC-VMC converter (solid line = nominal,
102
Chapter 5
Current-Output Converters
_______________________________________________________________________________________________________
Magnitude (dB)
Gco (nom)
10
20
Gco (R = 50 m)
i
Gco (R = 4 )
30
40 1
10
10
10
10
20
Gco (nom)
Phase (deg)
0
20
Gi (R = 50 m)
40
60
co
Gco (R = 4 )
80
100 1
10
10
10
Frequency (Hz)
10
Fig. 5.5. Control-to-output transfer functions of CC-PCMC converter (solid line = nominal,
on the control design. As it has been discussed throughout the thesis, it is common to
include the load resistor into the nominal/internal model. However, it has been
shown that the true nominal load should be defined and used. For the voltage-output
converters the nominal load was a current sink, but in the case of the current-output
converters the nominal load composes of a voltage source. Gcoi with both a resistive
load (i.e. dash-dot line) and a pure voltage source load (i.e. solid line) are plotted in
Figs. 5.4 and 5.5. The difference between the crossover frequencies of the CC-VMC
converter is obvious and the magnitude of the resistive Gcoi of the CC-PCMC
converter decreases almost two decades before the nominal Gcoi . A battery-type load
can usually be seen as having a rather low impedance [77]. According to (5.23), a low
impedance load would recover the nominal behavior and, consequently, if the initial
control design is done with the resistive load it is clear that the crossover frequency
will be very high with the battery load and could lead to instability. In current-output
converters, the output current has to be sensed. Typically this is done by measuring
the voltage across a small current sensing resistor (i.e. Rs ). The Rs actually behaves
as a small resistive load and therefore it should be included in Gcoi when starting to
design the controller. Gcoi with Rs
103
Chapter 5
Current-Output Converters
_______________________________________________________________________________________________________
obvious that even though the resistor is rather small it has an effect on Gcoi in both
converters and this should be taken into account, when designing the controller [78].
Another interesting feature in the CC-VMC converter is that the phase of the nominal
Gcoi decreases only to near -100 making the PI-controller (Type-2) suitable. The use
of a resistive load would exclude this, but in practical applications the resistive load
may not be used. The deductions (i.e. smaller low-frequency magnitude and the
location of the pole in the denominator in higher frequencies in the CC-PCMC
converter) made in Section 5.5.2, from the symbolical parameters are explicitly
observable in Figs. 5.4 and 5.5.
The control loop was designed based on the analytical Gcoi shown in Figs. 5.4 and
5.5. The desired margins were the same as in the corresponding voltage-output
converters (i.e. PM > 50, GM > 6 dB and the crossover frequency at the high line
near 10 kHz). Because the current sensing resistor Rs decreases the magnitude near
10 kHz, its effect on the magnitude was taken into account, when designing the
controller. To make the measurement of the internal behavior possible a pure voltage
source load should be available. However, the constant-voltage mode of the
electronic load that was used in the laboratory was found to be unreliable from the
dynamical viewpoint, as it was discussed in [P9]. The internal behavior was
recovered by using a RC-circuit ( R
4 : and C
large capacitor act like a dynamical short-circuit at the higher frequencies. The
measured and predicted loop gains are shown in Fig. 5.6. It is clear that they are in
good agreement. According to the figure, the CC-VMC converter has first-order
behavior with no resonant peaking. The load resistor damps the low-frequency loop
gain of the CC-VMC converter, making the measurement deviating from the
prediction. The desired margins and crossover frequency are, however, clearly met.
The fast decreasing phase at higher frequencies is due to the same reason as in the
corresponding voltage-output converter (i.e. the modulator circuit and sinusoidal
injection signal). The loop gains of the current-output converters were also measured
with a resistive load and are shown in Fig. 5.7 together with the predictions. Again,
there is a good agreement between the measurements and predictions. Now, the
resonant nature of the CC-VMC converter is exposed into effect due to the load. The
decreased crossover frequencies are evident. It should be clear that if the control
design is implemented in such a way that the crossover frequency of the loop gain
with the resistive load is set to 10 kHz the crossover frequency of the internal loop
gain can be increased up to 100 kHz, which is not desirable.
104
Chapter 5
Current-Output Converters
_______________________________________________________________________________________________________
Magnitude (dB)
60
CCVMC
40
20
0
20 1
10
CCPCMC
10
10
10
Phase (deg)
0
50
100
150
180
200 1
10
10
10
Frequency (Hz)
10
Fig. 5.6. Measured and predicted loop gains of current-output converter (solid line = CCVMC, dashed line = CC-PCMC, circles = CC-VMC measurement and stars = CC-PCMC
measurement.
CCVMC and CCPCMC loop gains with 4 load, U = 50 V
in
50
Magnitude (dB)
CCPCMC
0
CCVMC
50 1
10
10
10
10
Phase (deg)
50
100
150
180
200 1
10
10
10
Frequency (Hz)
10
Fig. 5.7. Measured and predicted loop gains of current-output converter (solid line = CCVMC, dashed line = CC-PCMC, circles = CC-VMC measurement and stars = CC-PCMC
measurement. The load is 4- resistor.
The measured and predicted internal closed-loop output impedances are shown in Fig.
5.8. The resonant behavior of the CC-VMC output impedance is obvious indicating
also that the internal loop gain does not have it as it was discussed in [P10].
105
Chapter 5
Current-Output Converters
_______________________________________________________________________________________________________
Magnitude (dB)
80
60
CCPCMC
40
20
CCVMC
0
20
1
10
10
10
10
Phase (deg)
0
50
100
150
200 1
10
10
10
Frequency (Hz)
10
Fig. 5.8. Measured and predicted closed-loop output impedances of current-output converter
(solid line = CC-VMC, dashed line = CC-PCMC, circles = CC-VMC measurement and stars
= CC-PCMC measurement.
106
Conclusions
107
Chapter 6
Conclusions
_______________________________________________________________________________________________________
[P4]
The effect of the load impedance on the dynamics and performance of a regulated
converter was investigated. Theoretical formulation was derived utilizing two-port
representation. It was definitively shown that the load interactions were reflected into
the converter dynamics via the internal open-loop output impedance. At the
frequencies, where the loop gain was much higher than unity, the internal closed-loop
output impedances acted as a boundary for the control-bandwidth reduction. The loop
gain was always affected, whenever the internal open-loop output impedance was
equal or greater than the load impedance. It was found out that the converters were
sensitive especially to the capacitive and resonant-type loads. The sensitivity was
dependent on the control mode, and could not be much reduced by means of the basic
controller design.
[P5]
The characterization of regulated converters was investigated in order to establish a
set of dynamical parameters defining the interactions arising in the interconnected
systems such as DPS systems. The commercially available converters are usually
vaguely specified in respect to those interactions. Provided information do not suffice
for predicting the stability and performance. It was noticed that there were certain
double reflections, which were not previously recognized but could increase the load
sensitivity if not properly considered. The defined parameter set could also be used to
design the converters to be more insensitive to different interactions.
108
Chapter 6
Conclusions
_______________________________________________________________________________________________________
[P6]
The paper investigated the dynamical differences of the load and supply interactions
in the direct-duty-ratio or VMC buck converters in the continuous and discontinuous
conduction modes. The dynamical parameters i.e. the phase margin and control
bandwidth of the CCM and DCM converters were designed to be the same. It was
shown that the sensitivity for the interactions could be concluded from the measured
frequency responses. The investigations showed that a buck converter operating in the
CCM was more sensitive to capacitive loads than a converter in the DCM, while the
DCM converter was more prone to instability caused by the load. The supply
interactions caused e.g. by an EMI filter were shown to be smaller in the CCM
converter except near the converter-output-filter resonant frequency, where the
forward-voltage transfer function had an amplifying effect on the supply interactions.
[P7]
The paper studied the stability and performance analysis of a regulated converter
based on the impedance ratio known commonly as the minor-loop gain. System
theory was used to prove that the minor-loop gain could be addressed to the internal
stability of an interconnected system in a scientifically sound manner. As a
consequence, the output impedance of the source system could be used to specify the
stability boundary of the source converter in respect to the load impedance. The
margins assigned to the minor-loop gain did not, however, coincide with the margins
associated to the loop gain of the converter. Therefore, the converter performance can
be deteriorated unless the minor-loop gain margins are sufficient for avoiding that.
Experimental evidence was provided to support the ideas presented in the paper.
[P8]
The paper investigated the effects of an EMI filter on the dynamics of a buck
converter. It was shown theoretically that the EMI filter could increase significantly
the load sensitivity of the VMC converter, but the PCMC converter was quite
insensitive to the EMI filter interactions. Experimental validations were carried out
using a buck converter with three different control modes - VMC, PCMC and PCMCOCF. The investigations showed that the phenomenon causing the instability under
PCMC was the negative-resistoroscillation (NRO) phenomenon, and confirmed also
the excess EMI-filter sensitivity of the VMC converter.
[P9]
The paper investigated the load interactions in a constant-current-controlled buck
converter. The nominal transfer functions and the load interaction formalism were
109
Chapter 6
Conclusions
_______________________________________________________________________________________________________
[P10]
The paper investigated the dynamical properties of the current-output converter, and
the set of transfer functions representing the dynamics was developed based both on
the state-space averaging method and on the two-port model of the corresponding
voltage-output converter. According to the investigations, the observed tendency to
increasing crossover frequency could be addressed to the internal dynamics of the
converter, which the storage battery invoked into effect. This meant that the origin of
the problem was an erroneous control design.
[P11]
The mechanism and characterizing parameters causing the source reflected
interactions were investigated in this paper both theoretically and experimentally
using a buck converter under a VMC, PCMC and input voltage-feedforward (IVFF)
control. The reflected interactions would be eliminated if the forward-voltage transfer
function could be made zero, but in practice such a condition could not be fully
achieved. The investigations showed that the VMC converter was very sensitive to
the source-reflected interactions.
110
Chapter 6
Conclusions
_______________________________________________________________________________________________________
source at the supply side and a constant-current sink as a load. The two-port
representation and the supply and load interaction formalisms were reviewed. It was
claimed that the stability and performance of a single converter as a part of a larger
system could be studied by means of the internal dynamical profile and interaction
formalisms. Many existing converter topologies and control principles have different
dynamical properties, and hence, dynamical profiles. By studying the dynamical
profiles it is easy to evaluate the sensitivities for different interactions and the
choosing of a proper topology and control mode becomes simple. It was found out
that the open-loop parameters predominantly reflected the interactions. The open-loop
output and input impedances were shown to mainly reflect the interactions e.g. onto
the loop gain. However, the two special admittances had to also be studied in the
supply interaction analysis. It was also discovered that the load or supply impedance
could cause certain double interactions that change the internal parameters, and
hence, the dynamical properties. The closed-loop parameters could not be effectively
used in the interaction analysis, because the information of the dynamical properties
was typically hidden. On the other hand, the closed-loop input and output impedances
could be used to derive safe load and supply profiles in order to guarantee the
stability. This was based on the input-to-output and internal stability formalism that
resulted in an impedance ratio of the closed-loop input or output impedance and the
input or output impedance of the interconnected subsystem. This impedance ratio,
which is also known as the minor-loop gain, is sometimes the only way to check the
stability of the converter (i.e. the loop gain can be unchanged even if the converter is
unstable). As examples, the dynamical profiles of the VMC-CCM, VMC-DCM,
PCMC and PCMC-OCF buck converters were analyzed analytically and the
experimental evidence was provided by obtaining the profiles for the VMC-CCM,
VMC-DCM and PCMC buck converters. Even if the thesis concentrated on the buck
converters the proposed methods are naturally applicable to other topologies and
control modes as well.
The derivation of the dynamical profile can be carried out analytically or it can be
measured. The analytical profile derived by modeling the small-signal behavior of the
switched-mode converter. The selected modeling method is irrelevant as long as the
model accuracy can be verified. It is also important that the model reveals the true
internal dynamics, not the dynamics e.g. with a resistive load. The dynamical profile
can be measured by using a frequency response analyzer. Again, it is important to be
sure that the internal dynamics are measured. However, sometimes it is not possible
to use the constant-current-sink load (i.e. PCMC at open loop) and a resistive load
must be used. A mixed-data method was developed to solve this problem. The
111
Chapter 6
Conclusions
_______________________________________________________________________________________________________
method combined the analytical and experimental data. Specific software could be
used to compute the internal profile. The mixed-data method was also useful e.g. in
the controller design, studying the non-idealities and recovering the internal profile
from the supply/load-affected profile. It was obvious that if the internal dynamical
profile was derived both analytically and experimentally and they were in a good
agreement, the accuracy of the profile could be maximized.
On the other hand, it is not always possible or reasonable to compute the converter
model due to its complexity. Therefore, the only way to obtain the dynamical profile
is to use the experimental measurements. It is noteworthy that it is not always
necessary or even physically possible to measure all the parameters in the dynamical
profile. Typically, the open-loop input and output impedances, open-loop forward
transfer function, control-to-output transfer function and the loop gain provide
enough information to analyze the performance and stability of the converter.
The prevailing method to use a resistive load in modeling and analyzing switchedmode converters was argued for being incorrect. Several examples were shown to
verify that. Typically, the resistive load damps the magnitude and resonances, if
present, making the converter to look more insensitive to the interactions than the
internal dynamical profile would be. The resistive load can also change the phase of
the transfer function. This may cause severe problems if e.g. the control-to-output
transfer function changes the phase 90 between resistive and nominal load.
The basic ideas of the dynamical profile were first applied to the voltage-output
converters. However, the current-output converters, where the output current is
regulated, are used in numerous applications. The dynamical issues of the currentoutput converters have been previously analyzed only in a few papers [74], [75] and
[76], but they have not provided the true internal dynamical profile due to the use of
the resistive load. In this research, the true internal or nominal profile of the currentoutput converter was derived by applying conventional modeling methods and from
the two-port representation of the corresponding voltage-output converter by applying
duality. The parameter set was composed of modified y-parameters and two special
admittance parameters. The nominal load for the current-output converters was found
out to be a pure voltage source. The load and supply interaction formalisms were
derived and it was found that a low impedance load recovers the nominal features.
The dynamical review of the CC-VMC and CC-PCMC converters was carried out.
The previously observed peculiar phenomenon of the increasing crossover frequency
in the loop gain, when having the low impedance load (i.e. typically a back-up
112
Chapter 6
Conclusions
_______________________________________________________________________________________________________
battery), was discovered to be the result of a wrong initial modeling with the resistive
load. Both analytical and experimental analyses were provided to confirm this.
The main contributions of the thesis can be summarized as follows:
x
It was shown that the open-loop parameters fully characterize the defined
dynamical profile. The closed-loop output and input impedances can be used
to stability assessment under external interactions.
The use of a resistive load as the nominal load was shown to be a wrong
approach. The nominal loads of the voltage- and current-output converters
were stated to be a constant-current sink and a pure voltage source,
respectively.
The dynamical profile of the current-output converter was presented for the
first time. The profile was obtained from the two-port representation of the
voltage-output converter by applying duality. The a priori information from
the voltage-output converter makes this approach extremely useful.
It was noticed that the most suitable nominal practical load for the currentoutput converter was a RC-circuit, where the large capacitor behaved as a
dynamical short-circuit at the higher frequencies exposing the internal
dynamics.
The title of this thesis includes an open question. Many examples and aspects
presented in the thesis provided the answer and explicitly proved that the unique
dynamical profile of any given converter is a fact not a fiction.
113
Chapter 6
Conclusions
_______________________________________________________________________________________________________
114
References
_______________________________________________________________________________________________________
References
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10]
[11]
[12]
115
References
_______________________________________________________________________________________________________
[13]
Technical
Specification
BQ55090QTA27.
Synqor
Inc.,
Datasheet,
Available:
http://www.synqor.com/datasheets/
BQ55090QTA27_100104_B.pdf
[14]
[15]
[16]
[17]
[18]
[19]
[20]
[21]
[22]
E. van Dijk, H. J. N. Spruijt, D. M. OSullivan, J. B. Klaassens, PWMswitch modeling of DC-DC converters, IEEE Trans. on Power Electronics,
vol. 10, no. 6, pp. 659 665, November 1995.
[23]
[24]
[25]
116
References
_______________________________________________________________________________________________________
[26]
[27]
C-C. Fang, Sampled data modeling and analysis of one-cycle control and
charge control, IEEE Trans. on Power Electronics, vol. 16, no. 3, pp. 345
350, May 2001.
[28]
C-C. Fang, E. H. Abed, Sampled-data modeling and analysis of closedloop PWM DC-DC converters, in Proc. IEEE International Symposium on
Circuits and Systems, 1999, 110 115.
[29]
[30]
A. Davoudi, J. Jatskevich, Realization of parasitics in state-space averagevalue modeling of PWM DC-DC converters, IEEE Trans. on Power
Electronics, vol. 21, no. 4, pp. 1142 1147, July 2006.
[31]
A. Davoudi, J. Jatskevich, T. De Rybel, Numerical state-space averagevalue modeling of PWM DC-DC converters operating in DCM and CCM,
IEEE Trans. on Power Electronics, vol. 21, no. 4, pp. 1003 1012, July
2006.
[32]
[33]
[34]
[35]
S-C. Tan, Y. M. Lai, C. K. Tse, A unified approach to the design pf PWMbased sliding-mode voltage controllers for basic DC-DC converters in
continuous conduction mode, IEE Trans. on Circuit and Systems I:
Regular Papers, vol. 53, no. 8, pp. 1816 1827, August 2006.
[36]
[37]
References
_______________________________________________________________________________________________________
[38]
[39]
[40]
[41]
[42]
[43]
[44]
[45]
[46]
[47]
[48]
[49]
[50]
References
_______________________________________________________________________________________________________
[51]
T. Suntio, I. Gadoura, K. Zenger, Input filter interactions in peak-currentmode-controlled buck converter operating in CICM, IEEE Trans. on
Industrial Electronics, vol. 49, no. 1, pp. 127 135, February 2002.
[52]
[53]
[54]
[55]
P. Li, B. Lehman, Accurate loop gain prediction for DC-DC converter due
to the impact of source/input filter, IEEE Trans. on Power Electronics, vol.
20, no. 4, pp. 754 761, July 2005.
[56]
[57]
[58]
[59]
[60]
[61]
[62]
119
References
_______________________________________________________________________________________________________
[63]
[64]
[65]
[66]
[67]
[68]
[69]
[70]
[71]
[72]
[73]
[74]
[75]
References
_______________________________________________________________________________________________________
[76]
[77]
[78]
[79]
[80]
[81]
[82]
[83]
[84]
[85]
[86]
M. Karppanen, T. Suntio, M. Sippola, Dynamical characterization of inputvoltage-feedforward-controlled buck converter, IEEE Trans. on Industrial
Electronics, vol. 54, no. 2, pp. 1005 1013, March 2007.
[87]
121
References
_______________________________________________________________________________________________________
[88]
[89]
[90]
J. Lempinen, T. Suntio, Modeling and analysis of a self-oscillating peakcurrent controlled flyback converter, in Proc. Annual Conference of the
IEEE Industrial Electronics Society, 2001, pp. 960 965.
[91]
122
Appendices
Appendix A
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% Parameters needed for the dynamical review of VMC-CCM
%
% buck converter
%
% Copyright Mikko Hankaniemi
%
% Tampere University of Technology
%
% Institute of Power Electronics
%
% 2007
%
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
s=tf('s');
123
Appendices
___________________________________________________________________________
% Special admittance parameters:
Yinf=(Yino_vmc_ccm_nom-((Gioo_vmc_ccm_nom*Gci_vmc_ccm_nom)/Gco_vmc_ccm_nom));
Yinf_real=-D*IL/Uin;
Yinsc=Yino_vmc_ccm_nom+((Gioo_vmc_ccm_nom*Toio_vmc_ccm_nom)/Zoo_vmc_ccm_nom);
Yinsc_real=(D^2)/(r_L+D*r_ds+(1-D)*r_d+s*L);
% Load circuit parameters:
L_L=108e-6;
C_L=2.350e-3;
r_C_CL=100e-3;
r_8k=80e-3;
% Load transfer functions
Z_L100=(s*L_L+((1/(s*C_L))+3*r_C_CL));
Z_L400=(s*3*L_L+((1/(s*0.2*C_L))+0.1*r_C_CL));
Z_L500=(s*2*L_L+((1/(s*0.2*C_L))+r_C_CL));
ZL=1;
% Set the desired load impedance here!
% Resonance at 100 Hz
% Resonance at 400 Hz
% Resonance at 500 Hz
% Supply-filter parameters
L1=110e-6;
L2=200e-6;
L3=20e-6;
r_Lf=0.001;
C1=500e-6;
C2=130e-6;
C3=10e-6;
r_Cf=0.001;
% Filter transfer functions
% Resonance at 680 Hz
Z_f680=((r_Lf+s*L1)*(1+s*r_Cf*C1))/(s^2*L1*C1+s*(r_Cf+r_Lf)*C1+1);
% Resonance at 990 Hz
Z_f990=((50*r_Lf+s*L2)*(1+s*100*r_Cf*C2))/(s^2*L2*C2+s*(100*r_Cf+50*r_Lf)*C2+1);
% Resonance at 11 kHz
Z_f11k=((20*r_Lf+s*L3)*(1+s*10*r_Cf*C3))/(s^2*L3*C3+s*(10*r_Cf+20*r_Lf)*C3+1);
Zs=1;
% Set the desired supply impedance here!
% Load interactions
%%%%%%%%%%%%%%%%%%%%
% Open-loop:
Yino_vmc_ccm_L=Yino_vmc_ccm_nom+
((Gioo_vmc_ccm_nom*Toio_vmc_ccm_nom)/(ZL+Zoo_vmc_ccm_nom));
Toio_vmc_ccm_L=(ZL*Toio_vmc_ccm_nom)/(ZL+Zoo_vmc_ccm_nom);
Gioo_vmc_ccm_L=Gioo_vmc_ccm_nom/(1+(Zoo_vmc_ccm_nom/ZL));
Zoo_vmc_ccm_L=Zoo_vmc_ccm_nom/(1+(Zoo_vmc_ccm_nom/ZL));
Gci_vmc_ccm_L=Gci_vmc_ccm_nom+(Gco_vmc_ccm_nom*Toio_vmc_ccm_nom)/(ZL+Zoo_vmc_ccm_nom);
Gco_vmc_ccm_L=Gco_vmc_ccm_nom/(1+(Zoo_vmc_ccm_nom/ZL));
% Closed-Loop:
Loop_L=Loop_nom/(1+(Zoo_vmc_ccm_nom/ZL));
YinC_vmc_ccm_L=Yino_vmc_ccm_L(Loop_L/(1+Loop_L))*((Gioo_vmc_ccm_L*Gci_vmc_ccm_L)/Gco_vmc_ccm_L);
ToiC_vmc_ccm_L=Toio_vmc_ccm_L(Loop_L/(1+Loop_L))*((Zoo_vmc_ccm_L*Gci_vmc_ccm_L)/Gco_vmc_ccm_L);
GioC_vmc_ccm_L=Gioo_vmc_ccm_L/(1+Loop_L);
ZoC_vmc_ccm_L=Zoo_vmc_ccm_L/(1+Loop_L);
% Supply interactions
%%%%%%%%%%%%%%%%%%%%
% Open-loop:
Yino_vmc_ccm_Snom=Yino_vmc_ccm_nom/(1+Zs*Yino_vmc_ccm_nom);
Toio_vmc_ccm_Snom=Toio_vmc_ccm_nom/(1+Zs*Yino_vmc_ccm_nom);
Gioo_vmc_ccm_Snom=Gioo_vmc_ccm_nom/(1+Zs*Yino_vmc_ccm_nom);
Zoo_vmc_ccm_Snom=((1+Zs*Yinsc)/(1+Zs*Yino_vmc_ccm_nom))*Zoo_vmc_ccm_nom;
Gci_vmc_ccm_Snom=Gci_vmc_ccm_nom/(1+Zs*Yino_vmc_ccm_nom);
Gco_vmc_ccm_Snom=((1+Zs*Yinf)/(1+Zs*Yino_vmc_ccm_nom))*Gco_vmc_ccm_nom;
% Closed-Loop:
Loop_Snom=((1+Zs*Yinf)/(1+Zs*Yino_vmc_ccm_nom))*Loop_nom;
YinC_vmc_ccm_Snom=Yino_vmc_ccm_Snom(Loop_Snom/(1+Loop_Snom))*((Gioo_vmc_ccm_Snom*Gci_vmc_ccm_Snom)/Gco_vmc_ccm_Snom);
ToiC_vmc_ccm_Snom=Toio_vmc_ccm_Snom(Loop_Snom/(1+Loop_Snom))*((Zoo_vmc_ccm_Snom*Gci_vmc_ccm_Snom)/Gco_vmc_ccm_Snom);
124
Appendices
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GioC_vmc_ccm_Snom=Gioo_vmc_ccm_Snom/(1+Loop_Snom);
ZoC_vmc_ccm_Snom=Zoo_vmc_ccm_Snom/(1+Loop_Snom);
% Double interactions
%%%%%%%%%%%%%%%%%%%%%%%
% Open-loop:
Yino_vmc_ccm_SL=Yino_vmc_ccm_L/(1+Zs*Yino_vmc_ccm_L);
Toio_vmc_ccm_SL=Toio_vmc_ccm_L/(1+Zs*Yino_vmc_ccm_L);
Gioo_vmc_ccm_SL=Gioo_vmc_ccm_L/(1+Zs*Yino_vmc_ccm_L);
Zoo_vmc_ccm_SL=((1+Zs*Yinsc)/(1+Zs*Yino_vmc_ccm_L))*Zoo_vmc_ccm_L;
Gci_vmc_ccm_SL=Gci_vmc_ccm_L/(1+Zs*Yino_vmc_ccm_L);
Gco_vmc_ccm_SL=((1+Zs*Yinf)/(1+Zs*Yino_vmc_ccm_L))*Gco_vmc_ccm_L;
% Closed-loop:
Loop_SL=((1+Zs*Yinf)/(1+Zs*Yino_vmc_ccm_L))*Loop_L;
YinC_vmc_ccm_SL=Yino_vmc_ccm_SL(Loop_SL/(1+Loop_SL))*((Gioo_vmc_ccm_SL*Gci_vmc_ccm_SL)/Gco_vmc_ccm_SL);
ToiC_vmc_ccm_SL=Toio_vmc_ccm_SL(Loop_SL/(1+Loop_SL))*((Zoo_vmc_ccm_SL*Gci_vmc_ccm_SL)/Gco_vmc_ccm_SL);
GioC_vmc_ccm_SL=Gioo_vmc_ccm_SL/(1+Loop_SL);
ZoC_vmc_ccm_SL=Zoo_vmc_ccm_SL/(1+Loop_SL);
125
Appendices
___________________________________________________________________________
Appendix B
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% Mixed-Data Controller Design
%
% Copyright Mikko Hankaniemi
%
% Tampere University of Technology
%
% Institute of Power Electronics
%
% 2007
%
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% Measured control-to-output transfer function data are converted to % a complex
number
gain_1=10.^((gain)./20);
phase_fii=(phase/180)*pi;
Gco_compx=gain_1.*(cos(phase_fii)+j*sin(phase_fii));
% Analytically designed controller transfer function Gcc is
% converted to a complex number
w=2.*pi.*f;
[mag ang]=bode(Gcc, w);
mag1=mag(:,:);
ang1=ang(:,:);
ang1_fii=(ang1/180)*pi;
f1=w/2/pi;
Gcc_compx=mag1.*(cos(ang1_fii)+j*sin(ang1_fii));
% Calculating the loop gain
Loop=Gcc_compx.*Gco_compx;
% Extracting the magnitude in decibels and phase in degrees from the % complex number
Loop
Loop_g=abs(Loop);
Loop_gdB=20*log10(Loop_g);
Loop_ang_fii=atan2(imag(Loop),real(Loop));
Loop_ang=180*Loop_ang_fii/pi;
126
Appendices
___________________________________________________________________________
Appendix C
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% Nominal Gco Calculation from Measured Data
%
% Based on Mixed-Data Method
%
% Copyright Mikko Hankaniemi
%
% Tampere University of Technology
%
% Institute of Power Electronics
%
% 2007
%
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% Resistive load
R=4;
% Measured control-to-output transfer function (with resistive load)
% data are converted to a complex number
gain_1=10.^((gain)./20);
phase_fii=(phase/180)*pi;
GcoR_compx=gain_1.*(cos(phase_fii)+j*sin(phase_fii));
% Measured open-loop output impedance (nominal)
% data are converted to a complex number
gain_2=10.^(gain2./20);
phase_fii2=(phase2/180)*pi;
Zoo_compx=gain_2.*(cos(phase_fii2)+j*sin(phase_fii2));
% Computing the nominal/internal Gco basing on the load interaction
% formalism
Gco=GcoR_compx.*(1+(Zoo_compx./R));
% Extracting the magnitude in decibels and phase in degrees from the % complex number
Loop
Gco_g=abs(Gco);
Gco_gdB=20*log10(Gco_g);
Gco_ang_fii=atan2(imag(Gco),real(Gco));
Gco_ang=180*Gco_ang_fii/pi;
127
Appendices
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Appendix D
Auxiliary power
supplies
Current probes
Computer
interface
Oscilloscope
Frequency response
Buck converter Injection
analyzer and linear
transformers amplifier
Electronic load
Power stage
PCMC &
PCMC-OCF
VMC-CCM
& VMC-DCM
Fig. D.2. Power stage and control circuits of the experimental buck converter.
128
Appendices
___________________________________________________________________________
129
130
Publications
131