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Albert Grubbs 1
Maqsood Khandaker
Digital Design Technology Final Project: Digital
Voltmeter VLSI (Dec 2009)
required for the correct functioning of the push button reset. In
Abstract—A very large scale integration of a Digital Voltmeter between every state two additional states are occurring, these
was successfully completed. Altera's DE2 CPLD (complex are the Drop_LCD_E and Hold states. A falling edge from the
programmable Logic Device board, National Semiconductor's enable pin is required to write the instruction to the LCD
ADC0804 analog to digital converter and Hitachi’s HD44780
LCD a were interfaced with VHDL, a high level compiler for controller and Hold state holds the current next state till after
logic circuits the falling edge.
However if reset is not pressed, on every rising edge of the
Index Terms—VHDL, ADC, Altera DE2, ADC0804, LCD, clock the LCD is continuously printing characters from the
HD44780 input bus. This input bus is defined as LCD_display_string, an
array of 32 elements, with each element being 8 bits long.
I. INTRODUCTION Each character is represented by two Hex digit addresses. On
Source code
LIBRARY IEEE; -- Enter new ASCII hex data above for LCD Display
USE IEEE.STD_LOGIC_1164.all;
USE IEEE.STD_LOGIC_ARITH.all; SIGNAL DATA_BUS_VALUE, Next_Char :
USE IEEE.STD_LOGIC_UNSIGNED.all; STD_LOGIC_VECTOR(7 DOWNTO 0);
USE IEEE.numeric_std.all; SIGNAL CLK_COUNT_400HZ :
STD_LOGIC_VECTOR(19 DOWNTO 0);
ENTITY LCD_Display IS SIGNAL CHAR_COUNT :
STD_LOGIC_VECTOR(4 DOWNTO 0);
------------------------------------------------------------------- SIGNAL CLK_400HZ_Enable,LCD_RW_INT :
-- ASCII HEX TABLE STD_LOGIC;
-- Hex Low Hex Digit SIGNAL Line1_chars, Line2_chars :
-- Value 0 1 2 3 4 5 6 7 8 9 A B C D E F STD_LOGIC_VECTOR(127 DOWNTO 0);
------\---------------------------------------------------------------- SIGNAL S0,S1,S2 : STD_LOGIC_VECTOR(3
--H 2 | SP ! " # $ % & ' ( ) * + , - . / downto 0);
--i 3 | 0 1 2 3 4 5 6 7 8 9 : ; < = > ? SIGNAL Z0,Z1, C1,C2 :
--g 4 | @ A B C D E F G H I J K L M N O STD_LOGIC_VECTOR(3 downto 0);
--h 5 | P Q R S T U V W X Y Z [ \ ] ^ _ BEGIN
-- 6 | ` a b c d e f g h i j k l m n o
-- 7 | p q r s t u v w x y z { | } ~ DEL LCD_ON <= '1';
----------------------------------------------------------------------- LCD_BLON <= '1';
-- Example "A" is row 4 column 1, so hex value is X"41" LEDR(11 downto 8) <= S0;
-- *see LCD Controller's Datasheet for other graphics LEDR(7 downto 4) <= S1;
characters available LEDR(3 downto 0) <= S2;
--
PORT(KEY : IN STD_LOGIC_VECTOR(0 downto 0); LCD_display_string <= (
CLOCK_50 : IN STD_LOGIC; -- ASCII hex values for LCD Display
GPIO_0 : IN STD_LOGIC_VECTOR(11 -- Enter Live Hex Data Values from hardware here
DOWNTO 0); -- LCD DISPLAYS THE FOLLOWING:
LCD_RS, LCD_EN : OUT STD_LOGIC;
LCD_RW : OUT STD_LOGIC; -- Line 1
LCD_ON : OUT STD_LOGIC; X"0" & S0,X"2E",X"0" & S1,X"0" & S2,X"20",X"56",
LCD_BLON : OUT STD_LOGIC;
LEDR : OUT STD_LOGIC_VECTOR(11 X"20",X"20",X"20",X"20",X"20",X"20",X"20",X"20",X
downto 0); "20",X"20",
LCD_DATA : INOUT -- Line 2
STD_LOGIC_VECTOR(7 DOWNTO 0)); X"42",X"79",X"20",X"4D",X"61",X"71",X"73",X"6F",
X"6F",X"64",X"20",X"20",X"20",X"20",X"20",X"20");
END ENTITY LCD_Display;
-- BIDIRECTIONAL TRI STATE LCD DATA BUS
ARCHITECTURE Behavior OF LCD_Display IS LCD_DATA <= DATA_BUS_VALUE WHEN
TYPE character_string IS ARRAY ( 0 TO 31 ) OF LCD_RW_INT = '0' ELSE "ZZZZZZZZ";
STD_LOGIC_VECTOR( 7 DOWNTO 0 );
TYPE numeric_digit IS ARRAY (0 to 2) OF -- get next character in display string
STD_LOGIC_VECTOR(3 downto 0); Next_Char <=
LCD_display_string(CONV_INTEGER(CHAR_COUNT
TYPE STATE_TYPE IS (HOLD, FUNC_SET, ));
DISPLAY_ON, MODE_SET, Print_String, LCD_RW <= LCD_RW_INT;
LINE2, RETURN_HOME, DROP_LCD_E,
RESET1, RESET2, PROCESS
RESET3, DISPLAY_OFF, DISPLAY_CLEAR); BEGIN
WAIT UNTIL CLOCK_50'EVENT AND CLOCK_50 =
SIGNAL state, next_command : STATE_TYPE; '1';
SIGNAL LCD_display_string : character_string; IF KEY(0) = '0' THEN
SIGNAL number_array_one : numeric_digit; CLK_COUNT_400HZ <= X"00000";
SIGNAL number_array_two : numeric_digit; CLK_400HZ_Enable <= '0';
SIGNAL result_add : numeric_digit; ELSE
IF CLK_COUNT_400HZ < X"0F424" THEN
University of North Texas, Digital Design Technology, Dr. Albert Grubbs 3