Eletrnica Digital

Registradores e Contadores
Prof.:Alberto Willian Mascarenhas

Sistema Sequencial com Flip-Flops

2.0 Contadores Especiais

2.1 Johnson digital counter

INFORMAO TERICA
The Johnson digital counter or Twisted Ring Counter is a synchronous shift registerwith
feedback from the inverted output (Q) of the last flip-flop. Q of the last flip flop is connected back to
the input D of the first flip-flop. This inversion of Q before it is fed back to input D causes the counter
to count in a special way. Animation/ simulation of this Johnson counter circuit is also given in
this article.You can create simple dancing LED effects using this synchronous Johnson digital counter
.The main benefit of this type of counter is that it only needs half the number of flip flops compared to
that of standard ring counter to represent many states. So an n-stage Johnson counter givies a
sequence of 2n different states and can therefore be treated as a Mod 2n counter whereas an nstage ring counter has only n states that is Mod n counter.

Components required
1.

7474 D flip flop x 2

2.

Resistors (100 -1/4 watt x 4)

3.

Astable multivibrator (3 KHz) LEDs x 3

Eletrnica Digital

Registradores e Contadores
Prof.:Alberto Willian Mascarenhas

Working of twisted ring counter

Above circuit diagram represents a 3 bit Johnson counter using 7474 D flip flop. You can easily extent this circuit upto 4
bit, 5 bit, etc. by adding flip flops after the 3rd flips flop.

A single 7474 IC consists of 2 flip flops so you need two 7474 ICs for implementing Johnson counter.

Initially all the flip flops are cleared, so the time inverted output (Q) of 3rd flip flop is high or logic 1.

This logic 1 is appears at the input of 1st flip flop. During the first clock pulse this logic 1 is transferred to the output of
1st flip flop. Thus the total output of Johnson counter is 100.

Then input of 1st and 2nd flip flop is logic 1 and after the second clock pulse these inputs appear at the outputs of 1st
and 2nd flip flop. So the total output is 110.

Similarly for the next clock pulse, the output will be 111.

During this state (111) the time inverted output (Q) is logic 0. This 0 is fed to the 1st flip flop. Then the 0 will circulate
through the flip flops as 011,001,000.

In the above circuit either you can connect the Set pin (S pin) to Vcc or you can leave it free.

Feed a 3Hz (or any) 555 astable oscillator to the clock input to start counting.

Johnson counter truth table

Q0

Q1

Q2

State 0

State 1

State 2

State 3

State 4

State 5

After state 5, the circuit goes to state 0 and this will repeat.

Eletrnica Digital

Registradores e Contadores
Prof.:Alberto Willian Mascarenhas

2.2

Contador Anel

Digital counters have several applications in electronics circuits. Counters in digital electronics are
used at different situations. Here we are going to deliver the idea of a Ring counter circuit, which is
a register counter. Working animation and circuit simulation video of ring counter are also given
along with this article. A ring counter is formed by feeding the output of a shift register to its own
input.
The data pattern enclosed within the shift register will re-circulate as with respect to the clock pulse.
Ring counter is one of the shift register applications. We have already posted Johnson counter
circuit with animation. With little modification on ring counter we can obtain Johnson counter circuit. A
ring counter has N states where N is the number of flip-flops. So lets discus about digital counter
circuit design (Ring counter) in detail with animation/ simulation.

Components required for digital electronics counters

1.

Power supply

2.

IC 7474 x 4

3.

LEDs x 4

4.

Resistors 47k x 4

5.

Clock circuit

Eletrnica Digital

Registradores e Contadores
Prof.:Alberto Willian Mascarenhas

Ring counter State/ truth table

Working of ring counter circuit

This counter is a circulated shift register. Here a 4 bit shift register is implemented with 7474 flip flops. This is a
synchronous counter because clock signal is common for all flip flops.

The Q output of first flip flop is directly fed to the D input of following flip flop unit.

The final Q output from the last flip flop is connected to the D input of 1st unit; hence it is called as a circulating shift
register.

Preset pin of 1st unit is connected to Vcc via a switch (Push to OFF switch). Preset pin is used to set the output of a
flip flop to logical high (1) forcefully.

The Presets of other flip flops are directly coupled to Vcc in order to work properly because these pins are active low
logic pins (This connection is not shown in above circuit. For simplicity it is removed). But dont forget to connect it
while you are implementing practically.

Similarly Clear pins are also connected to Vcc due to the above said reason.

We are already familiar with shift registers that for each clock pulse the data will be shifted to next register (flip flop).

Initially all the outputs of flip flops are at low, to start ring counter you need to set the output of first flip flop manually
high.

For this purpose you just push the switch (SW2), then the output of first flip flop goes high.

This output will be shifted to the next flip flop during the next clock pulse and so on. At the same time the low output
from last flip flop is shifted to the input of 1st flip flop.

Please refer the animation and video for better understanding.