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Each system will have inputs and output. Example of an input can be battery which is
connected to a circuit. The output is some entity which we want to measure in a circuit
element. In the example below, the input is the battery supplying voltage . Since, we are
interested in current flowing in the resistor, the output is current .
Passive elements
Most of the Circuit elements have at least two leads (electrical terminals). They are
characterized by voltage across the terminals and current flowing through the device (see
Fig.2.1); this is V-I characterization of device.
conductance.
Inductance:
It another important basic circuit element. Current flowing in a wire causes generation of
magnetic field intensity ( ).
is independent of material medium surrounding the current
carrying wire. The
. Here
is absolute
permeability of vaccum.
is relative permeability of material where
is measured. The
flux flowing around wire links with the conducting wire. And if the flux linkage changes it
lead to generation of EMF (electromotive force) which try to oppose the change in flux. This
means it tries to nullify the change in current.
The current
Here,
, where
Defining the inductance , is inductance and measured in Henry. See the output
current of sinusoidal applied across an inductor in Fig.2.5
(these points are called nodes) do not store charge sum of incoming current has to be equal to
Inductances in parallel:
Capacitances in parallel
Here
reluctance=
is then equivalent of resistance in magnetic domain.
Linearity: when elemental change in cause , always leads to same elemental change in effect
i.e., ,
then the system is said to
be linear.
In general, for a system let input
causes a small perturbation
perturbation of
lead to output
in output. If perturbation
causes output
, and
. This is
Sources
flows,
. For a new battery, generally,
is negligible, and it increases as
the battery gets discharged.
is a function of electrolyte and terminal materials. Non Ideal
Current Source: See the circuit in figure 3.5.
Non-ideal voltage source and current source analysis: The source is non-
and
is
always. Thus
can be used to model certain real life devices (e.g., transistor) We will study transistor later
during the course.
Dependent Sources
Output of source depends on some other variable. These are of four types depending on the
controlling variable and output of the source.
Voltage controlled voltage sources: This is a voltage source whose output can be controlled
by changing the controlling voltage
(Fig.3.11). This is a voltage amplifier if we consider
the VCVS to be a box which takes the input as voltage and then at the output generated the
amplified voltage. In the figure, 20 will be the gain of voltage amplifier.
This is a transimpedence amplifier since the ratio of output to input has units of resistance
(more general term is impendence). The gain factor for this type of source has units of ohm,
measured as
In circuit 4.1
elements is constant.
Figure 4.1:
all the time. Expected that all current (voltage) in (across) the
Inductor:
(4.1)
implies
constant.
Hence
Inductors act as a short cicuit for DC inputs. This would not be the case if I put a switch
across a source.
Capacitor:
(4.2)
as
(expected)
,
Thus capacitor acts as open circuit for DC analysis.
Figure 4.2:
The resultant circuit will be as shown in Fig.4.2.
Analysis: To find currents in all branches, voltage across all branches.
We can use Kirchoff's law (voltage and current). For as many independent equations as
number of unknown variables. Solve the simultaneous equations, and get the result.
Voltage drop from 'a' to 'b'. Therefore,
Current in branch ab in the direction from 'a' to 'b'. Here
Hence:
Can we simplify the situation? Loop currents method: We do away with branch currents and
define loop currents. The branch currents can be written in terms of loop currents once all
the loop currents passing through the branch and their directions are known. The branch
voltages can always be written using Ohm's law and branch current written in terms of loop
currents. So now our objective is to find loop currents. For this we choose maximum number
of independent loops (Fig.4.3) and apply KVL in them.
Figure 4.3:
If
and
are known, voltages across all elements can be found. Make two independent
equations: For loop abef
(4.3)
(4.4)
For loop bcde:
(4.5)
(4.6)
Use any technique to solve these (such as using matrices). We get:
(4.7)
(4.8)
Nodal Voltage Method
to reference node. The nodes are called independent nodes. In general for
network,
node
At node b:
.
Similarly, other equations are:
(4.9)
(4.10)
These are six equations, in six unknowns. Thus can be solved for a unique solution. One can
make a super node and use KCL combining the nodes nodes a and f. We also make extra
equations for potential difference between two nodes. With super node, no. of equations is
equal to no. of independent nodes whose voltage w.r.t. reference needs to be determined.
The first and the third equation can be combined for taking care of
making super loop for writing KVL.
Graph
For analyzing circuits efficiently.
Loop current method
One can form a spanning tree from graph such that current sources are in links (Those
elements which do not form part of the tree). Each link when added to the tree gives a loop.
All voltage sources should be kept in branches of tree. For example, refer to the following
two figures (Fig.4.6 , Fig.4.7)
Node voltages
and
The second equation follows from looking at node , while the third one from doing the same
at node .
constant,
always gives same
for all values of .
. In general all the
measured variables can be written as linear combination of all the causes, since nodal
voltage or loop current method leads to linear equations. This is true for network with linear
elements, and linear dependent sources. For measuring effect of many sources (also called
forcing functions), the effect due to one source at a time is computed (assuming all others to
be null). For the sources to be nullified means that if they are voltages sources, they are short
circuited (making the voltage of source zero), and if they are current sources, they are open
circuited (making the current from the source zero). Effects of all individual independent
sources are added to get effect due to presence of all the independent sources. This is known
as Superposition Theorem and is valid because of linearity in the circuit (as explained
above). While applying superposition theorem, depenendent sources are retained as any
other circuit element. They should not be nullified to get their effect separately on the
quantity of interest.
Example: Consider the circuit shown in figure 5.2
Figure 5.6: Making Tree for the circuit considering current source only
When one is finding effect of an independent source, other independent sources are
nullified. Let's take an example having dependent source (Fig.7.5).
Using KVL:
(5.2)
Taking Current
(Fig.7.7), and making
we write KVL and solve
source
a tree (Fig.7.8),
Now we verify the solution from loop current method directly (Fig.7.9). Making tree
(Fig.7.10).
Thevenin's Theorem:
Fig.5.13.
and
, that is,
Figure 5.14:
The two figures shown in figure 5.17 are equivalent. When the source inside the network is
neglected (if voltage source, short ckted, if current source, open ckted)
The same could be done with equivalent circuit. hence, we get 5.18.
Figure 5.18:
Norton Theorem
If the network shown in figure 5.19 is linear,
. The network can then be replaced
by a Norton equivalent, as shown in steps in figures 5.20 5.21 5.22 5.23 and 5.24.
Figure 5.20:
Figure 5.21:
Figure 5.22:
Figure 5.23:
Figure 5.24:
Figure 5.25:
Figure 5.26:
Figure 5.27:
Figure 5.28:
Figure 5.29:
Figure 5.30:
Figure 5.31:
Figure 5.32:
Thevenin's Theorem
and
, that is,
Norton Theorem
If the network shown in figure 5.19 is linear,
. The network can then be
replaced by a Norton equivalent, as shown in steps in
figures 5.20 5.21 5.22 5.23 and 5.24.
Figure 5.20:
Figure 5.21:
to
. In practice, no
). Using KVL:
to get
Therefore,
Integrating both sides, we get
Note that, at
Now,
As at
The plot of
and at
, where,
.
and
vs.
Figure 6.5:
. Therefore,
A.
The plot of
vs
is shown in Fig.6.6.
Figure 6.6:
Figure 6.7:
Now, consider the circuit shown in Fig.6.7.
Before
, we have the circuit looking as in Fig. . Therefore we have the initial current
(at
) through the inductor as
A.
Figure 6.8:
Figure 6.9:
At
equations for
At
A. Hence,
vs
Figure 6.10:
Figure 6.11: R
Hence,
equations for
Sign of
in 6.12.
,
is
as shown
As
Figure 6.13: Large inductance doesn't allow currents to change at fast rates
Switching off causes a discharge in the tube or spark at switch 6.13.
Figure 6.14:
At
6.14
In generic form,
Figure 6.15:
Now, have a look at the circuit shown in the figure 5.15. As the resistance
equations are indeterminate and are of the form
is 0, the
At
, therefore,
We will use the above circuit to analyse the circuit shown in Figure 5.16. As the resistance
of
is in parallel with the voltage source and also the rest of the circuit, the current drawn
by it will be constant and will not affect the analysis of the rest of the circuit. So,
for
, we can consider the circuit to be as in Figure 5.17. Analysing it as in the
previous example, we get
Figure 6.16:
Further, for
that still,
for
vs.
Figure 6.17:
After
, the circuit can be considered equivalently to be that in Fig 5.20. Now, there is
no constant voltage source across the resistance of
. This, the current flowing through it
also comes into the analysis.
Figure 6.18:
, where, given
R-C Circuits
An RC circuit is shown in fig.7.1. Since, in practical circuits, power is always switched on at
certain time, a switch is provided here. This switch closes at time
.
across the only loop in circuit we can find the equation relating
characteristic equations of capacitors, resistors i.e.,
for
for
For
Thus,
constant
; here
At
, capacitor voltage will be 0. Hence
Alternatively,
at
Thus,
is constant
and
. Using the
Thus,
(7.1)
The curves showing
and
Figure 7.2: i vs t
Figure 7.3:
vs t
These show the exponentially decaying (growth) nature of current (voltage across capacitor).
Consider the figure shown in 7.1. The switch is closed at
.
Now,
For RC circuit with source voltage zero, and an initial capacitor voltage of
expression reduces to
shown in 7.4, the analysis:
, this
That is, voltage varies linearly with time on constant current charging.
Figure 7.5:
Figure 7.6:
The switch is turned off at
sec. There is no charge on the capacitor initially.
Therefore, after
and before
, the circuit is equivalent to figure 7.7
Figure 7.7:
Taking thevenin equivalent in the direction of the arrow leads to figure 7.8
Figure 7.8:
Therefore ,
For
After
figure 7.9
, the switch is once again thrown open and the equivalent circuit is shown in
Figure 7.9:
Now,
Therefore,
The graph of
Figure 7.10:
conditions, we can solve for
and
and
where
derivatives also.
or
Consider
Note that . Thus, the phase and associated constant changes when a sinusoid is passed
through a differentiator.
Similarly, .
where,
the last equality follows using
, as shown in 8.4.
Figure 8.4:
Analysis can be done simply using sin and cos terms. But can't be further simplified using
imaginary quantities
Figure 8.5:
As in the diagram shown in 8.5,
In
figure 8.6, the complex values shown are rotating with time. The actual value at any time is
the projection on the real axis.
rad/sec.
The associated phasor diagram is shown in figure 8.9. It can be seen that the phase
difference is
radians.
where
The resulting phasor diagram is plotted in figure 8.13.
, the complex
term
can be taken to be similar to resistance. This is called impedance. Inverse of
impedance is called admittance, complex analog of conductance. In the above circuit,
Similar to the above analysis, we now work with the capacitor. See figure 8.14.
Thus,
lags by
w.r.t. , as shown in phasor diagram 8.15. The phasors are typically
written in capital letters, whereas their continuous time counterparts in small letters. In
phasor diagram,
. Thus, impedance is
Figure 8.14:
Figure 8.15:
Figure 8.16:
. We wish to
and .
(phasor in rectangular coordinates x and y)
...(*)
...(**)
From (**):
From (*) :
and
, we get:
For sinusoidal forcing functions, we can use the same techniques, but with complex
variables
A sinusoid
would be
, the output
Thus, for a sum of sinusoids of different frequencies, using superposition principle, the output
for
would be:
Power Supply
Many electronic applications such as radio sets, toys, walkmans etc. require a d.c. power
supply (usually 6V or 3V). One way to achive it is through the use of dry cells in series. But
an economically more convenient solution would be the use of the a.c. supply to generate the
desired d.c. output. Power supplies are used to achieve precisely this result.
Let us first state the problem at hand. We are given a 50 Hz, 230 V r.m.s
(i.e.
V peak ) a.c. supply and our objective is to design a circuit which
would take this as input and give as output a constant d.c. voltage, say 6 V.
In order to be able to use our common circuit elements (which run on small voltages), we
first reduce the amplitude of the input to say 6 V through the use of a transformer.
where, both the input and the output are a.c. We denote the transformer in the ciruit as
following.
valued at all times. The figures below two different cases, one in which the
is
and the other in which it is
. The initial current through the
inductor is
assumed to
be zero in
both the
cases.
In case the load is purely capacitive, once the capacitor is charged to its maximum
value, not forther charging takes place. Also, as the current cannot be negative the
discharge also doesn't take place. The output is therefore a pure d.c.
LM 317: Regulator
The trouble with zener diode driven power supply is that one needs a zener of the
same voltage as the desired voltage output. We can overcome this using a voltage
regulator such as LM 317
be
to be
, we get
. For
V, if we fix
, we
to
and
is
mA. Therefore,
mA. For no ripple, the capacitor
should be able to supply this current without the voltage dropping below 15 V.
Now, taking the worst possible instant of time, we have,
volts.
2. Active region (
3. Saturated (
In active region,
In saturated region,
for NPN)
for NPN)
for silicon BJT, and
In active region:
Three configurations in the active region are shown in figure 10.2. For active
region, the specified biasing condition is satisfied.
(DC
Now we address the problem of circuit design, in which we find appropriate values
of resistances and voltages in figure 10.3 to ensure BJT in active region. The
The last equation shows that the transistor, in this mode (active),
is basically a current amplifier.
Let
. Then,
).
Thus,
active region.
Suppose we increase
current gain
. That is,
to
. Then,
. Thus, the
Cut off and saturation are used in switching application. For the circuit shown in
figure 10.4, we find conditions for operating BJT as a switch.
When
Now find
, and
Thus, we get:
Thus, for
Figure 10.5:
Vs
Two different biasing strategies are shown in figure 10.6 and 10.7.
2. Active region (
3. Saturated (
In active region,
In saturated region,
for NPN)
for NPN)
for silicon BJT, and
.
In active region:
Three configurations in the active region are shown in figure 10.2. For active
region, the specified biasing condition is satisfied.
(DC
Now we address the problem of circuit design, in which we find appropriate values
of resistances and voltages in figure 10.3 to ensure BJT in active region. The
problem assumes importance as many transistor applications are those in which it
is in active region.
In cut-off,
, as
. If
becomes less than , the transistor is in
saturation. We need to ensure that the BJT is not in these states.
In active region, as
The last equation shows that the transistor, in this mode (active),
is basically a current amplifier.
Let
. Then,
limiting case,
).
Thus,
active region.
. That is,
Suppose we increase
to
. Then,
. Thus, the
current gain
. Cut off and saturation are used in
switching application. For the circuit shown in figure 10.4, we find conditions for
operating BJT as a switch.
When
Now find
, and
Thus, we get:
Thus, for
Figure 10.5:
Vs
Two different biasing strategies are shown in figure 10.6 and 10.7.
CE Characteristics
as a function of
and
, the
and
vs.
is almost independent of
(i.e.
. The ratio
The above is the equation of the load line. Q is the operating point for
In the active region,
and
and
and hence
A.
V and
. We will
.
result in proportional variations
is an increasing function of T
and thereby further increasing . This is known as thermal runaway. To avoid this,
we stabilize the circuit my introducing an emitter resistance.
Now, as T increases,
reduces
. This increases
and therefore
results in decrease
CE Characteristics
as a function of
and
, the
vs.
and
is almost independent of
. The ratio
(i.e.
The above is the equation of the load line. Q is the operating point for
In the active region,
and
and
and hence
A.
V and
. We will
.
result in proportional variations
is an increasing function of T
and thereby further increasing . This is known as thermal runaway. To avoid this,
we stabilize the circuit my introducing an emitter resistance.
Now, as T increases,
reduces
. This increases
and therefore
results in decrease
is a constant independent of
provided the
is determined by
is assumed to be 1K .
, we
We can also have a constant voltage source whose output voltage would be more
or less independent of the load
be
Digital Circuits
Operation
A and B
``or''
Other functions
NAND: Not + AND
NOR gate
Not+OR gate
X-OR gate
Exclusive-OR gate
X-NOR gate
Exclusive NOR
NOT
OR The following statements are called DeMorgan's Theorems and can be easily
verified and extended for more than two variables.
(12.
1)
(12.
2)
(12.
3)
(12.
4)
In general:
Thus :
(12.
5)
(12.
6)
AND gate
X-OR gate
(12.
7)
X-NOR gate
(12.
8)
Boolean Expressions
A general realization of a Boolean expression is shown in 12.15
Example:
In a car, we have the following components:
A
B
Therefore,
,
which can be written as
in the sum of product form. We arrive at this
by looking at the combinations when the outout is one.
We can alternatively, express this in the product of sums form by looking at the
combinations when the output is low as
Next, we will try to reduce the number of gates by combining terms suitably.
Multiplexer
Multiplexers (MUX)
For logic function realizations, instead of logic gates, Multiplexers can also be used
Consider a boolean function f={1,2,6,7}. Here input variables are A,B,C. multiplexer
schematic for
Figure 13.1: (
When
multiplexer is used to implement the above function. We
connect Boolean logic '1' at the inputs corresponding to control inputs
ABC= 1, 2, 4, and 6. For all other input Boolean logic '0' is connected. In
case we take a
multiplexer we can make
as control input and
then determine what should be connected at the inputs of multiplexer as
shown below.
(13.
2)
(13.
3)
(13.
4)
(13.
5)
Mux.
) Implementation
is dependent on output at
instant, denoted by
Students should verify the veracity of the truth table from the figure 13.3.
S
Note that in
state, both
and
are 0, which seems absurd. Thus,
conventionally, the state
is said to be ``not allowed''.
A similar latch, known as
latch is constructed using NAND gates (as opposed to NOR
gates for
latch). The students should again check that the working of the latch coheres
with that of the truth table.
To avoid ``race'' between the inputs, to have a control on when the input affects the latch, the
circuit 13.5 is often implemented.
Sequential circuits
In the above circuit, we have the problem of multiple transitions when the clock is active.
When
,
,
and
are both 1. Therefore, it is an undefined condition. This can
be eliminated by proper feedback.
The
with the
shown
that when
the
will cause
problem
circuit
above is
clock =1,
feedback
oscillatinons and when clock goes zero, the predicting the ouput state is difficult.
On the other hand, master slave configuration does not allow oscillation.
Edge triggered Flip-Flop
The above diagram shows a positive edge triggered flip-flop. The truth table is as
follows