Electronics Lab Manual

HARTELY OSCILLATOR
CIRCUIT DIAGRAM:
MODEL GRAPH:
EC 6361-ELECTRONICS LABORATORY
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HARTLEY OSCILLATOR
AIM:
To design and construct Hartley Oscillator for a given frequency.
APPARATUS REQUIRED :
S.no
Components Name
Range
Quantity
1.
Transistor
BC 107
1
1
Resistor
4.7 K,10 K,
2.
100 K,1 K
3.
Capacitor
0.01 f , 0.01 f, 0. 1 f
4.
Inductor
10mH, 10mH
5.
CRO
(0 30) MHz
6.
RPS
(0 30) V
7.
Bread Board
8.
Connecting Wires
Required
FORMULA:
F=1/2(LeqC)
where Leq =L1+L2
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TABULATION:
AMPLITUDE (V)
TIME PERIOD (mS)
FREQUENCY (HZ)
THEORETICAL CALCULATION:
F=1/2(LeqC)
PRACTICAL CALCULATION:
F=1/T
THEORY :
The amplifier stage uses an active device as a transistor in common
emitter configuration. The resistances R1 and R2 are the biasing resistances. For
dc oscillations the reactance is zero hence causes no problem for dc capacitors.
The CE amplifier provides a phase shift of 180.As emitter is grounded, the base
and the collector voltages are out of phase by 180.As the centre of L1 and L2 is
grounded, when the upper end becomes positive, the lower end
becomes
negative and vice versa. So it produces 180 shift and to satisfy the oscillation
condition.
PROCEDURE:
Connections are made as shown in the circuit diagram.
The time period and amplitude are tabulated.
Graph is plotted as Amplitude Vs Time period.
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RESULT:
Thus the Hartley oscillator for a given frequency is designed and calculated
and tabulated.
Theoretical Frequency =
Practical Frequency =
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COLPITTS OSCILLATOR
CIRCUIT DIAGRAM:
MODEL GRAPH:
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Ex no:
LC AND RC OSCILLATORS
COLPITTS OSCILLATOR
AIM:
To design and construct Colpitts Oscillator and to test its performance.
S.no
Components Name
Range
Quantity
1.
Transistor
BC 107
4.7 K,2.2 K,
2.
Resistor
820 K,3.3 K
3.
Capacitor
0.1 f , 0.01 f, 100 f
1,2
4.
Inductor
10mH,
5.
CRO
(0 30) MHz
6.
RPS
(0 30) V
7.
Bread Board
8.
Connecting Wires
Required
FORMULA:
F=1/2(LCeq)
where Ceq = C1C2/( C1+ C2)
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TABULATION:
AMPLITUDE (V)
TIME PERIOD (mS)
FREQUENCY (HZ)
F=1/T
F=1/2(LCeq)
Ceq = C1C2 /( C1+ C2)
THEORY :
The amplifier stage uses an active device as a transistor in common
emitter configuration. The basic circuit is same as transistorized Hartley
oscillator, except the tank circuit. The CE amplifier provides a phase shift of 180.
while the tank circuit adds further 180 phase shift ,to satisfy the oscillating
conditions.
PROCEDURE:
Graph is plotted as Amplitude Vs Time period.
RESULT:
Thus the Colpitts oscillator for a given frequency is designed and calculated
and tabulated.
Theoretical Frequency =
Practical Frequency =
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RC PHASE SHIFT OSCILLATOR
CIRCUIT DIAGRAM:
MODEL GRAPH:
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RC PHASE SHIFT OSCILLATOR
AIM :
To design and construct RC phase shift Oscillator.
S.no
Components Name
Range
Quantity
1.
Transistor
BC 107
4.7 K,100K,
10 K,3.3 K
1,2
1 K
2.
Resistor
3.
Capacitor
0.1 f , 0.01 f, 10f
1,4,1
5.
CRO
(0 30) MHz
6.
RPS
(0 30) V
7.
Bread Board
8.
Connecting Wires
Required
FORMULA:
The frequency is given by
F=1/2RC6
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TABULATION:
AMPLITUDE(V)
TIME PERIOD(mS)
FREQUENCY(HZ)
F=1/T
F=1/2RC6
DESIGN SPECIFICATIONS:
VCC=12V, IE =IC=1mA, VCC= VCC/2
VE=1V, IB=3.56A, hfe=100, =284
TO FIND RL:
VCC =ICRC+ vCE+ VE
RL= (VCC- vCE - VE)/ IC
TO FIND RTH:
RTH= (0.1)(1+ hfe)RE
TO FIND RE:
RE= VE/ IE
TO FIND VTH:
VTH= (IC /) -RTH +VBE( IC+IB)RE
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THEORY :
RC phase shift oscillator basically consists of an amplifier and a
feedback network consisting of resistors and capacitors arranged in ladder
fashion. Hence such an oscillator is also called ladder type RC phase shift
oscillator.
To understand the operation of this oscillator let us study RC circuit first
which is used in the feedback network of this oscillator.
PROCEDURE:
The graph is plotted using amplitude Vs time period.
RESULT:
Thus the RC phase shift oscillator for a given frequency is designed and
calculated and tabulated.
Theoretical frequency =
Practical frequency
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WEIN BRIDGE OSCILLATOR
CIRCUIT DIAGRAM:
MODEL GRAPH:
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WEIN BRIDGE OSCILLATOR
AIM :
To design and construct Wein bridge Oscillator.
S.no
Components Name
Range
Quantity
1.
Transistor
BC 107
4.7 K,100K,
2,2
10 K,3.3 K
3,2
1 K ,2.2 K
2.
Resistor
3.
Capacitor
0.1 f , 0.01 f, 10f
1,3,1
4.
CRO
(0 30) MHz
5.
RPS
(0 30) V
6.
Bread Board
7.
Connecting Wires
Required
FORMULA:
F=1/2RC
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TABULATION:
AMPLITUDE(V)
TIME PERIOD(mS)
FREQUENCY(HZ)
F=1/T
F=1/2RC
THEORY :
Generally in an oscillator, amplifier stage introduces additional 180 phase
shift to obtain a phase shift of 360 around a loop.
This is required condition for any oscillator. But wein bridge oscillator
uses a non-inverting amplifier and hence does not zero degree phase or 2R
radius in wein bridge type on components are due to the effect.
PROCEDURE:
The graph is plotted using amplitude Vs time period along given
readings.
RESULT:
Thus the Wein bridge oscillator for a given frequency is designed and
calculated and tabulated.
Theoretical frequency =
Practical frequency
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DIFFERENTIATOR OR CR FILTER
CIRCUIT DIAGRAM:
MODEL GRAPH:
TABULATION:
Observation
Amplitude(v)
Time(ms)
Frequency(HZ)
TON
INPUT
TOFF
TON
OUTPUT
TOFF
F=1/2RC
F=1/T
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DESIGN OF PASSIVE FILTERS
Ex No:
AIM:
To design and construct passive filters for given frequency.
APPARATUS REQUIRED:
S. No
Components Name
Range
Quantity
1.
Resistor
56K,1 K
1,1
2.
Capacitor
0.1 f , 2.2f
1,1,
3.
CRO
(0 30) MHz
4.
Zener diode
IN 4007
5.
Function generator
(0 30) MHz
6.
Bread Board
7.
Connecting Wires
Required
FORMULA:
F=1/2RC
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INTEGRATOR OR RC FILTER
CIRCUIT DIAGRAM:
MODEL GRAPH:
TABULATION:
Observation
Amplitude(v)
Time(ms)
Frequency(HZ)
TON
INPUT
TOFF
TON
OUTPUT
TOFF
F=1/2RC
F=1/T
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THEORY :
For a high pass RC circuit, if time constant is very small as compared to
the time required by the input signal to make an appreciable change, the circuit
acts as a differentiator. Under this case, the drop across R is negligible compared
to drop across C. This entire input Vi can be assumed to appearing across C.
For a square wave input at the points of discontinuity, the differentiator
results the impulse of infinite amplitude, zero width and alternating polarity. For
ramp type of input Vi at which is linearly increasing. After differentiation, we get
RC dvi/dvt is proportional RC which is constant magnitude output
PROCEDURE:
A square wave is given as Input waveform is noted.
Observe the output waveform.
Time period and amplitude is noted for both input and output.
Graph is plotted for amplitude and time period.
RESULT:
Thus the differentiator and integrator for a given frequency is designed
and calculated.
DIFFERENTIATOR
Theoretical Frequency :
Practical Frequency
INTEGRATOR
Theoretical Frequency
Practical Frequency
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ASTABLE MULTIVIBRATOR
CIRCUIT DIAGRAM:
MODEL GRAPH:
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Ex no:
MULTIVIBRATORS
ASTABLE MULTIVIBRATOR
AIM :
To design and construct astable multivibrator for frequency given.
S.no
Components Name
Range
Quantity
1.
Resistor
2.2K,330K
2,2
2.
Capacitor
0.01 f
3.
CRO
(0 30) MHz
4.
Transistor
BC107
5.
RPS
(0-30)V
6.
Function generator
(0 30) MHz
7.
Bread Board
8.
Connecting Wires
Required
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TABULATION:
OBSERVATION
AMPLITUDE(V)
TIME PERIOD (S)

TON
TOFF
VB1
VB2
VC1
VC2
DESIGN SPECIFICATIONS
VCC=12V, IB = 5mA, C1 100pF, VCE=0.3V
VBE=0.7V, VBB = 2V, hfe1=330, hfc2=330
(i) TO FIND R0&RC2
IC2= VCC VCE(sat)/RC2
(ii) TO FIND R:
IB2(min)= IC2/ hfe
VCC= VBE + RIB2
R= (VCC - VBE)/IB2
T=1/F
(iii) TO DETERMINE R1&R2
R1 = VCC - VBE(sat)/I1
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R2 = VBB VBE/2
THEORY :
The astable multivibrator has both the states as quasi-stable states. None
of the states is stable states. Due to this the multivibrator automatically makes the
successive transitions from one quasi-stable to other, without any external
triggering pulse. The rate of transition from one quasi-stable state to other is
determined by the circuit components.
As the multivibrator does not require any external pulse for the transition is
called free running multivibrator. The astable multivibrator is nothing but an
oscillator. It is used as the generator of square wave. As it require no triggering it
is used as a basic source of fast waveforms
PROCEDURE:
A trigger input is given to the base of the transistor no of trigger input for
astable.
Observe the output waveform across the base and the collector of both
the transistor.
RESULT:
Thus the Astable multi vibrator for a given frequency is designed
and calculated.
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MONOSTABLE MULTIVIBRATOR
CIRCUIT DIAGRAM:
MODEL GRAPH:
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MONOSTABLE MULTIVIBRATOR
AIM :
To design and construct monostable multivibrator for frequency given.
S.no
Components Name
Range
Quantity
1.
Resistor
2.2K,380K,180k
2,2,1
2.
Capacitor
0.01 f ,100pF
3.
CRO
(0 30) MHz
4.
Transistor
BC107
5.
RPS
(0-30)V
6.
Function generator
(0 30) MHz
7.
Bread Board
8.
Connecting Wires
Required
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TABULATION:
OBSERVATION
AMPLITUDE(V)
TIME PERIOD (S)

TON
Input
TOFF
VB1
VB2
VC1
VC2
DESIGN SPECIFICATIONS
VCC=12V, IB = 5mA, C1 100pF, VCE=0.3V
VBE=0.7V, VBB = 2V, hfe1=330, hfc2=330
(i) TO FIND R0&RC2
IC2= VCC VCE(sat)/RC2
(ii) TO FIND R:
IB2(min)= IC2/ hfe
VCC= VBE + RIB2
R= (VCC - VBE)/IB2
T=1/F
(iii) TO DETERMINE R1&R2
R1 = VCC - VBE(sat)/I1
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R2 = VBB VBE/2
THEORY :
The monostable multivibrator has only one stable state. The other state is
unstable referred as quasi-stable state. When an external trigger pulse is applied
to the circuit, the circuit goes into the quasi-stable state from its normal stable
state. After some time interval the circuit automatically returns to its stable
states. The circuit does not require any external pulse to change from quasistable to stable state. The time interval for which circuit remains in the quasistable state is determined by the circuit components can be designed as per the
requirements.
PROCEDURE:
A trigger input is given to the base of the transistor Q1.
Observe the output waveform across the base and the collector of both
the transistor.
RESULT:
Thus the monostable multivibrator for a given frequency is
designed and calculated
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EX NO:
P-N JUNCTION DIODE CHARACTERISTICS
AIM:
1. To plot Volt-Ampere Characteristics of Silicon P-N Junction Diode.
2. To find cut-in Voltage for Silicon P-N Junction diode.
3. To find static and dynamic resistances in both forward and reverse
biased conditions for P-N Junction diode.
Hardware Required:
S. No
Apparatus
01
PN Junction Diode
02
Resistance
03
Regulated power supply
04
Ammeter
05
Voltmeter
Type
Range
IN4001
Quantity
1
1k ohm
(0 30V)
mC
(0-30)mA, (0-500)A
mC
(0 1)V, (0 30)V
Bread board and

06
connecting wires
Introduction:
Donor impurities (pentavalent) are introduced into one-side and
acceptor impurities into the other side of a single crystal of an intrinsic
semiconductor to form a p-n diode with a junction called depletion region
(this region is depleted off the charge carriers). This region gives rise to a
potential barrier V called Cut- in Voltage. This is the voltage across the
diode at which it starts conducting. The P-N junction can conduct beyond this
Potential.
The P-N junction supports uni-directional current flow. If +ve terminal
of the input supply is connected to anode (P-side) and ve terminal of the
input supply is connected to cathode (N- side), then diode is said to be
forward biased. In this condition the height of the potential barrier at the
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junction is lowered by an amount equal to given forward biasing voltage.

Both the holes from p-side and electrons from n-side cross the junction
simultaneously and constitute a forward current ( injected minority current
due to holes crossing the junction and entering N-side of the diode, due to
electrons crossing the junction and entering P-side of the diode). Assuming
current flowing through the diode to be very large, the diode can be
approximated as short-circuited switch. If ve terminal of the input supply is
connected to anode (p-side) and +ve terminal of the input supply is connected to
cathode (n-side) then the diode is said to be reverse biased. In this condition an
amount equal to reverse biasing voltage increases the height of the potential
barrier at the junction. Both the holes on p-side and electrons on n-side tend to
move away from the junction thereby increasing the depleted region. However
the process cannot continue indefinitely, thus a small current called reverse
saturation current continues to flow in the diode. This small current is due to
thermally generated carriers. Assuming current flowing through the diode to be
negligible, the diode can be approximated as an open circuited switch.
The volt-ampere characteristics of a diode explained by following
equation: I = Io(Exp(V/ VT)-1)
I=current flowing in the Diode
Io=reverse saturation current V=voltage applied to the diode
VT=volt-equivalent of temperature=kT/q=T/11,600=26mV(@ room
temp). =1 (for Ge) and 2 (for Si)
It is observed that Ge diode has smaller cut-in-voltage when compared to
Si diode. The reverse saturation current in Ge diode is larger in magnitude when
compared to silicon diode.
Circuit diagram:
Forward Bias
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Reverse Bias
Precautions:
1. While doing the experiment do not exceed the ratings of the diode. This
may lead to damage of the diode.
2. Connect voltmeter and Ammeter in correct polarities as shown in the
circuit diagram.
3. Do not switch ON the power supply unless you have checked the
circuit connections as per the circuit diagram.
Experiment:
Forward Biased Condition:
1. Connect the PN Junction diode in forward bias i.eAnode is connected to
positive of the power supply and cathode is connected to negative of the
power supply .
2. Use a Regulated power supply of range (0-30)V and a series resistance of
1k.
3. For various values of forward voltage (Vf) note down the corresponding
values of forward current(If) .
Reverse biased condition:
1. Connect the PN Junction diode in Reverse bias i.e; anode is connected to
negative of the power supply and cathode is connected to positive of the
power supply.
2. For various values of reverse voltage (Vr ) note down the
corresponding values of reverse current ( Ir ).
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Tabular column:
Forward Bias:
S. No
Vf (volts)
If (mA)
Reverse Bias:
S. No
Vr (volts)
Ir (A)
Graph ( instructions)
1. Take a graph sheet and divide it into 4 equal parts. Mark origin at the center
of the graph sheet.
2. Now mark +ve x-axis as Vf -ve x-axis as Vr +ve y-axis as If -ve y-axis as Ir.
3. Mark the readings tabulated for diode forward biased condition in first
Quadrant and diode reverse biased condition in third Quadrant.
Model Graph:
Calculations from Graph:

Static forward Resistance Rdc = Vf/If
Dynamic forward Resistance rac = Vf/If
Static Reverse Resistance Rdc =Vr/Ir
Dynamic Reverse Resistance rac = Vr/Ir
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Result:
Thus the VI characteristics of PN junction diode is verified.
1. Cut in voltage = V
2. Static forward resistance = .
3. Dynamic forward resistance = .
Viva Questions:
1. What is the need for doping?
2. How depletion region is formed in the PN junction?
3. What is leakage current?
4. What is break down voltage?
5. What is an ideal diode? How does it differ from a real diode?
6. What is the effect of temperature in the diode reverse characteristics?
7. What is cut-in or knee voltage? Specify its value in case of Ge or Si?
8. What are the difference between Ge and Si diode.
9. What is the capacitance formed at forward biasing?
10. What is the relationship between depletion width and the
concentration of impurities?
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EX NO:
ZENER DIODE CHARACTERISTICS
AIM:
1. To plot Volt-Ampere characteristics of Zener diode.
2. To find Zener break down voltage in reverse biased condition.
Hardware Required:
S. No
Apparatus
01
Zener Diode
02
Resistance
03
04
Ammeter
05
Voltmeter
Type
Range
Quantity
IZ 6.2
1
1k ohm
(0 30V)
mC
(0-30)mA, (0-500)A
mC
(0 1)V, (0 30)V
Bread board and

06
connecting wires
Introduction:
An ideal P-N Junction diode does not conduct in reverse biased
condition. A zener diode conducts excellently even in reverse biased
condition. These diodes operate at a precise value of voltage called break
down voltage. A zener diode when forward biased behaves like an ordinary
P-N junction diode.
A zener diode when reverse biased can either undergo avalanche
break down or zener break down.
Avalanche break down:-If both p-side and n-side of the diode are lightly
doped, depletion region at the junction widens. Application of a very large
electric field at the junction may rupture covalent bonding between electrons.
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Such rupture leads to the generation of a large number of charge carriers

resulting in avalanche multiplication.
Zener break down:-If both p-side and n-side of the diode are heavily doped,
depletion region at the junction reduces. Application of even a small voltage
at the junction ruptures covalent bonding and generates large number of
charge carriers. Such sudden increase in the number of charge carriers results
in zener mechanism.
Circuit diagram:
Forward Bias
Reverse Bias
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8
Precautions:
1. While doing the experiment do not exceed the ratings of the diode. This may
lead to damage of the diode.
circuit diagram.
Experiment:
Forward Biased Condition:
1. Connect the Zener diode in forward bias i.e; anode is connected to positive of
the power supply and cathode is connected to negative of the power supply as
in circuit
2. Use a Regulated power supply of range (0-30)V and a series resistance of 1k.
3. For various values of forward voltage (Vf) note down the corresponding values
of forward current(If) .
Reverse Biased condition:
1. Connect the Zener diode in Reverse bias i.e; anode is connected to negative of
the power supply and cathode is connected to positive of the power supply as
in circuit.
2. For various values of reverse voltage(Vr ) note down the corresponding values
of reverse current ( Ir ).
Tabular column:
Forward Bias:
S. No
34
Vf (volts)
If (mA)
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Reverse Bias:
S. No
Vr (volts)
Ir (mA)
Model Graph

Cut in voltage = ---------- (v)
Break down voltage = ------------(v)
Result:
The zener diode characteristics have been plotted.
1. Cut in voltage = V
2 Break down voltage = ------------(v)
Viva Questions:
1. Can we use Zener diode for rectification purpose?
2. What happens when the Zener diodes are connected in series?
3. What type of biasing must be used when a Zener diode is used as a regulator?
4. Current in a 1W 10V Zener diode must be limited to a maximum of what
value?
5. How will you differentiate the diodes whether it is Zener or avalanche
when you are given two diodes of rating 6.2 v and 24V?
6. When current through a Zener diode increases by a factor of 2, by what
factor the voltage of Zener diode increases.
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EX NO
COMMON EMITTER CONFIGURATION
AIM:
To study the input and output characteristics of a bipolar junction transistor
in common emitter configuration.
Hardware Required:
S. No
Apparatus
01
Transistor
02
Resistance
03
04
Ammeter
05
Voltmeter
06
Bread board and

connecting wires
Type
Range
Quantity
BC147
1
1k ohm
(0 30V)
mC
(1-10)mA, (0-500)A
mC
(0 1)V, (0 30)V
Introduction:
Bipolar junction transistor (BJT) is a 3 terminal (emitter, base, collector)
semiconductor device. There are two types of transistors namely NPN and PNP. It
consists of two P-N junctions namely emitter junction and collector junction.
In Common Emitter configuration the input is applied between base and
emitter and the output is taken from collector and emitter. Here emitter is common
to both input and output and hence the name common emitter configuration.
Input characteristics are obtained between the input current and input voltage
taking output voltage as parameter. It is plotted between VBE and IB at constant VCE
in CE configuration.
Output characteristics are obtained between the output voltage and output
current taking input current as parameter. It is plotted between VCE and IC at
constant IB in CE configuration.
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Pin Assignment:
Precautions:
1. While doing the experiment do not exceed the ratings of the transistor. This may
lead to damage the transistor.
2. Connect voltmeter and Ammeter in correct polarities as shown in the circuit
diagram.
3. Do not switch ON the power supply unless you have checked the circuit
connections as per the circuit diagram.
4. Make sure while selecting the emitter, base and collector terminals of the
transistor.
Experiment:
Input Characteristics
1. Connect the transistor in CE configuration as per circuit diagram
2. Keep output voltage VCE = 0V by varying VCC.
3. Varying VBB gradually, note down both base current IB and base emitter voltage (VBE).
4.
Repeat above procedure (step 3) for various values of VCE
Output Characteristics
1. Make the connections as per circuit diagram.
2. By varying VBB keep the base current I B = 20A.
3. Varying VCC gradually, note down the readings of collector-current (IC)
and collector- emitter voltage (VCE).
4.
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Repeat above procedure (step 3) for different values of IE
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Tabular Column:
Input characteristics:
VBE (volts)
VCE = 0 V
IB (mA)
VCE = 4V
VBE (volts)
IB (mA)
Output characterstics:
IB = 30 A
VCE (volts)
Ic (mA)
IB = 60 A
VCE (volts)
Ic (mA)
Circuit diagram:
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Graph:
Input characteristics
Output characteristics
1. Plot the input characteristics by taking VBE on Y-axis and IB on X-axis

at constant VCE.
2. Plot the output characteristics by taking VCE on x-axis and IC on y-axis
by taking IB as a constant parameter.
Calculations from graph:
1. Input resistance:
To obtain input resistance find VBE and IB at constant VCE on one of the
input characteristics.
Then Ri = VBE / IB (VCE constant)
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2. Output resistance:
To obtain output resistance, find IC and VCE at constant
IB. Ro = VCE / IC (IB constant)

a) Input impedance(hic)= = VBE / IB , VCE constant.
b) Forward current gain(hfc)= = Ic / IB , VCE constant
c) Output admittance(hoe)= = Ic / VEC , IB constant
d) Reverse voltage gain(hrc)= VBE/ VEC , IB constant
Inference:
1. Medium Input and Output resistances.
2. Smaller value of VCE becomes earlier cut-in-voltage.
3. Increase in the value of IB causes saturation of the transistor at an
earlier voltage.
Result:
Thus the input and output characteristics of CE configuration is plotted.
1. Input Resistance (Ri) =
Output Resistance (Ro) =
Viva Questions
1. NPN transitors are more preferable for amplification purpose than PNP
transistors. Why?
2. Explain the switching action of a transistor?
3. At what region of the output characteristics, a transistor can act as an
amplifier?
4. What happens when we change the biasing condition of the transistors.
5. Why the output is phase shifted by 180 only in CE configuration.
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EX NO:
COMMON COLLECTOR CONFIGURATION
AIM:
To study the input and output characteristics of a transistor in
common collector configuration and to determine its h parameters.
Hardware Required:
S. No
Apparatus
01
Transistor
02
Resistance
03
04
Ammeter
05
Voltmeter
06
Bread board and

connecting wires
Type
Range
Quantity
BC147
1
68 k, 1k ohm
(0 30V)
mC
(1-10)mA, (0-500)A
mC
(0 1)V, (0 30)V
Introduction:
Bipolar junction transistor (BJT) is a 3 terminal (emitter, base, collector)
semiconductor device. There are two types of transistors namely NPN and PNP. It
consists of two P-N junctions namely emitter junction and collector junction.
In Common collector configuration the input is applied between base and
collector terminals and the output is taken from collector and emitter. Here
collector is common to both input and output and hence the name common
collector configuration.
Input characteristics are obtained between the input current and input
voltage taking output voltage as parameter. It is plotted between V BC and IB at
constant VCE in CCconfiguration. Output characteristics are obtained between the
output voltage and output current taking input current as parameter. It is plotted
between VCE and IE at constant IB in CC configuration.
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Pin Assignment:
Circuit diagram:
Precautions:
1. While doing the experiment do not exceed the ratings of the transistor. This
may lead to damage the transistor.

circuit diagram.
4. 4.Make sure while selecting the emitter, base and collector terminals of
the transistor.
Experiment:
Input Characteristics:
1. Connect the transistor in CC configuration as per circuit diagram
2. Keep output voltage VCE = 0V by varying VEE.
3. Varying VBB gradually, note down both base current IB and base - collector
voltage (VBC).
4. Repeat above procedure (step 3) for various values of VCE
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Output Characteristics
1. Make the connections as per circuit diagram .
2. By varying VBB keep the base current I B = 20A.
3. Varying VCC gradually, note down the readings of emitter-current (IE) and
collector- Emitter voltage (VCE).
4. Repeat above procedure (step 3) for different values of IE
Graph
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e) Input impedance(hic)= = VBC / IB
f) Forward current gain(hfc)= = IE / IB
g) Output admittance(hoc)= = IE / VEC
h) Reverse voltage gain(hrc)= VBC/ VEC
Result:
Thus the input and output characteristics of CC configuration are plotted
and h parameters are found.
a) Input impedance(hic)=
b) Forward current gain(hfc)=
c) Output admittance(hoc)=
d) Reverse voltage gain(hrc)=
Viva Questions
1. Why CC Configuration is called emitter follower?
2. Can we use CC configuration as an amplifier?
3. What is the need for analyzing the transistor circuits using different parameters?
4. What is the significance of hybrid model of a transistor?
5. Is there any phase shift between input and output in CC configuration.
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EX NO: CHARACTERISTICS OF CB CONFIGURATION USING BJT
AIM:
To plot the transistor characteristics of CB configuration.
APPARATUS REQUIRED:
S.No.
1
Name
Range
R.P.S
Type
COMPONENTS REQUIRED:
Qty
S.No.
Name
Range
(0-30)V
Transistor
BC 107
(010)mA
Resistor
Type
Qty
1
10k
1
1K
Ammeter
(01)A
(030)V
(02)V
Bread
Board
Wires
Voltmeter
THEORY:
In this configuration the base is made common to both the input

and out. The emitter is given the input and the output is taken across the
collector. The current gain of this configuration is less than unity. The
voltage gain of CB configuration is high. Due to the high voltage gain, the
power gain is also high. In CB configuration, Base is common to both
input and output. In CB configuration the input characteristics relate IE
and VEB for a constant VCB. Initially let VCB = 0 then the input junction is
equivalent to a forward biased diode and the characteristics resembles
that of a diode. Where VCB = +VI (volts) due to early effect IE increases
and so the characteristics shifts to the left. The output characteristics
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relate IC and VCB for a constant IE. Initially IC increases and then it levels
for a value IC = IE. When IE is increased IC also increases
proportionality. Though increase in VCB causes an increase in , since
is a fraction, it is negligible and so IC remains a constant for all values of
VCB once it levels off.
PROCEDURE:
INPUT CHARACTERISTICS:
It is the curve between emitter current IE and emitter-base voltage VBE at
constant collector-base voltage VCB.
1. Connect the circuit as per the circuit diagram.
2. Set VCE=5V, vary VBE in steps of 0.1V and note down the corresponding
IB. Repeat the above procedure for 10V, 15V.
3. Plot the graph VBE Vs IB for a constant VCE.
4. Find the h parameters.
OUTPUT CHARACTERISTICS:
It is the curve between collector current IC and collector-base voltage VCB at
constant emitter current IE.
2. Set IB=20A, vary VCE in steps of 1V and note down the corresponding
IC. Repeat the above procedure for 40A, 80A, etc.
3. Plot the graph VCE Vs IC for a constant IB.
4. Find the h parameters
TABULAR COLUMN:
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S.No.
VCB =
VCB =
VCB =
VEB
IE
VEB
IE
VEB
IE
(V)
(A)
(V)
(A)
(V)
(A)
S.No.
47
I E=
mA
I E=
mA
I E=
mA
VCB
Ic
VCB
Ic
VCB
Ic
(V)
(mA)
(V)
(mA)
(V)
(mA)
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MODEL GRAPH:
IC
(mA)
VCB1
IE2
VCB2
IE1
VEB1 VEB2
VEB (V)
I (mA)
IE3
IC2
IE2
IC1
IE1
VCB1
VCB2
VCB (V)
RESULT:
The transistor characteristics of a Common Base (CB) configuration
were plotted and uses studied.
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EX NO :
UJT CHARACTERISTICS
AIM: To observe the characteristics of UJT and to calculate the Intrinsic

Stand-Off Ratio ().
APPARATUS:
S. No
Apparatus
01
UJT
02
Resistance
03
04
Ammeter
05
Voltmeter
06
Bread board and

connecting wires
49
Type
Range
2N2646
Quantity
1
10K,47K,330
(0 30V)
mC
(0-30)mA
mC
(0 30)V
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CIRCUIT
DIAGRAM
THEORY:
A Unijunction Transistor (UJT) is an electronic semiconductor
device that has only one junction. The UJT Unijunction Transistor (UJT) has
three terminals an emitter (E) and two bases (B1 and B2). The base is formed
by lightly doped n-type bar of silicon. Two ohmic contacts B1 and B2 are
attached at its ends. The emitter is of p-type and it is heavily doped. The
resistance between B1 and B2, when the emitter is open-circuit is called
interbase resistance.The original unijunction transistor, or UJT, is a simple
device that is essentially a bar of N type semiconductor material into which P
type material has been diffused somewhere along its length. The 2N2646 is the
most commonly used version of the UJT.
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Circuit symbol
The UJT is biased with a positive voltage between the two bases. This causes a
potential drop along the length of the device. When the emitter voltage is
driven approximately one diode voltage above the voltage at the point where
the P diffusion (emitter) is, current will begin to flow from the emitter into the
base region. Because the base region is very lightly doped, the additional
current (actually charges in the base region) causes (conductivity modulation)
which reduces the resistance of the portion of the base between the emitter
junction and the B2 terminal. This reduction in resistance means that the
emitter junction is more forward biased, and so even more current is injected.
Overall, the effect is a negative resistance at the emitter terminal. This is what
makes the UJT useful, especially in simple oscillator circuits.When the emitter
voltage reaches Vp, the current startsto increase and the emitter voltage starts to
decrease.This is represented by negative slope of the characteristics which is
reffered to as the negative resistance region,beyond the valleypoint ,R B1
reaches minimum value and this region,VEB propotional to IE.
PROCEDURE:
1. Connection is made as per circuit diagram.
2. Output voltage is fixed at a constant level and by varying input voltage
corresponding emitter current values are noted down.
3. This procedure is repeated for different values of output voltages.
4. All the readings are tabulated and Intrinsic Stand-Off ratio is calculated
using
51
= (Vp-VD) / VBB
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5. A graph is plotted between VEE and IE for different values of VBE.

MODEL GRAPH:
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OBSEVATIONS:
VBB=1V
VEB(V)
VBB=2V
IE(mA)
VEB(V)
VBB=3V
IE(mA)
VEB(V)
IE(mA)
CALCULATIONS:
VP = VBB + VD
= (VP-VD) / VBB
= ( 1 + 2 + 3 ) / 3
RESULT: The characteristics of UJT are Observed.
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EX NO
CHARACTERISTICS OF
LDR,PHOTODIODE,PHOTOTRANSISTOR.
AIM:
1. To plot distance Vs Photocurrent Characteristics of LDR,
Photodiode and Phototransistor.
.
Hardware Required:
S. No
Apparatus
01
Photodiode
02
Phototransistor
03
Type
Range
Quantity
1
1k ohm
1
1
(0-30)mA;(004
Ammeter
mC
1
30)microA
05
Voltmeter
mC
(0-10)V
Bread board and

06
1
connecting wires
07
LDR
Introduction:
LDR
A photoresistor or light dependent resistor or cadmium sulfide (CdS)
cell is a resistor hose resistance decreases with increasing incident light
intensity. It can also be referred to as a photoconductor.
A photoresistor is made of a high resistance semiconductor. If light
falling on the device is of high enough frequency, photons absorbed by the
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semiconductor give bound lectrons enough energy to jump into the conduction
band. The resulting free electron (and its hole partner) conduct electricity,
thereby lowering resistance
Photodiode
A silicon photodiode is a solid state light detector that consists of a
shallow diffused P-N junction with connections provided to the out side
world. When the top surface is illuminated, photons of light penetrate into the
silicon to a depth determined
by the photon energy and are absorbed by the silicon generating electron-hole
pairs. The electron-hole pairs are free to diffuse (or wander) throughout the bulk
of the photodiode until they recombine.
The average time before recombination is the minority carrier lifetime.
At the P-N junction is a region of strong electric field called the depletion
region. It is formed by the voltage potential that exists at the P-N junction. Those
light generated carriers that wander into contact with this field are swept across
the junction. If an external connection is made to both sides of the junction a
photo induced current will flow as long as light falls upon the photodiode. In
addition to the photocurrent, a voltage is produced across the diode. In effect, the
photodiode functions exactly like a solar cell by generating a current and voltage
when exposed to light.
Phototransistor:
Photo-Transistor, is a bit like a Photo-Diode in the fact that it detects light
waves, however photo-transistors, like transistor are designed to be like a fast
switch and is used for light wave communications and as light or infrared
sensors . The most common form of photo-transistor is the NPN collector and
emitter transistor with no base lead. Light or photons entering the base (which is
the inside of the photo-transistor) replace the base - emitter current of normal
transistors.
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Circuit diagram:
LDR:
Photodiode:
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Phototransistor:
Precautions:
may lead to damage the diode.
circuit diagram.
Experiment:
Procedure:
LDR:
Connect circuit as shown in figure
Keep light source at a distance and switch it ON,so that it falls on the
LDR Note down current and voltage in ammeter and voltmeter.
Vary the distance of the light source and note the V & I.
Sketch graph between R as calculated from observed V and I and distance of
light source.
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Photodiode:
Maintain a known distance between the bulb and photodiode say 5cm
Set the voltage of the bulb,vary the voltage of the diode in steps of 1 volt
and note down the diode current Ir.
Repeat above procedure for
VL=4V,6V,etc. Plot the graph :Vd Vs Ir
for constant VL
Phototransistor:
Repeat the procedure as that of the photodiode.
1. Take a graph sheet. Mark origin at the left bottom of the graph sheet.
2. Now mark photocurrent in Y axis and distance in cm along X axis
3. Mark the readings tabulated.
Graph:
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3
0
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Resistance R = V/I
Result:
Thus the characteristics of LDR,Photodiode,Phototransistor were
studied.
Viva Questions:
1. What is the principle of operation of LDR?
2. What is the principle of operation of Photodiodes?
3. What is the principle of operation of Phototransistors?
4. What is the difference between Photodiode and phototransistor?.
5. Give the applications of LDR?
6. Give the applications of Photodiodes?
7. Give the applications of Phototransistors?
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JFET CHARACTERISTICS
EX NO
AIM:
a) To study Drain Characteristics of a FET.
b) To study Transfer Characteristics of a FET.
Hardware Required:
S. No
Apparatus
01
JFET
02
Resistance
03
04
Ammeter
Type
Range
BFW11
Quantiy
1
1k ohm
(0 30V)
(0-30)mA, (0mC
1
500)MA
05
Voltmeter
mC
(0 1)V, (0 30)V
Bread board and

connecting
06
Wires
Introduction:
The field effect transistor (FET) is made of a bar of N type material

called the SUBSTRATE with a P type junction (the gate) diffused into it.
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With a positive voltage on the drain, with respect to the source, electron
current flows from source to drain through the CHANNEL.
the gate is made negative with respect to the source, an electrostatic
field is created, which squeezes the channel and reduces the current. If the
gate voltage is high enough the channel will be "pinched off" and the current
will be zero. The FET is voltage controlled, unlike the transistor which is
current controlled. This device is sometimes called the junction FET or
IGFET or JFET.
If the FET is accidentally forward biased, gate current will flow and the
FET will be destroyed. To avoid this, an extremely thin insulating layer of
silicon oxide is placed between the gate and the channel.
The device is then known as an insulated gate FET, or IGFET or metal
oxide semiconductor FET(MOSTFET) Drain characteristics are obtained
between the drain to source voltage (VDS) and drain current (ID) taking gate to
source voltage (VGS) as the parameter. Transfer characteristics are obtained
between the gate to source voltage (VGS) and Drain current (ID) taking drain to
source voltage (VDS) as parameter
Circuit diagram:
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Pin assignment of FET:
Precautions:
1. While doing the experiment do not exceed the ratings of the FET. This may
lead to damage the FET.
Circuit diagram.
Circuit connections as per the circuit diagram.
4. Make sure while selecting the Source, Drain and Gate terminals of the FET.
Experiment:
DRAIN CHARACTERISTICS
Determine the drain characteristics of FET by keeping VGS =
0v. Plot its characteristics with respect to VDS versus ID
TRANSFER CHARACTERISTICS:
Determine the transfer characteristics of FET for constant value of
VDS. Plot its characteristics with respect to VGS versus ID
Graph (Instructions):
1. Plot the drain characteristics by taking VDS on X-axis and ID on Yaxis at constant VGS.
2. Plot the Transfer characteristics by taking VGS on X-axis and ID on Yaxis at constant VDS.
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Drain Resistance (rd) :
It is given by the ration of small change in drain to source voltage (V DS)
to the corresponding change in Drain current (ID) for a constant gate to source
voltage (VGS), when the JFET is operating in pinch-off or saturation region.
Trans-Conductance (gm) :
Ratio of small change in drain current (ID) to the corresponding change in
gate to source voltage (VGS) for a constant VDS. gm = ID / VGS at constant VDS
. (from transfer characteristics) The value of gm is expressed in mhos or siemens
(s).
Amplification Factor () :
It is given by the ratio of small change in drain to source
voltage (VDS) to the corresponding change in gate to
source voltage (VGS) for a constant drain current.
= VDS / VGS.
= (VDS / ID) X (ID / VGS)
= rd X gm.
Inference:
1. As the gate to source voltage (VGS) is increased above zero, pinch off
voltage is increased at a smaller value of drain current as compared to that
when VGS =0 V
2. The value of drain to source voltage (VDS) is decreased as compared to that
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when VGS =0V

Result:
1. Drain Resistance (rd) = .
2. Transconductance (gm) = .
3. Amplification factor () =
Viva Questions:
1.
What is trans conductance?
2.
Why current gain is important parameter in BJT where as

conductance is important parameter in FET?
3.
What is pinch off voltage
4.
How can avalanche breakdown be avoided in FET
5.
Why does FET produce less electrical noise than BJT.
6.
Why FET is called as a unipolar transistor?
7.
What are the advantages of FET over BJT?
8.
State why FET is voltage controlled device?
9.
Why thermal runaway does not occur in FET?
10 .What is the difference between MOSFET and FET?
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EX NO:
HALF WAVE RECTIFIER
AIM:
1. To plot Output waveform of the Half Wave Rectifier.
2. To find ripple factor for Half Wave Rectifier using the formulae.
3. To find the efficiency, Vp(rect), Vdc for Half Wave Rectifier.
HARDWARE REQUIRED:
S. No
Apparatus
Type
Range
Quantity
01
Transformer
6-0-6 V
02
Resistance
470 ohm
03
Capacitor
470F
04
Diode
Bread board and
connecting wires
05
IN4001
INTRODUCTION:
A device is capable of converting a sinusoidal input waveform into a
nidirectional waveform with non zero average component is called a rectifier.
A practical half wave rectifier with a resistive load is shown in the circuit
iagram. During the positive half cycle of the iniput the diode conducts and all the
input voltage is dropped across RL. During the negative half cycle the diode is
reverse biased and is in FF state and so the output voltage is zero.
The filter is simply a capacitor connected from the rectifier output to ground.
The capacitor quickily charges at the beginning of a cycle and slowly discharges
through RL after the positive peak of the input voltge. The variation in the capacitor
voltage due to charging and discharging is called ripple voltage. Generally, ripple is
undesirable, thus the smaller the ripple, the better the filtering action.
Ripple factor is an indication of the effectiveness of the filter and
is defined as R=Vr(pp)/V DC
Where Vr(pp) = Ripple voltage
Vdc= Peak rectified voltage.
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The ripple factor can be lowered by increasing the value of the filter capacitor
or increasing the load capacitance.
MATHEMATICAL ANALYSIS (Neglecting Rf and Rs)
Let Vac = Vm sint is the input AC signal, the current Iac flows only for one
half cycle i.e from t
= 0 to t = , where as it is zero for the duration t
2 Therefore, Iac = = Im sint 0 t
= 0 t 2
Where
Im = maximum value of current
Vm = maximum value of voltage
AVERAGE OR DC VALUE OF CURRENT
Vdc = Vm /
The RMS VALUE OF CURRENT
Vrms = Vm/2
RECTIFICATION FACTOR:
The ratio of output DC power to the input AC power is defined as
efficiency Output power = I2dcR
Input power = I2rms(R+Rf)
Where Rf forward resistance of the diode
= Pdc/Pac = I2dcR/ I2rms (R+Rf)
PERCENTAGE OF REGULATION:
It is a measure of the variation of AC output voltage as a function of DC
output Voltage
Percentage of regulation
VNL = Voltage across load resistance, When minimum current flows though it.
VFL = Voltage across load resistance, When maximum current flows through.
For an ideal half-wave rectifier, the percentage regulation is 0 percent. For a

practical half wave
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Peak inverse voltage PIV:

It is the maximum voltage that has to be with stood by a diode when it is reverse
biased
PIV = Vm
MODEL GRAPH:
PRECAUTIONS:
1. While doing the experiment do not exceed the ratings of the diode. This may lead
to damage the diode.
2. Connect CRO using probes properly as shown in the circuit diagram.
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EXPERIMENT:
1. Connections are given as per the circuit diagram without capacitor.
2. Apply AC main voltage to the primary of the transformer. Feed the rectified output
voltage to the CRO and measure the time period and amplitude of the waveform.
3. Now connect the capacitor in parallel with load resistor and note down the
amplitude and timeperiod of the waveform.
4. Measure the amplitude and timeperiod of the transformer secondary(input
waveform) by connecting CRO.
5. Plot the input, output without filter and with filter waveform on a graph sheet.
6. Calculate the ripple factor.
GRAPH ( instructions):
of the graph sheet.
2. Now mark x-axis as Time
y-axis as Voltage
3. Mark the readings tabulated for Amplitude as Voltage and Time in
graph sheet.
FORMULAE:
Peak to Peak Ripple Voltage, Vr(pp)=(1/fRLC)Vp(rect)
Vp(rect) = Unfiltered Peak Rectified Voltage
Vdc=(1-1/(2fRLC))Vp(rect)
Ripple Factor = Vr(pp)/Vdc
OBSERVATIONS:
Input Waveform
Output Waveform
Ripple Voltage
Amplitude
Time Period
Frequency
RESULT:
The Rectified output Voltage of Half Wave Rectifier Circuit is observed
and the calculated value of ripple factor is _______________
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EX NO:
FULL WAVE RECTIFIER
AIM:
1. To plot Output waveform of the Full Wave Rectifier.
2. To find ripple factor for Full Wave Rectifier using the formulae.
3. To find the efficiency, Vp(rect), Vdc for Full Wave Rectifier.
HARDWARE REQUIRED:
S. No
Apparatus
Type
Range
Quantity
01
Transformer
6-0-6 V
02
Resistance
470 ohm
03
Capacitor
470F
04
Diode
05
Bread board and

connecting wires
IN4001
INTRODUCTION:
unidirectional waveform with non zero average component is called a rectifier.
A practical half wave rectifier with a resistive load is shown in the circuit
diagram. It consists of two half wave rectifiers connected to a common load. One
rectifies during positive half cycle of the input and the other rectifying the negative
half cycle. The transformer supplies the two diodes (D1 and D2) with sinusoidal
input voltages that are equal in magnitude but opposite in phase.
During input positive half cycle, diode D1 is ON and diode D2 is OFF.
During negative half cycle D1 is OFF and diode D2 is ON.
Generally, ripple is undesirable, thus the smaller the ripple, the better the
filtering action.
Ripple factor is an indication of the effectiveness of the filter and is defined
as R=Vr(pp)/Vdc
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The ripple factor can be lowered by increasing the value of the filter capacitor or
increasing the load capacitance.
MATHEMATICAL ANALYSIS (Neglecting Rf and Rs)
The current through the load during both half cycles is in the same direction
and hence it is the sum of the individual currents and is unidirectional Therefore, I =
Id1 + Id2 The individual currents and voltages are combined in the load and there
fore their average values are double that obtained in a half wave rectifier circuit.
AVERAGE OR DC VALUE OF CURRENT Idc
The RMS VALUE OF CURRENT
RECTIFICATION FACTOR
The ratio of output DC power to the input AC power is defined as efficiency
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= 81% (if R >> Rf . then Rf can be neglected)
PERCENTAGE OF REGULATION
It is a measure of the variation of AC output voltage as a function of DC
output voltage.
V
NL
VFL
100%
V
FL
For an ideal Full-wave rectifier. The percentage regulation is 0 percent.

Peak Inverse Voltage (PIV)
It is the maximum voltage that has to be with stood by a diode when it is
reverse biased
PIV = 2Vm
Advantages of Full wave Rectifier
1. is reduced
2. is improved
Disadvantages of Full wave Rectifier
1. Output voltage is half the secondary voltage
2. Diodes with high PIV rating are used
Manufacturing of center-taped transformer is quite expensive and so Full
wave rectifier with
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MODEL GRAPH:
PRECAUTIONS:
EXPERIMENT:
2. Apply AC main voltage to the primary of the transformer. Feed the
rectified output voltage to the CRO and measure the time period and
amplitude of the waveform.
3. Now connect the capacitor in parallel with load resistor and note down
the amplitude and time period of the waveform.
4. Measure
the
amplitude
and
time
period
of
the
transformer
secondary(input waveform) by connecting CRO.

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of the graph sheet.
y-axis as Voltage
3. Mark the readings tabulated for Amplitude as Voltage and Time in
graph sheet.
Formulae:
Peak to Peak Ripple Voltage, Vr(pp)=(1/2fRLC)Vp(rect)
Observations:
Input Waveform
Output Waveform
Ripple Voltage
Amplitude
Time Period
Frequency
Result:
The Rectified output Voltage of Full Wave Rectifier Circuit is observed
and the calculated value of ripple factor is ______________
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EX NO:
FULL WAVE BRIDGE RECTIFIER
AIM:
1. To plot Output waveform of the Full Wave Bridge Rectifier.
2. To find ripple factor for Full Wave Bridge Rectifier using the formulae.
3. To find the efficiency, Vp(rect), Vdc for Full Wave Bridge Rectifier.
Hardware Required:
S. No
Apparatus
Type
Range
Quantity
01
Transformer
6-0-6 V
02
Resistance
470 ohm
03
Capacitor
470F
04
Diode
05
Bread board and

connecting wires
IN4001
Introduction:
unidirectional waveform with non zero average component is called a rectifier.
The Bridege rectifier is a circuit, which converts an ac voltage to dc voltage
using both half cycles of the input ac voltage. The Bridege rectifier has four diodes
connected to form a Bridge. The load resistance is connected between the other two
ends of the bridge.
For the positive half cycle of the input ac voltage, diode D1 and D3 conducts
whereas diodes D2 and D4 remain in the OFF state. The conducting diodes will be
in series with the load resistance RL and hence the load current flows through RL .
For the negative half cycle of the input ac voltage, diode D2 and D4 conducts
whereas diodes D1 and D3 remain in the OFF state. The conducting diodes will be
in series with the load resistance RL and hence the load current flows through RL in
the same direction as in the previous half cycle. Thus a bidirectional wave is
converted into a unidirectional wave.
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Ripple factor is an indication of the effectiveness of the filter and is defined

as R=Vr(pp)/Vdc
The ripple factor can be lowered by increasing the value of the filter capacitor
or increasing the load capacitance.
Prelab Questions:
1. What are the advantages of bridge rectifier over center tapped full
wave rectifier?
2. What is the PIV rating of diode in bridge rectifier?
3. Can we use zener diode in case pn junction diode? Justify your answer.
MODEL GRAPH:
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Precautions:
Experiment:
2. Apply AC main voltage to the primary of the transformer. Feed the
rectified output voltage to the CRO and measure the time period and
amplitude of the waveform.
3. Now connect the capacitor in parallel with load resistor and note down
the amplitude and time period of the waveform.
4. Measure
the
amplitude
and
time
period
of
the
transformer
secondary(input waveform) by connecting CRO.

1. Take a graph sheet and divide it into 2 equal parts. Mark origin at the center of
the graph sheet.
y-axis as Voltage
.
3. Mark the readings tabulated for Amplitude as Voltage and Time in graph sheet.
Formulae:
Peak to Peak Ripple Voltage, Vr(pp)=(1/2fRLC)Vp(rect)
77
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Observations:
Input Waveform
Output Waveform
Ripple Voltage
Amplitude
Time Period
Frequency
Result:
The Rectified output Voltage of Full Wave Rectifier Circuit is observed
and the calculated value of ripple factor is _______________
Viva Questions:
1. A diode should not be employed in the circuits where it is to carry more than
its maximum forward current, why?
2. While selecting a diode, the most important consideration is its PIV, why?
3. The rectifier diodes are never operated in the breakdown region, why?
4. How big should be the value of capacitor to reduce the ripple to 0.1?
5. What happens when we remove capacitor in the rectifier circuit?
6. If a transformer is removed from the rectifier circuit, what happens to the circuit?
78
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EX NO:
79
FREQUENCY RESPONSE OF COMMON EMITTER

AMPLIFIER
VEL TECH
80
VEL TECH
81
VEL TECH
82
VEL TECH
DIFFERENTIAL AMPLIFIER
CIRCUIT DIAGRAM:
83
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EX NO:
DIFFERENTIAL AMPLIFIER
AIM:
To construct a Differential amplifier in Common mode & Differential mode
configuration and to find common mode rejection ratio.
APPARATUS REQUIRED
S.No
Item
Type
Transistor
BC107
Capacitor
Resistor
Bread board
Range
Qty
1
470F
3.9K
3.3K
1
1
THEORY:
The Differential amplifier circuit is an extremely popular connection used in

IC units. The circuit has separate inputs , two separate outputs and emitters are
connected together. If the same input is applied to both inputs, the operation is
called common mode. In double ended operation two input signals are applied ,
the difference of the inputs resulting in outputs from both collectors due to the
difference of the signals applied to both the inputs. The main feature of the
differential amplifier is the very large gain when opposite signals are applied to
inputs as compared to small signal resulting from common input. The ratio of this
difference gain to the common gain is called common mode rejection ratio.
PROCEDURE:
DIFFERENTIAL MODE:
2. Set V1 = 50mv and V2 =55mv using the signal generator.
3. Find the corresponding output voltages across V01 & V02 using CRO
4.
84
Calculate common mode rejection ratio using the given formula.

VEL TECH
COMMON MODE:
2. Set V1 = 50mv using the signal generator.
3. Find the output voltage across Vo using multimeter.
4. Calculte common mode rejection ratio using the given formula.
CALCULATION:
Common mode rejection ratio(CMRR) = Ad / Ac
Ad = Differential mode gain
Ac = Common mode gain
Where Ad = Vo /Vd
Vo = Output voltage measured across CRO
Vd = V 1 V2 , V 1 , V2 input voltage applied.
Ac = Vo /Vc
Vc = (V 1 + V2 )/2
COMMON MODE:
DIFFERENTIAL MODE:
V1
V2
Output voltage
Vd= V1-V2
Ad=Vo/Vd
RESULT:
Input voltage
Output voltage
V1=V2
Vc=(V1+V2)/2
Thus the differential amplifier was constructed in common mode
and Differential mode configuration. Further common mode rejection ratio was
found
85
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86
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HARTELY OSCILLATOR

TIME PERIOD (mS)

0.1 f , 0.01 f, 100 f

TIME PERIOD (mS)

RC PHASE SHIFT OSCILLATOR

RC PHASE SHIFT OSCILLATOR

0.1 f , 0.01 f, 10f

WEIN BRIDGE OSCILLATOR

WEIN BRIDGE OSCILLATOR

0.1 f , 0.01 f, 10f

DESIGN OF PASSIVE FILTERS

TIME PERIOD (S)

TIME PERIOD (S)

Regulated power supply

Bread board and

junction is lowered by an amount equal to given forward biasing voltage.

Calculations from Graph:

ZENER DIODE CHARACTERISTICS

Regulated power supply

Bread board and

Such rupture leads to the generation of a large number of charge carriers

Calculations from Graph:

COMMON EMITTER CONFIGURATION

Regulated power supply

Bread board and

Repeat above procedure (step 3) for various values of VCE

Repeat above procedure (step 3) for different values of IE

1. Plot the input characteristics by taking VBE on Y-axis and IB on X-axis

Calculations from graph:

COMMON COLLECTOR CONFIGURATION

Regulated power supply

Bread board and

2. Connect voltmeter and Ammeter in correct polarities as shown in the

Calculations from graph:

EX NO: CHARACTERISTICS OF CB CONFIGURATION USING BJT

In this configuration the base is made common to both the input

AIM: To observe the characteristics of UJT and to calculate the Intrinsic

Regulated power supply

Bread board and

5. A graph is plotted between VEE and IE for different values of VBE.

RESULT: The characteristics of UJT are Observed.

Regulated power supply

Bread board and

Calculations from Graph:

Regulated power supply

Bread board and

The field effect transistor (FET) is made of a bar of N type material

Pin assignment of FET:

Calculations from Graph:

when VGS =0V

What is trans conductance?

Why current gain is important parameter in BJT where as

What is pinch off voltage

How can avalanche breakdown be avoided in FET

Why does FET produce less electrical noise than BJT.

Why FET is called as a unipolar transistor?

What are the advantages of FET over BJT?

State why FET is voltage controlled device?

Why thermal runaway does not occur in FET?

10 .What is the difference between MOSFET and FET?

HALF WAVE RECTIFIER

For an ideal half-wave rectifier, the percentage regulation is 0 percent. For a

Peak inverse voltage PIV:

FULL WAVE RECTIFIER