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POORNIMA COLLEGE OF ENGINEERING

EXPERIMENT NO: 8
OBEJECTIVE:
Study and test 3-phase diode bridge rectifier with R and RL loads. Study the effect of filters.

APPEARTUS REQURIED:
1)
2)
3)
4)

230 V power supply


3-Phase uncontrolled bridge convertor Trainer Kit
CRO
Connecting Leads

CIRCUIT DIAGRAM:

Power Electronisc-III

Mr. Nemi Chand Koli

Technical Officer-EE

POORNIMA COLLEGE OF ENGINEERING

THEORY:
RESISTIVE LOAD
Single-phase diode rectifiers require a rather high transformer VA rating for a given dc output power.
Therefore, these rectifiers are suitable only for low to medium power applications. For power output
higher than 15 kW, three-phase or poly-phase diode rectifiers should be employed. There are two types
of three-phase diode rectifier that convert a three-phase ac supply into a dc voltage, namely, half (star)
rectifiers and bridge rectifiers., the diodes and the transformers are considered to be ideal, i.e. the diodes
have zero forward voltage drop and reverse current, and the transformers possess no resistance and no
leakage inductance. Furthermore, it is assumed that the load is purely resistive, such that the load
voltage and the load current have similar waveforms.
RLE LOAD
This type of load may represent a dc motor or a battery. Usually for driving these loads a variable output
voltage is required. This requirement has to be met by using a variable ac source (e.g. a 3 phase variable)
since the average output voltage of an uncontrolled rectifier is constant for a given ac voltage.
It will also be assumed in the following analysis that the load side inductance is large enough to keep the
load current continuous. The relevant condition for continuous conduction will be derived but analysis
of discontinuous conduction mode will not be attempted. Compared to single phase converters the cases
of discontinuous conduction in 3 phase bridge converter are negligible.
OPERATION OF THREE-PHASE BRIDGE RECTIFIERS
The circuit of a three-phase bridge rectifier is shown in Fig. The diodes are numbered in the order of
conduction sequences and the conduction angle of each diode is 2/3. The load current is assumed to be
continuous at least one diode from the top group (D , D and D ) and one diode from the bottom group
1 3
5
(D , D and D ) must conduct at all time. It can be easily verified that only one diode from each group
2 4
6
(either top or bottom) conducts at a time and two diodes from the same phase leg never conducts
simultaneously. Thus the converter has six different diode conduction modes. These are D D , D D ,
1 2 2 3
D D , D D , D D and D D . Each conduction mode lasts for /3 rad and each group diode conducts
3 4 4 5 5 6
6 1
for 120 and each arms diode conducts from after180o.
Shows voltages across different diodes and the output voltage in each of these conduction modes. The
time interval during which a particular conduction mode will be effective can be ascertained from this
table. For example the D D conduction mode will occur when the voltage across all other diodes (i.e.
1 2
v , v and v ) are negative. This implies that D D conducts in the interval 0 t /3 as shown in
ba ca
cb
1 2
Fig. The diodes have been numbered such that the conduction sequence is D D D D D
1
2
3
4
5
D D ---. When a diode stops conduction its current is commutated to another diode in the same
6
1
group (top or bottom). This way the sequence of conduction modes become, D D D D D D
1 2
2 3
3 4
Power Electronisc-III

Mr. Nemi Chand Koli

Technical Officer-EE

POORNIMA COLLEGE OF ENGINEERING


D D D D D D D D The output dc voltage can be constructed from this conduction
4 5
5 6
6 1
1 2
diagram using appropriate line voltage segments as specified in the conduction table.

The input ac line currents can be constructed from the conduction diagram and the output current. For
example
i = i for 0 t /3 and 5/3 t 2
a o
i = - i for 2/3 t 4/3
a
o
i = 0 otherwise.
a

THE RMS VALUE OF THE OUTPUT VOLTAGE

WAVEFORMS
Power Electronisc-III

Mr. Nemi Chand Koli

Technical Officer-EE

POORNIMA COLLEGE OF ENGINEERING

Power Electronisc-III

Mr. Nemi Chand Koli

Technical Officer-EE

POORNIMA COLLEGE OF ENGINEERING

RESULT
We have study of three phase uncontrolled bridge converter and draw various wave forms.

PRECAUTION
1) To make connection should be according to circuit diagram.
2) Connecting leads should not loose.
3) Connecting circuit should be check to be respected lab faculty after complete connection
Diagram.
4) Power Supply should not be ON during connecting leads to experimental kit.
5) Power supply should be OFF after performance of allotted practical

VIVA QUESTIONS:
Fill in the blank(s) with the appropriate word(s).
i) Three phase full wave uncontrolled rectifier uses _________ diodes.
ii) Three phase full wave uncontrolled rectifier does not require ________ wire connection.
iii) In a three phase full wave uncontrolled rectifier each diode conducts for _______ radians.
iv) The minimum frequency of the output voltage ripple in a three phase full wave rectifier is _________
times the input voltage frequency.
v) The input ac line current of a three phase full wave uncontrolled rectifiers supplying an R L E load
contain only ________ harmonics but no ________ harmonic or __________ component.
vi) A three phase full wave uncontrolled rectifier supplying an R L E load normally operates in the
________ conduction mode.
Answers: (i) six; (ii) neutral; (iii) 2/3; (iv) six; (v) odd, tripler, dc; (vi) continuous.

Power Electronisc-III

Mr. Nemi Chand Koli

Technical Officer-EE

POORNIMA COLLEGE OF ENGINEERING

EXPERIMENT NO: 9
OBEJECTIVE:
Study and obtain waveforms of single-phase half wave controlled rectifier with and without
Filters. Study the variation of output voltage with respect to firing angle.

APPEARTUS REQURIED:
1)
2)
3)
4)
5)

230 V power supply


1-Phase half bridge convertor Trainer Kit
Oscilloscope
Multimeter
Connecting Leads

CIRCUIT DIAGRAM:

Power Electronisc-III

Mr. Nemi Chand Koli

Technical Officer-EE

POORNIMA COLLEGE OF ENGINEERING


PROCEDURE:
Make sure that there should not be any connections by patch cord on the board
1.
Rotate the firing control Potentiometers 1 and 2 in full counter clockwise direction and also
switch set at Potentiometer 1 side.
2.
Switch On the power supply
3.
Measure the AC voltage (Vrms) by voltmeter between point 0V-15V and calculate Em by Em
=1.414 X Vrms.
4.
Switch Off the power.
5.
Connect the circuit of half wave rectifier as shown figure 6 using 2 mm patch cords.
6.
Switch On the power supply
7.
Connect the Oscilloscope and voltmeter across the load.
8.
Vary the firing control Potentiometer and set on 30, 60, 90, 120 and 150 firing angles using
equation
9.
Observe the output waveforms and note the readings of voltage across load on different firing
angles.
10.
Observe the waveform across the SCR1 when firing angle is 90.
11.
Calculate the average load current IDC and power PDC from measured load voltage Vo.
12.
Plot the input signal, gate pulse, and drop signal across SCR and output waveforms when firing
angle is 90.

THEORY
R LOAD
The thyristor conducts only when the anode is positive with respect to cathode and a positive gate signal
is applied, otherwise, it remains in the forward blocking state and blocks the flow of the load current At
t = 0 when the input supply voltage becomes positive the thyristor T becomes forward biased.
However, unlike a diode, it does not turn ON till a gate pulse is applied at t = . During the period 0 <
t , the thyristor blocks the supply voltage and the load voltage remains zero. Consequently, no load
current flows during this interval. As soon as a gate pulse is applied to the thyristor at t = it turns ON.
The voltage across the thyristor collapses to almost zero and the full supply voltage appears across the
load. From this point onwards the load voltage follows the supply voltage. The load being purely
resistive the load current io is proportional to the load voltage. At t = as the supply voltage passes
through the negative going zero crossing the load voltage and hence the load current becomes zero and
tries to reverse direction. In the process the thyristor undergoes reverse recovery and starts blocking the
negative supply voltage. Therefore, the load voltage and the load current remains clamped at zero till the
thyristor is fired again at t = 2 + . The same process repeats there after.
The average DC output voltage across load is given by
VDC = Em (1+cos )/2
Average current is given by
IDC = Em (1 + cos )/2R
And, the DC output power is
PDC = VDC X IDC

Power Electronisc-III

Mr. Nemi Chand Koli

Technical Officer-EE

POORNIMA COLLEGE OF ENGINEERING

(a)

For R Load (30o)

(b) For R Load (90o)

RESULT
Study and obtain waveforms of single-phase half wave controlled rectifier with and without
Filters. Study the variation of output voltage with respect to firing angle.
PRECAUTION
1) To make connection should be according to circuit diagram.
2) Connecting leads should not loose.
3) Connecting circuit should be check to be respected lab faculty after complete connection
Diagram.
4) Power Supply should not be ON during connecting leads to experimental kit.
5) Power supply should be OFF after performance of allotted practical
VIVA QUESTIONS:
Fill in the blank(s) with appropriate word(s)
i) In a single phase fully controlled converter the _________ of an uncontrolled converters are replaced
by ____________.
ii) In a fully controlled converter the load voltage is controlled by controlling the _________ of the
converter.
iii) A single phase half wave controlled converter always operates in the ________ conduction mode.
iv) The voltage form factor of a single phase fully controlled half wave converter with a resistive
inductive load is _________ compared to the same converter with a resistive load.
v) The load current form factor of a single phase fully controlled half wave converter with a resistive
inductive load is _________ compared to the same converter with a resistive load.
Answers: (i) diodes, thyristors; (ii) firing angle; (iii) discontinuous (iv) poorer; (v) better.
Power Electronisc-III

Mr. Nemi Chand Koli

Technical Officer-EE

POORNIMA COLLEGE OF ENGINEERING

EXPERIMENT NO: 10
OBEJECTIVE:
Study and obtain waveforms of single-phase half controlled bridge rectifier with R and RL
Loads.

APPEARTUS REQURIED:
1)
2)
3)
4)
5)

230 V power supply


1-Phase half bridge convertor Trainer Kit
Oscilloscope
Multimeter
Connecting Leads

CIRCUIT DIAGRAM:

Power Electronisc-III

Mr. Nemi Chand Koli

Technical Officer-EE

POORNIMA COLLEGE OF ENGINEERING

PROCEDURE:
Make sure that there should not be any connections by patch cord on the board
1.
Rotate the firing control Potentiometers 1 and 2 in full counter clockwise direction and also
switch set at Potentiometer 1 side.
2.
Switch On the power supply
3.
Measure the AC voltage (Vrms) by voltmeter between point 0V-15V and calculate Em by Em
=1.414 X Vrms.
4.
Switch Off the power.
5.
Connect the circuit of half wave rectifier as shown figure 6 using 2 mm patch cords.
6.
Switch On the power supply
7.
Connect the Oscilloscope and voltmeter across the load.
8.
Vary the firing control Potentiometer and set on 30, 60, 90, 120 and 150 firing angles using
equation
9.
Observe the output waveforms and note the readings of voltage across load on different firing
angles.
10.
Observe the waveform across the SCR1 when firing angle is 90.
11.
Calculate the average load current IDC and power PDC from measured load voltage Vo.
12.
Plot the input signal, gate pulse, and drop signal across SCR and output waveforms when firing
angle is 90.

THEORY
R LOAD
The thyristor conducts only when the anode is positive with respect to cathode and a positive gate signal
is applied, otherwise, it remains in the forward blocking state and blocks the flow of the load current At
t = 0 when the input supply voltage becomes positive the thyristor T becomes forward biased.
However, unlike a diode, it does not turn ON till a gate pulse is applied at t = . During the period 0 <
t , the thyristor blocks the supply voltage and the load voltage remains zero. Consequently, no load
current flows during this interval. As soon as a gate pulse is applied to the thyristor at t = it turns ON.
The voltage across the thyristor collapses to almost zero and the full supply voltage appears across the
load. From this point onwards the load voltage follows the supply voltage. The load being purely
resistive the load current io is proportional to the load voltage. At t = as the supply voltage passes
through the negative going zero crossing the load voltage and hence the load current becomes zero and
tries to reverse direction. In the process the thyristor undergoes reverse recovery and starts blocking the
negative supply voltage. Therefore, the load voltage and the load current remains clamped at zero till the
thyristor is fired again at t = 2 + . The same process repeats there after.
The average DC output voltage across load is given by
VDC = Em (1+cos )/2
Average current is given by
IDC = Em (1 + cos )/2R
And, the DC output power is
PDC = VDC X IDC
Power Electronisc-III

Mr. Nemi Chand Koli

Technical Officer-EE

POORNIMA COLLEGE OF ENGINEERING

R-L LOAD
As in the case of a resistive load, the thyristor T becomes forward biased when the supply voltage
becomes positive at t = 0. However, it does not start conduction until a gate pulse is applied at t = .
As the thyristor turns ON at t = the input voltage appears across the load and the load current starts
building up. However, unlike a resistive load, the load current does not become zero at t = , instead it
continues to flow through the thyristor and the negative supply voltage appears across the load forcing
the load current to decrease. Finally, at t = ( > ) the load current becomes zero and the thyristor
undergoes reverse recovery. From this point onwards the thyristor starts blocking the supply voltage and
the load voltage remains zero until the thyristor is turned ON again in the next cycle. It is to be noted
that the value of depends on the load parameters. Therefore, unlike the resistive load the average and
RMS output voltage depends on the load parameters. Since the thyristors does not conduct over the
entire input supply cycle this mode of operation is called the discontinuous conduction mode.

Power Electronisc-III

Mr. Nemi Chand Koli

Technical Officer-EE

POORNIMA COLLEGE OF ENGINEERING

WAVEFORM:

(a) For R Load

(b) For R-L Load

RESULT
Study and obtain waveforms of single-phase half controlled bridge rectifier with R and RL
Loads.

PRECAUTION
1) To make connection should be according to circuit diagram.
2) Connecting leads should not loose.
3) Connecting circuit should be check to be respected lab faculty after complete connection
Diagram.
4) Power Supply should not be ON during connecting leads to experimental kit.
5)
6) Power supply should be OFF after performance of allotted practical

Power Electronisc-III

Mr. Nemi Chand Koli

Technical Officer-EE

POORNIMA COLLEGE OF ENGINEERING

VIVA QUESTIONS:
Fill in the blank(s) with appropriate word(s)
i) In a single phase fully controlled converter the _________ of an uncontrolled converters are replaced
by ____________.
ii) In a fully controlled converter the load voltage is controlled by controlling the _________ of the
converter.
iii) A single phase half wave controlled converter always operates in the ________ conduction mode.
iv) The voltage form factor of a single phase fully controlled half wave converter with a resistive
inductive load is _________ compared to the same converter with a resistive load.
v) The load current form factor of a single phase fully controlled half wave converter with a resistive
inductive load is _________ compared to the same converter with a resistive load.
Answers: (i) diodes, thyristors; (ii) firing angle; (iii) discontinuous (iv) poorer; (v) better.

Power Electronisc-III

Mr. Nemi Chand Koli

Technical Officer-EE

POORNIMA COLLEGE OF ENGINEERING

EXPERIMENT NO: 11
OBEJECTIVE:
Study and obtain waveforms of single-phase full controlled bridge converter with R and RL
loads. Study and show rectification and inversion operations.

APPEARTUS REQURIED:
1)
2)
3)
4)
5)

230 V power supply


1-Phase half bridge convertor Trainer Kit
Oscilloscope
Multimeter
Connecting Leads

CIRCUIT DIAGRAM:

(a) 1-phase Full wave convertor with R Load

(b) 1-phase Full wave convertor with RL Load (RECTIFICATION)

(c) 1-phase Full wave convertor with RL Load (INVERSION MODE)


Power Electronisc-III

Mr. Nemi Chand Koli

Technical Officer-EE

POORNIMA COLLEGE OF ENGINEERING

PROCEDURE:
Make sure that there should not be any connections by patch cord on the board.
1.
Rotate the firing control Potentiometer in full clockwise direction.
2.
Switch On the power supply
3.
Measure the AC voltage (Vrms) by voltmeter between point 0V-15V and calculate Em by Em
=1.414 X Vrms.
4.
Switch Off the power supply
5.
Connect the circuit of fully-controlled bridge rectifier as shown figure 11 using 2 mm patch
cords.
6.
Switch On the power supply
7.
Connect the Oscilloscope and voltmeter across the load.
8.
Vary the firing control Potentiometer and set on 30, 60, 90, 120 and 150 firing angles using
equation
9.
Observe the output waveforms and note the readings of voltage across load on different firing
angle.
10.
Connect the Oscilloscope one by one across SCR1, SCR2, and SCR3 & SCR4 and observe the
waveform when firing angle is 90 respectively.
11.
Calculate the average load IDC current and power PDC from measured loadvoltage Vo.
12.
Plot the input signal, gate pulse, and drop signal across SCR and output waveforms when firing
angle is 90.

THEORY:
A single-phase fully controlled bridge circuit with resistive load consists of four thyristor as shown in
figure. During the positive half cycle when terminal P is positive w.r.t.Q, thyristors T 1 and T2 are in
the forward blocking state and when these thyristors fire simultaneously at t = , the load is connected
to the input through T1 and T2 Thyristors T1 and T2 are fired together while T3 and T4 are fired 180
after T1 and T2. From the circuit diagram of Fig it is clear that for any load current to flow at least one
thyristor from the top group (T1, T3) and one thyristor from the bottom group (T 2, T4) must conduct. It
can also be argued that neither T1T3 nor T2T4 can conduct simultaneously. For example whenever T3
and T4 are in the forward blocking state and a gate pulse is applied to them, they turn ON and at the
same time a negative voltage is applied across T1 and T2 commutating them immediately. Similar
argument holds for T1 and T2. For the same reason T1T4 or T2T3 can not conduct simultaneously.
Therefore, the only possible conduction modes when the current i0 can flow are T1T2 and T3T4.

R LOAD
A single-phase fully controlled bridge circuit with resistive load consists of four thyristor as shown in
figure. During the positive half cycle when terminal P is positive w.r.t.Q, thyristors T1 and T2 are in
the forward blocking state and when these thyristors fire simultaneously at t = , the load is connected
Power Electronisc-III

Mr. Nemi Chand Koli

Technical Officer-EE

POORNIMA COLLEGE OF ENGINEERING


to the input through T1 and T2. During negative half cycle i.e., after t = , thyristor T3 and T4 are in
the forward blocking state, and simultaneous firing of these thyristors reverse biases the previously
conducting thyristors T1 and T2. These reverse biased thyristors turn off due to line or natural
commutation and the load current transfers from T1 and T2 to T3 and T4. The voltage and current
waveforms are shown in figure.
The average DC voltage across load is
VDC = Em (1+cos )/
The average load current is
IDC = Em (1+cos )/R
Therefore, the DC output power is
PDC = VDC XIDC

RLE LOAD
The circuit diagram of a single phase fully controlled bridge converter. It is one of the most popular
converter circuits and is widely used in the speed control of separately excited dc machines. Indeed, the
RLE load shown in this figure may represent the electrical equivalent circuit of a separately excited dc
motor.
WAVE FORMS:

Power Electronisc-III

Mr. Nemi Chand Koli

Technical Officer-EE

POORNIMA COLLEGE OF ENGINEERING

(a) For RL Load (RECTIFICATION MODE)

(b) For RL Load (INVERSION MODE)

RESULT
Study and obtain waveforms of single-phase full controlled bridge converter with R and RL
Loads. Study and show rectification and inversion operations.

PRECAUTION
1) To make connection should be according to circuit diagram.
2) Connecting leads should not loose.
3) Connecting circuit should be check to be respected lab faculty after complete connection
Diagram.
4) Power Supply should not be ON during connecting leads to experimental kit.
5) Power supply should be OFF after performance of allotted practical

VIVA QUESTIONS:
Fill in the blank(s) with the appropriate word(s).
Power Electronisc-III

Mr. Nemi Chand Koli

Technical Officer-EE

POORNIMA COLLEGE OF ENGINEERING


i) A single phase fully controlled bridge converter can operate either in the _________ or ________
conduction mode.
ii) In the continuous conduction mode at least _________ thyristors conduct at all times.
iii) In the continuous conduction mode the output voltage waveform does not depend on the ________
parameters.
iv) The minimum frequency of the output voltage harmonic in a single phase fully controlled bridge
converter is _________ the input supply frequency.
v) The input displacement factor of a single phase fully controlled bridge converter in the continuous
conduction mode is equal to the cosine of the ________ angle.
Answer: (i) continuous, discontinuous; (ii) two; (iii) load; (iv) twice; (v) firing.

EXPERIMENT NO.:2
OBJECTIVE:
Study and plot V-I Characteristic of SCR

APPARATUS REQUIRED:
1. SCR Characteristic Trainer
2. 2mm Patch cords
3. Power Supply

CIRCUIT DIAGRAM:-

Power Electronisc-III

Mr. Nemi Chand Koli

Technical Officer-EE

POORNIMA COLLEGE OF ENGINEERING

PROCEDURE:
1.

2.
3.
4.
5.
6.
7.
8.
9.

Connect terminal1 to terminal 4, terminal 2 to terminal 8 and terminal 3 to terminal 12 as shown in


figure 11.
Connect Voltmeter across terminal 7 and 8 and Ammeter across terminal 9 and10 as shown in figure
12.
Make short terminals 5 and 6.
Rotate the knob P1 and P2 fully in counter clockwise.
Switch ON the power supply.
Set the value of Anode Voltage at 35V by using the knob P1.
Now Increases gate current Ig gradually by varying knob P2 and observe it.
At certain value of gate current, voltmeter reading falls down to almost zero.This action indicates
the firing of SCR.
Note the gate current value at this position (firing of SCR).

Power Electronisc-III

Mr. Nemi Chand Koli

Technical Officer-EE

POORNIMA COLLEGE OF ENGINEERING


10.

Keep the gate current constant by shorting terminal 9 with 10 and connect Ammeter to the
terminal 5 and 6 (as in figure 13).

11.
12.

Rotate the potentiometer P1 fully in counter clockwise.


Rotate knob P1 (from initial position to its maximum limit) gradually and record Anode current
for respective value of anode voltages.
Plot the graph between anode voltage Va and anode current Ia.

13.

THEORYIntroduction:The Silicon Controlled Rectifier (SCR) is a semiconductor device that is a member of a family of control devices
known as Thyristors. The SCR is a three lead device with an anode and a cathode ( us with a standard diode)
plus a third control lead or gate .
Reverse Blocking Mode:
When cathode is made positive with respect to anode with switch S open , thyristor is reverse biased.Junctions
j1,j3 are seen to be reverse biased whereas junction j2 is forward biased. The device behaves as if two diodes are
connected in series with reverse voltage applied across them. A small leakage current of the order a few
milliamperes (or a few microamperes depending upon the SCR rating) flows. This is reverse blocking mode,
called the off-state,of the reverse blocking mode is shown by OP. If the reverse voltage is increased, then at a
critical breakdown level, called reverse breakdown voltage VBR , an avalanche occurs at J1 and J3 and the
reverse current increases rapidly. A large current associated with VBR gives rise to more losses in the SCR. This
may lead to thyristor damage as the junction temperature rise. It should, therefore, be ensured that maximum
working reverse voltage, across a thyristor does not exceed VBR. Reverse avalanche region is shown by PQ.
When reverse voltage applied across a SCR is less than VBR, the device offers high impedance in the reverse
direction. The SCR in the reverse blocking mode may therefore be treated as an open switch.
Note that I-V characteristic after avalanche breakdown during reverse blocking mode is applicable only when
load resistance is present, a large anode current associated with avalanche breakdown at VBR would cause
substantial voltage drop across load and as a result , I-V characteristic in third quadrant would bend to the of
vertical line at VBR .
Forward blocking mode:
When anode is positive with respect to the cathode, with gate circuit open thyristor is said to be forward biased. It
is seen from this figure that junctions J1,J3 are forward biased but junction J2 is reverse biased. In this mode, a
small current, called forward leakage current, flows . M represents the forward blocking mode of SCR. AS the
forward leakage current is small, SCR offers high impedance. Therefore, a SCR can be treated as an open switch
even in the forward blocking mode.
Forward conduction mode:
When anode to cathode forward voltage is increased with gate circuit open, reverse biased junction J2 will have
an avalanche breakdown at a voltage called forward break over voltage VBO. After this breakdown, thyristor gets
turned on with point M at once shifting to N and then to a point anywhere between N and K. Here NK represents
the forward conduction mode. A SCR can be brought from forward blocking mode to forward conduction mode
by turning it on by applying
(1) a positive gate pulse between gate and cathode or (2) a forward break over voltage across anode cathode.
Forward conduction mode NK shows that voltage drop across thyristor is of the order of 1 to 2 V depending upon
the rating of SCR. It may also be seen from NK that voltage drop across SCR increase slightly with an increase in
anode as voltage drop across SCR is quit small. This small voltage drop VT across the device is due to ohmic
drop in four layers. In forward conduction mode, thyristor is treated as a closed switch.
Power Electronisc-III

Mr. Nemi Chand Koli

Technical Officer-EE

POORNIMA COLLEGE OF ENGINEERING

APPLICATION
Power electronic systems are virtually in every electronic device. For example, around us:

DC/DC converters are used in most mobile devices (mobile phone, pda.) to maintain the voltage at a
fixed value whatever the charge level of the battery is. These converters are also used for electronic
isolation and power factor correction

AC/DC converters (rectifiers) are used every time an electronic device is connected to the mains
(computer, television...)
AC/AC converters are used to change either the voltage level or the frequency (international power
adapters, light dimmer). In power distribution networks AC/AC converters may be used to exchange
power between utility frequency 50 Hz and 60 Hz power grids.
DC/AC converters (inverters) are used primarily in UPS or emergency light. During normal electricity
condition, the electricity will charge the DC battery. During blackout time, the DC battery will be used to
produce AC electricity at its output to power up the appliances.

OBSERVATION TABLE:
S.NO
.
1
2
3
4
5
6
7
Power Electronisc-III

ANODE VOLTAGE Va V

Mr. Nemi Chand Koli

ANODE CURRENT Ia MA (
Ig = MA)

Technical Officer-EE

POORNIMA COLLEGE OF ENGINEERING


8
9
10

RESULT:
We have Study and plot V-I Characteristic of SCR.

PRECAUTION
1) To make connection should be according to circuit diagram.
2) Connecting leads should not loose.
3) Connecting circuit should be check to be respected lab faculty after complete connection
Diagram.
4) Power Supply should not be ON during connecting leads to experimental kit.
5) Power supply should be OFF after performance of allotted practical

VIVA QUESTIONS:
Q:1 What is holding current .
Q:2 What is latching current.
Q:3 Fill in the blank(s) with the appropriate word(s)
i. A thyristor is turned on by applying a ________________ gate current pulse when it is ________________
biased.
ii. Total turn on time of a thyristor can be divided into ________________ time ________________ time and
________________ time.
iii. During rise time the rate of rise of anode current should be limited to avoid creating local
________________.
iv. A thyristor can be turned off by bringing its anode current below ________________ current and applying a
reverse voltage across the device for duration larger than the ________________ time of the device.
v. Reverse recovery charge of a thyristor depends on the ________________ of the forward current just before
turn off and its ________________.

EXPERIMENT NO.:3
OBJECTIVE:
To study the V-I Characteristic of DIAC with positive, negative biasing and plot the curve between V & I.

APPARATUS REQUIRED:
1. DIAC Characteristic Trainer
2. 2mm Patch Cord
3. Power Supply
Power Electronisc-III

Mr. Nemi Chand Koli

Technical Officer-EE

POORNIMA COLLEGE OF ENGINEERING


CIRCUIT DIAGRAM:

PROCEDURE:
POSITIVE BIASING:
1.
Make the connections as shown in the above figure.
2.
Connect the +35V DC supply to the circuit by connecting the point 1 with point 4 with the help
of patch cord.
3.
Rotate the potentiometer P1 in fully anti-clock wise direction.
4.
Now connect point 2 with point 8 to make the grounds common.
5.
Connect the voltmeter across the DIAC. For that connect the +Ve terminal of Voltmeter with the
point 7 and connect the -Ve terminal of the voltmeter with the point 8.
6.
Now connect the Ammeter in the circuit for that connect the +Ve terminal of the ammeter to the
point 5 and connect the -Ve terminal of the Ammeter to the point 6.
7.
Connect the mains cord to the trainer & switch On the supply.
8.
Here you will observe that there is no current flow in the circuit and as well as no voltage across
the DIAC.
9.
Increase the voltage across the DIAC in steps of 1V by rotating the potentiometer P1 in
clockwise direction and note down the readings for Voltage and Current in the following table.
10.
Now plot the VI curve for taken readings.
NEGATIVE BIASING:
10.
Now connect the -35V DC supply to the circuit by connecting the point 3 with point 4 with the
help of patch cord.
11.
Repeat the process from step 3 to step 9.
12.
Now plot the VI curve for taken readings.

THEORY
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A cross - sectional view of a diac showing all layer and junction in fig. If voltage V12 with terminal 1 positive
with respect to terminal 2, exceed break over voltage Vbo1 and structure P1N2P2N3 conduct. In case terminal 2
positive with respect to terminal 1and when V21 exceeds break over voltage Vbo2 and structure N1P1N2P2
conduct. The term DIAC is obtained from capital letters. DIode works an AC.

The DIAC, or diode for alternating current, is a trigger diode that conducts current only after its breakdown
voltage has been exceeded momentarily. When this occurs, the resistance of the diode abruptly decreases,
leading to a sharp decrease in the voltage drop across the diode and, usually, a sharp increase in current flow
through the diode. The diode remains "in conduction" until the current flow through it drops below a value
characteristic for the device, called the holding current. Below this value, the diode switches back to its highresistance (non-conducting) state. This behavioris bidirectional, meaning typically the same for both
directions of current flow. DIACs have no gate electrode, unlike some other thyristors they are commonly
used to trigger, such as TRIACs. Some TRIACs contain a built-in DIAC in series with the TRIAC's "gate"
terminal for this purpose. DIACs are also called symmetrical trigger diodes due to the symmetry of their
characteristic curve. Because DIACs are bidirectional devices, their terminals are not labeled as anode and
cathode but as A1 and A2 or MT1 ("Main Terminal") and MT2.
DIAC is basically a two terminal parallel inverse combination of semiconductor layer that permits triggering
in either direction. The characteristic of the device clearly demonstrated that there is breakdown voltage in
either direction

DIAC CHARACTERISTICS:

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Volt-ampere characteristic of a diac is shown in figure. It resembles the English letter Z because of the
symmetrical switching characteristics for either polarity of the applied voltage.
The diac acts like an open-circuit until its switching or breakover voltage is exceeded. At that point the
diac conducts until its current reduces toward zero (below the level of the holding current of the device).
The diac, because of its peculiar construction, does not switch sharply into a low voltage condition at a
low current level like the SCR or triac. Instead, once it goes into conduction, the diac maintains an
almost continuous negative resistance characteristic, that is, voltage decreases with the increase in
current. This means that, unlike the SCR and the triac, the diac cannot be expected to maintain a low
(on) voltage drop until its current falls below a holding current level.

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OBSERVATION TABLE:
FORWARD BIASING:

S.NO
.
1
2
3
4
5
6
7
8
9
10

ANODE VOLTAGE Va (V)

ANODE CURRENT Ia (MA )

ANODE VOLTAGE Va (V)

ANODE CURRENT Ia (MA )

REVERSE BIASING:

S.NO
.
1
2
3
4
5
6
7
8
9
10

APPLICATION:
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Trigging for TRIAC
RESULT:
We have study the VI Characteristic of DIAC with positive, negative biasing and plot the curve
between V & I.

PRECAUTION
1) To make connection should be according to circuit diagram.
2) Connecting leads should not loose.
3) Connecting circuit should be check to be respected lab faculty after complete connection
Diagram.
4) Power Supply should not be ON during connecting leads to experimental kit.
5) Power supply should be OFF after performance of allotted practical

VIVA QUESTIONS:
(1) Fill in the blanks with the appropriate word(s).
(i) The width of the space charge region increases as the applied ______________ voltage increases.
(ii) The maximum electric field strength at the center of the depletion layer increases
Within
the reverse voltage.
(iii) Reverse saturation current in a power diode is extremely sensitive to ___________ variation.
(iv)

Donor atoms are _____________________ carrier providers in the p type and


_________________ carrier providers in the n type semiconductor materials.
(v) Forward current density in a diode is __________________________ proportional to the life time
of carriers.
Answer: (i) Reverse, (ii) increase, (iii) temperature, (iv) Minority Majority, (v) inversely

Power Electronisc-III

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EXPERIMENT NO.:4
OBJECTIVE:
To study the V-I Characteristic of TRIAC with positive & negative biasing and plot the curve between V
&I

APPARATUS REQUIRED:
1. TRIAC Characteristic Trainer
2. 2mm Patch Cords
3. Power supply

CIRCUIT DIAGRAM:

PROCEDURE:
VI Characteristic with Positive Biasing
1.
Make the connections as shown in the above figure.
2.
of patch cord.
3.
Rotate both the potentiometers in fully anti-clock wise direction.
4.
Now connect point 4 with point 9 to make the grounds common.
5.
Connect the Point 3 with point 13 to give a supply of 15V for gate current.
6.
Now connect the positive & negative terminal of Ammeter to point 6 and point 7 respectively to
measure Anode Current.
7.
Connect the positive & negative terminal of Voltmeter to point 8 and point 9 (Gnd) respectively
to measure Anode Voltage.
8.
Connect the point 10 with point 11.
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9.
10.
11.

Connect the mains cord to the trainer & switch On the power supply.
Rotate the pot P1 and increase the anode voltage slowly. Here you will see that the anode current
will be zero for all the values of anode voltage.
Now remove the Ammeter between points 6 & 7 & connect across the point 11 and 10
respectively.

12.
13.
14.
15.

Set the value of gate current near about 0.5mA using pot P2.
Rotate the potentiometer P1 in fully anti-clock wise direction.
Now again connect the ammeter across the point 6 and point 7, and short the point 10 and 11
Now rotate the P1 slowly in clockwise direction & note the readings for Va (Anode Voltage) and
corresponding Ia (Anode Current) in the following observation table. Note: For a proper value
of gate current there will be a breakdown in the TRIAC. At breakdown condition there will be
sudden increment in the anode current (Ia) and simultaneously a decrement in the anode voltage
(Va).
16.
If breakdown is not achieved then increase the gate current slightly (by .05mA) and repeat steps
13 to 15 and check for breakdown condition.
Note: Rotate the pot P2 as precise as you can to observe breakdown of TRIAC.
17.
Observe the gate current for which breakdown is achieved and plot the graph between Va & Ia.
Note: Here you will observe that the value of Ia will be zero for the insufficient gate current.
V-I Characteristic with Negative Biasing
18.
19.
20.

Now connect the -35V DC supply to the circuit and repeat the process from step 1 to step 12.
Repeat steps 3 to 13.
Observe the gate current for which breakdown is achieved and plot the graph between Va & Ia.

THEORY
An SCR is a unidirectional device as it can conduct from anode to cathode only and it cannot be conduct from
cathode to anode. A triac can however conduct both directions. The TRIAC is a bidirectional, three terminal
semiconductors for controlling current in either direction. The term TRIAC is obtained from capital letters.
TRIode works an AC Below is the schematic symbol for the TRIAC shown in fig.

Fig: Schematic Symbol


Notce the symbol looks like two SCRs in parallel (opposite direction) with one triggers or gate terminal. The
main or power terminals are designated as MT1 and MT2. When the voltage on the MT2 is positive with regard to
MT1 and a positive gate voltage is applied, the left
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SCR conducts. When the voltage is reversed then the right SCR conducts. Minimum holding current, Ih, must be
maintained in order to keep a TRIAC conducting. A TRIAC operates in the same way as the SCR however it
operates in both a forward and reverse direction. To get a quick understanding of its operation refer to its

characteristic curve below and compare this to the SCR characteristic curve. It can be triggered into conduction
by either a PLUS (+) or MINUS (-) gate signal.. Obviously a TRIAC can also be triggered by exceeding the break
over voltage. This is not normally employed in TRIAC operation. The break over voltage is usually considered a
design limitation. One other major limitation, as with the SCR, is dV/dt, which is the rate of rise of voltage with
respect to time. A TRIAC can be switched into conduction by a large dV/dt. Typical applications are in phase
control, inverter design, AC switching, relay replacement, etc.

TRIAC CHARACTERISTICS:

OBSERVATION TABLE:

S.NO

FORWARD BIASING:
ANODE VOLTAGE
ANODE CURRENT
Va (V)
Ia (MA )

REVERSE BIASING
ANODE VOLTAGE
Va (V)

ANODE CURRENT
Ia (MA )

1
2
3
4
5
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6
7
8
9
10

APPLICATION
Power electronic systems are virtually in every electronic device. For example, around us:

DC/DC converters are used in most mobile devices (mobile phone, pda.) to maintain the voltage
at a fixed value whatever the charge level of the battery is. These converters are also used for
electronic isolation and power factor correction

AC/DC converters (rectifiers) are used every time an electronic device is connected to the mains
(computer, television...)
AC/AC converters are used to change either the voltage level or the frequency (international
power adapters, light dimmer). In power distribution networks AC/AC converters may be used
to exchange power between utility frequency 50 Hz and 60 Hz power grids.
DC/AC converters (inverters) are used primarily in UPS or emergency light. During normal
electricity condition, the electricity will charge the DC battery. During blackout time, the DC battery
will be used to produce AC electricity at its output to power up the appliances.

RESULT:
We have study the VI Characteristic of TRIAC with positive & negative biasing and plot the curve

between V & I

PRECAUTION
1) To make connection should be according to circuit diagram.
2) Connecting leads should not loose.
3) Connecting circuit should be check to be respected lab faculty after complete connection
Diagram.
4) Power Supply should not be ON during connecting leads to experimental kit.
5) Power supply should be OFF after performance of allotted practical

VIVA QUESTION
1) Fill in the blank(s) with the appropriate word(s)
i. A thyristor is turned on by applying a ________________ gate current pulse when it is
________________ biased.
ii. Total turn on time of a thyristor can be divided into ________________ time
________________ time and ________________ time.
iii. During rise time the rate of rise of anode current should be limited to avoid creating local
________________.

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iv. A thyristor can be turned off by bringing its anode current below ________________ current
and applying a reverse voltage across the device for duration larger than the
________________ time of the device.
v. Reverse recovery charge of a thyristor depends on the ________________ of the forward
current just before turn off and its ________________.

EXPERIMENT NO.:5
OBJECTIVE:
Find output and tranfer characteristics of MOSFET.

APPEARTUS REQURIED
1.
2.
3.
4.

MOSFET Trainer Kit


Connecting Leads
Voltmeter
Ammeter

CIRCUIT DIAGRAM:-

Fig. Cicuitdigram of MOSFET

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PROCEDURE:
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.

Connect +35 V, +15 V DC power supplies & Ground at their indicated position in the circuit by patch
cords.
Rotate both the potentiometer P 1 and P2 fully in counter clockwise direction and keep the toggle
switch at off position.
Connect +ve terminal of Ammeter to terminal 3 and ve terminal of Ammeter to Drain terminal to
measure drain current ID (mA).
Connect a 2mm patch cord between terminal 2 and Gate terminal.
Connect +ve terminal of voltmeter to terminal 1 and -ve terminal to ground to measure gate voltage
VGS.
Switch On the power supply & toggle switch.
Vary potentiometer P1 and set a value of gate voltage V GS at some constant value (3.8V, 3.9 V, 4
V...............5V).
Disconnect voltmeter between terminal 1 and ground.
Now connect voltmeter between terminal 4 and ground.
Vary the potentiometer P2 so as to increase the value of drain voltage V DS from zero to 35 V in step
and measure the corresponding values of drain current I d for different constant value, gate voltage V GS
in an observation table.
Repeat the procedure from step 7 for different sets of gate voltage V GS.
Plot a curve between drain voltage V DS and drain current ID, 10 using suitable scale with the help of
observation table. This curve is the required drain characteristic.

THEORY:The metaloxidesemiconductor field-effect transistor (MOSFET) is a device used for amplifying or


switching electronic signals. In MOSFETs, a voltage on the oxideinsulated gate electrode can induce a
conducting channel between the two other contacts called source and drain. The channel can be of nPower Electronisc-III

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type or p-type and is accordingly called an nMOSFET or a pMOSFET (also commonly nMOS, pMOS).
It is by far the most common transistor in both digital and analog circuits, though the bipolar junction
transistor was at one time much more common.
FET with an oxide coating between gate and channel is called a MOSFET (metaloxide semiconductor
field effect transistor) the figure below shows the oxide, insulating the gate from the channel. MOSFET
is voltage controlled device & required only small input current. Its switching speed is very high; it is
used in low power high frequency converter. But it has the problem of electrostatic discharge so require
special care in handling.

Here drain current is cut-off until the gate to source voltage reaches a specific magnitude. So, current control in
n-channel is effected by +ve source to gate voltage If VGS is set to zero, voltage applied between D & S of the
device, the absence of nchanne will result in current zero amperes With VDS some +ve voltage, VGS at zero
volts & terminal is directly connected t source there are in fact two reverse biased p-n junction between the ndoped & psubstrat to oppose any significant flow between drain & source Now of VGS & VDS is set at some
+ve voltage greater then zero, hence established Dgat at +ve potential with respect to source. As VGS is
increase, then significant increase in drain current (ID) is called threshold voltage & given by VT. Since channel
is non-existence with VGS= 0V and enhanced by the application of +ve gate-to-source voltage so this type of
MOSFET is called enhancement type. So with increase in VGS, drain current increase. If we hold VGS constant
& increase in level of VDS then ID will eventually reach saturation level.

APPLICATION:
AC to DC (rectification)
DC to AC (inversion)
DC to DC (chopping)
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AC to AC

OBSERVATION TABLE:

RESULT:
We have draw the output characteristics of MOSFET.

PRECAUTION
6) To make connection should be according to circuit diagram.
7) Connecting leads should not loose.
8) Connecting circuit should be check to be respected lab faculty after complete connection
Diagram.
9) Power Supply should not be ON during connecting leads to experimental kit.
10) Power supply should be OFF after performance of allotted practical

VIVA QUESTIONS:
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Fill in the blank(s) with the appropriate word(s).
i) A single phase fully controlled bridge converter can operate either in the _________ or ________
conduction mode.
ii) In the continuous conduction mode at least _________ thyristors conduct at all times.
iii) In the continuous conduction mode the output voltage waveform does not depend on the ________
parameters.
iv) The minimum frequency of the output voltage harmonic in a single phase fully controlled bridge
converter is _________ the input supply frequency.
v) The input displacement factor of a single phase fully controlled bridge converter in the continuous
conduction mode is equal to the cosine of the ________ angle.
Answer: (i) continuous, discontinuous; (ii) two; (iii) load; (iv) twice; (v) firing.

Power Electronisc-III

Mr. Nemi Chand Koli

Technical Officer-EE

POORNIMA COLLEGE OF ENGINEERING

EXPERIMENT NO.:6
OBJECTIVE:
Find output and tranfer characteristics of IGBT.

APPEARTUS REQURIED
1.
2.
3.
4.

IGBT Trainer Kit


Connecting Leads
Voltmeter
Ammeter

CIRCUIT DIAGRAM:-

Circuit diagram of IGBT

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characteristics

Out put characteristics

Transfer

PROCEDURE :
1. Rotate the potentiometer P1 fully in clockwise direction and P2 fully in counter clockwise
2. direction.
3. Connect Ammeter between point d and e to measure collector current Ic (mA). Connect a 2mm patch
cord between point a and b.
4. Connect voltmeter between point c and ground to measure the Gate voltage V GE and between point f
and ground.
5. Switch On the power supply.
6. Vary the potentiometer P1 in counterclockwise direction to set the gate voltage V GE (between 4.8V
and 5.6V).
7. Vary the potentiometer P2 in clockwise direction so as to increase the value of collector-emitter
voltage VCE from 0 to 35V in step and measure the corresponding values of collector current Ic for
different constant value of gate voltage VGE in an Observation Table 1.
8. Rotate the potentiometer P2 fully in the counterclockwise direction and potentiometer P1 fully in
clockwise direction.
9. Repeat the procedure from step 6 for different sets of gate voltage VGE.
10. Plot a curve between collector-emitter voltage current (V CE) and Collector current Ic using suitable
scale with the help of observation Table 1. This curve is the required collector characteristic.

THEORY:BASIC STRUCTURE:

The insulated gate bipolar transistor (IGBT) combines the positive attributes of BJTs and MOSFETs. BJTs
have lower conduction losses in the On-state, especially in devices with larger blocking voltages, but have
longer switching times, especially at turn-Off while MOSFETs can be turned on and off much faster, but
their on-state conduction losses are larger, especially in devices rated for higher blocking voltages. Hence,
IGBTs have lower on-state voltage drop with high blocking voltage capabilities in addition to fast switching
speeds and has become the most favored power device in Industrial application.

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The vertical cross sectional structure of an IGBT is shown in Figure 1 having four alternate p-n-p-n layers
with three terminals Emitter, Collector and Gate. A heavily doped p+ substrate has a lightly doped n-type
drift region grown on to it by epitaxial process. Then the p-type emitter is diffused with two subsequent ntype layers over doping windows.
The performance of an IGBT is closer to that of a BJT rather than a MOSFET. The circuit symbol of an
IGBT are shown in the below Figure 2. When the gate is positive with respect to the emitter and this voltage
is beyond the threshold value, an n channel is induced in the p-region of a MOSFET. These charge carriers
forward bias the base-emitter junction of the p-n-p transistor and holes are injected into the n-type drift
region. These injected holes cross the reverse biased collector junction of the p-n-p transistor and constitute
the collector current. This collector current is the base current for the np- n transistor, which is properly
biased in the active region. This amplifying collector current flows from the n-p-n transistor to the base of
the p-n-p transistor, hence a positive feedback exits and the device turns ON

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WORKING:When a positive voltage is applied to the collector terminal with the gate short circuited (V GE = 0) to the
emitter terminal, the upper junction (J2) becomes reverse biased and the device operates in forward blocking
mode i.e. there is no current flow between collector and emitter. If we set a positive voltage to V GE & VCE
then a current (Ic) will flow in collector terminal.
For a value less than the threshold level the collector current of an IGBT is 0mA.If we hold V GE constant and
increasing the VCE then Ic will reach a saturation level. So with increase in V CE and keeping the VGE to the
threshold value the collector current (Ic) will reach the saturation level. Further increase in Gate voltage the
value of collector current will increase.
The V-I characteristics of the IGBT is given below

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APPLICATION:
AC to DC (rectification)
DC to AC (inversion)
DC to DC (chopping)
AC to AC

OBSERVATION TABLE:
S.No.

Collector Voltage VCE

Collector Current Ic (mA) at constant value of Gate


Voltage VGE (volt)
VGE = V
VGE = V
VGE = V

1
2
3
4
5
6
7

RESULT:
We have drawn the output characteristics of IGBT.

PRECAUTION
1) To make connection should be according to circuit diagram.
2) Connecting leads should not loose.
3) Connecting circuit should be check to be respected lab faculty after complete connection
Diagram.
4) Power Supply should not be ON during connecting leads to experimental kit.
5) Power supply should be OFF after performance of allotted practical

Power Electronisc-III

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VIVA QUESTION
1) Fill in the blank(s) with the appropriate word(s)
i. A thyristor is turned on by applying a ________________ gate current pulse when it is
________________ biased.
ii. Total turn on time of a thyristor can be divided into ________________ time
________________ time and ________________ time.
iii. During rise time the rate of rise of anode current should be limited to avoid creating local
________________.
iv. A thyristor can be turned off by bringing its anode current below ________________ current
and applying a reverse voltage across the device for duration larger than the
________________ time of the device.
v. Reverse recovery charge of a thyristor depends on the ________________ of the forward
current just before turn off and its ________________.

EXPERIMENT NO.: 8
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OBJECTIVE:
Study And Test Firing Circuit For SCR- UJT Firing Circuits.

APPEARTUS REQURIED
o
o
o
o

IGBT Trainer Kit


Connecting Leads
Voltmeter
Ammeter

CIRCUIT DIAGRAM:-

PROCEDURE:
1.
2.
3.
4.
5.
6.

Connect Ammeter between point c and b to measure Anode-cathode current IAK (mA).
Connect Ammeter between point f and e to measure the gate Current IG (mA).
Connect voltmeter between point a and ground to measure the anodecathode voltage VAK .
Rotate the potentiometer P1 fully in clockwise direction and P2 fully in counter clockwise direction.
Switch On the power supply.
Vary the potentiometer P2 in clockwise direction so as to increase the anode to cathode voltage. Set this
voltage above 11V.
7. Vary the potentiometer P1 in counterclockwise direction so as to increase the value of gate current in
step and measure the corresponding values of anode to cathode current IAK in an Observation Table 1.
8. Initially there will not be any current flow across the SCR while varying the gate current the ammeter
connected at point c and d suddenly increases and the voltmeter connected at point e and ground
will suddenly decrease. This shows that the SCR is triggered.
9. Now vary the P1, there will not be any effect in the anode-cathode voltage and current of SCR.
To repeat the experiment switch off the power supply and follow the procedure from step 4
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THEORY:
The UJT is often used as a trigger device for SCRs and TRIACs. The diode-resistance, resistance,
resistance-capacitance and the diode-resistance capacitance circuit produce prolonged pulses, so power
dissipation is more at the gate. The power loss can be limited by the use of this UJT in the firing circuit.
Pulse triggering is preferred as it offers several merits over R and RC triggering. Gate characteristics
wide spread; pulses can be adjusted easily to suit such a wide spectrum of gate characteristics. The
power level in pulse triggering is low as the gate drive is discontinuous; pulse triggering is therefore
more efficient. The resistor and capacitor connected to the emitter form an RC timing circuit. Normally,
the value of capacitor is fixed and the value of resistor is of potentiometer type. The charging rate of the
capacitor depends on the value of the resistor and since the resistor is variable the RC time constant can
be controlled.

When the voltage across the capacitor is equal to more than the peak voltage VP of the UJT, it starts
conducting. Since the UJT has a negative resistance, its voltage starts decreasing up to the valley
voltage, and the capacitor discharges up to the valley voltage. This repetitive process produces a train of
pulses at its output is shown in figure 2. From the output voltage waveform it is clear that the output
pulses has a very small width and that a long relaxation time exits between the two pulses. Therefore it
is said that the device is relaxed in this duration and is called the relaxation oscillator.

Power Electronisc-III

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OBSERVATION TABLE:
Set VAK = +12V
S.No

Gate current IG(mA)

Anode to cathode
current IAK(mA)

Anode to cathode
voltage VAK(V)

1
2
3
4
5
6
7
RESULT:
We study and test firing circuit for SCR- UJT firing circuits.

Power Electronisc-III

Mr. Nemi Chand Koli

Technical Officer-EE

POORNIMA COLLEGE OF ENGINEERING

PRECAUTION
6) To make connection should be according to circuit diagram.
7) Connecting leads should not loose.
8) Connecting circuit should be check to be respected lab faculty after complete connection
Diagram.
9) Power Supply should not be ON during connecting leads to experimental kit.
10) Power supply should be OFF after performance of allotted practical

VIVA QUESTIONS:
Fill in the blank(s) with the appropriate word(s).
i) A single phase fully controlled bridge converter can operate either in the _________ or ________
conduction mode.
ii) In the continuous conduction mode at least _________ thyristors conduct at all times.
iii) In the continuous conduction mode the output voltage waveform does not depend on the ________
parameters.
iv) The minimum frequency of the output voltage harmonic in a single phase fully controlled bridge
converter is _________ the input supply frequency.
v) The input displacement factor of a single phase fully controlled bridge converter in the continuous
conduction mode is equal to the cosine of the ________ angle.
Answer: (i) continuous, discontinuous; (ii) two; (iii) load; (iv) twice; (v) firing.

Power Electronisc-III

Mr. Nemi Chand Koli

Technical Officer-EE

POORNIMA COLLEGE OF ENGINEERING

EXPERIMENT NO.7
OBJECTIVE: Find UJT static emitter characteristics and study the variation in peak
point and valley point

APPARATUS REQUIRED:
1. UJT traner kit
2. Voltmeter-2nos(0-20v)

3. Ammeter(0-30ma)
4. patchcords
5. Powersupply-2no (0-30v,2A)

CIRCUIT DIAGRAM:-

Circuit diagram of UJT


Power Electronisc-III

Mr. Nemi Chand Koli

Technical Officer-EE

POORNIMA COLLEGE OF ENGINEERING

THEORYThe static emitter characteristic (a curve showing the relation between emitter voltage V E and emitter
current IE) of a UJT at a given inter base voltage V BB is shown in figure. From figure it is noted that for
emitter potentials to the left of peak point, emitter current I E never exceeds IEo . The current
IEo corresponds very closely to the reverse leakage current I Co of the conventional BJT. This region, as
shown in the figure, is called the cut-off region. Once conduction is established at VE = VP the emitter potential VE starts decreasing with the increase in emitter current I E. This Corresponds exactly with the
decrease in resistance RB for increasing current IE. This device, therefore, has a negative resistance region
which is stable enough to be used with a great deal of reliability in the areas of applications listed earlier.
Power Electronisc-III
Mr. Nemi Chand Koli
Technical Officer-EE

POORNIMA COLLEGE OF ENGINEERING


Eventually, the valley point reaches, and any further increase in emitter current I E places the device in the
saturation region, as shown in the figure. Three other important parameters for the UJT are I P, VV and
IV and are defined below:
Peak-Point Emitter Current. Ip. It is the emitter current at the peak point. It represents the rnimrnum
current that is required to trigger the device (UJT). It is inversely proportional to the interbase voltage V BB.
Valley Point Voltage VV The valley point voltage is the emitter voltage at the valley point. The valley
voltage increases with the increase in interbase voltage V BB.
Valley Point Current IV The valley point current is the emitter current at the valley point. It increases
with the increase in inter-base voltage VBB.
The static emitter characteristic (a curve showing the relation between emitter voltage V E and emitter
current IE) of a UJT at a given inter base voltage V BB is shown in figure. From figure it is noted that for
emitter potentials to the left of peak point, emitter current I E never exceeds IEo . The current
IEo corresponds very closely to the reverse leakage current I Co of the conventional BJT. This region, as
shown in the figure, is called the cut-off region. Once conduction is established at VE = VP the emitter potential VE starts decreasing with the increase in emitter current I E. This Corresponds exactly with the
decrease in resistance RB for increasing current IE. This device, therefore, has a negative resistance region
which is stable enough to be used with a great deal of reliability in the areas of applications listed earlier.
Eventually, the valley point reaches, and any further increase in emitter current I E places the device in the
saturation region, as shown in the figure. Three other important parameters for the UJT are I P, VV and
IV and are defined below:
Peak-Point Emitter Current. Ip. It is the emitter current at the peak point. It represents the rnimrnum
current that is required to trigger the device (UJT). It is inversely proportional to the interbase voltage V BB.
Valley Point Voltage VV The valley point voltage is the emitter voltage at the valley point. The valley
voltage increases with the increase in interbase voltage V BB.
Valley Point Current IV The valley point current is the emitter current at the valley point. It increases
with the increase in inter-base voltage VBB.

OBSERVATION TABLE:
Sr. Voltage(volt)
no
1
2
3
4
5
Power Electronisc-III
6
7

Current(ma)

Mr. Nemi Chand Koli

Technical Officer-EE

POORNIMA COLLEGE OF ENGINEERING

RESULT: Study the UJT static emitter characteristics and study the variation in
peak point and valley point
Special Features of UJT. The special features of a UJT are :
1. A stable triggering voltage (VP) a fixed fraction of applied inter base voltage V BB.
2. A very low value of triggering current.
3 A high pulse current capability.
4. A negative resistance characteristic.
5. Low cost.

Power Electronisc-III

Mr. Nemi Chand Koli

Technical Officer-EE

POORNIMA COLLEGE OF ENGINEERING

Lab Manual

POWER ELECTRONICS-III LAB


(5EE7)
DEPARTMENT OF ELECTRICAL ENGINEERING

INSTRUCTIONS
Power Electronisc-III

Mr. Nemi Chand Koli

Technical Officer-EE

POORNIMA COLLEGE OF ENGINEERING

BEFORE ENTERING THE LAB


Come prepared with theory related to the practical to be performed in the lab.
Bring completed practical file on every turn.
Carry lab copy for noting down readings.

WHILE WORKING IN THE LAB


Adhere to experimental schedule as instructed by the faculty concerned.
Get the previously performed practical checked by the faculty.
Get the result of the current practical checked by the instructor in the lab copy.
Students must work on their assigned experiment kit/computer on respective turn of
their lab.
Students are responsible for the experiment kit/computer system and attached peripherals
they are working on respective turn of his/her lab. They should immediately intimate any
fault or malfunctioning of these to the concerned faculty member.
Strict action (including penalty) will be taken against the student found stealing any
equipments from the lab.
The experiment kits/instruments and lab instruction sheets must be got duly issued from
the lab instructor at the commencement of the lab and must be returned in working
condition at the end of lab.

LAB ETHICS
Dos:
Shut down the computer experiment kits and instruments before leaving the lab.
Power Electronisc-III

Mr. Nemi Chand Koli

Technical Officer-EE

POORNIMA COLLEGE OF ENGINEERING

Keep the bags outside lab.


Be punctual.
Maintain decorum in the lab.
Utilize lab hours for experiments.
Get your pen drives scanned by the lab in-charge before using in the lab.

Donts:

External material is not permitted in the lab.


Mobile phone is not permitted in the labs.
Dont litter in the lab.
Dont delete and make any modification in the setup/configuration files.
Students are not permitted to carry any lab equipments outside the lab.

MARKING /ASSIGNMENT SCHEME

Total Marks:75
Sessional Marks: 45
Power Electronisc-III

Mr. Nemi Chand Koli

Technical Officer-EE

POORNIMA COLLEGE OF ENGINEERING


Practical Marks:

30

Sessional Marks break up-

Attendance
10

Record
Performance
10
5
Lab Plan and Time Distribution

Viva
20

Lab Plan:
Total no. of Experiments
No. of turns required

: 11
: 3

Distribution of Lab hours: (Please change the distribution as per the lab timings) - the line
written in parenthesis needs to be deleted while finalizing this lab instruction sheet

Explanation of Experiment & Logic


Performing the Experiment
File Checking
Viva/Quiz
Solving of Queries

Power Electronisc-III

:
:
:
:
:

20 Minutes
50 Minutes
05 Minutes
05 Minutes
10 Minutes

Mr. Nemi Chand Koli

Technical Officer-EE

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