Linear electronic

Lecture No. 1

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Lecture No. 2

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Lecture No. 3

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Lecture No. 4
Example: find Frequency response analysis for the circuit shown
in figure below. Where
RS=4kRB1=8kRB2=4k RE=3.3kRC=6k RL=4k
VCC = 12V, IE 1 mA, o = 100, C= 13.9 pF, C = 2 pF,
ro =100 kr = 2.56kCin= Cout = 1F, CE=100F.

Cin

1. Mid-Band Gain Calculation

R L'

46
2.4k
46

But REF = 0

Cout

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100 2.4k
93.75
2.56k

Av

A Vs 93.75

1.31k
23.13
4k 1.31k

2. Low-Frequency Response

fout

fin

1
26k 4k 10 6

15.9Hz

1
24k 1.31k 10 6

30Hz

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2. High-Frequency Response
From here up in frequency, we will start to worry about the details
of whats inside the BJT. Now those junction capacitances matter,
so one needs to use the full Hybrid- model.

Ctotal 19.3 21 0.039 2.4k 208.5pF

R 's

fh1

R in R s
1.31k 4k

987
R in R s 1.31k 4k

1
2 987 208.5 10 12

773.5MHz

Also, we will discuss other examples and questions

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Lecture No. 5
Multi-stage "Cascaded" Amplifiers
Most practical amplifiers required more gain than can be obtain
from a single stage. Consequently, it is common practice to feed
the output of one amplifier stage into the input of the next stage.
Gain and bandwidth considerations in cascaded amplifiers
Most of a cascaded amplifier stages are used to obtain either
voltage gain or a current gain. However, in most cascaded
amplifiers, ultimately the power gain is important. If a voltage gain
is required, we can calculate the total gain by using the equation
for voltage gain of one stage. Thus, the voltage gain for stage1 is:

Vo1
Vin1
In addition, the voltage gain for stage 2 is:
A v1

A v2

Vo2
Vin2

The gain for additional stages can be written in a similar manner.

Then, the total amplifier voltage gain Atotal for n-cascaded stages
is:
Vo(n 1) Vo(n 1)
Vo1 Vo2 Vo3

. . .

Vin1 Vo1 Vo2

Von
Vin1

Atotal A1 A2 A3 . . . An
In same manner, we can derive the current gain or power gain
for the cascaded amplifier.
Let f1 and f2 is the lower and upper cutoff frequencies,
respectively. The voltage or current gain of one stage has been
reducing to 0.707 of its reference value at these frequencies. Now,
if we have an amplifier with two identical stages of amplification,
the voltage gain at f1 will be reduced by factor of 0.707 in each
stage. Thus, the amplifier gain at f1 (and also f2) will be:
0.707 Av1 0.707 Av2 = 0.5 Atotal

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For n-identical cascaded stages of amplification, the gain at f1 and

f2 will be (0.707)n Av.
The voltage gain per stage is given for the low frequency by:
j
A Ao
j 1

A Ao

1
1 j

The magnitude of above equation is:

A Ao

1 ( 1 )2

If there are n-cascaded stages, the magnitude of the total gain

amplifier is:

A total

1
n
Ao

1 2
1 ( )

Now , if is to be equal to L , the term multiplying Ao must be

equal to .0707 or 1/(2)1/2 . Then
2

1

1

21/ 2

1/ n

1 1
L

Then,
L

n/2

21 / n 1
The voltage gain per stage is given for the low frequency by:

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A Ao

2
2 j

As similar
H 2 21/ n 1

From above equations, L will be greater than 1 if n is greater

than one and H will be less than 2 if n is greater than one. Thus,
the bandwidth of the amplifier decreases as the number of
cascaded stages increases. On the other hand, if the amplifier
bandwidth is to remain constant, the stage bandwidth must
increase as the number of cascaded stages increases.
Example: If the f2 =32MHz, Atotal=1000, and fH= 12MHz,
Calculate mid-band gain "Aon" for n=3 & 7 cascaded stages.
Determine the gain per stage for each amplifier.
2 = 232106 rad/sec
H = 212106 rad/sec

A total

Aon

1 ( H )2
2

1. For n=3

1
1000 A o3
2
2 12 106

1
6
2 32 10

Ao3 =1218.2
Ao=10.68
2. For n = 7

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Ao7 =1584.98
Ao=2.865

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Lecture No. 6
PRACTICAL CASCADE AMPLIFIER CIRCUIT

In the above figure, let us work out the gain assuming nothing
about the Rin and Rout of each stage, looking at them as voltage
dividers between each stage and between the last stage and the
load.

The equation reduces to the ideal case of AV = A2 for two

identical stages if we let the Ro's go to 0 and the Ri's go to infinity.
For example: let Ro = 100and Rin = 1M, what is the gain with
two stages of gain A in series? (Assume RL = 1Mtoo).

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By the time you reached that point, other effects would have
caused much more trouble (for example, the fact that noise from
each successive stage is add to the noise coming into that stage
and amplified... on down the line!).

Cascode Amplifier Design Example

Specifications:
DC power dissipation: PD < 25 mW
Power Supply: 12 VDC
Voltage Gain: -50X
Load: Resistive, 50 K
Assume RS = 0
Must use 2N2222A Transistors (NPN, = 150 measured)

DESIGN PROCESS:
1) Pick Vcc unless specified.

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Vcc= 12 VDC
2) Calculate IMax.

3) Select an IC < IMAX and solve for gm2.

Let IC = 1.8 mA

4) Let RS = 0 and solve for RC:

RC = 730
5) Use a 1/4, 1/4, 1/4, 1/4 biasing rule to set up bias resistors.
Let VCE of the transistors = Vcc/4 = 3V and solve the following
for RE.

6) The required base current is:

7) Solve for the biasing resistors.

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Lecture No. 7
FEEDBACK
There are two types of feedback: regenerative (positive
feedback) and degenerative (negative feedback).
Unless you want your circuit to oscillate, we usually use
NEGATIVE FEEDBACK...
This idea came about in the late 1920s when they were able to
build amplifiers with reasonable gains, but with gains that were
difficult to control from amplifier to amplifier...
PROPERTIES OF NEGATIVE FEEDBACK
Nonlinear distortion can be reduced.
The effects of noise can be reduced (but not the noise itself).
The input and output impedances of the amplifier can be
modified.
The bandwidth of an amplifier can be extended.
Of course, if you use negative feedback, overall gain of the
amplifier is always less than the maximum achievable by the
amplifier without feedback.
THE BASIC FEEDBACK CIRCUIT

With an input signal xs, an output signal xo, a feedback signal xf,
and an amplifier input signal xi, let us look at the basic feedback
circuit illustrated above.

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The amplifier has a gain of A and the feedback network has a

gain of ...
The input to the amplifier is,
x i = xs - xf
The output of the amplifier is,
xo = A xi
We can obtain an expression for the output signal in terms of the
input signal and the feedback gain...
xo = A xs - xf = A xs - xo
Re-arranging,
xo = A xs - Axo xo (1 + A= A xs
From which we obtain the negative feedback equation by solving for the
overall gain

For positive feedback, you only need to change the + sign in the
denominator to a - sign.
It is easy to obtain the equation for the feedback signal, xf,

If the amplifier gain and the loop gain are large (i.e. A>> 1),
then the feedback signal xf becomes nearly an identical copy of
the input signal xs.
Here we have assumed that there was an input comparator or
mixer and an output sampler that provided us with a copy of
the output signal for use as a feedback signal.
The form these devices take depends upon whether the
amplifiers input and output are current or voltage based...
We refer to a given feedback amplifier in terms of the MIXING SAMPLING feedback, where MIXING and SAMPLING are either
SHUNT or SERIES...
There are four possible types... (For sampling think of how you
would measure V or I in the lab... series for current and shunt for
voltage).

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TYPES OF MIXER

TYPES OF SAMPLER

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Lecture No. 8
INPUT-OUTPUT (MIXING - SAMPLING)
SERIES-SHUNT
series (voltage) mixing, voltage-sampling V-V
SHUNT-SERIES
shunt (current) mixing, current-sampling, I-I
SERIES-SERIES
series (voltage) mixing, current-sampling V-I
SHUNT-SHUNT
shunt (current) mixing, voltage-sampling I-V
Let's consider a familiar example.... the common-emitter amplifier.

Since we sample the output current and generate a voltage

feedback signal, this is a series-series feedback topology.
Considering the output current to be the output signal (e.g. i o = ic)
and the input to be vs (for simplicity, assume that RB1 and RB2 are
very large), the units of the basic amplifier are,

We know that the feedback voltage is given by Ohm's Law as,

Vf=ioRE so the feedback network gain, = RE (NOTE: don't get

confused! This is NOT the transistor's !)
Transistor's current gain = io/ vi gm in -1

The output current is given by:

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io = gm (vs - vf) = gm(vs - ioRE)

Combining these equations to find the overall gain for the
amplifier, Gm, we end up with an equation we have seen before!

Now that:

SERIES-SHUNT FEEDBACK
(SERIES [VOLTAGE] MIXING, VOLTAGE-SAMPLING)

Two examples are shown below. On the left, the common emitter
amplifier connect to feedback circuit consist of (R1 and R2).

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On the right, the non-inverting operation amplifier configuration

using an ideal op-amp (infinite input impedance, zero output
impedance)...
Vcc

RL
Vo
Vin

Q1
NPN

R2
R1

R1
R2
RE

C1

Notice how you can re-draw the two feedback resistors as a

feedback network of the form we are discussing.
The feedback network gain can be obtained directly by voltage
division,

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Lecture No. 9
This can be plugged into the feedback gain equation to find the
overall gain,

Continuing with the series-shunt case, but including the input and
output resistance terms (Ri and Ro).
We can obtain an expression for the equivalent input and output
resistance...

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The output resistance can also be obtained by the same method

we used previously:
Reduce the input signal (Vs) to zero and apply a test voltage Vt at
the output.

Starting with the definition,

Therefore,

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Lecture No. 10
Power Transistor Amplifier
Amplifiers are used to increase the level of a signal and,
depending on the increase required; stages are often cascaded to
increase the gain. The last stage of the cascade may be required
to drive same form of load, for example a loudspeaker, a
servomechanism or a coaxial cable for RF applications.
Power amplifiers are classified by the nature of the collector
current waveform into class A, class B and class C. This
classification is explained in the following figure, where a typical
transfer characteristic of a transistor amplifier is used.
CLASS-A AMPLIFIER
The simplest possible circuit of a class-A amplifier is shown in
Figure below where RL is the load resistance and RB is the biasing
resistance.

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We already know that for the maximum undistorted peak-to-peak

output voltage swing the Q-point should be selected on the basis
of the following equation:

In this equation, RDC is the dc resistance and RAC is the ac

resistance in the collector-emitter circuit. Thus,
RDC = RAC = RL

(In circuit above, there is only one resistance)

The collector-to-emitter voltage at the operating point is:

When the input signal goes negative, it causes a decrease in

the collector current and a corresponding increase in the collectorto-emitter voltage. The ac component of the output voltage is now
positive. This situation continues until the collector current reaches
zero and the collector-to-emitter voltage becomes equal to VCC.

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This is the maximum value of the collector-to-emitter voltage

ignoring the nonlinear operation in the cut-off region.
From the above discussion, it should become clear that the
output voltage is zero when the input signal is zero and the
collector voltage is VCC. At that time, the collector current is ICQ.
As the collector current becomes 2ICQ, its ac component has a
maximum value of ICQ, and the collector-to-emitter voltage is zero.
Thus, the ac component of the output voltage has a minimum
value of -VCC. When the collector current becomes zero, the ac
component of the collector current has a minimum value of ICQ,
and the ac component of the output voltage attains a maximum
value of VCC. With this understanding, we can write the timedomain expressions for the total collector current and total
collector-to-emitter voltage as:

The
instantaneous power dissipated by the transistor is:

- Where the first term, ICQ VCC, is the power dissipation at the Qpoint when there is no input signal.
- The second term, I VCC sin2 (t), is due to the input signal.
- Figure below shows a plot of the instantaneous power dissipation
by the transistor.

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Since the average value of a sin2 (wt) function is , the average

power dissipated by the transistor, is:

The instantaneous power delivered to the load is:

Thus, the average power delivered to the load is:

We can substitute for ICQ RL = VCC, and obtain an expression

for the maximum value of the average power delivered to the load
as:

The power supplied by the source is:

We can determine the efficiency of the class-A amplifier as:

Did you notice that the average power dissipated by the

transistor at its Q-point is twice as much as the average
power output? For this reason, class-A configuration should be
used only when the power output is less than or equal to 1 W.

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Lecture No. 11
Example:
Design a common-emitter amplifier that delivers 0.5W power to a
100 resistor. Use a transistor that has a maximum current rating
of 500mA, collector-to-emitter saturation voltage of 0.5V,
breakdown voltage of 40V, and the common-emitter current gain of
100.
Solution:
Let us first design the common-emitter amplifier. We have selected
a four-resistor bias circuit as shown in Figure below because of its
stable operation.

The average power supplied to the 100-W load resistor is 0.5 W.

then;

The maximum current through the transistor is expected to be

twice as much, i.e. 200mA during the positive excursion of the
collector current. Since the transistor can supply a maximum
current of 500mA, it is safe to use this transistor. The undistorted
maximum output voltage swing is 10 V (100mA100 ).
Let us add a 10% safety factor to the current in order to keep
the swing from entering the saturation region on one hand and the

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cut-off region on the other. This will help keep the distortion to its
minimum.
Therefore, let us select, ICQ = 110mA.
- We can now determine the supply voltage as:

- At the Q-point, the base current is:

I
110mA
IBQ CQ
1.1mA

100
- Let us select a current in R2 that is nearly equal to 10 times the
base current.
0.7
R2
64
3
10 1.1 10
Thus, the current through R1: I1 I2 IBQ 10 1.1 11.1mA
We can now compute R1:

R1

V cc Vbe
22 0.7

1.9k
I1
11.1 10 3

The power supplied by the dc source, is:

Ps (ICQ I1) Vcc (110 11.1)mA 22 2.66W
But: PL=0.5W

PL
0.5

0.188 18.8%
PS 2.66
1
PT(MAX ) VCC ICQ 11 110mA 1.21W
2

Then,

In order to determine the voltage gain, current gain, power gain

and input resistance, we can represent the circuit in the midfrequency range by its model as shown in Figure below.

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Since the base current is 1.1mA, the equivalent resistance in the

base circuit is:
V
25
r T
22.7
IBQ 1.1
The base current can now be computed as:

Where;
circuit.

is the equivalent resistance in the emitter

The collector current is:

The output current is:

Av

Vo
100 100

440
Vin
101 (22.7 / 101)

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R in 16.6
Thus, the current gain:

AI = -73.2

Finally, the power gain is:

AP = AV AI
AP=(-73.2) (-440) = 32208

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Lecture No. 12
CLASS B AMPLIFIER
One of the major disadvantages of a class-A amplifier is that it
dissipates maximum power at its Q-point. The amplifier is
consuming power even when there is no signal. In fact, the power
consumption goes down only when the input signal is present. We
can reduce the power consumption just by biasing the transistor at
the cutoff point. At the cutoff point, the voltage drop across the
transistor is at its maximum value while the current though it is
zero. When an amplifier is biased at its cutoff point, it is called
the class-B amplifier.
Let us consider the situation when the input voltage begins its
positive cycle. For the circuit shown, the transistor will not begin to
conduct until the input signal is equal to its base-to-emitter voltage
drop VBE. As soon as the input voltage goes above VBE, the
transistor turns on and the conduction process begins. The output
voltage will simply be VIN VBE. As the input voltage increases, the
output voltage increases also and so does the current in the
collector.

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The average value of the half-wave collector (load) current is:

Thus, the power supplied by the dc voltage source is:

The effective (rms) value of the load current is:

The power supplied to the load is:

It is clear that the efficiency is proportional to the amplitude of

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the collector current. Thus, efficiency would be maximum

when IO(Peak) = IACM.
V
I ACM CC
Then;
RL
Thus, the maximum power supplied by the dc voltage source is:

The maximum power delivered to the load is:

We can now compute the maximum efficiency of the class-B

amplifier as:

The power dissipated by the transistor can be obtained by:

Differentiating this equation with respect to IO(Peak) and setting it

equal to zero, we obtain the peak value of the collector current that
results in maximum power dissipation in the transistor.

Example
A class-B amplifier of the type shown in Figure below drives a
load of 100 . It operates from a 15-V dc supply. Assume that the
base-to-emitter turn on voltage is essentially zero, is very large,
and the output voltage is basically sinusoidal.
1- What is the maximum power it can deliver to the load when its
collector-to-emitter saturation voltage is 0.5 V?
2- Efficiency.
3- The average and maximum power dissipated by the transistor.

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Solution:
When the base-to-emitter turn on voltage (VBE) is neglected, the
transistor turns on as soon as the input voltage becomes positive.
Taking into account the collector-to-emitter saturation [VCE(SAT)]
voltage of 0.5 V into account, the maximum possible output
voltage is:

The maximum value of the load (collector) current is:

The average and rms values of the load current are:

The power supplied by the 15-V dc source is:

The maximum power delivered to the load is:
The efficiency of the class-B amplifier is:

The average power dissipated by the transistor is:

The maximum power dissipation by the transistor is:

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Lecture No. 13
CLASS-B PUSH-PULL AMPLIFIER
As explained in the previous section, the class-B amplifier is
better than the class-A amplifier because it has high efficiency.
However, the class-B amplifier can only amplify the positive-half of
the input signal. In order to be able to amplify the entire signal, we
can use two complementary transistors as shown in Figure below.

When the input signal is positive, the NPN transistor Q1 turns ON,
the PNP transistor Q2 is OFF, and the output voltage is positive.
The NPN transistor is pushing the current into the load resistor
during the positive cycle of the input voltage. The output voltage
can be expressed as:
The maximum value of the output voltage is obtained during the
positive cycle when the NPN transistor just begins to saturate.
That is,

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And

As the input voltage falls below VBE, the PNP transistor Q2

begins to conduct and it pulls the current from the load. The NPN
transistor Q1 pushes the current into the load and the PNP
transistor Q2 pulls the current through it. This is why this circuit
configuration is referred to as the Push-Pull amplifier.
As the PNP transistor, Q2 turns ON, the NPN transistor Q1cuts
off and the output voltage is negative. The saturation voltage of the
PNP transistor limits the minimum value of the output voltage.
Since we are using the two complementary transistors, we expect
the magnitude of the saturation voltage for both transistors to be
the same. That is VEC(SAT) of the PNP transistor is equal to VCE(SAT)
of the NPN transistor. Thus, the minimum value of the output
voltage is:

And
Let us denote the amplitude (the magnitude of the maximum
possible swing) of each output waveform as:
The maximum current through each transistor is:

The average current through each transistor is:

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Example
A class-B push-pull amplifier drives a load of 100. It operates
from a dual 15V dc supply. Assume that the base-to-emitter turn
on voltage is zero, is very large, and the output voltage is
essentially sinusoidal.
1- What is the maximum power it can deliver to the load when the
collector-to-emitter saturation voltage for each transistor is 0.5 V?
2- Efficiency of power transistor amplifier.
Solution:

The maximum, unclipped peak-to-peak output voltage that we can

obtain from the push-pull amplifier is 29 V.

The maximum power delivered to the load is:

The total power supplied by the 15-V and the 15 V dc sources is:

The efficiency of the class-B amplifier is:

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Lecture No. 14
Logic gates
A logic gates is an electronic circuit which make decisions. It has one
output and one or more inputs.

1. NOT-Gate
It is so called because its output is NOT the same as its input. It is also
called inverter because it inverts the input. It has one input and one output
as shown in figure below.

Figure below

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2. OR-gate
The output of this circuit is logic "1" when either one input is logic "1" as
shown in figure below.

Figure

Figure

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